Add LVSolarBuck64 firmware and debug console with uv support
STM32G474RB firmware for solar buck converter with MPPT, CC control, Vfly compensation, and adaptive deadtime. Includes Textual TUI debug console for real-time telemetry, parameter tuning, and SQLite logging. Added pyproject.toml for uv: `cd code64 && uv run debug-console` Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
This commit is contained in:
27
code64/Core/Inc/PI.h
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27
code64/Core/Inc/PI.h
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@@ -0,0 +1,27 @@
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/*
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* cc_pid.h
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*
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* Created on: Jun 10, 2025
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* Author: janik
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*/
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#ifndef INC_PI_H_
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#define INC_PI_H_
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#include <stdint.h>
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#include <stdint.h>
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typedef struct {
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float Kp;
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float Ki;
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float prev_error;
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uint16_t output;
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uint16_t out_min;
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uint16_t out_max;
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} PIController;
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void PI_Init(PIController *pi, float Kp, float Ki, uint16_t out_min, uint16_t out_max);
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uint16_t PI_Update(PIController *pi, float target, float measurement);
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#endif /* INC_PI_H_ */
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30
code64/Core/Inc/cc_controller.h
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30
code64/Core/Inc/cc_controller.h
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/*
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* cc_controller.h
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*
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* Created on: Jun 11, 2025
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* Author: janik
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*/
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#ifndef INC_CC_CONTROLLER_H_
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#define INC_CC_CONTROLLER_H_
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#include <stdint.h>
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#include <math.h>
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typedef struct {
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float gain; // Step per unit error
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float min_step; // Minimum step size (in float)
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float max_step; // Maximum step size (in float)
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float output_f; // Internal float output
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uint16_t out_min; // DAC min
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uint16_t out_max; // DAC max
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} CCController;
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void CC_Init(CCController *cc, float gain, float min_step, float max_step,
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uint16_t out_min, uint16_t out_max, float initial_output);
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uint16_t CC_Update(CCController *cc, float target, float measurement);
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#endif /* INC_CC_CONTROLLER_H_ */
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165
code64/Core/Inc/debug_protocol.h
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165
code64/Core/Inc/debug_protocol.h
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/*
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* debug_protocol.h
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*
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* Created on: Mar 5, 2026
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* Author: janik
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*/
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#ifndef INC_DEBUG_PROTOCOL_H_
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#define INC_DEBUG_PROTOCOL_H_
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#include "stm32g4xx_hal.h"
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#include <stdint.h>
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/* Frame format: [0xAA] [CMD_ID] [PAYLOAD_LEN] [PAYLOAD...] [CRC8] */
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#define PROTO_SYNC_BYTE 0xAA
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#define PROTO_HEADER_SIZE 3 /* sync + cmd + len */
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#define PROTO_MAX_PAYLOAD 128
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#define PROTO_RX_BUF_SIZE 144
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/* Command IDs */
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#define CMD_TELEMETRY 0x01 /* STM32 -> PC */
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#define CMD_PARAM_WRITE 0x02 /* PC -> STM32 */
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#define CMD_PARAM_WRITE_ACK 0x03 /* STM32 -> PC */
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#define CMD_PARAM_READ_ALL 0x04 /* PC -> STM32 (no payload) */
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#define CMD_PARAM_VALUE 0x05 /* STM32 -> PC (same layout as ParamWritePayload) */
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#define CMD_PING 0x10 /* PC -> STM32 */
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#define CMD_PONG 0x11 /* STM32 -> PC */
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#define CMD_ERROR_MSG 0xE0 /* STM32 -> PC (text string payload) */
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/* Parameter type codes */
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#define PTYPE_FLOAT 0
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#define PTYPE_UINT16 1
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#define PTYPE_UINT8 2
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#define PTYPE_INT32 3
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/* Parameter IDs — Vfly controller 0x20-0x2F */
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#define PID_VFLY_KP 0x20
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#define PID_VFLY_KI 0x21
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#define PID_VFLY_CLAMP 0x22
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#define PID_VFLY_LOOP_COUNTER_TRIGGER 0x23
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#define PID_VFLY_ACTIVE 0x24
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#define PID_VREF 0x25
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/* Parameter IDs — CC controller 0x30-0x3F */
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#define PID_CC_TARGET 0x30
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#define PID_CC_GAIN 0x31
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#define PID_CC_MIN_STEP 0x32
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#define PID_CC_MAX_STEP 0x33
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#define PID_CC_LOOP_COUNTER_TRIGGER 0x34
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#define PID_CC_ACTIVE 0x35
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/* Parameter IDs — MPPT controller 0x40-0x4F */
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#define PID_MPPT_STEP 0x40
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#define PID_MPPT_IREF_MIN 0x41
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#define PID_MPPT_IREF_MAX 0x42
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#define PID_MPPT_DV_THRESHOLD 0x43
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#define PID_MPPT_LOOP_COUNTER_TRIGGER 0x44
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#define PID_MPPT_ACTIVE 0x45
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#define PID_MPPT_INITIAL_IREF 0x46
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#define PID_MPPT_DEADBAND 0x47
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#define PID_VIN_MIN_CTRL 0x50
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/* Parameter IDs — Deadtime 0x60-0x6F */
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#define PID_DT_SEG0 0x60 /* 0–3 A */
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#define PID_DT_SEG1 0x61 /* 3–5 A */
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#define PID_DT_SEG2 0x62 /* 5–10 A */
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#define PID_DT_SEG3 0x63 /* 10–20 A */
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#define PID_DT_SEG4 0x64 /* 20–30 A */
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#define PID_DT_SEG5 0x65 /* 30–45 A */
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/* Telemetry payload — 68 bytes */
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typedef struct __attribute__((packed)) {
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float vin;
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float vout;
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float iin;
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float iout;
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float vfly;
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float etemp;
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int16_t last_tmp;
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uint16_t VREF;
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int16_t vfly_correction;
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int16_t _pad0;
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float vfly_integral;
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float vfly_avg_debug;
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float cc_output_f;
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float mppt_iref;
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float mppt_last_vin;
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float mppt_last_iin;
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float p_in;
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float p_out;
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uint8_t seq;
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uint8_t _pad1[3];
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} TelemetryPayload;
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/* Parameter write payload — 8 bytes */
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typedef struct __attribute__((packed)) {
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uint8_t param_id;
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uint8_t param_type;
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uint8_t _pad[2];
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union {
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float f;
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uint32_t u32;
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int32_t i32;
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uint16_t u16;
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uint8_t u8;
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} value;
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} ParamWritePayload;
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/* Parameter table entry */
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typedef struct {
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uint8_t id;
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uint8_t type; /* PTYPE_* */
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void *ptr;
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float min_val;
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float max_val;
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} ParamEntry;
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/* RX parser states */
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typedef enum {
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RX_WAIT_SYNC,
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RX_WAIT_CMD,
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RX_WAIT_LEN,
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RX_WAIT_PAYLOAD,
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RX_WAIT_CRC
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} ProtoRxState;
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/* Protocol context */
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typedef struct {
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UART_HandleTypeDef *huart;
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/* TX double buffer — sized for max payload, not just telemetry */
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uint8_t tx_buf[2][PROTO_HEADER_SIZE + PROTO_MAX_PAYLOAD + 1];
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uint8_t tx_active; /* which buffer is being sent */
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volatile uint8_t tx_busy;
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/* RX */
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uint8_t rx_byte;
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ProtoRxState rx_state;
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uint8_t rx_cmd;
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uint8_t rx_len;
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uint8_t rx_idx;
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uint8_t rx_buf[PROTO_RX_BUF_SIZE];
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/* Telemetry sequence counter */
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uint8_t seq;
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/* Error tracking */
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uint32_t uart_errors;
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} ProtoCtx;
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/* Public API */
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void Proto_Init(UART_HandleTypeDef *huart);
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void Proto_SendTelemetry(void);
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void Proto_SendError(const char *msg);
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void Proto_SendDiagDump(const char *reason);
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/* Called from HAL callbacks */
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void Proto_RxCpltCallback(UART_HandleTypeDef *huart);
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void Proto_TxCpltCallback(UART_HandleTypeDef *huart);
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void Proto_ErrorCallback(UART_HandleTypeDef *huart);
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/* Global protocol context */
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extern ProtoCtx proto;
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#endif /* INC_DEBUG_PROTOCOL_H_ */
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131
code64/Core/Inc/main.h
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131
code64/Core/Inc/main.h
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@@ -0,0 +1,131 @@
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/* USER CODE BEGIN Header */
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/**
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******************************************************************************
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* @file : main.h
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* @brief : Header for main.c file.
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* This file contains the common defines of the application.
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2025 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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/* USER CODE END Header */
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __MAIN_H
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#define __MAIN_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "stm32g4xx_hal.h"
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/* Private includes ----------------------------------------------------------*/
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/* USER CODE BEGIN Includes */
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/* USER CODE END Includes */
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/* Exported types ------------------------------------------------------------*/
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/* USER CODE BEGIN ET */
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extern volatile int16_t last_tmp;
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extern volatile int16_t vfly_correction;
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/* USER CODE END ET */
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/* Exported constants --------------------------------------------------------*/
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/* USER CODE BEGIN EC */
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/* USER CODE END EC */
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/* Exported macro ------------------------------------------------------------*/
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/* USER CODE BEGIN EM */
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/* USER CODE END EM */
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void HAL_HRTIM_MspPostInit(HRTIM_HandleTypeDef *hhrtim);
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void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim);
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/* Exported functions prototypes ---------------------------------------------*/
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void Error_Handler(void);
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/* USER CODE BEGIN EFP */
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/* USER CODE END EFP */
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/* Private defines -----------------------------------------------------------*/
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#define ALARM_Pin GPIO_PIN_13
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#define ALARM_GPIO_Port GPIOC
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#define V_IN_ADC_Pin GPIO_PIN_0
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#define V_IN_ADC_GPIO_Port GPIOC
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#define I_IN_COMP_ADC_Pin GPIO_PIN_1
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#define I_IN_COMP_ADC_GPIO_Port GPIOC
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#define NTC_BOARD_Pin GPIO_PIN_2
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#define NTC_BOARD_GPIO_Port GPIOC
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#define TEMP_OP__Pin GPIO_PIN_1
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#define TEMP_OP__GPIO_Port GPIOA
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#define TEMP_OUT_ADC_Pin GPIO_PIN_2
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#define TEMP_OUT_ADC_GPIO_Port GPIOA
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#define TEMP_OP_A3_Pin GPIO_PIN_3
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#define TEMP_OP_A3_GPIO_Port GPIOA
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#define VFLY_OP__Pin GPIO_PIN_5
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#define VFLY_OP__GPIO_Port GPIOA
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#define VFLY_OUT_ADC_Pin GPIO_PIN_6
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#define VFLY_OUT_ADC_GPIO_Port GPIOA
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#define VFLY_OP_A7_Pin GPIO_PIN_7
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#define VFLY_OP_A7_GPIO_Port GPIOA
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#define I_LOAD_ADC_Pin GPIO_PIN_4
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#define I_LOAD_ADC_GPIO_Port GPIOC
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#define TEST_PC5_Pin GPIO_PIN_5
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#define TEST_PC5_GPIO_Port GPIOC
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#define I_LOAD_COMP_Pin GPIO_PIN_0
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#define I_LOAD_COMP_GPIO_Port GPIOB
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#define V_OUT_COMP_ADC3_Pin GPIO_PIN_1
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#define V_OUT_COMP_ADC3_GPIO_Port GPIOB
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#define DISCONNECT_OUTPUT_Pin GPIO_PIN_10
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#define DISCONNECT_OUTPUT_GPIO_Port GPIOB
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#define VBAT_ADC_Pin GPIO_PIN_12
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#define VBAT_ADC_GPIO_Port GPIOB
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#define ENABLE_ISO_FET_Pin GPIO_PIN_13
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#define ENABLE_ISO_FET_GPIO_Port GPIOB
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#define PWM4_Pin GPIO_PIN_6
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#define PWM4_GPIO_Port GPIOC
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#define PWM1_Pin GPIO_PIN_7
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#define PWM1_GPIO_Port GPIOC
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#define PWM3_Pin GPIO_PIN_8
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#define PWM3_GPIO_Port GPIOC
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#define PWM2_Pin GPIO_PIN_9
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#define PWM2_GPIO_Port GPIOC
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#define VCP_TX_Pin GPIO_PIN_10
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#define VCP_TX_GPIO_Port GPIOC
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#define VCP_RX_Pin GPIO_PIN_11
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#define VCP_RX_GPIO_Port GPIOC
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#define FDCAN_SILENT_Pin GPIO_PIN_2
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#define FDCAN_SILENT_GPIO_Port GPIOD
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#define PRECHARGE_Pin GPIO_PIN_4
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#define PRECHARGE_GPIO_Port GPIOB
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#define DISCONNECT_INPUT_Pin GPIO_PIN_9
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#define DISCONNECT_INPUT_GPIO_Port GPIOB
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/* USER CODE BEGIN Private defines */
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#define DUTY_TICKS_MIN (680)
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#define DUTY_TICKS_MAX (6120)
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#define DUTY_TICKS_MID (6800)
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#define DT_HARD_MIN 14
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/* USER CODE END Private defines */
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#ifdef __cplusplus
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}
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#endif
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#endif /* __MAIN_H */
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49
code64/Core/Inc/mppt.h
Normal file
49
code64/Core/Inc/mppt.h
Normal file
@@ -0,0 +1,49 @@
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/*
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* mppt.h
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*
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* Created on: Jun 11, 2025
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* Author: janik
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*/
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#ifndef INC_MPPT_H_
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#define INC_MPPT_H_
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#include <stdint.h>
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typedef struct {
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float last_vin;
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float last_iin;
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float iref; // Output current limit setpoint (mA)
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float step; // Adjustment step size (mA)
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float iref_min; // Minimum allowed current (mA)
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float iref_max; // Maximum allowed current (mA)
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float dv_min; // Minimum dV threshold (mV)
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float deadband; // Relative dP deadband (e.g. 0.005 = 0.5%)
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} MPPTController;
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/**
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* @brief Initialize MPPT state
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* @param mppt Pointer to MPPT state structure
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* @param initial_iref Initial current reference
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* @param step Step size for Iref adjustments
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* @param iref_min Minimum allowed current
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* @param iref_max Maximum allowed current
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* @param dv_min Minimum dv threshold
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*/
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void MPPT_IncCond_Init(MPPTController *mppt,
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float initial_iref,
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float step,
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float iref_min,
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float iref_max,
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float dv_min);
|
||||
|
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/**
|
||||
* @brief Update MPPT controller and return new current target
|
||||
* @param vin Input voltage (filtered)
|
||||
* @param iin Input current (filtered)
|
||||
* @return New current reference (in float, amps)
|
||||
*/
|
||||
float MPPT_IncCond_Update(MPPTController *mppt, float vin, float iin);
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||||
|
||||
|
||||
#endif /* INC_MPPT_H_ */
|
||||
380
code64/Core/Inc/stm32g4xx_hal_conf.h
Normal file
380
code64/Core/Inc/stm32g4xx_hal_conf.h
Normal file
@@ -0,0 +1,380 @@
|
||||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32g4xx_hal_conf.h
|
||||
* @author MCD Application Team
|
||||
* @brief HAL configuration file
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2019 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef STM32G4xx_HAL_CONF_H
|
||||
#define STM32G4xx_HAL_CONF_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
|
||||
/* ########################## Module Selection ############################## */
|
||||
/**
|
||||
* @brief This is the list of modules to be used in the HAL driver
|
||||
*/
|
||||
|
||||
#define HAL_MODULE_ENABLED
|
||||
|
||||
#define HAL_ADC_MODULE_ENABLED
|
||||
#define HAL_COMP_MODULE_ENABLED
|
||||
/*#define HAL_CORDIC_MODULE_ENABLED */
|
||||
/*#define HAL_CRC_MODULE_ENABLED */
|
||||
/*#define HAL_CRYP_MODULE_ENABLED */
|
||||
#define HAL_DAC_MODULE_ENABLED
|
||||
#define HAL_FDCAN_MODULE_ENABLED
|
||||
#define HAL_FMAC_MODULE_ENABLED
|
||||
#define HAL_HRTIM_MODULE_ENABLED
|
||||
/*#define HAL_IRDA_MODULE_ENABLED */
|
||||
/*#define HAL_IWDG_MODULE_ENABLED */
|
||||
#define HAL_I2C_MODULE_ENABLED
|
||||
/*#define HAL_I2S_MODULE_ENABLED */
|
||||
/*#define HAL_LPTIM_MODULE_ENABLED */
|
||||
/*#define HAL_NAND_MODULE_ENABLED */
|
||||
/*#define HAL_NOR_MODULE_ENABLED */
|
||||
#define HAL_OPAMP_MODULE_ENABLED
|
||||
/*#define HAL_PCD_MODULE_ENABLED */
|
||||
/*#define HAL_QSPI_MODULE_ENABLED */
|
||||
/*#define HAL_RNG_MODULE_ENABLED */
|
||||
/*#define HAL_RTC_MODULE_ENABLED */
|
||||
/*#define HAL_SAI_MODULE_ENABLED */
|
||||
/*#define HAL_SMARTCARD_MODULE_ENABLED */
|
||||
/*#define HAL_SMBUS_MODULE_ENABLED */
|
||||
/*#define HAL_SPI_MODULE_ENABLED */
|
||||
/*#define HAL_SRAM_MODULE_ENABLED */
|
||||
#define HAL_TIM_MODULE_ENABLED
|
||||
#define HAL_UART_MODULE_ENABLED
|
||||
/*#define HAL_USART_MODULE_ENABLED */
|
||||
/*#define HAL_WWDG_MODULE_ENABLED */
|
||||
#define HAL_GPIO_MODULE_ENABLED
|
||||
#define HAL_EXTI_MODULE_ENABLED
|
||||
#define HAL_DMA_MODULE_ENABLED
|
||||
#define HAL_RCC_MODULE_ENABLED
|
||||
#define HAL_FLASH_MODULE_ENABLED
|
||||
#define HAL_PWR_MODULE_ENABLED
|
||||
#define HAL_CORTEX_MODULE_ENABLED
|
||||
|
||||
/* ########################## Register Callbacks selection ############################## */
|
||||
/**
|
||||
* @brief This is the list of modules where register callback can be used
|
||||
*/
|
||||
#define USE_HAL_ADC_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_COMP_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_CORDIC_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_CRYP_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_DAC_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_EXTI_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_FDCAN_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_FMAC_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_HRTIM_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_I2C_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_I2S_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_NAND_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_NOR_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_OPAMP_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_PCD_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_QSPI_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_RNG_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_RTC_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_SAI_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_SPI_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_SRAM_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_TIM_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_UART_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_USART_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U
|
||||
|
||||
/* ########################## Oscillator Values adaptation ####################*/
|
||||
/**
|
||||
* @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
|
||||
* This value is used by the RCC HAL module to compute the system frequency
|
||||
* (when HSE is used as system clock source, directly or through the PLL).
|
||||
*/
|
||||
#if !defined (HSE_VALUE)
|
||||
#define HSE_VALUE (40000000UL) /*!< Value of the External oscillator in Hz */
|
||||
#endif /* HSE_VALUE */
|
||||
|
||||
#if !defined (HSE_STARTUP_TIMEOUT)
|
||||
#define HSE_STARTUP_TIMEOUT (100UL) /*!< Time out for HSE start up, in ms */
|
||||
#endif /* HSE_STARTUP_TIMEOUT */
|
||||
|
||||
/**
|
||||
* @brief Internal High Speed oscillator (HSI) value.
|
||||
* This value is used by the RCC HAL module to compute the system frequency
|
||||
* (when HSI is used as system clock source, directly or through the PLL).
|
||||
*/
|
||||
#if !defined (HSI_VALUE)
|
||||
#define HSI_VALUE (16000000UL) /*!< Value of the Internal oscillator in Hz*/
|
||||
#endif /* HSI_VALUE */
|
||||
|
||||
/**
|
||||
* @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
|
||||
* This internal oscillator is mainly dedicated to provide a high precision clock to
|
||||
* the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
|
||||
* When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
|
||||
* which is subject to manufacturing process variations.
|
||||
*/
|
||||
#if !defined (HSI48_VALUE)
|
||||
#define HSI48_VALUE (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
|
||||
The real value my vary depending on manufacturing process variations.*/
|
||||
#endif /* HSI48_VALUE */
|
||||
|
||||
/**
|
||||
* @brief Internal Low Speed oscillator (LSI) value.
|
||||
*/
|
||||
#if !defined (LSI_VALUE)
|
||||
/*!< Value of the Internal Low Speed oscillator in Hz
|
||||
The real value may vary depending on the variations in voltage and temperature.*/
|
||||
#define LSI_VALUE (32000UL) /*!< LSI Typical Value in Hz*/
|
||||
#endif /* LSI_VALUE */
|
||||
/**
|
||||
* @brief External Low Speed oscillator (LSE) value.
|
||||
* This value is used by the UART, RTC HAL module to compute the system frequency
|
||||
*/
|
||||
#if !defined (LSE_VALUE)
|
||||
#define LSE_VALUE (32768UL) /*!< Value of the External Low Speed oscillator in Hz */
|
||||
#endif /* LSE_VALUE */
|
||||
|
||||
#if !defined (LSE_STARTUP_TIMEOUT)
|
||||
#define LSE_STARTUP_TIMEOUT (5000UL) /*!< Time out for LSE start up, in ms */
|
||||
#endif /* LSE_STARTUP_TIMEOUT */
|
||||
|
||||
/**
|
||||
* @brief External clock source for I2S and SAI peripherals
|
||||
* This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
|
||||
* frequency, this source is inserted directly through I2S_CKIN pad.
|
||||
*/
|
||||
#if !defined (EXTERNAL_CLOCK_VALUE)
|
||||
#define EXTERNAL_CLOCK_VALUE (12288000UL) /*!< Value of the External oscillator in Hz*/
|
||||
#endif /* EXTERNAL_CLOCK_VALUE */
|
||||
|
||||
/* Tip: To avoid modifying this file each time you need to use different HSE,
|
||||
=== you can define the HSE value in your toolchain compiler preprocessor. */
|
||||
|
||||
/* ########################### System Configuration ######################### */
|
||||
/**
|
||||
* @brief This is the HAL system configuration section
|
||||
*/
|
||||
|
||||
#define VDD_VALUE (3300UL) /*!< Value of VDD in mv */
|
||||
#define TICK_INT_PRIORITY (2UL) /*!< tick interrupt priority (lowest by default) */
|
||||
#define USE_RTOS 0U
|
||||
#define PREFETCH_ENABLE 0U
|
||||
#define INSTRUCTION_CACHE_ENABLE 1U
|
||||
#define DATA_CACHE_ENABLE 1U
|
||||
|
||||
/* ########################## Assert Selection ############################## */
|
||||
/**
|
||||
* @brief Uncomment the line below to expanse the "assert_param" macro in the
|
||||
* HAL drivers code
|
||||
*/
|
||||
/* #define USE_FULL_ASSERT 1U */
|
||||
|
||||
/* ################## SPI peripheral configuration ########################## */
|
||||
|
||||
/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
|
||||
* Activated: CRC code is present inside driver
|
||||
* Deactivated: CRC code cleaned from driver
|
||||
*/
|
||||
|
||||
#define USE_SPI_CRC 0U
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
/**
|
||||
* @brief Include module's header file
|
||||
*/
|
||||
|
||||
#ifdef HAL_RCC_MODULE_ENABLED
|
||||
#include "stm32g4xx_hal_rcc.h"
|
||||
#endif /* HAL_RCC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_GPIO_MODULE_ENABLED
|
||||
#include "stm32g4xx_hal_gpio.h"
|
||||
#endif /* HAL_GPIO_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DMA_MODULE_ENABLED
|
||||
#include "stm32g4xx_hal_dma.h"
|
||||
#endif /* HAL_DMA_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CORTEX_MODULE_ENABLED
|
||||
#include "stm32g4xx_hal_cortex.h"
|
||||
#endif /* HAL_CORTEX_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_ADC_MODULE_ENABLED
|
||||
#include "stm32g4xx_hal_adc.h"
|
||||
#endif /* HAL_ADC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_COMP_MODULE_ENABLED
|
||||
#include "stm32g4xx_hal_comp.h"
|
||||
#endif /* HAL_COMP_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CORDIC_MODULE_ENABLED
|
||||
#include "stm32g4xx_hal_cordic.h"
|
||||
#endif /* HAL_CORDIC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CRC_MODULE_ENABLED
|
||||
#include "stm32g4xx_hal_crc.h"
|
||||
#endif /* HAL_CRC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CRYP_MODULE_ENABLED
|
||||
#include "stm32g4xx_hal_cryp.h"
|
||||
#endif /* HAL_CRYP_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DAC_MODULE_ENABLED
|
||||
#include "stm32g4xx_hal_dac.h"
|
||||
#endif /* HAL_DAC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_EXTI_MODULE_ENABLED
|
||||
#include "stm32g4xx_hal_exti.h"
|
||||
#endif /* HAL_EXTI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_FDCAN_MODULE_ENABLED
|
||||
#include "stm32g4xx_hal_fdcan.h"
|
||||
#endif /* HAL_FDCAN_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_FLASH_MODULE_ENABLED
|
||||
#include "stm32g4xx_hal_flash.h"
|
||||
#endif /* HAL_FLASH_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_FMAC_MODULE_ENABLED
|
||||
#include "stm32g4xx_hal_fmac.h"
|
||||
#endif /* HAL_FMAC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_HRTIM_MODULE_ENABLED
|
||||
#include "stm32g4xx_hal_hrtim.h"
|
||||
#endif /* HAL_HRTIM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_IRDA_MODULE_ENABLED
|
||||
#include "stm32g4xx_hal_irda.h"
|
||||
#endif /* HAL_IRDA_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_IWDG_MODULE_ENABLED
|
||||
#include "stm32g4xx_hal_iwdg.h"
|
||||
#endif /* HAL_IWDG_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_I2C_MODULE_ENABLED
|
||||
#include "stm32g4xx_hal_i2c.h"
|
||||
#endif /* HAL_I2C_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_I2S_MODULE_ENABLED
|
||||
#include "stm32g4xx_hal_i2s.h"
|
||||
#endif /* HAL_I2S_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_LPTIM_MODULE_ENABLED
|
||||
#include "stm32g4xx_hal_lptim.h"
|
||||
#endif /* HAL_LPTIM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_NAND_MODULE_ENABLED
|
||||
#include "stm32g4xx_hal_nand.h"
|
||||
#endif /* HAL_NAND_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_NOR_MODULE_ENABLED
|
||||
#include "stm32g4xx_hal_nor.h"
|
||||
#endif /* HAL_NOR_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_OPAMP_MODULE_ENABLED
|
||||
#include "stm32g4xx_hal_opamp.h"
|
||||
#endif /* HAL_OPAMP_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_PCD_MODULE_ENABLED
|
||||
#include "stm32g4xx_hal_pcd.h"
|
||||
#endif /* HAL_PCD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_PWR_MODULE_ENABLED
|
||||
#include "stm32g4xx_hal_pwr.h"
|
||||
#endif /* HAL_PWR_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_QSPI_MODULE_ENABLED
|
||||
#include "stm32g4xx_hal_qspi.h"
|
||||
#endif /* HAL_QSPI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_RNG_MODULE_ENABLED
|
||||
#include "stm32g4xx_hal_rng.h"
|
||||
#endif /* HAL_RNG_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_RTC_MODULE_ENABLED
|
||||
#include "stm32g4xx_hal_rtc.h"
|
||||
#endif /* HAL_RTC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SAI_MODULE_ENABLED
|
||||
#include "stm32g4xx_hal_sai.h"
|
||||
#endif /* HAL_SAI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SMARTCARD_MODULE_ENABLED
|
||||
#include "stm32g4xx_hal_smartcard.h"
|
||||
#endif /* HAL_SMARTCARD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SMBUS_MODULE_ENABLED
|
||||
#include "stm32g4xx_hal_smbus.h"
|
||||
#endif /* HAL_SMBUS_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SPI_MODULE_ENABLED
|
||||
#include "stm32g4xx_hal_spi.h"
|
||||
#endif /* HAL_SPI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SRAM_MODULE_ENABLED
|
||||
#include "stm32g4xx_hal_sram.h"
|
||||
#endif /* HAL_SRAM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_TIM_MODULE_ENABLED
|
||||
#include "stm32g4xx_hal_tim.h"
|
||||
#endif /* HAL_TIM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_UART_MODULE_ENABLED
|
||||
#include "stm32g4xx_hal_uart.h"
|
||||
#endif /* HAL_UART_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_USART_MODULE_ENABLED
|
||||
#include "stm32g4xx_hal_usart.h"
|
||||
#endif /* HAL_USART_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_WWDG_MODULE_ENABLED
|
||||
#include "stm32g4xx_hal_wwdg.h"
|
||||
#endif /* HAL_WWDG_MODULE_ENABLED */
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
#ifdef USE_FULL_ASSERT
|
||||
/**
|
||||
* @brief The assert_param macro is used for function's parameters check.
|
||||
* @param expr: If expr is false, it calls assert_failed function
|
||||
* which reports the name of the source file and the source
|
||||
* line number of the call that failed.
|
||||
* If expr is true, it returns no value.
|
||||
* @retval None
|
||||
*/
|
||||
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
|
||||
/* Exported functions ------------------------------------------------------- */
|
||||
void assert_failed(uint8_t *file, uint32_t line);
|
||||
#else
|
||||
#define assert_param(expr) ((void)0U)
|
||||
#endif /* USE_FULL_ASSERT */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* STM32G4xx_HAL_CONF_H */
|
||||
76
code64/Core/Inc/stm32g4xx_it.h
Normal file
76
code64/Core/Inc/stm32g4xx_it.h
Normal file
@@ -0,0 +1,76 @@
|
||||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32g4xx_it.h
|
||||
* @brief This file contains the headers of the interrupt handlers.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2025 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32G4xx_IT_H
|
||||
#define __STM32G4xx_IT_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Private includes ----------------------------------------------------------*/
|
||||
/* USER CODE BEGIN Includes */
|
||||
|
||||
/* USER CODE END Includes */
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN ET */
|
||||
|
||||
/* USER CODE END ET */
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/* USER CODE BEGIN EC */
|
||||
|
||||
/* USER CODE END EC */
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN EM */
|
||||
|
||||
/* USER CODE END EM */
|
||||
|
||||
/* Exported functions prototypes ---------------------------------------------*/
|
||||
void NMI_Handler(void);
|
||||
void HardFault_Handler(void);
|
||||
void MemManage_Handler(void);
|
||||
void BusFault_Handler(void);
|
||||
void UsageFault_Handler(void);
|
||||
void SVC_Handler(void);
|
||||
void DebugMon_Handler(void);
|
||||
void PendSV_Handler(void);
|
||||
void SysTick_Handler(void);
|
||||
void TIM1_UP_TIM16_IRQHandler(void);
|
||||
void UART4_IRQHandler(void);
|
||||
void TIM6_DAC_IRQHandler(void);
|
||||
void TIM7_DAC_IRQHandler(void);
|
||||
void COMP1_2_3_IRQHandler(void);
|
||||
void COMP4_5_6_IRQHandler(void);
|
||||
void HRTIM1_FLT_IRQHandler(void);
|
||||
void FDCAN2_IT0_IRQHandler(void);
|
||||
void FDCAN2_IT1_IRQHandler(void);
|
||||
void FMAC_IRQHandler(void);
|
||||
/* USER CODE BEGIN EFP */
|
||||
|
||||
/* USER CODE END EFP */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32G4xx_IT_H */
|
||||
37
code64/Core/Src/PI.c
Normal file
37
code64/Core/Src/PI.c
Normal file
@@ -0,0 +1,37 @@
|
||||
/*
|
||||
* cc_pid.c
|
||||
*
|
||||
* Created on: Jun 10, 2025
|
||||
* Author: janik
|
||||
*/
|
||||
|
||||
#include <PI.h>
|
||||
|
||||
void PI_Init(PIController *pi, float Kp, float Ki, uint16_t out_min, uint16_t out_max)
|
||||
{
|
||||
pi->Kp = Kp;
|
||||
pi->Ki = Ki;
|
||||
pi->prev_error = 0.0f;
|
||||
pi->output = 0;
|
||||
pi->out_min = out_min;
|
||||
pi->out_max = out_max;
|
||||
}
|
||||
|
||||
uint16_t PI_Update(PIController *pi, float target, float measurement)
|
||||
{
|
||||
float error = target - measurement;
|
||||
float delta = pi->Kp * (error - pi->prev_error) + pi->Ki * error;
|
||||
|
||||
// Add delta to the output (cast to float for calculation)
|
||||
float new_output = (float)(pi->output) + delta;
|
||||
|
||||
// Clamp
|
||||
if (new_output > (float)(pi->out_max)) new_output = (float)(pi->out_max);
|
||||
else if (new_output < (float)(pi->out_min)) new_output = (float)(pi->out_min);
|
||||
|
||||
// Update internal state
|
||||
pi->output = (uint16_t)new_output;
|
||||
pi->prev_error = error;
|
||||
|
||||
return pi->output;
|
||||
}
|
||||
38
code64/Core/Src/cc_controller.c
Normal file
38
code64/Core/Src/cc_controller.c
Normal file
@@ -0,0 +1,38 @@
|
||||
/*
|
||||
* cc_controller.c
|
||||
*
|
||||
* Created on: Jun 11, 2025
|
||||
* Author: janik
|
||||
*/
|
||||
|
||||
|
||||
#include "cc_controller.h"
|
||||
|
||||
void CC_Init(CCController *cc, float gain, float min_step, float max_step,
|
||||
uint16_t out_min, uint16_t out_max, float initial_output)
|
||||
{
|
||||
cc->gain = gain;
|
||||
cc->min_step = min_step;
|
||||
cc->max_step = max_step;
|
||||
cc->out_min = out_min;
|
||||
cc->out_max = out_max;
|
||||
cc->output_f = initial_output;
|
||||
}
|
||||
|
||||
uint16_t CC_Update(CCController *cc, float target, float measurement)
|
||||
{
|
||||
float error = target - measurement;
|
||||
float step = error * cc->gain;
|
||||
|
||||
if (step < cc->min_step) step = cc->min_step;
|
||||
if (step > cc->max_step) step = cc->max_step;
|
||||
|
||||
cc->output_f += step;
|
||||
|
||||
|
||||
// Clamp float output
|
||||
if (cc->output_f > (float)cc->out_max) cc->output_f = (float)cc->out_max;
|
||||
if (cc->output_f < (float)cc->out_min) cc->output_f = (float)cc->out_min;
|
||||
|
||||
return (uint16_t)roundf(cc->output_f);
|
||||
}
|
||||
456
code64/Core/Src/debug_protocol.c
Normal file
456
code64/Core/Src/debug_protocol.c
Normal file
@@ -0,0 +1,456 @@
|
||||
/*
|
||||
* debug_protocol.c
|
||||
*
|
||||
* Created on: Mar 5, 2026
|
||||
* Author: janik
|
||||
*/
|
||||
|
||||
#include "debug_protocol.h"
|
||||
#include "main.h"
|
||||
#include "cc_controller.h"
|
||||
#include "mppt.h"
|
||||
#include <string.h>
|
||||
#include <stdio.h>
|
||||
|
||||
/* ---- External variables from main.c ---- */
|
||||
extern volatile float vin, iin, vout, iout, vfly, etemp;
|
||||
extern volatile int16_t last_tmp;
|
||||
extern volatile int16_t vfly_correction;
|
||||
extern uint16_t VREF;
|
||||
extern float vfly_integral;
|
||||
extern volatile float vfly_avg_debug;
|
||||
extern float vfly_kp, vfly_ki;
|
||||
extern uint16_t vfly_clamp;
|
||||
extern uint16_t vfly_loop_counter_trigger;
|
||||
extern volatile uint8_t vfly_active;
|
||||
|
||||
extern CCController cc;
|
||||
extern volatile float cc_target;
|
||||
extern volatile int cc_active;
|
||||
extern float cc_gain;
|
||||
extern float CC_MIN_STEP, CC_MAX_STEP;
|
||||
extern uint16_t cc_loop_counter_trigger;
|
||||
|
||||
extern MPPTController mppt;
|
||||
extern volatile int mppt_active;
|
||||
extern uint16_t mppt_loop_counter_trigger;
|
||||
extern float mppt_initial_iref;
|
||||
extern float mppt_step;
|
||||
extern float mppt_iref_min, mppt_iref_max;
|
||||
extern float mppt_dv_threshold;
|
||||
extern float mppt_deadband;
|
||||
|
||||
extern float vin_min_ctrl;
|
||||
|
||||
extern uint8_t dt_values[];
|
||||
|
||||
/* Raw ADC DMA buffers */
|
||||
extern uint16_t DMA1BUF1; /* adc4: vbat */
|
||||
extern uint16_t DMA1BUF2[3]; /* adc1: etemp, vin, iin */
|
||||
extern uint16_t DMA1BUF3[2]; /* adc2: vfly, iout */
|
||||
extern uint16_t DMA1BUF4; /* adc5: itemp */
|
||||
|
||||
extern COMP_HandleTypeDef hcomp1, hcomp3, hcomp4;
|
||||
extern FMAC_HandleTypeDef hfmac;
|
||||
|
||||
/* ---- CRC8 table (poly 0x07) ---- */
|
||||
static const uint8_t crc8_table[256] = {
|
||||
0x00,0x07,0x0E,0x09,0x1C,0x1B,0x12,0x15,0x38,0x3F,0x36,0x31,0x24,0x23,0x2A,0x2D,
|
||||
0x70,0x77,0x7E,0x79,0x6C,0x6B,0x62,0x65,0x48,0x4F,0x46,0x41,0x54,0x53,0x5A,0x5D,
|
||||
0xE0,0xE7,0xEE,0xE9,0xFC,0xFB,0xF2,0xF5,0xD8,0xDF,0xD6,0xD1,0xC4,0xC3,0xCA,0xCD,
|
||||
0x90,0x97,0x9E,0x99,0x8C,0x8B,0x82,0x85,0xA8,0xAF,0xA6,0xA1,0xB4,0xB3,0xBA,0xBD,
|
||||
0xC7,0xC0,0xC9,0xCE,0xDB,0xDC,0xD5,0xD2,0xFF,0xF8,0xF1,0xF6,0xE3,0xE4,0xED,0xEA,
|
||||
0xB7,0xB0,0xB9,0xBE,0xAB,0xAC,0xA5,0xA2,0x8F,0x88,0x81,0x86,0x93,0x94,0x9D,0x9A,
|
||||
0x27,0x20,0x29,0x2E,0x3B,0x3C,0x35,0x32,0x1F,0x18,0x11,0x16,0x03,0x04,0x0D,0x0A,
|
||||
0x57,0x50,0x59,0x5E,0x4B,0x4C,0x45,0x42,0x6F,0x68,0x61,0x66,0x73,0x74,0x7D,0x7A,
|
||||
0x89,0x8E,0x87,0x80,0x95,0x92,0x9B,0x9C,0xB1,0xB6,0xBF,0xB8,0xAD,0xAA,0xA3,0xA4,
|
||||
0xF9,0xFE,0xF7,0xF0,0xE5,0xE2,0xEB,0xEC,0xC1,0xC6,0xCF,0xC8,0xDD,0xDA,0xD3,0xD4,
|
||||
0x69,0x6E,0x67,0x60,0x75,0x72,0x7B,0x7C,0x51,0x56,0x5F,0x58,0x4D,0x4A,0x43,0x44,
|
||||
0x19,0x1E,0x17,0x10,0x05,0x02,0x0B,0x0C,0x21,0x26,0x2F,0x28,0x3D,0x3A,0x33,0x34,
|
||||
0x4E,0x49,0x40,0x47,0x52,0x55,0x5C,0x5B,0x76,0x71,0x78,0x7F,0x6A,0x6D,0x64,0x63,
|
||||
0x3E,0x39,0x30,0x37,0x22,0x25,0x2C,0x2B,0x06,0x01,0x08,0x0F,0x1A,0x1D,0x14,0x13,
|
||||
0xAE,0xA9,0xA0,0xA7,0xB2,0xB5,0xBC,0xBB,0x96,0x91,0x98,0x9F,0x8A,0x8D,0x84,0x83,
|
||||
0xDE,0xD9,0xD0,0xD7,0xC2,0xC5,0xCC,0xCB,0xE6,0xE1,0xE8,0xEF,0xFA,0xFD,0xF4,0xF3,
|
||||
};
|
||||
|
||||
static uint8_t crc8(const uint8_t *data, uint16_t len)
|
||||
{
|
||||
uint8_t crc = 0x00;
|
||||
for (uint16_t i = 0; i < len; i++)
|
||||
crc = crc8_table[crc ^ data[i]];
|
||||
return crc;
|
||||
}
|
||||
|
||||
/* ---- Parameter table ---- */
|
||||
#define PARAM_COUNT 27
|
||||
|
||||
static ParamEntry param_table[PARAM_COUNT];
|
||||
|
||||
static void param_table_init(void)
|
||||
{
|
||||
int i = 0;
|
||||
/* Vfly params */
|
||||
param_table[i++] = (ParamEntry){PID_VFLY_KP, PTYPE_FLOAT, &vfly_kp, -10.0f, 10.0f};
|
||||
param_table[i++] = (ParamEntry){PID_VFLY_KI, PTYPE_FLOAT, &vfly_ki, -10.0f, 10.0f};
|
||||
param_table[i++] = (ParamEntry){PID_VFLY_CLAMP, PTYPE_UINT16, &vfly_clamp, 0, 10000};
|
||||
param_table[i++] = (ParamEntry){PID_VFLY_LOOP_COUNTER_TRIGGER, PTYPE_UINT16, &vfly_loop_counter_trigger, 1, 10000};
|
||||
param_table[i++] = (ParamEntry){PID_VFLY_ACTIVE, PTYPE_UINT8, (void*)&vfly_active, 0, 1};
|
||||
|
||||
/* CC params */
|
||||
param_table[i++] = (ParamEntry){PID_CC_TARGET, PTYPE_FLOAT, (void*)&cc_target, 0, 60000};
|
||||
param_table[i++] = (ParamEntry){PID_CC_GAIN, PTYPE_FLOAT, &cc_gain, -1.0f, 1.0f};
|
||||
param_table[i++] = (ParamEntry){PID_CC_MIN_STEP, PTYPE_FLOAT, &CC_MIN_STEP, -1000, 0};
|
||||
param_table[i++] = (ParamEntry){PID_CC_MAX_STEP, PTYPE_FLOAT, &CC_MAX_STEP, 0, 1000};
|
||||
param_table[i++] = (ParamEntry){PID_CC_LOOP_COUNTER_TRIGGER, PTYPE_UINT16, &cc_loop_counter_trigger, 1, 10000};
|
||||
param_table[i++] = (ParamEntry){PID_CC_ACTIVE, PTYPE_INT32, (void*)&cc_active, 0, 1};
|
||||
param_table[i++] = (ParamEntry){PID_VREF, PTYPE_UINT16, &VREF, 3100, 3700};
|
||||
|
||||
/* MPPT params */
|
||||
param_table[i++] = (ParamEntry){PID_MPPT_STEP, PTYPE_FLOAT, &mppt_step, 0, 10000};
|
||||
param_table[i++] = (ParamEntry){PID_MPPT_IREF_MIN, PTYPE_FLOAT, &mppt_iref_min, 0, 60000};
|
||||
param_table[i++] = (ParamEntry){PID_MPPT_IREF_MAX, PTYPE_FLOAT, &mppt_iref_max, 0, 60000};
|
||||
param_table[i++] = (ParamEntry){PID_MPPT_DV_THRESHOLD, PTYPE_FLOAT, &mppt_dv_threshold, 0, 10000};
|
||||
param_table[i++] = (ParamEntry){PID_MPPT_LOOP_COUNTER_TRIGGER, PTYPE_UINT16, &mppt_loop_counter_trigger, 1, 10000};
|
||||
param_table[i++] = (ParamEntry){PID_MPPT_ACTIVE, PTYPE_INT32, (void*)&mppt_active, 0, 1};
|
||||
param_table[i++] = (ParamEntry){PID_MPPT_INITIAL_IREF, PTYPE_FLOAT, &mppt_initial_iref, 0, 60000};
|
||||
param_table[i++] = (ParamEntry){PID_MPPT_DEADBAND, PTYPE_FLOAT, &mppt_deadband, 0, 1.0f};
|
||||
|
||||
/* Global */
|
||||
param_table[i++] = (ParamEntry){PID_VIN_MIN_CTRL, PTYPE_FLOAT, &vin_min_ctrl, 0, 90000};
|
||||
|
||||
/* Deadtime segments */
|
||||
param_table[i++] = (ParamEntry){PID_DT_SEG0, PTYPE_UINT8, &dt_values[0], DT_HARD_MIN, 200};
|
||||
param_table[i++] = (ParamEntry){PID_DT_SEG1, PTYPE_UINT8, &dt_values[1], DT_HARD_MIN, 200};
|
||||
param_table[i++] = (ParamEntry){PID_DT_SEG2, PTYPE_UINT8, &dt_values[2], DT_HARD_MIN, 200};
|
||||
param_table[i++] = (ParamEntry){PID_DT_SEG3, PTYPE_UINT8, &dt_values[3], DT_HARD_MIN, 200};
|
||||
param_table[i++] = (ParamEntry){PID_DT_SEG4, PTYPE_UINT8, &dt_values[4], DT_HARD_MIN, 200};
|
||||
param_table[i++] = (ParamEntry){PID_DT_SEG5, PTYPE_UINT8, &dt_values[5], DT_HARD_MIN, 200};
|
||||
}
|
||||
|
||||
/* ---- Protocol context ---- */
|
||||
ProtoCtx proto;
|
||||
|
||||
/* ---- Internal helpers ---- */
|
||||
|
||||
static void start_rx(void)
|
||||
{
|
||||
HAL_UART_Receive_IT(proto.huart, &proto.rx_byte, 1);
|
||||
}
|
||||
|
||||
static void uart_recover(void)
|
||||
{
|
||||
/* Clear error flags and reset UART state so TX/RX work again */
|
||||
__HAL_UART_CLEAR_FLAG(proto.huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF);
|
||||
proto.huart->gState = HAL_UART_STATE_READY;
|
||||
proto.huart->RxState = HAL_UART_STATE_READY;
|
||||
proto.huart->ErrorCode = HAL_UART_ERROR_NONE;
|
||||
/* Re-arm RX */
|
||||
start_rx();
|
||||
}
|
||||
|
||||
static void send_frame(uint8_t cmd, const uint8_t *payload, uint8_t len)
|
||||
{
|
||||
/* Pick the inactive buffer */
|
||||
uint8_t buf_idx = proto.tx_active ^ 1;
|
||||
uint8_t *buf = proto.tx_buf[buf_idx];
|
||||
uint16_t total = PROTO_HEADER_SIZE + len + 1;
|
||||
|
||||
buf[0] = PROTO_SYNC_BYTE;
|
||||
buf[1] = cmd;
|
||||
buf[2] = len;
|
||||
if (len > 0)
|
||||
memcpy(&buf[3], payload, len);
|
||||
buf[3 + len] = crc8(buf, 3 + len);
|
||||
|
||||
proto.tx_active = buf_idx;
|
||||
if (HAL_UART_Transmit(proto.huart, buf, total, 5) != HAL_OK)
|
||||
{
|
||||
proto.uart_errors++;
|
||||
uart_recover();
|
||||
}
|
||||
}
|
||||
|
||||
static ParamEntry* find_param(uint8_t id)
|
||||
{
|
||||
for (int i = 0; i < PARAM_COUNT; i++)
|
||||
{
|
||||
if (param_table[i].id == id)
|
||||
return ¶m_table[i];
|
||||
}
|
||||
return NULL;
|
||||
}
|
||||
|
||||
static void apply_param_write(const ParamWritePayload *pw)
|
||||
{
|
||||
ParamEntry *p = find_param(pw->param_id);
|
||||
if (!p) return;
|
||||
|
||||
/* Extract value and clamp */
|
||||
float fval;
|
||||
switch (p->type)
|
||||
{
|
||||
case PTYPE_FLOAT:
|
||||
fval = pw->value.f;
|
||||
if (fval < p->min_val) fval = p->min_val;
|
||||
if (fval > p->max_val) fval = p->max_val;
|
||||
*(float*)p->ptr = fval;
|
||||
break;
|
||||
case PTYPE_UINT16:
|
||||
fval = (float)pw->value.u16;
|
||||
if (fval < p->min_val) fval = p->min_val;
|
||||
if (fval > p->max_val) fval = p->max_val;
|
||||
*(uint16_t*)p->ptr = (uint16_t)fval;
|
||||
break;
|
||||
case PTYPE_UINT8:
|
||||
fval = (float)pw->value.u8;
|
||||
if (fval < p->min_val) fval = p->min_val;
|
||||
if (fval > p->max_val) fval = p->max_val;
|
||||
*(uint8_t*)p->ptr = (uint8_t)fval;
|
||||
break;
|
||||
case PTYPE_INT32:
|
||||
fval = (float)pw->value.i32;
|
||||
if (fval < p->min_val) fval = p->min_val;
|
||||
if (fval > p->max_val) fval = p->max_val;
|
||||
*(int32_t*)p->ptr = (int32_t)fval;
|
||||
break;
|
||||
}
|
||||
|
||||
/* Side effects: VREF update -> ADC3 offset + CC output */
|
||||
if (pw->param_id == PID_VREF)
|
||||
{
|
||||
ADC3->OFR1 = (ADC3->OFR1 & ~0xFFFU) | (VREF & 0xFFF);
|
||||
cc.output_f = (float)VREF;
|
||||
}
|
||||
/* Side effects for CC params: sync struct fields */
|
||||
else if (pw->param_id == PID_CC_GAIN)
|
||||
cc.gain = cc_gain;
|
||||
else if (pw->param_id == PID_CC_MIN_STEP)
|
||||
cc.min_step = CC_MIN_STEP;
|
||||
else if (pw->param_id == PID_CC_MAX_STEP)
|
||||
cc.max_step = CC_MAX_STEP;
|
||||
/* Side effects for MPPT params: sync struct fields */
|
||||
else if (pw->param_id == PID_MPPT_STEP)
|
||||
mppt.step = mppt_step;
|
||||
else if (pw->param_id == PID_MPPT_IREF_MIN)
|
||||
mppt.iref_min = mppt_iref_min;
|
||||
else if (pw->param_id == PID_MPPT_IREF_MAX)
|
||||
mppt.iref_max = mppt_iref_max;
|
||||
else if (pw->param_id == PID_MPPT_DV_THRESHOLD)
|
||||
mppt.dv_min = mppt_dv_threshold;
|
||||
else if (pw->param_id == PID_MPPT_DEADBAND)
|
||||
mppt.deadband = mppt_deadband;
|
||||
else if (pw->param_id == PID_MPPT_ACTIVE && mppt_active)
|
||||
cc_active = 1;
|
||||
|
||||
/* Send ACK: echo back the write payload */
|
||||
send_frame(CMD_PARAM_WRITE_ACK, (const uint8_t*)pw, sizeof(ParamWritePayload));
|
||||
}
|
||||
|
||||
static void send_param_value(const ParamEntry *p)
|
||||
{
|
||||
ParamWritePayload pv;
|
||||
pv.param_id = p->id;
|
||||
pv.param_type = p->type;
|
||||
pv._pad[0] = 0; pv._pad[1] = 0;
|
||||
pv.value.u32 = 0;
|
||||
switch (p->type)
|
||||
{
|
||||
case PTYPE_FLOAT: pv.value.f = *(float*)p->ptr; break;
|
||||
case PTYPE_UINT16: pv.value.u16 = *(uint16_t*)p->ptr; break;
|
||||
case PTYPE_UINT8: pv.value.u8 = *(uint8_t*)p->ptr; break;
|
||||
case PTYPE_INT32: pv.value.i32 = *(int32_t*)p->ptr; break;
|
||||
}
|
||||
send_frame(CMD_PARAM_VALUE, (const uint8_t*)&pv, sizeof(ParamWritePayload));
|
||||
}
|
||||
|
||||
static void send_all_params(void)
|
||||
{
|
||||
for (int i = 0; i < PARAM_COUNT; i++)
|
||||
send_param_value(¶m_table[i]);
|
||||
}
|
||||
|
||||
static void process_rx_frame(uint8_t cmd, const uint8_t *payload, uint8_t len)
|
||||
{
|
||||
switch (cmd)
|
||||
{
|
||||
case CMD_PARAM_WRITE:
|
||||
if (len >= sizeof(ParamWritePayload))
|
||||
apply_param_write((const ParamWritePayload*)payload);
|
||||
break;
|
||||
case CMD_PARAM_READ_ALL:
|
||||
send_all_params();
|
||||
break;
|
||||
case CMD_PING:
|
||||
send_frame(CMD_PONG, NULL, 0);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/* ---- Public API ---- */
|
||||
|
||||
void Proto_Init(UART_HandleTypeDef *huart)
|
||||
{
|
||||
memset(&proto, 0, sizeof(proto));
|
||||
proto.huart = huart;
|
||||
proto.rx_state = RX_WAIT_SYNC;
|
||||
param_table_init();
|
||||
start_rx();
|
||||
}
|
||||
|
||||
void Proto_SendTelemetry(void)
|
||||
{
|
||||
TelemetryPayload t;
|
||||
t.vin = vin;
|
||||
t.vout = vout;
|
||||
t.iin = iin;
|
||||
t.iout = iout;
|
||||
t.vfly = vfly;
|
||||
t.etemp = etemp;
|
||||
t.last_tmp = last_tmp;
|
||||
t.VREF = VREF;
|
||||
t.vfly_correction = vfly_correction;
|
||||
t._pad0 = 0;
|
||||
t.vfly_integral = vfly_integral;
|
||||
t.vfly_avg_debug = vfly_avg_debug;
|
||||
t.cc_output_f = cc.output_f;
|
||||
t.mppt_iref = mppt.iref;
|
||||
t.mppt_last_vin = mppt.last_vin;
|
||||
t.mppt_last_iin = mppt.last_iin;
|
||||
t.p_in = vin * (-iin) / 1e6f; /* mV * mA → W */
|
||||
t.p_out = vout * iout / 1e6f; /* mV * mA → W */
|
||||
t.seq = proto.seq++;
|
||||
t._pad1[0] = 0; t._pad1[1] = 0; t._pad1[2] = 0;
|
||||
|
||||
send_frame(CMD_TELEMETRY, (const uint8_t*)&t, sizeof(TelemetryPayload));
|
||||
}
|
||||
|
||||
void Proto_SendError(const char *msg)
|
||||
{
|
||||
uint8_t len = 0;
|
||||
while (msg[len] && len < PROTO_MAX_PAYLOAD) len++;
|
||||
send_frame(CMD_ERROR_MSG, (const uint8_t*)msg, len);
|
||||
}
|
||||
|
||||
void Proto_SendDiagDump(const char *reason)
|
||||
{
|
||||
char buf[128];
|
||||
|
||||
/* Line 1: reason */
|
||||
Proto_SendError(reason);
|
||||
|
||||
/* Line 2: converted analog values (integer-only — no float printf with nano.specs) */
|
||||
snprintf(buf, sizeof(buf), "DIAG V:%lu/%lu I:%d/%lu Vfly:%lu T:%d.%u",
|
||||
(unsigned long)(vin > 0 ? (uint32_t)vin : 0),
|
||||
(unsigned long)(vout > 0 ? (uint32_t)vout : 0),
|
||||
(int)iin,
|
||||
(unsigned long)(iout > 0 ? (uint32_t)iout : 0),
|
||||
(unsigned long)(vfly > 0 ? (uint32_t)vfly : 0),
|
||||
(int)etemp, ((unsigned)(etemp > 0 ? etemp : -etemp) % 10));
|
||||
Proto_SendError(buf);
|
||||
|
||||
/* Line 3: raw ADC counts */
|
||||
snprintf(buf, sizeof(buf), "RAW adc1[%u,%u,%u] adc2[%u,%u] adc4[%u] adc5[%u]",
|
||||
DMA1BUF2[0], DMA1BUF2[1], DMA1BUF2[2],
|
||||
DMA1BUF3[0], DMA1BUF3[1],
|
||||
DMA1BUF1, DMA1BUF4);
|
||||
Proto_SendError(buf);
|
||||
|
||||
/* Line 4: controller state */
|
||||
snprintf(buf, sizeof(buf), "CTRL VREF:%u last_tmp:%d vfly_corr:%d cc_out:%d mppt_iref:%d",
|
||||
VREF, (int)last_tmp, (int)vfly_correction,
|
||||
(int)cc.output_f, (int)mppt.iref);
|
||||
Proto_SendError(buf);
|
||||
|
||||
/* Line 5: HRTIM fault status + comparator outputs */
|
||||
uint32_t hrtim_isr = HRTIM1->sCommonRegs.ISR;
|
||||
uint32_t hrtim_oenr = HRTIM1->sCommonRegs.OENR;
|
||||
uint32_t comp_out = 0;
|
||||
if (HAL_COMP_GetOutputLevel(&hcomp1) == COMP_OUTPUT_LEVEL_HIGH) comp_out |= 1;
|
||||
if (HAL_COMP_GetOutputLevel(&hcomp3) == COMP_OUTPUT_LEVEL_HIGH) comp_out |= 2;
|
||||
if (HAL_COMP_GetOutputLevel(&hcomp4) == COMP_OUTPUT_LEVEL_HIGH) comp_out |= 4;
|
||||
snprintf(buf, sizeof(buf), "HW HRTIM_ISR:%08lX OENR:%08lX COMP:%lu FMAC_SR:%08lX",
|
||||
hrtim_isr, hrtim_oenr, comp_out, FMAC->SR);
|
||||
Proto_SendError(buf);
|
||||
|
||||
/* Line 6: HRTIM duty + master compare */
|
||||
snprintf(buf, sizeof(buf), "HRTIM TE_CMP1:%lu TF_CMP1:%lu MCMP1:%lu",
|
||||
HRTIM1->sTimerxRegs[HRTIM_TIMERINDEX_TIMER_E].CMP1xR,
|
||||
HRTIM1->sTimerxRegs[HRTIM_TIMERINDEX_TIMER_F].CMP1xR,
|
||||
HRTIM1->sMasterRegs.MCMP1R);
|
||||
Proto_SendError(buf);
|
||||
|
||||
/* Line 7: active flags + ADC3 offset */
|
||||
snprintf(buf, sizeof(buf), "FLAGS cc_act:%d mppt_act:%d vfly_act:%u ADC3_OFR1:%08lX",
|
||||
cc_active, mppt_active, (unsigned)vfly_active, ADC3->OFR1);
|
||||
Proto_SendError(buf);
|
||||
}
|
||||
|
||||
/* ---- HAL Callbacks ---- */
|
||||
|
||||
void Proto_TxCpltCallback(UART_HandleTypeDef *huart)
|
||||
{
|
||||
if (huart == proto.huart)
|
||||
proto.tx_busy = 0;
|
||||
}
|
||||
|
||||
void Proto_ErrorCallback(UART_HandleTypeDef *huart)
|
||||
{
|
||||
if (huart != proto.huart)
|
||||
return;
|
||||
proto.uart_errors++;
|
||||
uart_recover();
|
||||
}
|
||||
|
||||
void Proto_RxCpltCallback(UART_HandleTypeDef *huart)
|
||||
{
|
||||
if (huart != proto.huart)
|
||||
return;
|
||||
|
||||
uint8_t b = proto.rx_byte;
|
||||
|
||||
switch (proto.rx_state)
|
||||
{
|
||||
case RX_WAIT_SYNC:
|
||||
if (b == PROTO_SYNC_BYTE)
|
||||
{
|
||||
proto.rx_buf[0] = b;
|
||||
proto.rx_state = RX_WAIT_CMD;
|
||||
}
|
||||
break;
|
||||
case RX_WAIT_CMD:
|
||||
proto.rx_cmd = b;
|
||||
proto.rx_buf[1] = b;
|
||||
proto.rx_state = RX_WAIT_LEN;
|
||||
break;
|
||||
case RX_WAIT_LEN:
|
||||
proto.rx_len = b;
|
||||
proto.rx_buf[2] = b;
|
||||
proto.rx_idx = 0;
|
||||
if (b == 0)
|
||||
proto.rx_state = RX_WAIT_CRC;
|
||||
else if (b > PROTO_MAX_PAYLOAD)
|
||||
proto.rx_state = RX_WAIT_SYNC; /* invalid, reset */
|
||||
else
|
||||
proto.rx_state = RX_WAIT_PAYLOAD;
|
||||
break;
|
||||
case RX_WAIT_PAYLOAD:
|
||||
proto.rx_buf[PROTO_HEADER_SIZE + proto.rx_idx] = b;
|
||||
proto.rx_idx++;
|
||||
if (proto.rx_idx >= proto.rx_len)
|
||||
proto.rx_state = RX_WAIT_CRC;
|
||||
break;
|
||||
case RX_WAIT_CRC:
|
||||
{
|
||||
uint8_t expected = crc8(proto.rx_buf, PROTO_HEADER_SIZE + proto.rx_len);
|
||||
if (b == expected)
|
||||
process_rx_frame(proto.rx_cmd, &proto.rx_buf[PROTO_HEADER_SIZE], proto.rx_len);
|
||||
proto.rx_state = RX_WAIT_SYNC;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/* Re-arm RX */
|
||||
start_rx();
|
||||
}
|
||||
2223
code64/Core/Src/main.c
Normal file
2223
code64/Core/Src/main.c
Normal file
File diff suppressed because it is too large
Load Diff
64
code64/Core/Src/mppt.c
Normal file
64
code64/Core/Src/mppt.c
Normal file
@@ -0,0 +1,64 @@
|
||||
/*
|
||||
* mppt.c
|
||||
*
|
||||
* Created on: Jun 11, 2025
|
||||
* Author: janik
|
||||
*/
|
||||
|
||||
|
||||
#include "mppt.h"
|
||||
#include <math.h> // for fabsf
|
||||
|
||||
void MPPT_IncCond_Init(MPPTController *mppt,
|
||||
float initial_iref,
|
||||
float step,
|
||||
float iref_min,
|
||||
float iref_max,
|
||||
float dv_min)
|
||||
{
|
||||
mppt->last_vin = 0.0f;
|
||||
mppt->last_iin = 0.0f;
|
||||
mppt->iref = initial_iref;
|
||||
mppt->step = step;
|
||||
mppt->iref_min = iref_min;
|
||||
mppt->iref_max = iref_max;
|
||||
mppt->dv_min = dv_min;
|
||||
mppt->deadband = 0.005f;
|
||||
}
|
||||
|
||||
float MPPT_IncCond_Update(MPPTController *mppt, float vin, float iin)
|
||||
{
|
||||
float dv = vin - mppt->last_vin;
|
||||
float di = iin - mppt->last_iin;
|
||||
|
||||
// Skip if input voltage is essentially zero
|
||||
if (vin < 1e-2f)
|
||||
return mppt->iref;
|
||||
|
||||
// Suppress update if both dv and di are below noise floor
|
||||
if (fabsf(dv) < mppt->dv_min && fabsf(di) < mppt->dv_min)
|
||||
return mppt->iref;
|
||||
|
||||
/* dP = vin*di + iin*dv (avoids dv division, works even when dv is small) */
|
||||
float dp = vin * di + iin * dv;
|
||||
float p = vin * iin; /* current power (mV*mA = nW scale) */
|
||||
|
||||
/* Relative deadband: |dP| < 0.5% of P => near MPP */
|
||||
if (p > 1e3f && fabsf(dp) < mppt->deadband * fabsf(p)) {
|
||||
// At or near MPP — don't step
|
||||
} else if (dp > 0) {
|
||||
mppt->iref -= mppt->step;
|
||||
} else {
|
||||
mppt->iref += mppt->step;
|
||||
}
|
||||
|
||||
// Clamp
|
||||
if (mppt->iref > mppt->iref_max) mppt->iref = mppt->iref_max;
|
||||
if (mppt->iref < mppt->iref_min) mppt->iref = mppt->iref_min;
|
||||
|
||||
// Save state
|
||||
mppt->last_vin = vin;
|
||||
mppt->last_iin = iin;
|
||||
|
||||
return mppt->iref;
|
||||
}
|
||||
1441
code64/Core/Src/stm32g4xx_hal_msp.c
Normal file
1441
code64/Core/Src/stm32g4xx_hal_msp.c
Normal file
File diff suppressed because it is too large
Load Diff
390
code64/Core/Src/stm32g4xx_it.c
Normal file
390
code64/Core/Src/stm32g4xx_it.c
Normal file
@@ -0,0 +1,390 @@
|
||||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32g4xx_it.c
|
||||
* @brief Interrupt Service Routines.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2025 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "main.h"
|
||||
#include "stm32g4xx_it.h"
|
||||
/* Private includes ----------------------------------------------------------*/
|
||||
/* USER CODE BEGIN Includes */
|
||||
/* USER CODE END Includes */
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* USER CODE BEGIN TD */
|
||||
|
||||
/* USER CODE END TD */
|
||||
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN PD */
|
||||
|
||||
/* USER CODE END PD */
|
||||
|
||||
/* Private macro -------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN PM */
|
||||
|
||||
/* USER CODE END PM */
|
||||
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
/* USER CODE BEGIN PV */
|
||||
|
||||
/* USER CODE END PV */
|
||||
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
/* USER CODE BEGIN PFP */
|
||||
|
||||
/* USER CODE END PFP */
|
||||
|
||||
/* Private user code ---------------------------------------------------------*/
|
||||
/* USER CODE BEGIN 0 */
|
||||
|
||||
/* USER CODE END 0 */
|
||||
|
||||
/* External variables --------------------------------------------------------*/
|
||||
extern COMP_HandleTypeDef hcomp1;
|
||||
extern COMP_HandleTypeDef hcomp3;
|
||||
extern COMP_HandleTypeDef hcomp4;
|
||||
extern DAC_HandleTypeDef hdac1;
|
||||
extern DAC_HandleTypeDef hdac3;
|
||||
extern FDCAN_HandleTypeDef hfdcan2;
|
||||
extern FMAC_HandleTypeDef hfmac;
|
||||
extern HRTIM_HandleTypeDef hhrtim1;
|
||||
extern TIM_HandleTypeDef htim1;
|
||||
extern TIM_HandleTypeDef htim6;
|
||||
extern TIM_HandleTypeDef htim7;
|
||||
extern TIM_HandleTypeDef htim16;
|
||||
extern UART_HandleTypeDef huart4;
|
||||
/* USER CODE BEGIN EV */
|
||||
|
||||
/* USER CODE END EV */
|
||||
|
||||
/******************************************************************************/
|
||||
/* Cortex-M4 Processor Interruption and Exception Handlers */
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* @brief This function handles Non maskable interrupt.
|
||||
*/
|
||||
void NMI_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
|
||||
|
||||
/* USER CODE END NonMaskableInt_IRQn 0 */
|
||||
HAL_RCC_NMI_IRQHandler();
|
||||
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
|
||||
while (1)
|
||||
{
|
||||
}
|
||||
/* USER CODE END NonMaskableInt_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Hard fault interrupt.
|
||||
*/
|
||||
void HardFault_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN HardFault_IRQn 0 */
|
||||
|
||||
/* USER CODE END HardFault_IRQn 0 */
|
||||
while (1)
|
||||
{
|
||||
/* USER CODE BEGIN W1_HardFault_IRQn 0 */
|
||||
/* USER CODE END W1_HardFault_IRQn 0 */
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Memory management fault.
|
||||
*/
|
||||
void MemManage_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN MemoryManagement_IRQn 0 */
|
||||
|
||||
/* USER CODE END MemoryManagement_IRQn 0 */
|
||||
while (1)
|
||||
{
|
||||
/* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
|
||||
/* USER CODE END W1_MemoryManagement_IRQn 0 */
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Prefetch fault, memory access fault.
|
||||
*/
|
||||
void BusFault_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN BusFault_IRQn 0 */
|
||||
|
||||
/* USER CODE END BusFault_IRQn 0 */
|
||||
while (1)
|
||||
{
|
||||
/* USER CODE BEGIN W1_BusFault_IRQn 0 */
|
||||
/* USER CODE END W1_BusFault_IRQn 0 */
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Undefined instruction or illegal state.
|
||||
*/
|
||||
void UsageFault_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN UsageFault_IRQn 0 */
|
||||
|
||||
/* USER CODE END UsageFault_IRQn 0 */
|
||||
while (1)
|
||||
{
|
||||
/* USER CODE BEGIN W1_UsageFault_IRQn 0 */
|
||||
/* USER CODE END W1_UsageFault_IRQn 0 */
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles System service call via SWI instruction.
|
||||
*/
|
||||
void SVC_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN SVCall_IRQn 0 */
|
||||
|
||||
/* USER CODE END SVCall_IRQn 0 */
|
||||
/* USER CODE BEGIN SVCall_IRQn 1 */
|
||||
|
||||
/* USER CODE END SVCall_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Debug monitor.
|
||||
*/
|
||||
void DebugMon_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN DebugMonitor_IRQn 0 */
|
||||
|
||||
/* USER CODE END DebugMonitor_IRQn 0 */
|
||||
/* USER CODE BEGIN DebugMonitor_IRQn 1 */
|
||||
|
||||
/* USER CODE END DebugMonitor_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Pendable request for system service.
|
||||
*/
|
||||
void PendSV_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN PendSV_IRQn 0 */
|
||||
|
||||
/* USER CODE END PendSV_IRQn 0 */
|
||||
/* USER CODE BEGIN PendSV_IRQn 1 */
|
||||
|
||||
/* USER CODE END PendSV_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles System tick timer.
|
||||
*/
|
||||
void SysTick_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN SysTick_IRQn 0 */
|
||||
|
||||
/* USER CODE END SysTick_IRQn 0 */
|
||||
HAL_IncTick();
|
||||
/* USER CODE BEGIN SysTick_IRQn 1 */
|
||||
|
||||
/* USER CODE END SysTick_IRQn 1 */
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/* STM32G4xx Peripheral Interrupt Handlers */
|
||||
/* Add here the Interrupt Handlers for the used peripherals. */
|
||||
/* For the available peripheral interrupt handler names, */
|
||||
/* please refer to the startup file (startup_stm32g4xx.s). */
|
||||
/******************************************************************************/
|
||||
|
||||
/**
|
||||
* @brief This function handles TIM1 update interrupt and TIM16 global interrupt.
|
||||
*/
|
||||
void TIM1_UP_TIM16_IRQHandler(void)
|
||||
{
|
||||
/* USER CODE BEGIN TIM1_UP_TIM16_IRQn 0 */
|
||||
|
||||
//__HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_UPDATE);
|
||||
//HAL_TIM_PeriodElapsedCallback(htim16);
|
||||
//return;
|
||||
|
||||
/* USER CODE END TIM1_UP_TIM16_IRQn 0 */
|
||||
HAL_TIM_IRQHandler(&htim1);
|
||||
HAL_TIM_IRQHandler(&htim16);
|
||||
/* USER CODE BEGIN TIM1_UP_TIM16_IRQn 1 */
|
||||
|
||||
/* USER CODE END TIM1_UP_TIM16_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles UART4 global interrupt / UART4 wake-up interrupt through EXTI line 34.
|
||||
*/
|
||||
void UART4_IRQHandler(void)
|
||||
{
|
||||
/* USER CODE BEGIN UART4_IRQn 0 */
|
||||
|
||||
/* USER CODE END UART4_IRQn 0 */
|
||||
HAL_UART_IRQHandler(&huart4);
|
||||
/* USER CODE BEGIN UART4_IRQn 1 */
|
||||
|
||||
/* USER CODE END UART4_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles TIM6 global interrupt, DAC1 and DAC3 channel underrun error interrupts.
|
||||
*/
|
||||
void TIM6_DAC_IRQHandler(void)
|
||||
{
|
||||
/* USER CODE BEGIN TIM6_DAC_IRQn 0 */
|
||||
|
||||
/* USER CODE END TIM6_DAC_IRQn 0 */
|
||||
HAL_TIM_IRQHandler(&htim6);
|
||||
HAL_DAC_IRQHandler(&hdac1);
|
||||
HAL_DAC_IRQHandler(&hdac3);
|
||||
/* USER CODE BEGIN TIM6_DAC_IRQn 1 */
|
||||
|
||||
/* USER CODE END TIM6_DAC_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles TIM7 global interrupt, DAC2 and DAC4 channel underrun error interrupts.
|
||||
*/
|
||||
void TIM7_DAC_IRQHandler(void)
|
||||
{
|
||||
/* USER CODE BEGIN TIM7_DAC_IRQn 0 */
|
||||
|
||||
/* USER CODE END TIM7_DAC_IRQn 0 */
|
||||
HAL_TIM_IRQHandler(&htim7);
|
||||
/* USER CODE BEGIN TIM7_DAC_IRQn 1 */
|
||||
|
||||
/* USER CODE END TIM7_DAC_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles COMP1, COMP2 and COMP3 interrupts through EXTI lines 21, 22 and 29.
|
||||
*/
|
||||
void COMP1_2_3_IRQHandler(void)
|
||||
{
|
||||
/* USER CODE BEGIN COMP1_2_3_IRQn 0 */
|
||||
HAL_GPIO_WritePin(GPIOA,GPIO_PIN_0,GPIO_PIN_SET);
|
||||
|
||||
/* USER CODE END COMP1_2_3_IRQn 0 */
|
||||
HAL_COMP_IRQHandler(&hcomp1);
|
||||
HAL_COMP_IRQHandler(&hcomp3);
|
||||
/* USER CODE BEGIN COMP1_2_3_IRQn 1 */
|
||||
|
||||
/* USER CODE END COMP1_2_3_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles COMP4, COMP5 and COMP6 interrupts through EXTI lines 30, 31 and 32.
|
||||
*/
|
||||
void COMP4_5_6_IRQHandler(void)
|
||||
{
|
||||
/* USER CODE BEGIN COMP4_5_6_IRQn 0 */
|
||||
HAL_GPIO_WritePin(GPIOA,GPIO_PIN_0,GPIO_PIN_SET);;
|
||||
|
||||
/* USER CODE END COMP4_5_6_IRQn 0 */
|
||||
HAL_COMP_IRQHandler(&hcomp4);
|
||||
/* USER CODE BEGIN COMP4_5_6_IRQn 1 */
|
||||
|
||||
/* USER CODE END COMP4_5_6_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles HRTIM fault global interrupt.
|
||||
*/
|
||||
void HRTIM1_FLT_IRQHandler(void)
|
||||
{
|
||||
/* USER CODE BEGIN HRTIM1_FLT_IRQn 0 */
|
||||
HAL_GPIO_WritePin(GPIOA,GPIO_PIN_0,GPIO_PIN_SET);
|
||||
|
||||
/* USER CODE END HRTIM1_FLT_IRQn 0 */
|
||||
HAL_HRTIM_IRQHandler(&hhrtim1,HRTIM_TIMERINDEX_COMMON);
|
||||
/* USER CODE BEGIN HRTIM1_FLT_IRQn 1 */
|
||||
|
||||
/* USER CODE END HRTIM1_FLT_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles FDCAN2 interrupt 0.
|
||||
*/
|
||||
void FDCAN2_IT0_IRQHandler(void)
|
||||
{
|
||||
/* USER CODE BEGIN FDCAN2_IT0_IRQn 0 */
|
||||
|
||||
/* USER CODE END FDCAN2_IT0_IRQn 0 */
|
||||
HAL_FDCAN_IRQHandler(&hfdcan2);
|
||||
/* USER CODE BEGIN FDCAN2_IT0_IRQn 1 */
|
||||
|
||||
/* USER CODE END FDCAN2_IT0_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles FDCAN2 interrupt 1.
|
||||
*/
|
||||
void FDCAN2_IT1_IRQHandler(void)
|
||||
{
|
||||
/* USER CODE BEGIN FDCAN2_IT1_IRQn 0 */
|
||||
|
||||
/* USER CODE END FDCAN2_IT1_IRQn 0 */
|
||||
HAL_FDCAN_IRQHandler(&hfdcan2);
|
||||
/* USER CODE BEGIN FDCAN2_IT1_IRQn 1 */
|
||||
|
||||
/* USER CODE END FDCAN2_IT1_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles FMAC interrupt.
|
||||
*/
|
||||
void FMAC_IRQHandler(void)
|
||||
{
|
||||
/* USER CODE BEGIN FMAC_IRQn 0 */
|
||||
//HAL_GPIO_TogglePin(GPIOA,GPIO_PIN_4);
|
||||
|
||||
if (FMAC->SR > 2)
|
||||
{
|
||||
HAL_FMAC_ErrorCallback(&hfmac);
|
||||
return;
|
||||
}
|
||||
|
||||
int32_t tmp;//,tmpe,tmpf;
|
||||
tmp = READ_REG(FMAC->RDATA);
|
||||
HRTIM1->sMasterRegs.MCMP1R = DUTY_TICKS_MID + vfly_correction;
|
||||
//tmpf = tmp +vfly_correction;
|
||||
//tmpe = tmp -vfly_correction;
|
||||
//tmp = (tmp > 0x00007FFF ? 0 : tmp);
|
||||
last_tmp = tmp;
|
||||
if (tmp > DUTY_TICKS_MAX) tmp = DUTY_TICKS_MAX;
|
||||
if (tmp < DUTY_TICKS_MIN) tmp = 0;
|
||||
//if (tmpf > 2448) tmpf = 2448;
|
||||
//if (tmpf < 0) tmpe = 0;
|
||||
HRTIM1->sTimerxRegs[HRTIM_TIMERINDEX_TIMER_E].CMP1xR = tmp;
|
||||
HRTIM1->sTimerxRegs[HRTIM_TIMERINDEX_TIMER_F].CMP1xR = tmp;
|
||||
|
||||
return;
|
||||
|
||||
/* USER CODE END FMAC_IRQn 0 */
|
||||
HAL_FMAC_IRQHandler(&hfmac);
|
||||
/* USER CODE BEGIN FMAC_IRQn 1 */
|
||||
|
||||
/* USER CODE END FMAC_IRQn 1 */
|
||||
}
|
||||
|
||||
/* USER CODE BEGIN 1 */
|
||||
|
||||
/* USER CODE END 1 */
|
||||
176
code64/Core/Src/syscalls.c
Normal file
176
code64/Core/Src/syscalls.c
Normal file
@@ -0,0 +1,176 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file syscalls.c
|
||||
* @author Auto-generated by STM32CubeIDE
|
||||
* @brief STM32CubeIDE Minimal System calls file
|
||||
*
|
||||
* For more information about which c-functions
|
||||
* need which of these lowlevel functions
|
||||
* please consult the Newlib libc-manual
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2020-2025 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Includes */
|
||||
#include <sys/stat.h>
|
||||
#include <stdlib.h>
|
||||
#include <errno.h>
|
||||
#include <stdio.h>
|
||||
#include <signal.h>
|
||||
#include <time.h>
|
||||
#include <sys/time.h>
|
||||
#include <sys/times.h>
|
||||
|
||||
|
||||
/* Variables */
|
||||
extern int __io_putchar(int ch) __attribute__((weak));
|
||||
extern int __io_getchar(void) __attribute__((weak));
|
||||
|
||||
|
||||
char *__env[1] = { 0 };
|
||||
char **environ = __env;
|
||||
|
||||
|
||||
/* Functions */
|
||||
void initialise_monitor_handles()
|
||||
{
|
||||
}
|
||||
|
||||
int _getpid(void)
|
||||
{
|
||||
return 1;
|
||||
}
|
||||
|
||||
int _kill(int pid, int sig)
|
||||
{
|
||||
(void)pid;
|
||||
(void)sig;
|
||||
errno = EINVAL;
|
||||
return -1;
|
||||
}
|
||||
|
||||
void _exit (int status)
|
||||
{
|
||||
_kill(status, -1);
|
||||
while (1) {} /* Make sure we hang here */
|
||||
}
|
||||
|
||||
__attribute__((weak)) int _read(int file, char *ptr, int len)
|
||||
{
|
||||
(void)file;
|
||||
int DataIdx;
|
||||
|
||||
for (DataIdx = 0; DataIdx < len; DataIdx++)
|
||||
{
|
||||
*ptr++ = __io_getchar();
|
||||
}
|
||||
|
||||
return len;
|
||||
}
|
||||
|
||||
__attribute__((weak)) int _write(int file, char *ptr, int len)
|
||||
{
|
||||
(void)file;
|
||||
int DataIdx;
|
||||
|
||||
for (DataIdx = 0; DataIdx < len; DataIdx++)
|
||||
{
|
||||
__io_putchar(*ptr++);
|
||||
}
|
||||
return len;
|
||||
}
|
||||
|
||||
int _close(int file)
|
||||
{
|
||||
(void)file;
|
||||
return -1;
|
||||
}
|
||||
|
||||
|
||||
int _fstat(int file, struct stat *st)
|
||||
{
|
||||
(void)file;
|
||||
st->st_mode = S_IFCHR;
|
||||
return 0;
|
||||
}
|
||||
|
||||
int _isatty(int file)
|
||||
{
|
||||
(void)file;
|
||||
return 1;
|
||||
}
|
||||
|
||||
int _lseek(int file, int ptr, int dir)
|
||||
{
|
||||
(void)file;
|
||||
(void)ptr;
|
||||
(void)dir;
|
||||
return 0;
|
||||
}
|
||||
|
||||
int _open(char *path, int flags, ...)
|
||||
{
|
||||
(void)path;
|
||||
(void)flags;
|
||||
/* Pretend like we always fail */
|
||||
return -1;
|
||||
}
|
||||
|
||||
int _wait(int *status)
|
||||
{
|
||||
(void)status;
|
||||
errno = ECHILD;
|
||||
return -1;
|
||||
}
|
||||
|
||||
int _unlink(char *name)
|
||||
{
|
||||
(void)name;
|
||||
errno = ENOENT;
|
||||
return -1;
|
||||
}
|
||||
|
||||
int _times(struct tms *buf)
|
||||
{
|
||||
(void)buf;
|
||||
return -1;
|
||||
}
|
||||
|
||||
int _stat(char *file, struct stat *st)
|
||||
{
|
||||
(void)file;
|
||||
st->st_mode = S_IFCHR;
|
||||
return 0;
|
||||
}
|
||||
|
||||
int _link(char *old, char *new)
|
||||
{
|
||||
(void)old;
|
||||
(void)new;
|
||||
errno = EMLINK;
|
||||
return -1;
|
||||
}
|
||||
|
||||
int _fork(void)
|
||||
{
|
||||
errno = EAGAIN;
|
||||
return -1;
|
||||
}
|
||||
|
||||
int _execve(char *name, char **argv, char **env)
|
||||
{
|
||||
(void)name;
|
||||
(void)argv;
|
||||
(void)env;
|
||||
errno = ENOMEM;
|
||||
return -1;
|
||||
}
|
||||
79
code64/Core/Src/sysmem.c
Normal file
79
code64/Core/Src/sysmem.c
Normal file
@@ -0,0 +1,79 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file sysmem.c
|
||||
* @author Generated by STM32CubeIDE
|
||||
* @brief STM32CubeIDE System Memory calls file
|
||||
*
|
||||
* For more information about which C functions
|
||||
* need which of these lowlevel functions
|
||||
* please consult the newlib libc manual
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2025 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Includes */
|
||||
#include <errno.h>
|
||||
#include <stdint.h>
|
||||
|
||||
/**
|
||||
* Pointer to the current high watermark of the heap usage
|
||||
*/
|
||||
static uint8_t *__sbrk_heap_end = NULL;
|
||||
|
||||
/**
|
||||
* @brief _sbrk() allocates memory to the newlib heap and is used by malloc
|
||||
* and others from the C library
|
||||
*
|
||||
* @verbatim
|
||||
* ############################################################################
|
||||
* # .data # .bss # newlib heap # MSP stack #
|
||||
* # # # # Reserved by _Min_Stack_Size #
|
||||
* ############################################################################
|
||||
* ^-- RAM start ^-- _end _estack, RAM end --^
|
||||
* @endverbatim
|
||||
*
|
||||
* This implementation starts allocating at the '_end' linker symbol
|
||||
* The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
|
||||
* The implementation considers '_estack' linker symbol to be RAM end
|
||||
* NOTE: If the MSP stack, at any point during execution, grows larger than the
|
||||
* reserved size, please increase the '_Min_Stack_Size'.
|
||||
*
|
||||
* @param incr Memory size
|
||||
* @return Pointer to allocated memory
|
||||
*/
|
||||
void *_sbrk(ptrdiff_t incr)
|
||||
{
|
||||
extern uint8_t _end; /* Symbol defined in the linker script */
|
||||
extern uint8_t _estack; /* Symbol defined in the linker script */
|
||||
extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
|
||||
const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
|
||||
const uint8_t *max_heap = (uint8_t *)stack_limit;
|
||||
uint8_t *prev_heap_end;
|
||||
|
||||
/* Initialize heap end at first call */
|
||||
if (NULL == __sbrk_heap_end)
|
||||
{
|
||||
__sbrk_heap_end = &_end;
|
||||
}
|
||||
|
||||
/* Protect heap from growing into the reserved MSP stack */
|
||||
if (__sbrk_heap_end + incr > max_heap)
|
||||
{
|
||||
errno = ENOMEM;
|
||||
return (void *)-1;
|
||||
}
|
||||
|
||||
prev_heap_end = __sbrk_heap_end;
|
||||
__sbrk_heap_end += incr;
|
||||
|
||||
return (void *)prev_heap_end;
|
||||
}
|
||||
285
code64/Core/Src/system_stm32g4xx.c
Normal file
285
code64/Core/Src/system_stm32g4xx.c
Normal file
@@ -0,0 +1,285 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file system_stm32g4xx.c
|
||||
* @author MCD Application Team
|
||||
* @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
|
||||
*
|
||||
* This file provides two functions and one global variable to be called from
|
||||
* user application:
|
||||
* - SystemInit(): This function is called at startup just after reset and
|
||||
* before branch to main program. This call is made inside
|
||||
* the "startup_stm32g4xx.s" file.
|
||||
*
|
||||
* - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
|
||||
* by the user application to setup the SysTick
|
||||
* timer or configure other parameters.
|
||||
*
|
||||
* - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
|
||||
* be called whenever the core clock is changed
|
||||
* during program execution.
|
||||
*
|
||||
* After each device reset the HSI (16 MHz) is used as system clock source.
|
||||
* Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
|
||||
* configure the system clock before to branch to main program.
|
||||
*
|
||||
* This file configures the system clock as follows:
|
||||
*=============================================================================
|
||||
*-----------------------------------------------------------------------------
|
||||
* System Clock source | HSI
|
||||
*-----------------------------------------------------------------------------
|
||||
* SYSCLK(Hz) | 16000000
|
||||
*-----------------------------------------------------------------------------
|
||||
* HCLK(Hz) | 16000000
|
||||
*-----------------------------------------------------------------------------
|
||||
* AHB Prescaler | 1
|
||||
*-----------------------------------------------------------------------------
|
||||
* APB1 Prescaler | 1
|
||||
*-----------------------------------------------------------------------------
|
||||
* APB2 Prescaler | 1
|
||||
*-----------------------------------------------------------------------------
|
||||
* PLL_M | 1
|
||||
*-----------------------------------------------------------------------------
|
||||
* PLL_N | 16
|
||||
*-----------------------------------------------------------------------------
|
||||
* PLL_P | 7
|
||||
*-----------------------------------------------------------------------------
|
||||
* PLL_Q | 2
|
||||
*-----------------------------------------------------------------------------
|
||||
* PLL_R | 2
|
||||
*-----------------------------------------------------------------------------
|
||||
* Require 48MHz for RNG | Disabled
|
||||
*-----------------------------------------------------------------------------
|
||||
*=============================================================================
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2019 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/** @addtogroup CMSIS
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup stm32g4xx_system
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32G4xx_System_Private_Includes
|
||||
* @{
|
||||
*/
|
||||
|
||||
#include "stm32g4xx.h"
|
||||
|
||||
#if !defined (HSE_VALUE)
|
||||
#define HSE_VALUE 24000000U /*!< Value of the External oscillator in Hz */
|
||||
#endif /* HSE_VALUE */
|
||||
|
||||
#if !defined (HSI_VALUE)
|
||||
#define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz*/
|
||||
#endif /* HSI_VALUE */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32G4xx_System_Private_Defines
|
||||
* @{
|
||||
*/
|
||||
|
||||
/************************* Miscellaneous Configuration ************************/
|
||||
/* Note: Following vector table addresses must be defined in line with linker
|
||||
configuration. */
|
||||
/*!< Uncomment the following line if you need to relocate the vector table
|
||||
anywhere in Flash or Sram, else the vector table is kept at the automatic
|
||||
remap of boot address selected */
|
||||
/* #define USER_VECT_TAB_ADDRESS */
|
||||
|
||||
#if defined(USER_VECT_TAB_ADDRESS)
|
||||
/*!< Uncomment the following line if you need to relocate your vector Table
|
||||
in Sram else user remap will be done in Flash. */
|
||||
/* #define VECT_TAB_SRAM */
|
||||
#if defined(VECT_TAB_SRAM)
|
||||
#define VECT_TAB_BASE_ADDRESS SRAM_BASE /*!< Vector Table base address field.
|
||||
This value must be a multiple of 0x200. */
|
||||
#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
|
||||
This value must be a multiple of 0x200. */
|
||||
#else
|
||||
#define VECT_TAB_BASE_ADDRESS FLASH_BASE /*!< Vector Table base address field.
|
||||
This value must be a multiple of 0x200. */
|
||||
#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
|
||||
This value must be a multiple of 0x200. */
|
||||
#endif /* VECT_TAB_SRAM */
|
||||
#endif /* USER_VECT_TAB_ADDRESS */
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32G4xx_System_Private_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32G4xx_System_Private_Variables
|
||||
* @{
|
||||
*/
|
||||
/* The SystemCoreClock variable is updated in three ways:
|
||||
1) by calling CMSIS function SystemCoreClockUpdate()
|
||||
2) by calling HAL API function HAL_RCC_GetHCLKFreq()
|
||||
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
|
||||
Note: If you use this function to configure the system clock; then there
|
||||
is no need to call the 2 first functions listed above, since SystemCoreClock
|
||||
variable is updated automatically.
|
||||
*/
|
||||
uint32_t SystemCoreClock = HSI_VALUE;
|
||||
|
||||
const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
|
||||
const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32G4xx_System_Private_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Setup the microcontroller system.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
|
||||
void SystemInit(void)
|
||||
{
|
||||
/* FPU settings ------------------------------------------------------------*/
|
||||
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
|
||||
SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2))); /* set CP10 and CP11 Full Access */
|
||||
#endif
|
||||
|
||||
/* Configure the Vector Table location add offset address ------------------*/
|
||||
#if defined(USER_VECT_TAB_ADDRESS)
|
||||
SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
|
||||
#endif /* USER_VECT_TAB_ADDRESS */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Update SystemCoreClock variable according to Clock Register Values.
|
||||
* The SystemCoreClock variable contains the core clock (HCLK), it can
|
||||
* be used by the user application to setup the SysTick timer or configure
|
||||
* other parameters.
|
||||
*
|
||||
* @note Each time the core clock (HCLK) changes, this function must be called
|
||||
* to update SystemCoreClock variable value. Otherwise, any configuration
|
||||
* based on this variable will be incorrect.
|
||||
*
|
||||
* @note - The system frequency computed by this function is not the real
|
||||
* frequency in the chip. It is calculated based on the predefined
|
||||
* constant and the selected clock source:
|
||||
*
|
||||
* - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
|
||||
*
|
||||
* - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
|
||||
*
|
||||
* - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
|
||||
* or HSI_VALUE(*) multiplied/divided by the PLL factors.
|
||||
*
|
||||
* (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
|
||||
* 16 MHz) but the real value may vary depending on the variations
|
||||
* in voltage and temperature.
|
||||
*
|
||||
* (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
|
||||
* 24 MHz), user has to ensure that HSE_VALUE is same as the real
|
||||
* frequency of the crystal used. Otherwise, this function may
|
||||
* have wrong result.
|
||||
*
|
||||
* - The result of this function could be not correct when using fractional
|
||||
* value for HSE crystal.
|
||||
*
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void SystemCoreClockUpdate(void)
|
||||
{
|
||||
uint32_t tmp, pllvco, pllr, pllsource, pllm;
|
||||
|
||||
/* Get SYSCLK source -------------------------------------------------------*/
|
||||
switch (RCC->CFGR & RCC_CFGR_SWS)
|
||||
{
|
||||
case 0x04: /* HSI used as system clock source */
|
||||
SystemCoreClock = HSI_VALUE;
|
||||
break;
|
||||
|
||||
case 0x08: /* HSE used as system clock source */
|
||||
SystemCoreClock = HSE_VALUE;
|
||||
break;
|
||||
|
||||
case 0x0C: /* PLL used as system clock source */
|
||||
/* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
|
||||
SYSCLK = PLL_VCO / PLLR
|
||||
*/
|
||||
pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
|
||||
pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
|
||||
if (pllsource == 0x02UL) /* HSI used as PLL clock source */
|
||||
{
|
||||
pllvco = (HSI_VALUE / pllm);
|
||||
}
|
||||
else /* HSE used as PLL clock source */
|
||||
{
|
||||
pllvco = (HSE_VALUE / pllm);
|
||||
}
|
||||
pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
|
||||
pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
|
||||
SystemCoreClock = pllvco/pllr;
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
/* Compute HCLK clock frequency --------------------------------------------*/
|
||||
/* Get HCLK prescaler */
|
||||
tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
|
||||
/* HCLK clock frequency */
|
||||
SystemCoreClock >>= tmp;
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
592
code64/Core/Startup/startup_stm32g474rbtx.s
Normal file
592
code64/Core/Startup/startup_stm32g474rbtx.s
Normal file
@@ -0,0 +1,592 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file startup_stm32g474xx.s
|
||||
* @author MCD Application Team
|
||||
* @brief STM32G474xx devices vector table GCC toolchain.
|
||||
* This module performs:
|
||||
* - Set the initial SP
|
||||
* - Set the initial PC == Reset_Handler,
|
||||
* - Set the vector table entries with the exceptions ISR address,
|
||||
* - Configure the clock system
|
||||
* - Branches to main in the C library (which eventually
|
||||
* calls main()).
|
||||
* After Reset the Cortex-M4 processor is in Thread mode,
|
||||
* priority is Privileged, and the Stack is set to Main.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2019 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
.syntax unified
|
||||
.cpu cortex-m4
|
||||
.fpu softvfp
|
||||
.thumb
|
||||
|
||||
.global g_pfnVectors
|
||||
.global Default_Handler
|
||||
|
||||
/* start address for the initialization values of the .data section.
|
||||
defined in linker script */
|
||||
.word _sidata
|
||||
/* start address for the .data section. defined in linker script */
|
||||
.word _sdata
|
||||
/* end address for the .data section. defined in linker script */
|
||||
.word _edata
|
||||
/* start address for the .bss section. defined in linker script */
|
||||
.word _sbss
|
||||
/* end address for the .bss section. defined in linker script */
|
||||
.word _ebss
|
||||
|
||||
.equ BootRAM, 0xF1E0F85F
|
||||
/**
|
||||
* @brief This is the code that gets called when the processor first
|
||||
* starts execution following a reset event. Only the absolutely
|
||||
* necessary set is performed, after which the application
|
||||
* supplied main() routine is called.
|
||||
* @param None
|
||||
* @retval : None
|
||||
*/
|
||||
|
||||
.section .text.Reset_Handler
|
||||
.weak Reset_Handler
|
||||
.type Reset_Handler, %function
|
||||
Reset_Handler:
|
||||
ldr r0, =_estack
|
||||
mov sp, r0 /* set stack pointer */
|
||||
|
||||
/* Call the clock system initialization function.*/
|
||||
bl SystemInit
|
||||
|
||||
/* Copy the data segment initializers from flash to SRAM */
|
||||
ldr r0, =_sdata
|
||||
ldr r1, =_edata
|
||||
ldr r2, =_sidata
|
||||
movs r3, #0
|
||||
b LoopCopyDataInit
|
||||
|
||||
CopyDataInit:
|
||||
ldr r4, [r2, r3]
|
||||
str r4, [r0, r3]
|
||||
adds r3, r3, #4
|
||||
|
||||
LoopCopyDataInit:
|
||||
adds r4, r0, r3
|
||||
cmp r4, r1
|
||||
bcc CopyDataInit
|
||||
|
||||
/* Zero fill the bss segment. */
|
||||
ldr r2, =_sbss
|
||||
ldr r4, =_ebss
|
||||
movs r3, #0
|
||||
b LoopFillZerobss
|
||||
|
||||
FillZerobss:
|
||||
str r3, [r2]
|
||||
adds r2, r2, #4
|
||||
|
||||
LoopFillZerobss:
|
||||
cmp r2, r4
|
||||
bcc FillZerobss
|
||||
|
||||
/* Call static constructors */
|
||||
bl __libc_init_array
|
||||
/* Call the application's entry point.*/
|
||||
bl main
|
||||
|
||||
LoopForever:
|
||||
b LoopForever
|
||||
|
||||
.size Reset_Handler, .-Reset_Handler
|
||||
|
||||
/**
|
||||
* @brief This is the code that gets called when the processor receives an
|
||||
* unexpected interrupt. This simply enters an infinite loop, preserving
|
||||
* the system state for examination by a debugger.
|
||||
*
|
||||
* @param None
|
||||
* @retval : None
|
||||
*/
|
||||
.section .text.Default_Handler,"ax",%progbits
|
||||
Default_Handler:
|
||||
Infinite_Loop:
|
||||
b Infinite_Loop
|
||||
.size Default_Handler, .-Default_Handler
|
||||
/******************************************************************************
|
||||
*
|
||||
* The minimal vector table for a Cortex-M4. Note that the proper constructs
|
||||
* must be placed on this to ensure that it ends up at physical address
|
||||
* 0x0000.0000.
|
||||
*
|
||||
******************************************************************************/
|
||||
.section .isr_vector,"a",%progbits
|
||||
.type g_pfnVectors, %object
|
||||
|
||||
|
||||
g_pfnVectors:
|
||||
.word _estack
|
||||
.word Reset_Handler
|
||||
.word NMI_Handler
|
||||
.word HardFault_Handler
|
||||
.word MemManage_Handler
|
||||
.word BusFault_Handler
|
||||
.word UsageFault_Handler
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word SVC_Handler
|
||||
.word DebugMon_Handler
|
||||
.word 0
|
||||
.word PendSV_Handler
|
||||
.word SysTick_Handler
|
||||
.word WWDG_IRQHandler
|
||||
.word PVD_PVM_IRQHandler
|
||||
.word RTC_TAMP_LSECSS_IRQHandler
|
||||
.word RTC_WKUP_IRQHandler
|
||||
.word FLASH_IRQHandler
|
||||
.word RCC_IRQHandler
|
||||
.word EXTI0_IRQHandler
|
||||
.word EXTI1_IRQHandler
|
||||
.word EXTI2_IRQHandler
|
||||
.word EXTI3_IRQHandler
|
||||
.word EXTI4_IRQHandler
|
||||
.word DMA1_Channel1_IRQHandler
|
||||
.word DMA1_Channel2_IRQHandler
|
||||
.word DMA1_Channel3_IRQHandler
|
||||
.word DMA1_Channel4_IRQHandler
|
||||
.word DMA1_Channel5_IRQHandler
|
||||
.word DMA1_Channel6_IRQHandler
|
||||
.word DMA1_Channel7_IRQHandler
|
||||
.word ADC1_2_IRQHandler
|
||||
.word USB_HP_IRQHandler
|
||||
.word USB_LP_IRQHandler
|
||||
.word FDCAN1_IT0_IRQHandler
|
||||
.word FDCAN1_IT1_IRQHandler
|
||||
.word EXTI9_5_IRQHandler
|
||||
.word TIM1_BRK_TIM15_IRQHandler
|
||||
.word TIM1_UP_TIM16_IRQHandler
|
||||
.word TIM1_TRG_COM_TIM17_IRQHandler
|
||||
.word TIM1_CC_IRQHandler
|
||||
.word TIM2_IRQHandler
|
||||
.word TIM3_IRQHandler
|
||||
.word TIM4_IRQHandler
|
||||
.word I2C1_EV_IRQHandler
|
||||
.word I2C1_ER_IRQHandler
|
||||
.word I2C2_EV_IRQHandler
|
||||
.word I2C2_ER_IRQHandler
|
||||
.word SPI1_IRQHandler
|
||||
.word SPI2_IRQHandler
|
||||
.word USART1_IRQHandler
|
||||
.word USART2_IRQHandler
|
||||
.word USART3_IRQHandler
|
||||
.word EXTI15_10_IRQHandler
|
||||
.word RTC_Alarm_IRQHandler
|
||||
.word USBWakeUp_IRQHandler
|
||||
.word TIM8_BRK_IRQHandler
|
||||
.word TIM8_UP_IRQHandler
|
||||
.word TIM8_TRG_COM_IRQHandler
|
||||
.word TIM8_CC_IRQHandler
|
||||
.word ADC3_IRQHandler
|
||||
.word FMC_IRQHandler
|
||||
.word LPTIM1_IRQHandler
|
||||
.word TIM5_IRQHandler
|
||||
.word SPI3_IRQHandler
|
||||
.word UART4_IRQHandler
|
||||
.word UART5_IRQHandler
|
||||
.word TIM6_DAC_IRQHandler
|
||||
.word TIM7_DAC_IRQHandler
|
||||
.word DMA2_Channel1_IRQHandler
|
||||
.word DMA2_Channel2_IRQHandler
|
||||
.word DMA2_Channel3_IRQHandler
|
||||
.word DMA2_Channel4_IRQHandler
|
||||
.word DMA2_Channel5_IRQHandler
|
||||
.word ADC4_IRQHandler
|
||||
.word ADC5_IRQHandler
|
||||
.word UCPD1_IRQHandler
|
||||
.word COMP1_2_3_IRQHandler
|
||||
.word COMP4_5_6_IRQHandler
|
||||
.word COMP7_IRQHandler
|
||||
.word HRTIM1_Master_IRQHandler
|
||||
.word HRTIM1_TIMA_IRQHandler
|
||||
.word HRTIM1_TIMB_IRQHandler
|
||||
.word HRTIM1_TIMC_IRQHandler
|
||||
.word HRTIM1_TIMD_IRQHandler
|
||||
.word HRTIM1_TIME_IRQHandler
|
||||
.word HRTIM1_FLT_IRQHandler
|
||||
.word HRTIM1_TIMF_IRQHandler
|
||||
.word CRS_IRQHandler
|
||||
.word SAI1_IRQHandler
|
||||
.word TIM20_BRK_IRQHandler
|
||||
.word TIM20_UP_IRQHandler
|
||||
.word TIM20_TRG_COM_IRQHandler
|
||||
.word TIM20_CC_IRQHandler
|
||||
.word FPU_IRQHandler
|
||||
.word I2C4_EV_IRQHandler
|
||||
.word I2C4_ER_IRQHandler
|
||||
.word SPI4_IRQHandler
|
||||
.word 0
|
||||
.word FDCAN2_IT0_IRQHandler
|
||||
.word FDCAN2_IT1_IRQHandler
|
||||
.word FDCAN3_IT0_IRQHandler
|
||||
.word FDCAN3_IT1_IRQHandler
|
||||
.word RNG_IRQHandler
|
||||
.word LPUART1_IRQHandler
|
||||
.word I2C3_EV_IRQHandler
|
||||
.word I2C3_ER_IRQHandler
|
||||
.word DMAMUX_OVR_IRQHandler
|
||||
.word QUADSPI_IRQHandler
|
||||
.word DMA1_Channel8_IRQHandler
|
||||
.word DMA2_Channel6_IRQHandler
|
||||
.word DMA2_Channel7_IRQHandler
|
||||
.word DMA2_Channel8_IRQHandler
|
||||
.word CORDIC_IRQHandler
|
||||
.word FMAC_IRQHandler
|
||||
|
||||
.size g_pfnVectors, .-g_pfnVectors
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
* Provide weak aliases for each Exception handler to the Default_Handler.
|
||||
* As they are weak aliases, any function with the same name will override
|
||||
* this definition.
|
||||
*
|
||||
*******************************************************************************/
|
||||
|
||||
.weak NMI_Handler
|
||||
.thumb_set NMI_Handler,Default_Handler
|
||||
|
||||
.weak HardFault_Handler
|
||||
.thumb_set HardFault_Handler,Default_Handler
|
||||
|
||||
.weak MemManage_Handler
|
||||
.thumb_set MemManage_Handler,Default_Handler
|
||||
|
||||
.weak BusFault_Handler
|
||||
.thumb_set BusFault_Handler,Default_Handler
|
||||
|
||||
.weak UsageFault_Handler
|
||||
.thumb_set UsageFault_Handler,Default_Handler
|
||||
|
||||
.weak SVC_Handler
|
||||
.thumb_set SVC_Handler,Default_Handler
|
||||
|
||||
.weak DebugMon_Handler
|
||||
.thumb_set DebugMon_Handler,Default_Handler
|
||||
|
||||
.weak PendSV_Handler
|
||||
.thumb_set PendSV_Handler,Default_Handler
|
||||
|
||||
.weak SysTick_Handler
|
||||
.thumb_set SysTick_Handler,Default_Handler
|
||||
|
||||
.weak WWDG_IRQHandler
|
||||
.thumb_set WWDG_IRQHandler,Default_Handler
|
||||
|
||||
.weak PVD_PVM_IRQHandler
|
||||
.thumb_set PVD_PVM_IRQHandler,Default_Handler
|
||||
|
||||
.weak RTC_TAMP_LSECSS_IRQHandler
|
||||
.thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
|
||||
|
||||
.weak RTC_WKUP_IRQHandler
|
||||
.thumb_set RTC_WKUP_IRQHandler,Default_Handler
|
||||
|
||||
.weak FLASH_IRQHandler
|
||||
.thumb_set FLASH_IRQHandler,Default_Handler
|
||||
|
||||
.weak RCC_IRQHandler
|
||||
.thumb_set RCC_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI0_IRQHandler
|
||||
.thumb_set EXTI0_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI1_IRQHandler
|
||||
.thumb_set EXTI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI2_IRQHandler
|
||||
.thumb_set EXTI2_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI3_IRQHandler
|
||||
.thumb_set EXTI3_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI4_IRQHandler
|
||||
.thumb_set EXTI4_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel1_IRQHandler
|
||||
.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel2_IRQHandler
|
||||
.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel3_IRQHandler
|
||||
.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel4_IRQHandler
|
||||
.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel5_IRQHandler
|
||||
.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel6_IRQHandler
|
||||
.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel7_IRQHandler
|
||||
.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
|
||||
|
||||
.weak ADC1_2_IRQHandler
|
||||
.thumb_set ADC1_2_IRQHandler,Default_Handler
|
||||
|
||||
.weak USB_HP_IRQHandler
|
||||
.thumb_set USB_HP_IRQHandler,Default_Handler
|
||||
|
||||
.weak USB_LP_IRQHandler
|
||||
.thumb_set USB_LP_IRQHandler,Default_Handler
|
||||
|
||||
.weak FDCAN1_IT0_IRQHandler
|
||||
.thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
|
||||
|
||||
.weak FDCAN1_IT1_IRQHandler
|
||||
.thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI9_5_IRQHandler
|
||||
.thumb_set EXTI9_5_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_BRK_TIM15_IRQHandler
|
||||
.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_UP_TIM16_IRQHandler
|
||||
.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_TRG_COM_TIM17_IRQHandler
|
||||
.thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_CC_IRQHandler
|
||||
.thumb_set TIM1_CC_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM2_IRQHandler
|
||||
.thumb_set TIM2_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM3_IRQHandler
|
||||
.thumb_set TIM3_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM4_IRQHandler
|
||||
.thumb_set TIM4_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C1_EV_IRQHandler
|
||||
.thumb_set I2C1_EV_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C1_ER_IRQHandler
|
||||
.thumb_set I2C1_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C2_EV_IRQHandler
|
||||
.thumb_set I2C2_EV_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C2_ER_IRQHandler
|
||||
.thumb_set I2C2_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI1_IRQHandler
|
||||
.thumb_set SPI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI2_IRQHandler
|
||||
.thumb_set SPI2_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART1_IRQHandler
|
||||
.thumb_set USART1_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART2_IRQHandler
|
||||
.thumb_set USART2_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART3_IRQHandler
|
||||
.thumb_set USART3_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI15_10_IRQHandler
|
||||
.thumb_set EXTI15_10_IRQHandler,Default_Handler
|
||||
|
||||
.weak RTC_Alarm_IRQHandler
|
||||
.thumb_set RTC_Alarm_IRQHandler,Default_Handler
|
||||
|
||||
.weak USBWakeUp_IRQHandler
|
||||
.thumb_set USBWakeUp_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM8_BRK_IRQHandler
|
||||
.thumb_set TIM8_BRK_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM8_UP_IRQHandler
|
||||
.thumb_set TIM8_UP_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM8_TRG_COM_IRQHandler
|
||||
.thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM8_CC_IRQHandler
|
||||
.thumb_set TIM8_CC_IRQHandler,Default_Handler
|
||||
|
||||
.weak ADC3_IRQHandler
|
||||
.thumb_set ADC3_IRQHandler,Default_Handler
|
||||
|
||||
.weak FMC_IRQHandler
|
||||
.thumb_set FMC_IRQHandler,Default_Handler
|
||||
|
||||
.weak LPTIM1_IRQHandler
|
||||
.thumb_set LPTIM1_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM5_IRQHandler
|
||||
.thumb_set TIM5_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI3_IRQHandler
|
||||
.thumb_set SPI3_IRQHandler,Default_Handler
|
||||
|
||||
.weak UART4_IRQHandler
|
||||
.thumb_set UART4_IRQHandler,Default_Handler
|
||||
|
||||
.weak UART5_IRQHandler
|
||||
.thumb_set UART5_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM6_DAC_IRQHandler
|
||||
.thumb_set TIM6_DAC_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM7_DAC_IRQHandler
|
||||
.thumb_set TIM7_DAC_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel1_IRQHandler
|
||||
.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel2_IRQHandler
|
||||
.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel3_IRQHandler
|
||||
.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel4_IRQHandler
|
||||
.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel5_IRQHandler
|
||||
.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
|
||||
|
||||
.weak ADC4_IRQHandler
|
||||
.thumb_set ADC4_IRQHandler,Default_Handler
|
||||
|
||||
.weak ADC5_IRQHandler
|
||||
.thumb_set ADC5_IRQHandler,Default_Handler
|
||||
|
||||
.weak UCPD1_IRQHandler
|
||||
.thumb_set UCPD1_IRQHandler,Default_Handler
|
||||
|
||||
.weak COMP1_2_3_IRQHandler
|
||||
.thumb_set COMP1_2_3_IRQHandler,Default_Handler
|
||||
|
||||
.weak COMP4_5_6_IRQHandler
|
||||
.thumb_set COMP4_5_6_IRQHandler,Default_Handler
|
||||
|
||||
.weak COMP7_IRQHandler
|
||||
.thumb_set COMP7_IRQHandler,Default_Handler
|
||||
|
||||
.weak HRTIM1_Master_IRQHandler
|
||||
.thumb_set HRTIM1_Master_IRQHandler,Default_Handler
|
||||
|
||||
.weak HRTIM1_TIMA_IRQHandler
|
||||
.thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
|
||||
|
||||
.weak HRTIM1_TIMB_IRQHandler
|
||||
.thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
|
||||
|
||||
.weak HRTIM1_TIMC_IRQHandler
|
||||
.thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
|
||||
|
||||
.weak HRTIM1_TIMD_IRQHandler
|
||||
.thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
|
||||
|
||||
.weak HRTIM1_TIME_IRQHandler
|
||||
.thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
|
||||
|
||||
.weak HRTIM1_FLT_IRQHandler
|
||||
.thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
|
||||
|
||||
.weak HRTIM1_TIMF_IRQHandler
|
||||
.thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
|
||||
|
||||
.weak CRS_IRQHandler
|
||||
.thumb_set CRS_IRQHandler,Default_Handler
|
||||
|
||||
.weak SAI1_IRQHandler
|
||||
.thumb_set SAI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM20_BRK_IRQHandler
|
||||
.thumb_set TIM20_BRK_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM20_UP_IRQHandler
|
||||
.thumb_set TIM20_UP_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM20_TRG_COM_IRQHandler
|
||||
.thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM20_CC_IRQHandler
|
||||
.thumb_set TIM20_CC_IRQHandler,Default_Handler
|
||||
|
||||
.weak FPU_IRQHandler
|
||||
.thumb_set FPU_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C4_EV_IRQHandler
|
||||
.thumb_set I2C4_EV_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C4_ER_IRQHandler
|
||||
.thumb_set I2C4_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI4_IRQHandler
|
||||
.thumb_set SPI4_IRQHandler,Default_Handler
|
||||
|
||||
.weak FDCAN2_IT0_IRQHandler
|
||||
.thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
|
||||
|
||||
.weak FDCAN2_IT1_IRQHandler
|
||||
.thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
|
||||
|
||||
.weak FDCAN3_IT0_IRQHandler
|
||||
.thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
|
||||
|
||||
.weak FDCAN3_IT1_IRQHandler
|
||||
.thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
|
||||
|
||||
.weak RNG_IRQHandler
|
||||
.thumb_set RNG_IRQHandler,Default_Handler
|
||||
|
||||
.weak LPUART1_IRQHandler
|
||||
.thumb_set LPUART1_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C3_EV_IRQHandler
|
||||
.thumb_set I2C3_EV_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C3_ER_IRQHandler
|
||||
.thumb_set I2C3_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMAMUX_OVR_IRQHandler
|
||||
.thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
|
||||
|
||||
.weak QUADSPI_IRQHandler
|
||||
.thumb_set QUADSPI_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel8_IRQHandler
|
||||
.thumb_set DMA1_Channel8_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel6_IRQHandler
|
||||
.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel7_IRQHandler
|
||||
.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel8_IRQHandler
|
||||
.thumb_set DMA2_Channel8_IRQHandler,Default_Handler
|
||||
|
||||
.weak CORDIC_IRQHandler
|
||||
.thumb_set CORDIC_IRQHandler,Default_Handler
|
||||
|
||||
.weak FMAC_IRQHandler
|
||||
.thumb_set FMAC_IRQHandler,Default_Handler
|
||||
|
||||
Reference in New Issue
Block a user