janik
06c62e04f8
DC/AC resistance, power dissipation, and via/injection-area currents of copper zone fills. KiCad 10 IPC-API plugin (kicad-python/kipy): multi-layer via-coupled FDM solver, multi-part terminals via User.1/User.2 marker layers, pads as contacts, uniform-injection and equipotential contact models, per-foil skin effect, optional solder/copper buildup on mask openings. 54-case test suite incl. exact analytic references. Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
135 lines
7.0 KiB
Markdown
135 lines
7.0 KiB
Markdown
# Fill Resistance — KiCad 10 plugin
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Computes the **DC resistance of copper zone fills** between two contacts,
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**single- or multi-layer**: the chosen net's fills on the selected copper
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layers are solved as coupled finite-difference sheets linked by the net's
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**via and through-hole-pad barrels** (18 µm plating, configurable). Shows
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per-layer rasterized maps, potential, current density, and **power
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density**, reports **per-via currents** (via ampacity!) and total
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dissipation at a **selectable test current**. PNGs + a text summary are
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saved per run.
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Uses the KiCad **IPC API** (`kicad-python` / `kipy`), not the deprecated
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SWIG API. Requires KiCad **10.0.1+**.
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## Setup (one-time)
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1. **Enable the API server**: KiCad → Preferences → Plugins → check
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*Enable KiCad API*.
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2. **Check the interpreter path** on the same page: should be
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`C:\Program Files\KiCad\10.0\bin\pythonw.exe` (after a 9→10 upgrade it
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can point at KiCad 9).
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3. **Deploy**:
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```powershell
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powershell -ExecutionPolicy Bypass -File deploy.ps1 # junction (dev)
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powershell -ExecutionPolicy Bypass -File deploy.ps1 -Mode Copy
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```
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4. **Restart KiCad**; first load builds the plugin venv (numpy, scipy,
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matplotlib, PySide6 — takes minutes; the Ω button appears when done).
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If stuck: Preferences → Plugins → *Recreate Plugin Environment*.
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## Usage
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1. Mark the current-injection terminals. Each terminal may have
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**multiple parts** (all merged into one externally-bonded contact):
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- **V+ rectangles on `User.1`**, **V− rectangles on `User.2`**
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(marker layers, configurable via `ELECTRODE_POS_LAYER` /
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`ELECTRODE_NEG_LAYER`), any number per side, axis-aligned;
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- **pads** (real copper shape; through-hole pad contacts all layers,
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SMD pad its own layer) — selected pads fill a side that has no
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rectangles;
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- legacy: exactly 2 selected contacts with no marker rectangles still
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works; empty selection scans the whole board's marker layers.
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2. **Select the contacts**, click the **Fill Resistance** Ω button.
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3. In the **dialog**, pick the net (defaults to the selected pad's net),
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check the **layers** to include, set each contact's layer scope
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("All selected layers" = bolted-lug/through contact), the **test
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current**, and optionally a grid cell size. Multiple layers are coupled
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through the net's via/pad barrels automatically.
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4. Read R / voltage drop / total power in the figure titles and status
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bar. Outputs land in `<board dir>\fill_res_results\<timestamp>\`:
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per-layer `1_raster_map` / `2_potential` / `3_current_density` /
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`4_power_density` PNGs, `summary.txt` (incl. the busiest vias with
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per-via current and dissipation, and the **current through each
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injection area** — computed flux with the equipotential model,
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prescribed area share with the uniform model), `geometry_dump.json`.
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## Model & limits
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- Sheet model per layer: R□ = ρ/t, ρ = 1.68e-8 Ωm (20 °C), t from the
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board's physical stackup. Layer z-positions from the stackup drive the
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barrel lengths.
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- Via/pad barrels: thin-wall annulus, R = ρ·L/(π·d·t_plating),
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`VIA_PLATING_UM = 18` in `fill_resistance/config.py`. Vias are always
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plated; capped vs uncapped does not change the layer-to-layer DC path
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(the ≥5 µm cap sits over the hole mouth in parallel with the
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annular-ring contact, not in series). A barrel passing an antipad
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bridges the layers above/below with the full barrel length.
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- Tracks and pad copper (other than the selected contacts) are **not**
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part of the conductor model — zone fills + barrels only.
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- **Solder buildup on mask openings** (dialog checkbox, **off by
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default**; `INCLUDE_MASK_BUILDUP`): zones drawn on `F.Mask`/`B.Mask`
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are treated as mask openings that collect `SOLDER_THICKNESS_UM`
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(50 µm) of solder on the exposed pour, plus an optional user-defined
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added copper thickness (dialog field, e.g. a soldered busbar/wire).
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The sheet conductance there becomes t_Cu/ρ_Cu + t_solder/ρ_solder +
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t_extra/ρ_Cu (SAC305 ρ = 1.32e-7 Ωm: 50 µm solder ≈ 6.4 µm copper);
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interface faces use harmonic-mean conductances. Buildup areas render
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tin-gray on the raster map; |J| in them is referenced to the
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conductance-equivalent copper thickness.
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- **Contact models** (dialog / `CONTACT_MODEL`): default **uniform
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injection** — a conductor pressed on top feeds the current orthogonally
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with uniform surface density, so |J| ramps across the contact area
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(R = ΔV̄/I from area-averaged terminal potentials); or
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**equipotential** — ideal bonded lug (Dirichlet). The two bracket a
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real contact: R_equipotential ≤ R_real ≤ R_uniform.
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- Fields are reported at the dialog's test current; power scales with I².
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- **Skin effect (f > 0)**: per-layer effective sheet resistance from the
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exact 1D foil-diffusion solution `Zs = τρ·coth(τt)`, `τ = (1+j)/δ`
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(`SKIN_SIDES = 1` in config: plane facing a return plane; `2` =
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isolated foil), and the analogous correction for the 18 µm barrel wall.
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Enter one frequency per run (e.g. a switching harmonic, with its RMS
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amplitude as the test current) — suffixes `k`/`M` accepted.
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**Caveat:** only through-thickness crowding is modeled. Lateral
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(proximity-effect) redistribution needs a magneto-quasistatic solver
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and is not captured — since the resistance-driven distribution is the
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minimum-dissipation one, AC results are a rigorous **lower bound**.
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Rule of thumb for 70 µm foil: skin is negligible below ~300 kHz
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(δ = 173 µm at 142 kHz), ~+11 % at 1 MHz.
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- 5-point FDM per layer on an auto-sized shared grid (~500 k cells total
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across layers by default). Direct sparse solve up to 700 k unknowns,
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Jacobi-CG above. Discretization error typically ≲ 2 % at defaults —
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halve the cell size and compare to judge convergence.
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## Offline / development
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Every run writes `geometry_dump.json`; re-solve without KiCad:
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```powershell
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.venv\Scripts\python.exe -m fill_resistance.standalone dump.json `
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[--current 40] [--cell-um 50] [--layers F.Cu,In1.Cu] [--no-show] `
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[--out DIR] [--force-iterative]
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```
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Dev environment, tests, headless extraction:
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```powershell
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uv venv --python 3.11 .venv
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uv pip install --python .venv\Scripts\python.exe kicad-python numpy scipy matplotlib pytest
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.venv\Scripts\python.exe -m pytest tests -q # incl. exact analytic cases
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.venv\Scripts\python.exe smoke\smoke_probe.py # IPC API probe vs live KiCad
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.venv\Scripts\python.exe -m fill_resistance.board_io dump.json [NET] # extract only
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```
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## Troubleshooting
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- **No toolbar button**: venv still building (wait), or build failed →
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*Recreate Plugin Environment*; check the interpreter path (setup 2).
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- **"Could not connect to KiCad's IPC API"**: API server not enabled, or
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KiCad not running (no headless mode in KiCad 10).
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- **"KiCad is busy"**: a modal dialog is open in KiCad — close it, rerun.
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- **Windows don't appear**: they may open behind KiCad (raised
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best-effort); PNGs are always saved regardless.
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- **Result seems too low/high**: remember the model is fills + barrels
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only, with ideal contacts; measure electrode-to-electrode.
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