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Build PCM package / build (push) Successful in 6s
- THT pad copper is now part of the conductor: the exact pad outline (incl. oblong/custom shapes) is fetched from KiCad once per pad and stamped onto every included layer (the outer shape stands in for inner rings). Annular rings bridge antipads, and joints land on real copper instead of only pour coverage. - The internal lead conductor is modeled in every solder-filled hole: a cylinder of drill - THT_LEAD_CLEARANCE_MM (0.25 fab rule) with THT_LEAD_RHO_OHM_M (copper default; config for brass/steel leads), in parallel with the solder annulus and the plating. - Drill mouths of THT pads: populated pads keep conducting mouth copper (stands in for the solder plug - conservative, the plug is worth ~200 um of copper equivalent); DNP pad holes are cut open on every layer like uncapped via mouths. - Oblong pads: the coat uses the exact pad shape; the lead cone tapers within the inscribed circle (new pad_min_nm on ViaLink/Electrode) so the long axis is not overstated sideways. Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
252 lines
14 KiB
Markdown
252 lines
14 KiB
Markdown
# Fill Resistance — KiCad 10 plugin
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Computes the **DC or AC resistance of copper zone fills and traces**
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between two contacts, **single- or multi-layer**: the chosen net's fills
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(teardrops included) and tracks on the selected copper layers are
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solved as coupled finite-difference sheets linked by the net's **via
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and through-hole-pad barrels** (18 µm plating, configurable). At a user-set **frequency** the exact 1D foil/barrel
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skin-effect correction is applied (AC results are a rigorous lower
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bound — see *Model & limits*). Shows per-layer rasterized maps,
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potential, current density, and **power density**, reports **per-via
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currents** (via ampacity!) and total dissipation at a **selectable test
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current**. PNGs + a text summary are saved per run.
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Uses the KiCad **IPC API** (`kicad-python` / `kipy`), not the deprecated
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SWIG API. Requires KiCad **10.0.1+**.
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## Setup (one-time)
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1. **Enable the API server**: KiCad → Preferences → Plugins → check
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*Enable KiCad API*.
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2. **Check the interpreter path** on the same page: should point at the
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KiCad 10 Python, e.g. `C:\Program Files\KiCad\10.0\bin\pythonw.exe`
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on Windows or `/usr/bin/python3` on Linux (after a 9→10 upgrade it
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can point at KiCad 9).
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3. **Deploy** (dev checkout; end users install the PCM zip instead, see
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*Packaging*):
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```powershell
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powershell -ExecutionPolicy Bypass -File deploy.ps1 # junction (dev)
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powershell -ExecutionPolicy Bypass -File deploy.ps1 -Mode Copy
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```
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Linux / macOS (also works on Windows with developer mode):
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```bash
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python3 tools/deploy.py # symlink (dev)
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python3 tools/deploy.py --copy
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```
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4. **Restart KiCad**; first load builds the plugin venv (numpy, scipy,
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matplotlib, PySide6 — takes minutes; the Ω button appears when done).
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If stuck: Preferences → Plugins → *Recreate Plugin Environment*.
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## Usage
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1. Mark the current-injection terminals. Each terminal may have
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**multiple parts** (all merged into one externally-bonded contact):
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- **V+ rectangles on `User.1`**, **V− rectangles on `User.2`**
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(marker layers, configurable via `ELECTRODE_POS_LAYER` /
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`ELECTRODE_NEG_LAYER`), any number per side, axis-aligned;
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- **pads and vias** (SMD pad: real copper shape on its own layer;
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through-hole pads and vias become **barrel contacts** — the current
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enters at the drill wall on every spanned layer, see below) —
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selected pads/vias fill a side that has no rectangles;
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- legacy: exactly 2 selected contacts with no marker rectangles still
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works; empty selection scans the whole board's marker layers.
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2. **Select the contacts**, click the **Fill Resistance** Ω button.
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3. In the **dialog**, pick the net (defaults to the selected pad's net),
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check the **layers** to include, set each contact's layer scope
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("All selected layers" = bolted-lug/through contact), the **test
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current**, and optionally a grid cell size. Multiple layers are coupled
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through the net's via/pad barrels automatically.
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4. Read R / voltage drop / total power in the figure titles and status
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bar. Outputs land in `<board dir>\fill_res_results\<timestamp>\`:
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per-layer `1_raster_map` / `2_potential` / `3_current_density` /
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`4_power_density` PNGs, `summary.txt` (incl. the busiest vias with
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per-via current and dissipation, and the **current through each
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injection area** — computed flux with the equipotential model,
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prescribed area share with the uniform model), `geometry_dump.json`.
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## Model & limits
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- Sheet model per layer: R□ = ρ/t, ρ = 1.68e-8 Ωm (20 °C), t from the
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board's physical stackup. Layer z-positions from the stackup drive the
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barrel lengths.
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- Via/pad barrels: thin-wall annulus, R = ρ·L/(π·d·t_plating),
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`VIA_PLATING_UM = 18` in `fill_resistance/config.py`. Vias are always
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plated. Each via also contributes its **ring/pad copper** (a
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full-thickness disc of the pad diameter on every spanned layer) and
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its **drill mouth**, area-weighted per cell: with the **"vias filled +
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capped" checkbox** (default on, `VIAS_CAPPED`) the mouth carries a
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thin copper cap (`CAP_PLATING_UM = 15`, fab spec) on the **outer**
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layers and is an open hole on inner layers; unchecked, mouths are open
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holes everywhere. The fab caps only small vias: drills above the
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dialog's **"capped up to drill"** threshold (default
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`CAP_MAX_DRILL_MM = 0.5`) keep open mouths even with capping
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selected. Layer-to-layer the cap never matters at DC (it is in
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parallel with the annular-ring contact, not in series) — the checkbox
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only affects in-plane conduction across outer-layer mouths. Sub-cell
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mouths scale their cells' sheet conductance by the true covered
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fraction (4×4 supersampling), so coarse grids see the correct small
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perturbation instead of a whole-cell hole. Barrels are gathered in
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**single-layer runs too** (drill mouths perforate a lone plane).
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**THT pads are fully modeled**: their exact copper shapes (incl.
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oblong pads, fetched from KiCad; the outer shape stands in for inner
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rings) are stamped onto every included layer, and every **populated**
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pad carries its full **soldered joint** on its SOLDER side (opposite
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the component; the component-side pad face stays bare): the hole
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holds the **component lead** (a cylinder of drill −
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`THT_LEAD_CLEARANCE_MM`, resistivity `THT_LEAD_RHO_OHM_M`, copper by
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default — raise it for brass/steel leads) **plus solder** in the
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remaining annulus, both in parallel with the plating; the mouth
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copper stays conducting (it stands in for the plug — conservative,
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the plug is worth far more than the foil); the pad face gets the
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average-thickness solder coat (exact pad shape) and the
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protruding-lead cone (see barrel contacts below; on oblong pads the
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cone tapers within the inscribed circle). Whether a hole is a via or
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a THT pad, the owning footprint's side, and its **Do not populate**
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flag are all read from KiCad — **DNP pads** get an **open hole** and
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a plating-only barrel, no joint. At f > 0 the thickness scaling is
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applied multiplicatively to the skin-corrected sheet conductance
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(approximation). Per layer a barrel attaches to
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the fill cell under it, or to the nearest copper cell within the pad
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footprint plus one grid cell — fills joined by **thermal-relief
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spokes** still connect; wider antipads do not, and the barrel bridges
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the layers above/below with the full barrel length. Barrels that reach
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fill on fewer than two layers carry no current and are reported.
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- The net's **traces** (straight and arc tracks, exact outline polygons
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incl. rounded ends) conduct together with the fills — dialog checkbox,
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on by default (`INCLUDE_TRACKS`). Traces narrower than
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`TRACK_1D_FACTOR` (3) grid cells are modeled as exact **1D resistor
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chains** along their centerline — true arc length per link, so their
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series resistance carries no discretization error and no cell-size
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tuning is needed for thin traces. 1D-modeled traces show potential,
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power density, and |J| (the true in-trace density from the link
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currents, |ΔV|/(ρ·Δl)). THT pad copper is part of the conductor
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(exact shapes, see above); **SMD** pad copper other than the
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selected contacts is still **not**.
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- **Solder buildup on mask openings** (dialog checkbox, **off by
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default**; `INCLUDE_MASK_BUILDUP`): zones drawn on `F.Mask`/`B.Mask`
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are treated as mask openings that collect `SOLDER_THICKNESS_UM`
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(50 µm) of solder on the exposed pour, plus an optional user-defined
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added copper thickness (dialog field, e.g. a soldered busbar/wire).
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The sheet conductance there becomes t_Cu/ρ_Cu + t_solder/ρ_solder +
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t_extra/ρ_Cu (SAC305 ρ = 1.32e-7 Ωm: 50 µm solder ≈ 6.4 µm copper);
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interface faces use harmonic-mean conductances. Buildup areas render
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tin-gray on the raster map; |J| in them is referenced to the
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conductance-equivalent copper thickness.
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- **Barrel contacts**: a selected **via or through-hole pad** injects at
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the **drill-wall ring** on every layer the barrel spans — the current
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physically enters through the lead/wire soldered into the hole, so
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the spreading resistance across the pad and surrounding pour is part
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of the result (both contact models; verified against
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R = ρ/(π·t)·acosh(d/2a) for two circular contacts on a sheet). A
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soldered **THT joint** additionally assumes the **hole is filled with
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solder** (core in parallel with the plating) and the **pad face on
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the solder side carries an average-thickness solder coat**
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(`SOLDER_THICKNESS_UM`, 50 µm) over the modeled copper under the pad
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shape — the solder side is the side opposite the component (taken
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from the owning footprint; assumed `B.Cu` if it cannot be found),
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and the component-side pad face stays bare. There the **clipped
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lead protrudes** `THT_LEAD_PROTRUSION_MM` (1.5 mm, 0 = off)
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and a **solder cone** wraps
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it: full protrusion height at the drill wall, tapering linearly to
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zero at the pad edge, applied as extra conduction-equivalent copper
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per cell. The tall solder column at the wall pulls the joint
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vicinity to lead potential — equivalent to extending the barrel wall
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vertically — while the taper carries the radial spreading. To model
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a probe pressed onto the pad face instead, draw a marker rectangle
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over the pad.
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- **Contact models** (dialog / `CONTACT_MODEL`): default **uniform
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injection** — a conductor pressed on top feeds the current orthogonally
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with uniform surface density, so |J| ramps across the contact area
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(R = ΔV̄/I from area-averaged terminal potentials); or
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**equipotential** — ideal bonded lug (Dirichlet). The two bracket a
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real contact: R_equipotential ≤ R_real ≤ R_uniform. If the selected
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fills form several disconnected copper groups that each touch both
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terminals (e.g. planes joined only through the bolted lugs), only the
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equipotential model is well-defined; the uniform model stops with an
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error instead of prescribing an arbitrary split.
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- Fields are reported at the dialog's test current; power scales with I².
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- **Skin effect (f > 0)**: per-layer effective sheet resistance from the
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exact 1D foil-diffusion solution `Zs = τρ·coth(τt)`, `τ = (1+j)/δ`
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(`SKIN_SIDES = 1` in config: plane facing a return plane; `2` =
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isolated foil), and the analogous correction for the 18 µm barrel wall.
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Enter one frequency per run (e.g. a switching harmonic, with its RMS
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amplitude as the test current) — suffixes `k`/`M` accepted.
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**Caveat:** only through-thickness crowding is modeled. Lateral
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(proximity-effect) redistribution needs a magneto-quasistatic solver
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and is not captured — since the resistance-driven distribution is the
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minimum-dissipation one, AC results are a rigorous **lower bound**.
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Rule of thumb for 70 µm foil: skin is negligible below ~300 kHz
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(δ = 173 µm at 142 kHz), ~+11 % at 1 MHz. At f > 0 the |J| maps are
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referenced to the skin-reduced conduction-equivalent thickness
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t/(R_AC/R_DC) — the density in the copper that actually conducts —
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not the geometric foil thickness.
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- 5-point FDM per layer on an auto-sized shared grid (~2 M fine cells
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with the uniform grid; ~8 M with the adaptive grid, whose unknown
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count no longer scales with them). Direct sparse solve up to 500 k
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unknowns, AMG-preconditioned CG (pyamg) above — Jacobi-CG if pyamg is
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missing. Discretization error typically ≲ 2 % at defaults — halve the
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cell size and compare to judge convergence.
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- **Adaptive cells** (dialog checkbox, **on by default**;
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`ADAPTIVE_CELLS`):
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solves on a 2:1-balanced quadtree — fine cells at copper boundaries,
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electrodes, traces, via mouths and buildup, blocks up to
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`ADAPTIVE_MAX_CELL_UM` (2 mm) in plane interiors (`ADAPTIVE_GUARD`
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sets the clearance a block needs to grow). The **minimum element size
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is the grid cell size itself** (auto / dialog / `CELL_UM_OVERRIDE`);
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the uniform limit reproduces the normal grid exactly. Large
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speed/memory wins on big pours. The raw coarse–fine interface flux
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bias (~0.5–2 % low) is removed by a **deferred-correction pass**
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(`ADAPTIVE_CORRECTION_PASSES`, default 1: reconstruct leaf gradients,
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move the tangential term to the RHS, re-solve on the reused
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factorization/AMG hierarchy) — measured residual deviation from the
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uniform grid ≲ 0.03 %, with the power-balance identity intact. All
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fields are expanded back to the fine grid for the maps and reports.
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## Offline / development
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Every run writes `geometry_dump.json`; re-solve without KiCad:
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```powershell
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.venv\Scripts\python.exe -m fill_resistance.standalone dump.json `
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[--current 40] [--cell-um 50] [--layers F.Cu,In1.Cu] [--no-show] `
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[--out DIR] [--force-iterative]
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```
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Dev environment, tests, headless extraction (Windows shown; on
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Linux/macOS use `.venv/bin/python`):
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```powershell
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uv venv --python 3.11 .venv
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uv pip install --python .venv\Scripts\python.exe kicad-python numpy scipy pyamg matplotlib pytest
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.venv\Scripts\python.exe -m pytest tests -q # incl. exact analytic cases
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.venv\Scripts\python.exe tools\api_probe.py # IPC API probe vs live KiCad
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.venv\Scripts\python.exe -m fill_resistance.board_io dump.json [NET] # extract only
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```
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## Packaging / publishing
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`python tools/build_package.py` builds the PCM addon zip in `dist/`
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(installable right away via Plugin and Content Manager → *Install from
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File*) plus `dist/metadata-registry.json` with the SHA-256 and sizes
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filled in. To publish: upload the zip to a release, set `download_url`
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(and the `homepage` resource in `metadata.json`), then submit the
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registry copy as `packages/th.co.b4l.fill-resistance/metadata.json` in a
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merge request to <https://gitlab.com/kicad/addons/metadata>. Icons are
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regenerated with `python tools/gen_icons.py`.
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## License
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GPL-3.0-or-later — see [LICENSE](LICENSE).
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## Troubleshooting
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- **No toolbar button**: venv still building (wait), or build failed →
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*Recreate Plugin Environment*; check the interpreter path (setup 2).
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- **"Could not connect to KiCad's IPC API"**: API server not enabled, or
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KiCad not running (no headless mode in KiCad 10).
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- **"KiCad is busy"**: a modal dialog is open in KiCad — close it, rerun.
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- **Windows don't appear**: they may open behind KiCad (raised
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best-effort); PNGs are always saved regardless.
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- **Result seems too low/high**: remember the model is fills + barrels
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only, with ideal contacts; measure electrode-to-electrode.
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