Compare commits
3 Commits
mob/router
...
main
Author | SHA1 | Date | |
---|---|---|---|
b5f3adacd8 | |||
2eb52251cc | |||
be25560858 |
17
flake.lock
generated
17
flake.lock
generated
@@ -139,14 +139,19 @@
|
||||
"liminix": {
|
||||
"flake": false,
|
||||
"locked": {
|
||||
"lastModified": 1760087246,
|
||||
"narHash": "sha256-HRUkAS5XDuM7yDnz+TIMAre7kFOuqyHL/y26wTbH6Sg=",
|
||||
"path": "/home/kurogeek/Desktop/gitea/dan/liminix",
|
||||
"type": "path"
|
||||
"lastModified": 1760426231,
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||||
"narHash": "sha256-r8c5PKtsxAvtQ/k17GH+WNvP47Lr+AbExLMPdLtvAKE=",
|
||||
"ref": "refs/heads/fix-gl-ar750",
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"rev": "3f1f7c08d440130cce9262a93ce78ed7969d93cd",
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"revCount": 1574,
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"type": "git",
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"url": "https://git.b4l.co.th/newedge/liminix"
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},
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"original": {
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"path": "/home/kurogeek/Desktop/gitea/dan/liminix",
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"type": "path"
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"ref": "refs/heads/fix-gl-ar750",
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"rev": "3f1f7c08d440130cce9262a93ce78ed7969d93cd",
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"type": "git",
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"url": "https://git.b4l.co.th/newedge/liminix"
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}
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},
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"nix-darwin": {
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|
21
flake.nix
21
flake.nix
@@ -22,8 +22,7 @@
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inputs.nixpkgs.follows = "nixpkgs";
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};
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liminix = {
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# url = "git+https://gti.telent.net/dan/liminix?ref=refs/heads/main&rev=29fbb5461d034c4c59b88cbe04937b04ecad18e0";
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url = "path:/home/kurogeek/Desktop/gitea/dan/liminix";
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url = "git+https://git.b4l.co.th/newedge/liminix?ref=refs/heads/fix-gl-ar750&rev=3f1f7c08d440130cce9262a93ce78ed7969d93cd";
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flake = false;
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};
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};
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@@ -38,24 +37,6 @@
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systems = [
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"x86_64-linux"
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];
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flake.legacyPackages.qemu-router = import "${inputs.liminix}/default.nix" {
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liminix-config = import "${inputs.liminix}/examples/hello-from-qemu.nix";
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device = (import "${inputs.liminix}/devices/qemu-aarch64/default.nix");
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};
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flake.legacyPackages.yada-router = import "${inputs.liminix}/default.nix" {
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liminix-config = import ./routers/yada-house/configuration.nix { inherit inputs; };
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device = (import ./routers/yada-house/device.nix { inherit inputs; });
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};
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flake.legacyPackages.qemu-flake = import "${inputs.liminix}/default.nix" {
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liminix-config = import ./routers/qemu/configuration.nix { inherit inputs; };
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device = (import ./routers/qemu/device.nix { inherit inputs; });
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};
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flake.legacyPackages.vanilla = import "${inputs.liminix}/default.nix" {
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liminix-config = import ./routers/vanilla/configuration.nix { inherit inputs; };
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device = (import "${inputs.liminix}/devices/gl-mt300a/default.nix");
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};
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imports = [
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./fmt.nix
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./shell.nix
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|
@@ -5,6 +5,7 @@
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tags = {
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glom = [ "vega" ];
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b4l = [ "rigel" ];
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fax-bridge = [ ];
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};
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instances = {
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@@ -48,6 +49,14 @@
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roles.peer.tags.b4l = { };
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};
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yggdrasil = {
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module = {
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name = "yggdrasil";
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input = "self";
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};
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roles.default.tags."fax-bridge" = { };
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};
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pocket-id = {
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module = {
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name = "pocket-id";
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|
53
modules/clan/yggdrasil/default.nix
Normal file
53
modules/clan/yggdrasil/default.nix
Normal file
@@ -0,0 +1,53 @@
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{ ... }:
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{
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_class = "clan.service";
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manifest.name = "yggdrasil";
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manifest.description = "An in scalable routing as an encrypted IPv6 overlay network";
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manifest.categories = [ "System" ];
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roles.default = {
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perInstance.nixosModule =
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{
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lib,
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config,
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pkgs,
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...
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}:
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{
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clan.core.vars.generators.yggdrasil = {
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files = {
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yggdrasil-secret = {
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secret = true;
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};
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yggdrasil-ip = {
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secret = false;
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};
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yggdrasil-subnet.secret = false;
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};
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runtimeInputs = with pkgs; [
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yggdrasil
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jq
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];
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script = ''
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yggdrasil -genconf -json | jq {PrivateKey} > $out/yggdrasil-secret
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cat $out/yggdrasil-secret | yggdrasil -useconf -address | tr -d "\n" > $out/yggdrasil-ip
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yggdrasil -useconffile $out/yggdrasil-secret -subnet | tr -d "\n" > $out/yggdrasil-subnet
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'';
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};
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services.yggdrasil = {
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enable = lib.mkDefault true;
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configFile = config.clan.core.vars.generators.yggdrasil.files.yggdrasil-secret.path;
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settings = {
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Peers = [
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# US Peers
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"tls://ygg.jjolly.dev:3443"
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"tls://[2602:fc24:18:7a42::1]:993"
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"tcp://leo.node.3dt.net:9002"
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"tcp://ygg-kcmo.incognet.io:8883"
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];
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};
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};
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};
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};
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}
|
23
modules/clan/yggdrasil/flake-module.nix
Normal file
23
modules/clan/yggdrasil/flake-module.nix
Normal file
@@ -0,0 +1,23 @@
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{
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lib,
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inputs,
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self,
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...
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}:
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let
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module = lib.modules.importApply ./default.nix { };
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in
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{
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clan.modules = {
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yggdrasil = module;
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};
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perSystem =
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{ ... }:
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{
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# clan.nixosTests.yggdrasil = {
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# imports = [ ./tests/vm/default.nix ];
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#
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# clan.modules."@clan/yggdrasil" = module;
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# };
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};
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}
|
37
modules/clan/yggdrasil/tests/vm/default.nix
Normal file
37
modules/clan/yggdrasil/tests/vm/default.nix
Normal file
@@ -0,0 +1,37 @@
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{
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...
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}:
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{
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name = "service-yggdrasil";
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clan = {
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directory = ./.;
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inventory = {
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machines.server = { };
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instances = {
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yggdrasil-test = {
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module.name = "@clan/yggdrasil";
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module.input = "self";
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roles.default.machines."server".settings = { };
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};
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};
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};
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};
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nodes = {
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server = {
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services.yggdrasil = {
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};
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};
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};
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testScript = ''
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start_all()
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server.wait_for_unit("yggdrasil")
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# Check that garage is running
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server.succeed("systemctl status yggdrasil")
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'';
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}
|
6
modules/clan/yggdrasil/tests/vm/sops/machines/server/key.json
Executable file
6
modules/clan/yggdrasil/tests/vm/sops/machines/server/key.json
Executable file
@@ -0,0 +1,6 @@
|
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[
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{
|
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"publickey": "age12ldrhhffl0jeteh8f0rzhezs0ulggg5jyqph6xzrgjw2dv40pqwq49lej9",
|
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"type": "age"
|
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}
|
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]
|
@@ -0,0 +1,15 @@
|
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{
|
||||
"data": "ENC[AES256_GCM,data:pGMobS67sLp2GN2Xw7A/trcLYnQdVZCUbjtlwS/AShXxyXgHXzkqRee6R765GZyCpDwM8A1IuMZYctrqWxVXrpIAiJpwvwy7vDM=,iv:ysRf5xAXN+dFSx+sFHNDt1GcVQx7RLej4c12v60iSI0=,tag:yXYpWhWLdsz9BOOoKpZU4g==,type:str]",
|
||||
"sops": {
|
||||
"age": [
|
||||
{
|
||||
"recipient": "age1qm0p4vf9jvcnn43s6l4prk8zn6cx0ep9gzvevxecv729xz540v8qa742eg",
|
||||
"enc": "-----BEGIN AGE ENCRYPTED FILE-----\nYWdlLWVuY3J5cHRpb24ub3JnL3YxCi0+IFgyNTUxOSA2UmhPdzcrSnFhVUxRNDBL\ncXlGRzdMdWxCWmFlUkE4RnJRQ3psMlBqV0Q0CkRjTXFoQitQbjRhMlVjaDc3UDN1\nR1hBeXlCeWxvdnZoVWI1ZkcweHF5VncKLS0tIHE4YVFhYTZTNko1MnJINjFPYXh4\ndlJJZThGZ0JIaDJWRTNXbXk3alNZTnMKgd+0535zoTu6xW2778uNReu4Z7LStN6d\n1O9SXAB+s1iOZ3xGEICiQTVF/6p8RE6lheV2oXgoMiXXrFNH6INLsw==\n-----END AGE ENCRYPTED FILE-----\n"
|
||||
}
|
||||
],
|
||||
"lastmodified": "2025-10-17T05:34:34Z",
|
||||
"mac": "ENC[AES256_GCM,data:YIpKJlOI6ASgOYqv9ipu+T3c+PlM5HwvdFVH8gh8hVeSbmxD1baPPmVSWlLv+u61Q1/C9PK4mczaASopaGiLoswep+Hc1Gn7sSeP9wO6Djx6fEIEyE1VUhUbTqi/nHYiB21yB/wegfpqzNYIn1nO0oFCmDmSS5qIowcT1fhYIjM=,iv:lzxll5oC7poLvC/hZPexUGAcAdf67xZGRXUpj6O3p6Y=,tag:9xu17Y5MtW5XNzGBsWwA3g==,type:str]",
|
||||
"unencrypted_suffix": "_unencrypted",
|
||||
"version": "3.10.2"
|
||||
}
|
||||
}
|
@@ -0,0 +1 @@
|
||||
../../../users/admin
|
@@ -0,0 +1,4 @@
|
||||
{
|
||||
"publickey": "age1qm0p4vf9jvcnn43s6l4prk8zn6cx0ep9gzvevxecv729xz540v8qa742eg",
|
||||
"type": "age"
|
||||
}
|
@@ -0,0 +1 @@
|
||||
204:5ce7:aa27:579b:ec90:6907:4ddc:177
|
@@ -0,0 +1 @@
|
||||
../../../../../../sops/machines/server
|
@@ -0,0 +1,19 @@
|
||||
{
|
||||
"data": "ENC[AES256_GCM,data:I6yalWQ2u5hI84lJTUmh07JxUBp4EZukJrSGSN7wsGiUGlFa1v/RT1XkTiXuRjDtUVYCLmQmfSCAp/OqFscxF8KL+s24iTDrG4e3S6AeKLa3oZrNJIt1EJ06gWrPNoh1ttmwXSd4Y4Bsk4Lg8vIjH4qw3Bx+KrufxYTqe+anfMdoXKnW8wOWud5O7HMvCh+sf4dNcf6PIQ==,iv:SF5qExXNPyif+LIcNhHP0PKELUBXaFsPj9B3wvUkEp0=,tag:QEkZXDrIdcpNiZ6l2ljOPw==,type:str]",
|
||||
"sops": {
|
||||
"age": [
|
||||
{
|
||||
"recipient": "age12ldrhhffl0jeteh8f0rzhezs0ulggg5jyqph6xzrgjw2dv40pqwq49lej9",
|
||||
"enc": "-----BEGIN AGE ENCRYPTED FILE-----\nYWdlLWVuY3J5cHRpb24ub3JnL3YxCi0+IFgyNTUxOSBENDhrWVRuYjRnZktROU4v\nSHNtODFGMWl0NDRHazIwcWl0WGtNY2dYMXhnCmZQQ0doS3BTaU5hRHVsVTB5THl1\nWUNDQUNiMVJFeFZnQ1ptYmFQdTJQc28KLS0tIEtJdUQ5Y1VqSThkSVVNcVNVNEFr\nMzBCRjM1L1V5TngrZG5rR0VHY3Z6TDAKPQ6P96upDeh8xwQDrX4Zcf71Dah5zkOJ\n/F5eODEBadzQSRmJuyp3+uRMFf47eR6Q5bVah3NsVxFquXOL3CtNlw==\n-----END AGE ENCRYPTED FILE-----\n"
|
||||
},
|
||||
{
|
||||
"recipient": "age1qm0p4vf9jvcnn43s6l4prk8zn6cx0ep9gzvevxecv729xz540v8qa742eg",
|
||||
"enc": "-----BEGIN AGE ENCRYPTED FILE-----\nYWdlLWVuY3J5cHRpb24ub3JnL3YxCi0+IFgyNTUxOSBHb0EwT2tuMVE5SE5XaWdQ\ncGR0bFFhOUQvM2dGUzdlUEFFbzRnTHBWWUVnCjFGTXcrWW1vR0x5dXBUamtkS0dF\neG9weUVwQzhhNHhPRUdqV1VnWXJyNFEKLS0tIC80b1ZqRGFOenpENDN1Vk5vRUhY\nVnJzZ1Q5VzZ6ZEZtZE13YjQ0VVhrTTAK5y0BjKBRg2AXuO416JWLMLyM/pCQChKn\nVKZMXcT6cc5hHDuqbp9qUofknF68XnzlH6nOyLB1ZtnELyeZuf29fw==\n-----END AGE ENCRYPTED FILE-----\n"
|
||||
}
|
||||
],
|
||||
"lastmodified": "2025-10-17T05:34:35Z",
|
||||
"mac": "ENC[AES256_GCM,data:Y3k83RaeX64LA3rsIkQxyKw+LLUgXVsqr3F2UHkv9h73gkyChc6k1oE/FLR4CsZZWsfLNjCkPMuenqToA2mKqQK0aADwPDYo0aVm0hr1PGX5j3Py6EmP56NFvxlAQsExRWo32eqdkeCkY23hfcmUYlaB+bo/fsrRVj67zag9GYA=,iv:p18i8cV6jKXpuZ1Xd7KYCl8BMe1/8CW9YnCuVrTAqy0=,tag:IJnLzdZOn8Clu+lCKT6zvA==,type:str]",
|
||||
"unencrypted_suffix": "_unencrypted",
|
||||
"version": "3.10.2"
|
||||
}
|
||||
}
|
@@ -0,0 +1 @@
|
||||
../../../../../../sops/users/admin
|
@@ -1,25 +1,9 @@
|
||||
{ inputs, ... }:
|
||||
{
|
||||
flake.legacyPackages = {
|
||||
qemu-router = import "${inputs.liminix}/default.nix" {
|
||||
liminix-config = import "${inputs.liminix}/examples/hello-from-qemu.nix";
|
||||
device = (import "${inputs.liminix}/devices/qemu-aarch64/default.nix");
|
||||
};
|
||||
yada-router = import "${inputs.liminix}/default.nix" {
|
||||
liminix-config = import ./routers/yada-house/configuration.nix { inherit inputs; };
|
||||
device = (import ./routers/yada-house/device.nix { inherit inputs; });
|
||||
};
|
||||
qemu-flake = import "${inputs.liminix}/default.nix" {
|
||||
liminix-config = import ./routers/qemu/configuration.nix { inherit inputs; };
|
||||
device = (import ./routers/qemu/device.nix { inherit inputs; });
|
||||
};
|
||||
vanilla = import "${inputs.liminix}/default.nix" {
|
||||
liminix-config = import ./routers/vanilla/configuration.nix { inherit inputs; };
|
||||
device = (import "${inputs.liminix}/devices/gl-mt300a/default.nix");
|
||||
};
|
||||
fax-router = import "${inputs.liminix}/default.nix" {
|
||||
whitehouse-router = import "${inputs.liminix}/default.nix" {
|
||||
device = (import "${inputs.liminix}/devices/gl-ar750");
|
||||
liminix-config = import ./fax-router/configuration.nix { inherit inputs; };
|
||||
liminix-config = import ./white-house/configuration.nix { inherit inputs; };
|
||||
};
|
||||
};
|
||||
}
|
||||
|
@@ -1,46 +0,0 @@
|
||||
# This is an example that uses the "gateway" profile to create a
|
||||
# "typical home wireless router" configuration suitable for a Gl.inet
|
||||
# gl-ar750 router. It should be fairly simple to edit it for other
|
||||
# devices: mostly you will need to attend to the number of wlan and lan
|
||||
# interfaces
|
||||
{ inputs }:
|
||||
{ config, pkgs, ... }:
|
||||
let
|
||||
inherit (pkgs.liminix.services) target;
|
||||
svc = config.system.service;
|
||||
in
|
||||
rec {
|
||||
imports = [
|
||||
"${inputs.liminix}/modules/wlan.nix"
|
||||
"${inputs.liminix}/modules/network"
|
||||
"${inputs.liminix}/modules/ntp"
|
||||
"${inputs.liminix}/modules/vlan"
|
||||
];
|
||||
|
||||
services.dhcpv4 =
|
||||
let
|
||||
iface = svc.network.link.build { ifname = "eth1"; };
|
||||
in
|
||||
svc.network.dhcp.client.build { interface = iface; };
|
||||
|
||||
services.defaultroute4 = svc.network.route.build {
|
||||
via = "$(output ${services.dhcpv4} ip)";
|
||||
target = "default";
|
||||
dependencies = [ services.dhcpv4 ];
|
||||
};
|
||||
|
||||
services.packet_forwarding = svc.network.forward.build { };
|
||||
|
||||
services.ntp = config.system.service.ntp.build {
|
||||
pools = {
|
||||
"pool.ntp.org" = [ "iburst" ];
|
||||
};
|
||||
};
|
||||
|
||||
boot.tftp = {
|
||||
serverip = "192.168.8.148";
|
||||
ipaddr = "192.168.8.251";
|
||||
};
|
||||
|
||||
defaultProfile.packages = [ pkgs.hello ];
|
||||
}
|
@@ -1,17 +0,0 @@
|
||||
{
|
||||
wpa_passphrase = "you bring light in";
|
||||
ssid = "liminix";
|
||||
l2tp = {
|
||||
name = "abcde@a.1";
|
||||
password = "NotMyIspPassword";
|
||||
};
|
||||
root = {
|
||||
# mkpasswd -m sha512crypt
|
||||
passwd = "$6$6pt0mpbgcB7kC2RJ$kSBoCYGyi1.qxt7dqmexLj1l8E6oTZJZmfGyJSsMYMW.jlsETxdgQSdv6ptOYDM7DHAwf6vLG0pz3UD31XBfC1";
|
||||
openssh.authorizedKeys.keys = [ ];
|
||||
};
|
||||
|
||||
lan = {
|
||||
prefix = "10.8.0";
|
||||
};
|
||||
}
|
@@ -1,49 +0,0 @@
|
||||
{ inputs }:
|
||||
{ config, pkgs, ... }:
|
||||
let
|
||||
svc = config.system.service;
|
||||
|
||||
in
|
||||
rec {
|
||||
imports = [
|
||||
"${inputs.liminix}/modules/network"
|
||||
"${inputs.liminix}/modules/dnsmasq"
|
||||
"${inputs.liminix}/modules/ssh"
|
||||
];
|
||||
|
||||
hostname = "hello";
|
||||
|
||||
# configure the internal network (LAN) with an address
|
||||
services.int = svc.network.address.build {
|
||||
interface = config.hardware.networkInterfaces.lan;
|
||||
family = "inet";
|
||||
address = "10.3.0.1";
|
||||
prefixLength = 16;
|
||||
};
|
||||
|
||||
services.sshd = svc.ssh.build { };
|
||||
|
||||
users.root = {
|
||||
# the password is "secret". Use mkpasswd -m sha512crypt to
|
||||
# create this hashed password string
|
||||
passwd = "$6$y7WZ5hM6l5nriLmo$5AJlmzQZ6WA.7uBC7S8L4o19ESR28Dg25v64/vDvvCN01Ms9QoHeGByj8lGlJ4/b.dbwR9Hq2KXurSnLigt1W1";
|
||||
};
|
||||
|
||||
services.dns =
|
||||
let
|
||||
interface = services.int;
|
||||
in
|
||||
svc.dnsmasq.build {
|
||||
inherit interface;
|
||||
ranges = [
|
||||
"10.3.0.10,10.3.0.240"
|
||||
"::,constructor:$(output ${interface} ifname),ra-stateless"
|
||||
];
|
||||
|
||||
domain = "example.org";
|
||||
};
|
||||
|
||||
defaultProfile.packages = with pkgs; [
|
||||
figlet
|
||||
];
|
||||
}
|
@@ -1,58 +0,0 @@
|
||||
# This "device" generates images that can be used with the QEMU
|
||||
# emulator. The default output is a directory containing separate
|
||||
# kernel ("Image" format) and root filesystem (squashfs or jffs2)
|
||||
# images
|
||||
{ inputs }:
|
||||
{
|
||||
system = {
|
||||
crossSystem = {
|
||||
config = "aarch64-unknown-linux-musl";
|
||||
};
|
||||
};
|
||||
|
||||
description = ''
|
||||
QEMU Aarch64
|
||||
************
|
||||
|
||||
This target produces an image for
|
||||
the `QEMU "virt" platform <https://www.qemu.org/docs/master/system/arm/virt.html>`_ using a 64 bit CPU type.
|
||||
|
||||
ARM targets differ from MIPS in that the kernel format expected
|
||||
by QEMU is an "Image" (raw binary file) rather than an ELF
|
||||
file, but this is taken care of by :command:`run.sh`. Check the
|
||||
documentation for the :ref:`qemu` target for more information.
|
||||
|
||||
'';
|
||||
|
||||
# this device is described by the "qemu" device
|
||||
installer = "vmroot";
|
||||
|
||||
module =
|
||||
{ config, lim, ... }:
|
||||
{
|
||||
imports = [
|
||||
"${inputs.liminix}/modules/arch/aarch64.nix"
|
||||
"${inputs.liminix}/devices/families/qemu.nix"
|
||||
];
|
||||
kernel = {
|
||||
config = {
|
||||
VIRTUALIZATION = "y";
|
||||
PCI_HOST_GENERIC = "y";
|
||||
|
||||
SERIAL_AMBA_PL011 = "y";
|
||||
SERIAL_AMBA_PL011_CONSOLE = "y";
|
||||
};
|
||||
};
|
||||
boot.commandLine = [
|
||||
"console=ttyAMA0,38400"
|
||||
];
|
||||
hardware =
|
||||
let
|
||||
addr = lim.parseInt "0x40010000";
|
||||
in
|
||||
{
|
||||
loadAddress = addr;
|
||||
entryPoint = addr;
|
||||
};
|
||||
};
|
||||
}
|
@@ -1,41 +0,0 @@
|
||||
{ inputs }:
|
||||
{ config, pkgs, ... }:
|
||||
let
|
||||
inherit (pkgs.liminix.services) target;
|
||||
svc = config.system.service;
|
||||
in
|
||||
rec {
|
||||
imports = [
|
||||
"${inputs.liminix}/modules/wlan.nix"
|
||||
"${inputs.liminix}/modules/network"
|
||||
"${inputs.liminix}/modules/ntp"
|
||||
"${inputs.liminix}/modules/vlan"
|
||||
];
|
||||
|
||||
services.dhcpv4 =
|
||||
let
|
||||
iface = svc.network.link.build { ifname = "eth1"; };
|
||||
in
|
||||
svc.network.dhcp.client.build { interface = iface; };
|
||||
|
||||
services.defaultroute4 = svc.network.route.build {
|
||||
via = "$(output ${services.dhcpv4} ip)";
|
||||
target = "default";
|
||||
dependencies = [ services.dhcpv4 ];
|
||||
};
|
||||
|
||||
services.packet_forwarding = svc.network.forward.build { };
|
||||
|
||||
services.ntp = config.system.service.ntp.build {
|
||||
pools = {
|
||||
"pool.ntp.org" = [ "iburst" ];
|
||||
};
|
||||
};
|
||||
|
||||
boot.tftp = {
|
||||
serverip = "192.168.8.148";
|
||||
ipaddr = "192.168.8.251";
|
||||
};
|
||||
|
||||
defaultProfile.packages = [ pkgs.hello ];
|
||||
}
|
@@ -1,86 +0,0 @@
|
||||
# This "device" generates images that can be used with the QEMU
|
||||
# emulator. The default output is a directory containing separate
|
||||
# kernel (uncompressed vmlinux) and initrd (squashfs) images
|
||||
{ inputs }:
|
||||
{
|
||||
system = {
|
||||
crossSystem = {
|
||||
config = "mips-unknown-linux-musl";
|
||||
gcc = {
|
||||
abi = "32";
|
||||
arch = "mips32"; # maybe mips_24kc-
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
description = ''
|
||||
QEMU MIPS
|
||||
*********
|
||||
|
||||
This target produces an image for
|
||||
QEMU, the "generic and open source machine emulator and
|
||||
virtualizer".
|
||||
|
||||
MIPS QEMU emulates a "Malta" board, which was an ATX form factor
|
||||
evaluation board made by MIPS Technologies, but mostly in Liminix
|
||||
we use paravirtualized devices (Virtio) instead of emulating
|
||||
hardware.
|
||||
|
||||
Building an image for QEMU results in a :file:`result/` directory
|
||||
containing ``run.sh`` ``vmlinux``, and ``rootfs`` files. To invoke
|
||||
the emulator, run ``run.sh``.
|
||||
|
||||
The configuration includes two emulated "hardware" ethernet
|
||||
devices and the kernel :code:`mac80211_hwsim` module to
|
||||
provide an emulated wlan device. To read more about how
|
||||
to connect to this network, refer to :ref:`qemu-networking`
|
||||
in the Development manual.
|
||||
|
||||
'';
|
||||
module =
|
||||
{
|
||||
config,
|
||||
lib,
|
||||
lim,
|
||||
...
|
||||
}:
|
||||
{
|
||||
imports = [
|
||||
"${inputs.liminix}/modules/arch/mipseb.nix"
|
||||
"${inputs.liminix}/devices/families/qemu.nix"
|
||||
];
|
||||
kernel = {
|
||||
config = {
|
||||
MIPS_MALTA = "y";
|
||||
CPU_MIPS32_R2 = "y";
|
||||
|
||||
POWER_RESET = "y";
|
||||
POWER_RESET_SYSCON = "y";
|
||||
|
||||
SERIAL_8250 = "y";
|
||||
SERIAL_8250_CONSOLE = "y";
|
||||
};
|
||||
};
|
||||
hardware =
|
||||
# from arch/mips/mti-malta/Platform:load-$(CONFIG_MIPS_MALTA) += 0xffffffff80100000
|
||||
let
|
||||
addr = lim.parseInt "0x80100000";
|
||||
in
|
||||
{
|
||||
loadAddress = addr;
|
||||
entryPoint = addr;
|
||||
|
||||
# Unlike the arm qemu targets, we need a static dts when
|
||||
# running u-boot-using tests, qemu dumpdtb command doesn't
|
||||
# work for this board. I am not at all sure this dts is
|
||||
# *correct* but it does at least boot
|
||||
dts = lib.mkForce {
|
||||
src = "${config.system.outputs.kernel.modulesupport}/arch/mips/boot/dts/mti/malta.dts";
|
||||
includePaths = [
|
||||
"${config.system.outputs.kernel.modulesupport}/arch/mips/boot/dts/"
|
||||
];
|
||||
};
|
||||
|
||||
};
|
||||
};
|
||||
}
|
120
routers/white-house/configuration.nix
Normal file
120
routers/white-house/configuration.nix
Normal file
@@ -0,0 +1,120 @@
|
||||
{ inputs }:
|
||||
{
|
||||
config,
|
||||
pkgs,
|
||||
modulesPath,
|
||||
lib,
|
||||
...
|
||||
}:
|
||||
let
|
||||
secrets = {
|
||||
firewallRules = { };
|
||||
}
|
||||
// (import ./secrets.nix);
|
||||
wirelessConfig = {
|
||||
country_code = "TH";
|
||||
inherit (secrets) wpa_passphrase;
|
||||
wmm_enabled = 1;
|
||||
};
|
||||
svc = config.system.service;
|
||||
in
|
||||
{
|
||||
imports = [
|
||||
"${inputs.liminix}/modules/wlan.nix"
|
||||
"${inputs.liminix}/modules/network"
|
||||
"${inputs.liminix}/modules/vlan"
|
||||
"${inputs.liminix}/modules/ssh"
|
||||
"${inputs.liminix}/modules/bridge"
|
||||
"${modulesPath}/profiles/gateway.nix"
|
||||
];
|
||||
|
||||
hostname = "whitehouse";
|
||||
boot = {
|
||||
tftp = {
|
||||
freeSpaceBytes = 3 * 1024 * 1024;
|
||||
serverip = "${secrets.lan.prefix}.148";
|
||||
ipaddr = "${secrets.lan.prefix}.251";
|
||||
};
|
||||
};
|
||||
|
||||
services.sshd = svc.ssh.build {
|
||||
authorizedKeys.root = secrets.root.openssh.authorizedKeys.keys;
|
||||
};
|
||||
|
||||
users.root = secrets.root;
|
||||
|
||||
services.resolvconf = lib.mkForce (
|
||||
pkgs.liminix.services.oneshot rec {
|
||||
name = "resolvconf";
|
||||
up = ''
|
||||
( in_outputs ${name}
|
||||
echo "nameserver $(output ${config.services.wan} ns1)" > resolv.conf
|
||||
echo "nameserver $(output ${config.services.wan} ns2)" >> resolv.conf
|
||||
chmod 0444 resolv.conf
|
||||
)
|
||||
'';
|
||||
}
|
||||
);
|
||||
|
||||
profile.gateway = {
|
||||
lan = {
|
||||
interfaces = with config.hardware.networkInterfaces; [
|
||||
wlan
|
||||
wlan5
|
||||
lan
|
||||
];
|
||||
inherit (secrets.lan) prefix;
|
||||
address = {
|
||||
family = "inet";
|
||||
address = "${secrets.lan.prefix}.1";
|
||||
prefixLength = 24;
|
||||
};
|
||||
dhcp = {
|
||||
start = 10;
|
||||
end = 240;
|
||||
hosts = { };
|
||||
localDomain = "lan";
|
||||
};
|
||||
};
|
||||
wan = {
|
||||
interface = svc.pppoe.build {
|
||||
interface = config.hardware.networkInterfaces.wan;
|
||||
username = secrets.l2tp.name;
|
||||
password = secrets.l2tp.password;
|
||||
};
|
||||
|
||||
dhcp6.enable = true;
|
||||
};
|
||||
firewall = {
|
||||
enable = true;
|
||||
rules = secrets.firewallRules;
|
||||
};
|
||||
wireless.networks = {
|
||||
|
||||
"${secrets.ssid}" = {
|
||||
interface = config.hardware.networkInterfaces.wlan;
|
||||
hw_mode = "g";
|
||||
channel = "2";
|
||||
ieee80211n = 1;
|
||||
}
|
||||
// wirelessConfig;
|
||||
"${secrets.ssid}-5" = rec {
|
||||
interface = config.hardware.networkInterfaces.wlan5;
|
||||
hw_mode = "a";
|
||||
channel = 36;
|
||||
ht_capab = "[HT40+]";
|
||||
vht_oper_chwidth = 1;
|
||||
vht_oper_centr_freq_seg0_idx = channel + 6;
|
||||
ieee80211n = 1;
|
||||
ieee80211ac = 1;
|
||||
}
|
||||
// wirelessConfig;
|
||||
};
|
||||
};
|
||||
defaultProfile.packages = with pkgs; [
|
||||
busybox
|
||||
iw
|
||||
iptables
|
||||
];
|
||||
|
||||
}
|
20
routers/white-house/secrets.nix
Normal file
20
routers/white-house/secrets.nix
Normal file
@@ -0,0 +1,20 @@
|
||||
{
|
||||
wpa_passphrase = "";
|
||||
ssid = "WhiteHouse";
|
||||
l2tp = {
|
||||
name = "";
|
||||
password = "";
|
||||
};
|
||||
root = {
|
||||
openssh.authorizedKeys.keys = [
|
||||
"ssh-ed25519 AAAAC3NzaC1lZDI1NTE5AAAAIEcZ/p1Ofa9liwIzPWzNtONhJ7+FUWd2lCz33r81t8+w kurogeek@kurogeek"
|
||||
"ssh-ed25519 AAAAC3NzaC1lZDI1NTE5AAAAIAB/raxJR8gASmquP63weHelbi+da2WBJR1DgzHPNz/f"
|
||||
"ssh-ed25519 AAAAC3NzaC1lZDI1NTE5AAAAIDuhpzDHBPvn8nv8RH1MRomDOaXyP4GziQm7r3MZ1Syk"
|
||||
"ssh-ed25519 AAAAC3NzaC1lZDI1NTE5AAAAIAmgyEGuY/r7SDlJgrzYmQqpcWS5W+fCzRi3OS59ne4W openpgp:0xFF687387"
|
||||
];
|
||||
};
|
||||
|
||||
lan = {
|
||||
prefix = "192.168.1";
|
||||
};
|
||||
}
|
@@ -1,54 +0,0 @@
|
||||
{ inputs }:
|
||||
|
||||
{
|
||||
config,
|
||||
pkgs,
|
||||
...
|
||||
}:
|
||||
let
|
||||
svc = config.system.service;
|
||||
|
||||
in
|
||||
rec {
|
||||
imports = [
|
||||
"${inputs.liminix}/modules/network"
|
||||
"${inputs.liminix}/modules/dnsmasq"
|
||||
"${inputs.liminix}/modules/ssh"
|
||||
];
|
||||
|
||||
hostname = "hello";
|
||||
|
||||
# configure the internal network (LAN) with an address
|
||||
services.int = svc.network.address.build {
|
||||
interface = config.hardware.networkInterfaces.lan2;
|
||||
family = "inet";
|
||||
address = "192.168.8.1";
|
||||
prefixLength = 24;
|
||||
};
|
||||
|
||||
services.sshd = svc.ssh.build { };
|
||||
|
||||
users.root = {
|
||||
# the password is "secret". Use mkpasswd -m sha512crypt to
|
||||
# create this hashed password string
|
||||
passwd = "$6$y7WZ5hM6l5nriLmo$5AJlmzQZ6WA.7uBC7S8L4o19ESR28Dg25v64/vDvvCN01Ms9QoHeGByj8lGlJ4/b.dbwR9Hq2KXurSnLigt1W1";
|
||||
};
|
||||
|
||||
services.dns =
|
||||
let
|
||||
interface = services.int;
|
||||
in
|
||||
svc.dnsmasq.build {
|
||||
inherit interface;
|
||||
ranges = [
|
||||
"192.168.8.1,192.168.8.240"
|
||||
"::,constructor:$(output ${interface} ifname),ra-stateless"
|
||||
];
|
||||
|
||||
domain = "example.org";
|
||||
};
|
||||
|
||||
# defaultProfile.packages = with pkgs; [
|
||||
# figlet
|
||||
# ];
|
||||
}
|
@@ -1,127 +0,0 @@
|
||||
# GL.iNet GL-MT6000
|
||||
{ inputs }:
|
||||
{
|
||||
system = {
|
||||
crossSystem = {
|
||||
config = "aarch64-unknown-linux-musl";
|
||||
gcc = {
|
||||
arch = "armv8-a";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
description = ''
|
||||
Device configuration for Yada/White house router.
|
||||
'';
|
||||
|
||||
module =
|
||||
{
|
||||
pkgs,
|
||||
config,
|
||||
lib,
|
||||
lim,
|
||||
...
|
||||
}:
|
||||
let
|
||||
inherit (pkgs) openwrt_24_10;
|
||||
# mac80211 = pkgs.kmodloader.override {
|
||||
# targets = [ "rt2800soc" ];
|
||||
# inherit (config.system.outputs) kernel;
|
||||
# };
|
||||
in
|
||||
{
|
||||
imports = [
|
||||
"${inputs.liminix}/modules/outputs/mtdimage.nix"
|
||||
"${inputs.liminix}/modules/outputs/squashfs.nix"
|
||||
"${inputs.liminix}/modules/outputs/tftpboot.nix"
|
||||
"${inputs.liminix}/modules/outputs/vmroot.nix"
|
||||
"${inputs.liminix}/modules/arch/aarch64.nix"
|
||||
# "${inputs.liminix}/modules/base.nix"
|
||||
"${inputs.liminix}/modules/vlan"
|
||||
];
|
||||
boot.tftp = {
|
||||
serverip = "192.168.1.254";
|
||||
ipaddr = "192.168.1.1";
|
||||
loadAddress = lim.parseInt "0x46000000";
|
||||
};
|
||||
boot.imageFormat = "fit";
|
||||
boot.loader.fit.enable = true;
|
||||
rootfsType = "squashfs";
|
||||
hardware = {
|
||||
loadAddress = lim.parseInt "0x48080000";
|
||||
entryPoint = lim.parseInt "0x48080000";
|
||||
|
||||
flash = {
|
||||
address = lim.parseInt "0x41e00000";
|
||||
size = lim.parseInt "0x4000";
|
||||
eraseBlockSize = 65536;
|
||||
};
|
||||
rootDevice = "/dev/root";
|
||||
|
||||
dts = {
|
||||
src = "${openwrt_24_10.src}/target/linux/mediatek/dts/mt7986a-glinet-gl-mt6000.dts";
|
||||
includePaths = [
|
||||
"${openwrt_24_10.src}/target/linux/mediatek/dts"
|
||||
"${config.system.outputs.kernel.modulesupport}/arch/arm64/boot/dts/mediatek/"
|
||||
];
|
||||
};
|
||||
networkInterfaces =
|
||||
let
|
||||
inherit (config.system.service.network) link;
|
||||
inherit (config.system.service) vlan;
|
||||
in
|
||||
rec {
|
||||
eth0 = link.build { ifname = "eth0"; };
|
||||
wan = link.build { ifname = "eth1"; };
|
||||
|
||||
lan1 = vlan.build {
|
||||
ifname = "lan1@eth0";
|
||||
primary = eth0;
|
||||
vid = "1";
|
||||
};
|
||||
lan2 = vlan.build {
|
||||
ifname = "lan2@eth0";
|
||||
primary = eth0;
|
||||
vid = "2";
|
||||
};
|
||||
lan3 = vlan.build {
|
||||
ifname = "lan3@eth0";
|
||||
primary = eth0;
|
||||
vid = "3";
|
||||
};
|
||||
lan4 = vlan.build {
|
||||
ifname = "lan4@eth0";
|
||||
primary = eth0;
|
||||
vid = "4";
|
||||
};
|
||||
lan5 = vlan.build {
|
||||
ifname = "lan5@eth0";
|
||||
primary = eth0;
|
||||
vid = "5";
|
||||
};
|
||||
|
||||
# wlan = link.build {
|
||||
# ifname = "wlan0";
|
||||
# dependencies = [ mac80211 ];
|
||||
# };
|
||||
};
|
||||
};
|
||||
|
||||
kernel = {
|
||||
src = openwrt_24_10.kernelSrc;
|
||||
version = openwrt_24_10.kernelVersion;
|
||||
extraPatchPhase = ''
|
||||
echo ==================================================
|
||||
ls ${openwrt_24_10.src}/config
|
||||
echo ==================================================
|
||||
patch ${openwrt_24_10.src}/package/boot/uboot-mediatek/patches/436-add-glinet-mt6000.patch
|
||||
echo --------------------------------------------------
|
||||
ls ${openwrt_24_10.src}/config
|
||||
echo --------------------------------------------------
|
||||
${openwrt_24_10.applyPatches.mediatek}
|
||||
'';
|
||||
config = {
|
||||
};
|
||||
};
|
||||
};
|
||||
}
|
@@ -1,645 +0,0 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
|
||||
/*
|
||||
* Copyright (C) 2021 MediaTek Inc.
|
||||
* Author: Sam.Shih <sam.shih@mediatek.com>
|
||||
*/
|
||||
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/clock/mt7986-clk.h>
|
||||
#include <dt-bindings/reset/mt7986-resets.h>
|
||||
#include <dt-bindings/phy/phy.h>
|
||||
|
||||
/ {
|
||||
compatible = "mediatek,mt7986a";
|
||||
interrupt-parent = <&gic>;
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
cpu0: cpu@0 {
|
||||
compatible = "arm,cortex-a53";
|
||||
reg = <0x0>;
|
||||
device_type = "cpu";
|
||||
enable-method = "psci";
|
||||
#cooling-cells = <2>;
|
||||
};
|
||||
|
||||
cpu1: cpu@1 {
|
||||
compatible = "arm,cortex-a53";
|
||||
reg = <0x1>;
|
||||
device_type = "cpu";
|
||||
enable-method = "psci";
|
||||
#cooling-cells = <2>;
|
||||
};
|
||||
|
||||
cpu2: cpu@2 {
|
||||
compatible = "arm,cortex-a53";
|
||||
reg = <0x2>;
|
||||
device_type = "cpu";
|
||||
enable-method = "psci";
|
||||
#cooling-cells = <2>;
|
||||
};
|
||||
|
||||
cpu3: cpu@3 {
|
||||
compatible = "arm,cortex-a53";
|
||||
reg = <0x3>;
|
||||
device_type = "cpu";
|
||||
enable-method = "psci";
|
||||
#cooling-cells = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
clk40m: oscillator-40m {
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <40000000>;
|
||||
#clock-cells = <0>;
|
||||
clock-output-names = "clkxtal";
|
||||
};
|
||||
|
||||
psci {
|
||||
compatible = "arm,psci-0.2";
|
||||
method = "smc";
|
||||
};
|
||||
|
||||
reserved-memory {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
/* 192 KiB reserved for ARM Trusted Firmware (BL31) */
|
||||
secmon_reserved: secmon@43000000 {
|
||||
reg = <0 0x43000000 0 0x30000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
wmcpu_emi: wmcpu-reserved@4fc00000 {
|
||||
no-map;
|
||||
reg = <0 0x4fc00000 0 0x00100000>;
|
||||
};
|
||||
|
||||
wo_emi0: wo-emi@4fd00000 {
|
||||
reg = <0 0x4fd00000 0 0x40000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
wo_emi1: wo-emi@4fd40000 {
|
||||
reg = <0 0x4fd40000 0 0x40000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
wo_ilm0: wo-ilm@151e0000 {
|
||||
reg = <0 0x151e0000 0 0x8000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
wo_ilm1: wo-ilm@151f0000 {
|
||||
reg = <0 0x151f0000 0 0x8000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
wo_data: wo-data@4fd80000 {
|
||||
reg = <0 0x4fd80000 0 0x240000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
wo_dlm0: wo-dlm@151e8000 {
|
||||
reg = <0 0x151e8000 0 0x2000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
wo_dlm1: wo-dlm@151f8000 {
|
||||
reg = <0 0x151f8000 0 0x2000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
wo_boot: wo-boot@15194000 {
|
||||
reg = <0 0x15194000 0 0x1000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
soc {
|
||||
compatible = "simple-bus";
|
||||
ranges;
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
|
||||
gic: interrupt-controller@c000000 {
|
||||
compatible = "arm,gic-v3";
|
||||
reg = <0 0x0c000000 0 0x10000>, /* GICD */
|
||||
<0 0x0c080000 0 0x80000>, /* GICR */
|
||||
<0 0x0c400000 0 0x2000>, /* GICC */
|
||||
<0 0x0c410000 0 0x1000>, /* GICH */
|
||||
<0 0x0c420000 0 0x2000>; /* GICV */
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <3>;
|
||||
};
|
||||
|
||||
infracfg: infracfg@10001000 {
|
||||
compatible = "mediatek,mt7986-infracfg", "syscon";
|
||||
reg = <0 0x10001000 0 0x1000>;
|
||||
#clock-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
};
|
||||
|
||||
wed_pcie: wed-pcie@10003000 {
|
||||
compatible = "mediatek,mt7986-wed-pcie",
|
||||
"syscon";
|
||||
reg = <0 0x10003000 0 0x10>;
|
||||
};
|
||||
|
||||
topckgen: topckgen@1001b000 {
|
||||
compatible = "mediatek,mt7986-topckgen", "syscon";
|
||||
reg = <0 0x1001B000 0 0x1000>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
watchdog: watchdog@1001c000 {
|
||||
compatible = "mediatek,mt7986-wdt";
|
||||
reg = <0 0x1001c000 0 0x1000>;
|
||||
interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#reset-cells = <1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
apmixedsys: apmixedsys@1001e000 {
|
||||
compatible = "mediatek,mt7986-apmixedsys";
|
||||
reg = <0 0x1001E000 0 0x1000>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
pio: pinctrl@1001f000 {
|
||||
compatible = "mediatek,mt7986a-pinctrl";
|
||||
reg = <0 0x1001f000 0 0x1000>,
|
||||
<0 0x11c30000 0 0x1000>,
|
||||
<0 0x11c40000 0 0x1000>,
|
||||
<0 0x11e20000 0 0x1000>,
|
||||
<0 0x11e30000 0 0x1000>,
|
||||
<0 0x11f00000 0 0x1000>,
|
||||
<0 0x11f10000 0 0x1000>,
|
||||
<0 0x1000b000 0 0x1000>;
|
||||
reg-names = "gpio", "iocfg_rt", "iocfg_rb", "iocfg_lt",
|
||||
"iocfg_lb", "iocfg_tr", "iocfg_tl", "eint";
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
gpio-ranges = <&pio 0 0 100>;
|
||||
interrupt-controller;
|
||||
interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-parent = <&gic>;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
pwm: pwm@10048000 {
|
||||
compatible = "mediatek,mt7986-pwm";
|
||||
reg = <0 0x10048000 0 0x1000>;
|
||||
#pwm-cells = <2>;
|
||||
interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&topckgen CLK_TOP_PWM_SEL>,
|
||||
<&infracfg CLK_INFRA_PWM_STA>,
|
||||
<&infracfg CLK_INFRA_PWM1_CK>,
|
||||
<&infracfg CLK_INFRA_PWM2_CK>;
|
||||
clock-names = "top", "main", "pwm1", "pwm2";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
sgmiisys0: syscon@10060000 {
|
||||
compatible = "mediatek,mt7986-sgmiisys_0",
|
||||
"syscon";
|
||||
reg = <0 0x10060000 0 0x1000>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
sgmiisys1: syscon@10070000 {
|
||||
compatible = "mediatek,mt7986-sgmiisys_1",
|
||||
"syscon";
|
||||
reg = <0 0x10070000 0 0x1000>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
trng: rng@1020f000 {
|
||||
compatible = "mediatek,mt7986-rng",
|
||||
"mediatek,mt7623-rng";
|
||||
reg = <0 0x1020f000 0 0x100>;
|
||||
clocks = <&infracfg CLK_INFRA_TRNG_CK>;
|
||||
clock-names = "rng";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
crypto: crypto@10320000 {
|
||||
compatible = "inside-secure,safexcel-eip97";
|
||||
reg = <0 0x10320000 0 0x40000>;
|
||||
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "ring0", "ring1", "ring2", "ring3";
|
||||
clocks = <&infracfg CLK_INFRA_EIP97_CK>;
|
||||
assigned-clocks = <&topckgen CLK_TOP_EIP_B_SEL>;
|
||||
assigned-clock-parents = <&apmixedsys CLK_APMIXED_NET2PLL>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart0: serial@11002000 {
|
||||
compatible = "mediatek,mt7986-uart",
|
||||
"mediatek,mt6577-uart";
|
||||
reg = <0 0x11002000 0 0x400>;
|
||||
interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&infracfg CLK_INFRA_UART0_SEL>,
|
||||
<&infracfg CLK_INFRA_UART0_CK>;
|
||||
clock-names = "baud", "bus";
|
||||
assigned-clocks = <&topckgen CLK_TOP_UART_SEL>,
|
||||
<&infracfg CLK_INFRA_UART0_SEL>;
|
||||
assigned-clock-parents = <&topckgen CLK_TOP_XTAL>,
|
||||
<&topckgen CLK_TOP_UART_SEL>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart1: serial@11003000 {
|
||||
compatible = "mediatek,mt7986-uart",
|
||||
"mediatek,mt6577-uart";
|
||||
reg = <0 0x11003000 0 0x400>;
|
||||
interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&infracfg CLK_INFRA_UART1_SEL>,
|
||||
<&infracfg CLK_INFRA_UART1_CK>;
|
||||
clock-names = "baud", "bus";
|
||||
assigned-clocks = <&infracfg CLK_INFRA_UART1_SEL>;
|
||||
assigned-clock-parents = <&topckgen CLK_TOP_F26M_SEL>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart2: serial@11004000 {
|
||||
compatible = "mediatek,mt7986-uart",
|
||||
"mediatek,mt6577-uart";
|
||||
reg = <0 0x11004000 0 0x400>;
|
||||
interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&infracfg CLK_INFRA_UART2_SEL>,
|
||||
<&infracfg CLK_INFRA_UART2_CK>;
|
||||
clock-names = "baud", "bus";
|
||||
assigned-clocks = <&infracfg CLK_INFRA_UART2_SEL>;
|
||||
assigned-clock-parents = <&topckgen CLK_TOP_F26M_SEL>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c0: i2c@11008000 {
|
||||
compatible = "mediatek,mt7986-i2c";
|
||||
reg = <0 0x11008000 0 0x90>,
|
||||
<0 0x10217080 0 0x80>;
|
||||
interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clock-div = <5>;
|
||||
clocks = <&infracfg CLK_INFRA_I2C0_CK>,
|
||||
<&infracfg CLK_INFRA_AP_DMA_CK>;
|
||||
clock-names = "main", "dma";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
spi0: spi@1100a000 {
|
||||
compatible = "mediatek,mt7986-spi-ipm", "mediatek,spi-ipm";
|
||||
reg = <0 0x1100a000 0 0x100>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&topckgen CLK_TOP_MPLL_D2>,
|
||||
<&topckgen CLK_TOP_SPI_SEL>,
|
||||
<&infracfg CLK_INFRA_SPI0_CK>,
|
||||
<&infracfg CLK_INFRA_SPI0_HCK_CK>;
|
||||
clock-names = "parent-clk", "sel-clk", "spi-clk", "hclk";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
spi1: spi@1100b000 {
|
||||
compatible = "mediatek,mt7986-spi-ipm", "mediatek,spi-ipm";
|
||||
reg = <0 0x1100b000 0 0x100>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&topckgen CLK_TOP_MPLL_D2>,
|
||||
<&topckgen CLK_TOP_SPIM_MST_SEL>,
|
||||
<&infracfg CLK_INFRA_SPI1_CK>,
|
||||
<&infracfg CLK_INFRA_SPI1_HCK_CK>;
|
||||
clock-names = "parent-clk", "sel-clk", "spi-clk", "hclk";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
thermal: thermal@1100c800 {
|
||||
compatible = "mediatek,mt7986-thermal";
|
||||
reg = <0 0x1100c800 0 0x800>;
|
||||
interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&infracfg CLK_INFRA_THERM_CK>,
|
||||
<&infracfg CLK_INFRA_ADC_26M_CK>;
|
||||
clock-names = "therm", "auxadc";
|
||||
nvmem-cells = <&thermal_calibration>;
|
||||
nvmem-cell-names = "calibration-data";
|
||||
#thermal-sensor-cells = <1>;
|
||||
mediatek,auxadc = <&auxadc>;
|
||||
mediatek,apmixedsys = <&apmixedsys>;
|
||||
};
|
||||
|
||||
auxadc: adc@1100d000 {
|
||||
compatible = "mediatek,mt7986-auxadc";
|
||||
reg = <0 0x1100d000 0 0x1000>;
|
||||
clocks = <&infracfg CLK_INFRA_ADC_26M_CK>;
|
||||
clock-names = "main";
|
||||
#io-channel-cells = <1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ssusb: usb@11200000 {
|
||||
compatible = "mediatek,mt7986-xhci",
|
||||
"mediatek,mtk-xhci";
|
||||
reg = <0 0x11200000 0 0x2e00>,
|
||||
<0 0x11203e00 0 0x0100>;
|
||||
reg-names = "mac", "ippc";
|
||||
interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&infracfg CLK_INFRA_IUSB_SYS_CK>,
|
||||
<&infracfg CLK_INFRA_IUSB_CK>,
|
||||
<&infracfg CLK_INFRA_IUSB_133_CK>,
|
||||
<&infracfg CLK_INFRA_IUSB_66M_CK>,
|
||||
<&topckgen CLK_TOP_U2U3_XHCI_SEL>;
|
||||
clock-names = "sys_ck",
|
||||
"ref_ck",
|
||||
"mcu_ck",
|
||||
"dma_ck",
|
||||
"xhci_ck";
|
||||
phys = <&u2port0 PHY_TYPE_USB2>,
|
||||
<&u3port0 PHY_TYPE_USB3>,
|
||||
<&u2port1 PHY_TYPE_USB2>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mmc0: mmc@11230000 {
|
||||
compatible = "mediatek,mt7986-mmc";
|
||||
reg = <0 0x11230000 0 0x1000>,
|
||||
<0 0x11c20000 0 0x1000>;
|
||||
interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
|
||||
assigned-clocks = <&topckgen CLK_TOP_EMMC_416M_SEL>,
|
||||
<&topckgen CLK_TOP_EMMC_250M_SEL>;
|
||||
assigned-clock-parents = <&apmixedsys CLK_APMIXED_MPLL>,
|
||||
<&topckgen CLK_TOP_NET1PLL_D5_D2>;
|
||||
clocks = <&topckgen CLK_TOP_EMMC_416M_SEL>,
|
||||
<&infracfg CLK_INFRA_MSDC_HCK_CK>,
|
||||
<&infracfg CLK_INFRA_MSDC_CK>,
|
||||
<&infracfg CLK_INFRA_MSDC_133M_CK>,
|
||||
<&infracfg CLK_INFRA_MSDC_66M_CK>;
|
||||
clock-names = "source", "hclk", "source_cg", "bus_clk",
|
||||
"sys_cg";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pcie: pcie@11280000 {
|
||||
compatible = "mediatek,mt7986-pcie",
|
||||
"mediatek,mt8192-pcie";
|
||||
reg = <0x00 0x11280000 0x00 0x4000>;
|
||||
reg-names = "pcie-mac";
|
||||
ranges = <0x82000000 0x00 0x20000000 0x00
|
||||
0x20000000 0x00 0x10000000>;
|
||||
device_type = "pci";
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
|
||||
bus-range = <0x00 0xff>;
|
||||
clocks = <&infracfg CLK_INFRA_IPCIE_PIPE_CK>,
|
||||
<&infracfg CLK_INFRA_IPCIE_CK>,
|
||||
<&infracfg CLK_INFRA_IPCIER_CK>,
|
||||
<&infracfg CLK_INFRA_IPCIEB_CK>;
|
||||
clock-names = "pl_250m", "tl_26m", "peri_26m", "top_133m";
|
||||
|
||||
phys = <&pcie_port PHY_TYPE_PCIE>;
|
||||
phy-names = "pcie-phy";
|
||||
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-map-mask = <0 0 0 0x7>;
|
||||
interrupt-map = <0 0 0 1 &pcie_intc 0>,
|
||||
<0 0 0 2 &pcie_intc 1>,
|
||||
<0 0 0 3 &pcie_intc 2>,
|
||||
<0 0 0 4 &pcie_intc 3>;
|
||||
status = "disabled";
|
||||
|
||||
pcie_intc: interrupt-controller {
|
||||
#address-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-controller;
|
||||
};
|
||||
};
|
||||
|
||||
pcie_phy: t-phy {
|
||||
compatible = "mediatek,mt7986-tphy",
|
||||
"mediatek,generic-tphy-v2";
|
||||
ranges;
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
status = "disabled";
|
||||
|
||||
pcie_port: pcie-phy@11c00000 {
|
||||
reg = <0 0x11c00000 0 0x20000>;
|
||||
clocks = <&clk40m>;
|
||||
clock-names = "ref";
|
||||
#phy-cells = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
efuse: efuse@11d00000 {
|
||||
compatible = "mediatek,mt7986-efuse", "mediatek,efuse";
|
||||
reg = <0 0x11d00000 0 0x1000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
thermal_calibration: calib@274 {
|
||||
reg = <0x274 0xc>;
|
||||
};
|
||||
};
|
||||
|
||||
usb_phy: t-phy@11e10000 {
|
||||
compatible = "mediatek,mt7986-tphy",
|
||||
"mediatek,generic-tphy-v2";
|
||||
ranges = <0 0 0x11e10000 0x1700>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
status = "disabled";
|
||||
|
||||
u2port0: usb-phy@0 {
|
||||
reg = <0x0 0x700>;
|
||||
clocks = <&topckgen CLK_TOP_DA_U2_REFSEL>,
|
||||
<&topckgen CLK_TOP_DA_U2_CK_1P_SEL>;
|
||||
clock-names = "ref", "da_ref";
|
||||
#phy-cells = <1>;
|
||||
};
|
||||
|
||||
u3port0: usb-phy@700 {
|
||||
reg = <0x700 0x900>;
|
||||
clocks = <&topckgen CLK_TOP_USB3_PHY_SEL>;
|
||||
clock-names = "ref";
|
||||
#phy-cells = <1>;
|
||||
};
|
||||
|
||||
u2port1: usb-phy@1000 {
|
||||
reg = <0x1000 0x700>;
|
||||
clocks = <&topckgen CLK_TOP_DA_U2_REFSEL>,
|
||||
<&topckgen CLK_TOP_DA_U2_CK_1P_SEL>;
|
||||
clock-names = "ref", "da_ref";
|
||||
#phy-cells = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
ethsys: syscon@15000000 {
|
||||
compatible = "mediatek,mt7986-ethsys",
|
||||
"syscon";
|
||||
reg = <0 0x15000000 0 0x1000>;
|
||||
#clock-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
};
|
||||
|
||||
wed0: wed@15010000 {
|
||||
compatible = "mediatek,mt7986-wed",
|
||||
"syscon";
|
||||
reg = <0 0x15010000 0 0x1000>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>;
|
||||
memory-region = <&wo_emi0>, <&wo_ilm0>, <&wo_dlm0>,
|
||||
<&wo_data>, <&wo_boot>;
|
||||
memory-region-names = "wo-emi", "wo-ilm", "wo-dlm",
|
||||
"wo-data", "wo-boot";
|
||||
mediatek,wo-ccif = <&wo_ccif0>;
|
||||
};
|
||||
|
||||
wed1: wed@15011000 {
|
||||
compatible = "mediatek,mt7986-wed",
|
||||
"syscon";
|
||||
reg = <0 0x15011000 0 0x1000>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>;
|
||||
memory-region = <&wo_emi1>, <&wo_ilm1>, <&wo_dlm1>,
|
||||
<&wo_data>, <&wo_boot>;
|
||||
memory-region-names = "wo-emi", "wo-ilm", "wo-dlm",
|
||||
"wo-data", "wo-boot";
|
||||
mediatek,wo-ccif = <&wo_ccif1>;
|
||||
};
|
||||
|
||||
eth: ethernet@15100000 {
|
||||
compatible = "mediatek,mt7986-eth";
|
||||
reg = <0 0x15100000 0 0x80000>;
|
||||
interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <ðsys CLK_ETH_FE_EN>,
|
||||
<ðsys CLK_ETH_GP2_EN>,
|
||||
<ðsys CLK_ETH_GP1_EN>,
|
||||
<ðsys CLK_ETH_WOCPU1_EN>,
|
||||
<ðsys CLK_ETH_WOCPU0_EN>,
|
||||
<&sgmiisys0 CLK_SGMII0_TX250M_EN>,
|
||||
<&sgmiisys0 CLK_SGMII0_RX250M_EN>,
|
||||
<&sgmiisys0 CLK_SGMII0_CDR_REF>,
|
||||
<&sgmiisys0 CLK_SGMII0_CDR_FB>,
|
||||
<&sgmiisys1 CLK_SGMII1_TX250M_EN>,
|
||||
<&sgmiisys1 CLK_SGMII1_RX250M_EN>,
|
||||
<&sgmiisys1 CLK_SGMII1_CDR_REF>,
|
||||
<&sgmiisys1 CLK_SGMII1_CDR_FB>,
|
||||
<&topckgen CLK_TOP_NETSYS_SEL>,
|
||||
<&topckgen CLK_TOP_NETSYS_500M_SEL>;
|
||||
clock-names = "fe", "gp2", "gp1", "wocpu1", "wocpu0",
|
||||
"sgmii_tx250m", "sgmii_rx250m",
|
||||
"sgmii_cdr_ref", "sgmii_cdr_fb",
|
||||
"sgmii2_tx250m", "sgmii2_rx250m",
|
||||
"sgmii2_cdr_ref", "sgmii2_cdr_fb",
|
||||
"netsys0", "netsys1";
|
||||
assigned-clocks = <&topckgen CLK_TOP_NETSYS_2X_SEL>,
|
||||
<&topckgen CLK_TOP_SGM_325M_SEL>;
|
||||
assigned-clock-parents = <&apmixedsys CLK_APMIXED_NET2PLL>,
|
||||
<&apmixedsys CLK_APMIXED_SGMPLL>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
mediatek,ethsys = <ðsys>;
|
||||
mediatek,sgmiisys = <&sgmiisys0>, <&sgmiisys1>;
|
||||
mediatek,wed-pcie = <&wed_pcie>;
|
||||
mediatek,wed = <&wed0>, <&wed1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
wo_ccif0: syscon@151a5000 {
|
||||
compatible = "mediatek,mt7986-wo-ccif", "syscon";
|
||||
reg = <0 0x151a5000 0 0x1000>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
wo_ccif1: syscon@151ad000 {
|
||||
compatible = "mediatek,mt7986-wo-ccif", "syscon";
|
||||
reg = <0 0x151ad000 0 0x1000>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
wifi: wifi@18000000 {
|
||||
compatible = "mediatek,mt7986-wmac";
|
||||
reg = <0 0x18000000 0 0x1000000>,
|
||||
<0 0x10003000 0 0x1000>,
|
||||
<0 0x11d10000 0 0x1000>;
|
||||
resets = <&watchdog MT7986_TOPRGU_CONSYS_SW_RST>;
|
||||
reset-names = "consys";
|
||||
clocks = <&topckgen CLK_TOP_CONN_MCUSYS_SEL>,
|
||||
<&topckgen CLK_TOP_AP2CNN_HOST_SEL>;
|
||||
clock-names = "mcu", "ap2conn";
|
||||
interrupts = <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>;
|
||||
memory-region = <&wmcpu_emi>;
|
||||
};
|
||||
};
|
||||
|
||||
thermal-zones {
|
||||
cpu_thermal: cpu-thermal {
|
||||
polling-delay-passive = <1000>;
|
||||
polling-delay = <1000>;
|
||||
thermal-sensors = <&thermal 0>;
|
||||
|
||||
trips {
|
||||
cpu_trip_crit: crit {
|
||||
temperature = <125000>;
|
||||
hysteresis = <2000>;
|
||||
type = "critical";
|
||||
};
|
||||
|
||||
cpu_trip_hot: hot {
|
||||
temperature = <120000>;
|
||||
hysteresis = <2000>;
|
||||
type = "hot";
|
||||
};
|
||||
|
||||
cpu_trip_active_high: active-high {
|
||||
temperature = <115000>;
|
||||
hysteresis = <2000>;
|
||||
type = "active";
|
||||
};
|
||||
|
||||
cpu_trip_active_med: active-med {
|
||||
temperature = <85000>;
|
||||
hysteresis = <2000>;
|
||||
type = "active";
|
||||
};
|
||||
|
||||
cpu_trip_active_low: active-low {
|
||||
temperature = <60000>;
|
||||
hysteresis = <2000>;
|
||||
type = "active";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
timer {
|
||||
compatible = "arm,armv8-timer";
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
|
||||
<GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
|
||||
<GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
|
||||
<GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
|
||||
};
|
||||
};
|
File diff suppressed because it is too large
Load Diff
@@ -1,103 +0,0 @@
|
||||
ARM="y";
|
||||
SYS_HAS_NONCACHED_MEMORY="y";
|
||||
POSITION_INDEPENDENT="y";
|
||||
ARCH_MEDIATEK="y";
|
||||
TEXT_BASE="0x41e00000";
|
||||
SYS_MALLOC_F_LEN="0x4000";
|
||||
NR_DRAM_BANKS="1";
|
||||
ENV_SIZE="0x80000";
|
||||
ENV_OFFSET="0x400000";
|
||||
DEFAULT_DEVICE_TREE="mt7986a-glinet-gl-mt6000";
|
||||
OF_LIBFDT_OVERLAY="y";
|
||||
TARGET_MT7986="y";
|
||||
SYS_LOAD_ADDR="0x46000000";
|
||||
PRE_CON_BUF_ADDR="0x4007EF00";
|
||||
DEBUG_UART_BASE="0x11002000";
|
||||
DEBUG_UART_CLOCK="40000000";
|
||||
DEBUG_UART="y";
|
||||
AHCI="y";
|
||||
FIT="y";
|
||||
AUTOBOOT_KEYED="y";
|
||||
AUTOBOOT_MENU_SHOW="y";
|
||||
DEFAULT_FDT_FILE="mediatek/mt7986a-glinet-gl-mt6000.dtb";
|
||||
LOGLEVEL="7";
|
||||
PRE_CONSOLE_BUFFER="y";
|
||||
LOG="y";
|
||||
BOARD_LATE_INIT="y";
|
||||
HUSH_PARSER="y";
|
||||
SYS_PROMPT="MT7986> ";
|
||||
CMD_CPU="y";
|
||||
CMD_LICENSE="y";
|
||||
CMD_BOOTMENU="y";
|
||||
CMD_ASKENV="y";
|
||||
CMD_ERASEENV="y";
|
||||
CMD_ENV_FLAGS="y";
|
||||
CMD_STRINGS="y";
|
||||
CMD_DM="y";
|
||||
CMD_GPIO="y";
|
||||
CMD_PWM="y";
|
||||
CMD_GPT="y";
|
||||
CMD_MMC="y";
|
||||
CMD_PART="y";
|
||||
CMD_USB="y";
|
||||
CMD_TFTPSRV="y";
|
||||
CMD_RARP="y";
|
||||
CMD_CDP="y";
|
||||
CMD_SNTP="y";
|
||||
CMD_LINK_LOCAL="y";
|
||||
CMD_DHCP="y";
|
||||
CMD_DNS="y";
|
||||
CMD_PING="y";
|
||||
CMD_CACHE="y";
|
||||
CMD_PSTORE="y";
|
||||
CMD_PSTORE_MEM_ADDR="0x42ff0000";
|
||||
CMD_UUID="y";
|
||||
CMD_HASH="y";
|
||||
CMD_SMC="y";
|
||||
OF_EMBED="y";
|
||||
ENV_OVERWRITE="y";
|
||||
ENV_IS_IN_MMC="y";
|
||||
SYS_RELOC_GD_ENV_ADDR="y";
|
||||
USE_DEFAULT_ENV_FILE="y";
|
||||
DEFAULT_ENV_FILE="defenvs/glinet_gl-mt6000_env";
|
||||
ENV_VARS_UBOOT_RUNTIME_CONFIG="y";
|
||||
VERSION_VARIABLE="y";
|
||||
NETCONSOLE="y";
|
||||
USE_IPADDR="y";
|
||||
IPADDR="192.168.1.1";
|
||||
USE_SERVERIP="y";
|
||||
SERVERIP="192.168.1.254";
|
||||
NET_RANDOM_ETHADDR="y";
|
||||
BUTTON="y";
|
||||
BUTTON_GPIO="y";
|
||||
CLK="y";
|
||||
GPIO_HOG="y";
|
||||
LED="y";
|
||||
LED_BLINK="y";
|
||||
LED_GPIO="y";
|
||||
SUPPORT_EMMC_BOOT="y";
|
||||
MMC_HS200_SUPPORT="y";
|
||||
MMC_MTK="y";
|
||||
PHY_FIXED="y";
|
||||
MEDIATEK_ETH="y";
|
||||
PHY="y";
|
||||
PHY_MTK_TPHY="y";
|
||||
PINCTRL="y";
|
||||
PINCONF="y";
|
||||
PINCTRL_MT7986="y";
|
||||
POWER_DOMAIN="y";
|
||||
MTK_POWER_DOMAIN="y";
|
||||
DM_REGULATOR="y";
|
||||
DM_REGULATOR_FIXED="y";
|
||||
DM_REGULATOR_GPIO="y";
|
||||
DM_PWM="y";
|
||||
PWM_MTK="y";
|
||||
RAM="y";
|
||||
DM_SERIAL="y";
|
||||
SERIAL_RX_BUFFER="y";
|
||||
MTK_SERIAL="y";
|
||||
USB="y";
|
||||
USB_XHCI_HCD="y";
|
||||
USB_XHCI_MTK="y";
|
||||
USB_STORAGE="y";
|
||||
HEXDUMP="y";
|
@@ -1,356 +0,0 @@
|
||||
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
||||
|
||||
/dts-v1/;
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/input/input.h>
|
||||
#include <dt-bindings/pinctrl/mt65xx.h>
|
||||
|
||||
#include "mt7986a.dtsi"
|
||||
|
||||
/ {
|
||||
model = "GL.iNet GL-MT6000";
|
||||
compatible = "glinet,gl-mt6000", "mediatek,mt7986a";
|
||||
|
||||
aliases {
|
||||
serial0 = &uart0;
|
||||
label-mac-device = &gmac1;
|
||||
led-boot = &led_blue;
|
||||
led-failsafe = &led_blue;
|
||||
led-running = &led_white;
|
||||
led-upgrade = &led_white;
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
bootargs-append = " root=PARTLABEL=rootfs rootwait";
|
||||
};
|
||||
|
||||
reg_1p8v: regulator-1p8v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "1.8vd";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_3p3v: regulator-3p3v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "fixed-3.3V";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
keys {
|
||||
compatible = "gpio-keys";
|
||||
|
||||
reset {
|
||||
label = "reset";
|
||||
linux,code = <KEY_RESTART>;
|
||||
gpios = <&pio 9 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
led_blue: led-0 {
|
||||
label = "blue:run";
|
||||
gpios = <&pio 38 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
led_white: led-1 {
|
||||
label = "white:system";
|
||||
gpios = <&pio 37 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
usb_vbus: regulator-usb-vbus {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "usb_vbus";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
gpios = <&pio 24 GPIO_ACTIVE_HIGH>;
|
||||
enable-active-high;
|
||||
regulator-boot-on;
|
||||
};
|
||||
};
|
||||
|
||||
ð {
|
||||
status = "okay";
|
||||
|
||||
gmac0: mac@0 {
|
||||
compatible = "mediatek,eth-mac";
|
||||
reg = <0>;
|
||||
phy-mode = "2500base-x";
|
||||
nvmem-cells = <&macaddr_factory_a 2>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
|
||||
fixed-link {
|
||||
speed = <2500>;
|
||||
full-duplex;
|
||||
pause;
|
||||
};
|
||||
};
|
||||
|
||||
gmac1: mac@1 {
|
||||
compatible = "mediatek,eth-mac";
|
||||
reg = <1>;
|
||||
nvmem-cells = <&macaddr_factory_a 0>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
phy-mode = "2500base-x";
|
||||
phy-handle = <&phy1>;
|
||||
};
|
||||
|
||||
mdio: mdio-bus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
phy1: phy@1 {
|
||||
compatible = "ethernet-phy-ieee802.3-c45";
|
||||
reg = <1>;
|
||||
reset-assert-us = <100000>;
|
||||
reset-deassert-us = <100000>;
|
||||
reset-gpios = <&pio 10 GPIO_ACTIVE_LOW>;
|
||||
interrupt-parent = <&pio>;
|
||||
interrupts = <46 IRQ_TYPE_LEVEL_LOW>;
|
||||
realtek,aldps-enable;
|
||||
};
|
||||
|
||||
phy7: ethernet-phy@7 {
|
||||
compatible = "ethernet-phy-ieee802.3-c45";
|
||||
reg = <7>;
|
||||
reset-assert-us = <100000>;
|
||||
reset-deassert-us = <100000>;
|
||||
reset-gpios = <&pio 19 GPIO_ACTIVE_LOW>;
|
||||
interrupt-parent = <&pio>;
|
||||
interrupts = <47 IRQ_TYPE_LEVEL_LOW>;
|
||||
realtek,aldps-enable;
|
||||
};
|
||||
|
||||
switch: switch@1f {
|
||||
compatible = "mediatek,mt7531";
|
||||
reg = <31>;
|
||||
reset-gpios = <&pio 18 GPIO_ACTIVE_HIGH>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-parent = <&pio>;
|
||||
interrupts = <66 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
label = "lan2";
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
label = "lan3";
|
||||
};
|
||||
|
||||
port@2 {
|
||||
reg = <2>;
|
||||
label = "lan4";
|
||||
};
|
||||
|
||||
port@3 {
|
||||
reg = <3>;
|
||||
label = "lan5";
|
||||
};
|
||||
|
||||
port@5 {
|
||||
reg = <5>;
|
||||
label = "lan1";
|
||||
phy-handle = <&phy7>;
|
||||
phy-mode = "2500base-x";
|
||||
};
|
||||
|
||||
port@6 {
|
||||
reg = <6>;
|
||||
ethernet = <&gmac0>;
|
||||
phy-mode = "2500base-x";
|
||||
|
||||
fixed-link {
|
||||
speed = <2500>;
|
||||
full-duplex;
|
||||
pause;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pio {
|
||||
wf_2g_5g_pins: wf_2g_5g-pins {
|
||||
mux {
|
||||
function = "wifi";
|
||||
groups = "wf_2g", "wf_5g";
|
||||
};
|
||||
conf {
|
||||
pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
|
||||
"WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
|
||||
"WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
|
||||
"WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
|
||||
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
|
||||
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
|
||||
"WF1_TOP_CLK", "WF1_TOP_DATA";
|
||||
drive-strength = <MTK_DRIVE_4mA>;
|
||||
};
|
||||
};
|
||||
|
||||
mmc0_pins_default: mmc0-pins {
|
||||
mux {
|
||||
function = "emmc";
|
||||
groups = "emmc_51";
|
||||
};
|
||||
conf-cmd-dat {
|
||||
pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
|
||||
"EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
|
||||
"EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
|
||||
input-enable;
|
||||
drive-strength = <MTK_DRIVE_4mA>;
|
||||
bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
|
||||
};
|
||||
conf-clk {
|
||||
pins = "EMMC_CK";
|
||||
drive-strength = <MTK_DRIVE_6mA>;
|
||||
bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
|
||||
};
|
||||
conf-ds {
|
||||
pins = "EMMC_DSL";
|
||||
bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
|
||||
};
|
||||
conf-rst {
|
||||
pins = "EMMC_RSTB";
|
||||
drive-strength = <MTK_DRIVE_4mA>;
|
||||
bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
|
||||
};
|
||||
};
|
||||
|
||||
mmc0_pins_uhs: mmc0-uhs-pins {
|
||||
mux {
|
||||
function = "emmc";
|
||||
groups = "emmc_51";
|
||||
};
|
||||
conf-cmd-dat {
|
||||
pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
|
||||
"EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
|
||||
"EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
|
||||
input-enable;
|
||||
drive-strength = <MTK_DRIVE_4mA>;
|
||||
bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
|
||||
};
|
||||
conf-clk {
|
||||
pins = "EMMC_CK";
|
||||
drive-strength = <MTK_DRIVE_6mA>;
|
||||
bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
|
||||
};
|
||||
conf-ds {
|
||||
pins = "EMMC_DSL";
|
||||
bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
|
||||
};
|
||||
conf-rst {
|
||||
pins = "EMMC_RSTB";
|
||||
drive-strength = <MTK_DRIVE_4mA>;
|
||||
bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&crypto {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ssusb {
|
||||
vusb33-supply = <®_3p3v>;
|
||||
vbus-supply = <&usb_vbus>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&trng {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb_phy {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&watchdog {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&wifi {
|
||||
nvmem-cells = <&eeprom_factory_0>;
|
||||
nvmem-cell-names = "eeprom";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&wf_2g_5g_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mmc0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
pinctrl-names = "default", "state_uhs";
|
||||
pinctrl-0 = <&mmc0_pins_default>;
|
||||
pinctrl-1 = <&mmc0_pins_uhs>;
|
||||
bus-width = <8>;
|
||||
max-frequency = <200000000>;
|
||||
cap-mmc-highspeed;
|
||||
mmc-hs200-1_8v;
|
||||
mmc-hs400-1_8v;
|
||||
hs400-ds-delay = <0x14014>;
|
||||
vmmc-supply = <®_3p3v>;
|
||||
vqmmc-supply = <®_1p8v>;
|
||||
non-removable;
|
||||
no-sd;
|
||||
no-sdio;
|
||||
status = "okay";
|
||||
|
||||
card@0 {
|
||||
compatible = "mmc-card";
|
||||
reg = <0>;
|
||||
|
||||
block {
|
||||
compatible = "block-device";
|
||||
partitions {
|
||||
block-partition-env {
|
||||
partname = "u-boot-env";
|
||||
|
||||
nvmem-layout {
|
||||
compatible = "u-boot,env";
|
||||
};
|
||||
};
|
||||
|
||||
block-partition-factory {
|
||||
partname = "factory";
|
||||
|
||||
nvmem-layout {
|
||||
compatible = "fixed-layout";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
eeprom_factory_0: eeprom@0 {
|
||||
reg = <0x0 0x1000>;
|
||||
};
|
||||
|
||||
macaddr_factory_a: macaddr@a {
|
||||
compatible = "mac-base";
|
||||
reg = <0xa 0x6>;
|
||||
#nvmem-cell-cells = <1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
1
vars/per-machine/b4l/yggdrasil/yggdrasil-ip/value
Normal file
1
vars/per-machine/b4l/yggdrasil/yggdrasil-ip/value
Normal file
@@ -0,0 +1 @@
|
||||
200:ada9:8363:202b:faf:be:92ab:e46d
|
1
vars/per-machine/b4l/yggdrasil/yggdrasil-secret/groups/admins
Symbolic link
1
vars/per-machine/b4l/yggdrasil/yggdrasil-secret/groups/admins
Symbolic link
@@ -0,0 +1 @@
|
||||
../../../../../../sops/groups/admins
|
1
vars/per-machine/b4l/yggdrasil/yggdrasil-secret/machines/b4l
Symbolic link
1
vars/per-machine/b4l/yggdrasil/yggdrasil-secret/machines/b4l
Symbolic link
@@ -0,0 +1 @@
|
||||
../../../../../../sops/machines/b4l
|
47
vars/per-machine/b4l/yggdrasil/yggdrasil-secret/secret
Normal file
47
vars/per-machine/b4l/yggdrasil/yggdrasil-secret/secret
Normal file
@@ -0,0 +1,47 @@
|
||||
{
|
||||
"data": "ENC[AES256_GCM,data:NSyWVWXMxoTR07uaLUYX6rHB17wsIB53FZHSsPxgDKJQ2wHBPFNaHSYh+BiSo+IrX+YcdUUqJFhEkjWDyG+vXaNZHrMbg/pzZ/cwTK/lPbYISkwtOhgr3zCA0H6DmQcHVmvR6fsdRDkFwl7pHtn1RMjEORQdbBINtscZfzZFcAF2L1t+WPFxgRKQDNT/9l3f4SoBcuakyg==,iv:/5JbEZ/vj/4I+eEElOY0cnhiYzqqPw2ZKLv2M/xkstw=,tag:23exDL72g56bP7ZbMsK4mA==,type:str]",
|
||||
"sops": {
|
||||
"age": [
|
||||
{
|
||||
"recipient": "age134vt63pjqpd0m7702fyn8vhdlzyj2deqc2q78sp9uw9052kxsgwq6d25ez",
|
||||
"enc": "-----BEGIN AGE ENCRYPTED FILE-----\nYWdlLWVuY3J5cHRpb24ub3JnL3YxCi0+IFgyNTUxOSBTYUFSZGpmd2tmdzB6bkp5\naytPd1RhVWFqeXF3SDZia3QzUmRNNGpzcjBFCnl3VElLdXFvV0tFSEFlV3hRMzFH\nbnBnWVZ2QkRHZ1BoTEZxdFg4QWE4ckkKLS0tIHhSMlBKakxmM0xyeUphKytLTmpk\nVW90V05hTUEyTVNMQzZHN2xhYTBZRGcK/nJOIM4m56TE7KKmn/QH89g053mmuKKG\nQYs/86SWdLPqwL35FstQg2xDIHSxkDcoMSGc+C+/xdOjWV3qLil/DQ==\n-----END AGE ENCRYPTED FILE-----\n"
|
||||
},
|
||||
{
|
||||
"recipient": "age17d4qt0n9edq57tgcqyk8eu5mrendl59yt6z2y3a4vkq7el8krqtq6lq28g",
|
||||
"enc": "-----BEGIN AGE ENCRYPTED FILE-----\nYWdlLWVuY3J5cHRpb24ub3JnL3YxCi0+IFgyNTUxOSBYaU9idi9RZzhNeXhTb0pp\nUkZ3UVpsZlBka2kvZDBqcVhiRVdMNVFZbEJNCkhvdmFaVTBGcVAvalJPSlFuZHhi\nTE9qeTBMMjk2djhFUEdJbWZmTnN3WnMKLS0tIDludThMRDFDUHhCZVV3bUtVdVBZ\neGg4TzdqVjJPeUxYbnBWNURRSWRrMkEKBCACDZgHG5eVKcSdjHDITJZqgR7cHdHq\n9y8qS3YjaFZ37Ui6Lmb9vJEzDCEy3wEupBy4sbAX4okVapGPJ4fmwg==\n-----END AGE ENCRYPTED FILE-----\n"
|
||||
},
|
||||
{
|
||||
"recipient": "age1fido2-hmac1qqpf43tgcfjm048lsqskvq34w2t4uvrm5qy6m2eg6zjj82ctca8wctgpczxvj0q4y6337uhvsxdh5j86k9h9ymautpvv2759ucwnef75ez7pa7fpkddklp40mxk2tedsp74359g0kefn5rsq0x0yss6cu4yd0h06up0rp08t6yc4l0hfa9y8jn5fkx6nk0hjhz06ykwv0fyxe7z42q683jy0",
|
||||
"enc": "-----BEGIN AGE ENCRYPTED FILE-----\nYWdlLWVuY3J5cHRpb24ub3JnL3YxCi0+IGZpZG8yLWhtYWMgQUFJIHJtSTZrY29X\nVTZNQm9XS3JsbEZCNDFUR1gxZXpObDdKRmQzUnRZMytOaFEgQVEgd0l6SlBCVW1v\neDl5N0lHYmVrajZzVzVTYjd4WVdNVjZoZVlkUEtmVXlMdyBIdmtoczF0dmhxL1py\nS1hsc0ErckdoVVB0bE02RGdCNW5raERXT1ZJMTkzNjRGNHd2T3ZSTVYrKzZlbEll\nVTZKc2JVN1B2SzRuNkpaekhwSWJQaFZVQQpYN2xlOFVDZFlEOHhTMGZTVDNjdjdU\ndWlqd2ROamdmelp4UjAyVitnYVQwCi0tLSBZWmVWc2J4YVhLN3VyMTQwamtYRW5K\nWVovUEp3YlN5WjA1VE10MElWMllvCiLrLLekRkmSL5ekLIcFMoqgeEPXSrn15JDd\neKT9sbYtwhB7vt2L57fDRfaF/+7wNb9y6cv2oi+EdDoDXp/EyB4=\n-----END AGE ENCRYPTED FILE-----\n"
|
||||
},
|
||||
{
|
||||
"recipient": "age1fido2-hmac1qqprw0vfpc8wzsu78quc777kmee54ln6nnsjrnrhl7nr33eh4kvkksqp05qqxj4kgfzrmrugrsvg7skx6ghh3q9xc0x0agthtkvy25d9eq7eklta5wf7s30hexkuyl5546rdz9ffa5tawlp5yweqkgccntw0ny540n2am3cqw3luhxkfmrp63kwr6mwplhr9u26wll48x0n3k5f60c7hg9a3",
|
||||
"enc": "-----BEGIN AGE ENCRYPTED FILE-----\nYWdlLWVuY3J5cHRpb24ub3JnL3YxCi0+IGZpZG8yLWhtYWMgQUFJIGxiRWYyUmwv\nVjlEdS9LOVV2K1NwdDFhYWM5RS9LcTZFNkNaMWViMkl5bmMgQVEgZlFBRFNyWkNS\nRDJQaUJ3WWowTEcwaTk0Z0tiRHpQNmhkMTJZUlZHbHlEMCBtMzE5bzVQb1JmZkpy\nY0orbEs2RzBSVXA3UmZYZkRRanNnc2pHSnJjK1pLVmZOWGR4d0IwZjh1YXlkakRx\nTm5EMXR3ZjNHWGl0Ty8rcHpQbkcxRTZmZwpUQkk4NGZPVWRTbG5MNk9CTStSUXFi\nbXlGemlJR2o2dTB6QUE2Q2JKSnE4Ci0tLSBzZjRva2NtNHlRamNvQWpoZW1UWFMr\nQVdNYXBpOFVhaEVxWm1KNFM4UHJvCnebMj6d/+e0vp00Gb02qJtUp2+mEpF/jUpD\n25cxeoSAWPAhfnBgE+oLzQqnQSq5dCxsWteE/1eOXC68koeT9FY=\n-----END AGE ENCRYPTED FILE-----\n"
|
||||
},
|
||||
{
|
||||
"recipient": "age1fido2-hmac1qqpyewum3q8dfcumfgec8nn958aec9f4q9aqy0k06kw5kq27d6fdqdgp0p7y4ru3n5xk90u747xevxa2af3v37e85j9g3axrmw5hdwdfh0wz22hut5vrafxsx26a7vh8fjwkymz3ramfgvvu4detztu075kmpr8l9ydqda0rnjwatdwmfgswg849p37astvld98s3nleeq575azlwc2hhpuh",
|
||||
"enc": "-----BEGIN AGE ENCRYPTED FILE-----\nYWdlLWVuY3J5cHRpb24ub3JnL3YxCi0+IGZpZG8yLWhtYWMgQUFJIC9udm9sRDBJ\nNFM4dFA2ZDdJMlBXeXYvakM5RHVzNlcrRitzUHF6dnBvMVkgQVEgZUh4S2o1R2RE\nV0svbnErTmxodXE2bUxJK3lla2lvajB3OXVwZHJtcHU5dyBKU3I4WFJnK3BOQXl0\nZDh5NTB5ZFlteFJIM2FVTVp5cmNyRXZqL1V0c0l6L0tSb0c5ZU9jbmRXMTIwb2c1\nQjZsREgzWUxaOXBUd2pQK2NncDZuUmZkZwpKZnBka3YzK0tUQ1hXTHVheE45Mzkw\ncE04aVVPQWM1eURmb1JaNlBwVlFFCi0tLSBHTlY4UW5FQXExK2cvMUJDZE9NaURy\nOFUxN0dvczJtWlVRc29QWlZ1bGg0CvUoAmTgDVSF7SPpqnkFhkCUn3N/Yr4Tzodw\nyCiD7U/KYFavEIxGIeg+ClhLF9o4fYq9kk8ld0vU8qUADXBdRDE=\n-----END AGE ENCRYPTED FILE-----\n"
|
||||
},
|
||||
{
|
||||
"recipient": "age1hlzrpqqgndcthq5m5yj9egfgyet2fzrxwa6ynjzwx2r22uy6m3hqr3rd06",
|
||||
"enc": "-----BEGIN AGE ENCRYPTED FILE-----\nYWdlLWVuY3J5cHRpb24ub3JnL3YxCi0+IFgyNTUxOSAvTUEyUndkSk1iQTB3eUpp\nb0ljaXpwdi9QYmdNV1J3L0NhWElRVzlnNTFVCnZ6Q01ESWRNMHRxdWZKM0lYTXBX\ncko5VitPdWk0UHpwWDhGNzFVZk4yYzgKLS0tIGVRdG5rWkYwOFlCQWNIWFBRalVE\nMmFtOHBvbUw5YXAvMG93MjBrRjdmMGMKlopySr6HS6vfFHiRcwlJz/qy7jzyS1Nf\nw4lw7QnOrvOkoutiK3HiIia5N6V0jd0TV7nJqIu7tz/zYksbzps7QQ==\n-----END AGE ENCRYPTED FILE-----\n"
|
||||
},
|
||||
{
|
||||
"recipient": "age1sg0rvgyetdcqw7j2x983fh69kdkvqsngpe5x36e5920qa7fze3cqhj4wgx",
|
||||
"enc": "-----BEGIN AGE ENCRYPTED FILE-----\nYWdlLWVuY3J5cHRpb24ub3JnL3YxCi0+IFgyNTUxOSBzVTZNTUM5UXowWTlPRDFW\nVUJTbStFcldHbTVDUVRJYjNiaklWRmowTHdnCkJNbUtmdk1jS3kyaVNWVFlOTytX\nKzBwTmxoZi9NdmJuRFNMNTUyRThNUDQKLS0tIENSMHZ5TGwxQ0xuZkZFQ3RJdGEv\nSXIvYW9WY243cTdzZEtra292K0JFVlEKMWhG/7R00uqLb5l5lU3p9Vt4pre6J85r\nIFWtg1G/54KaFt8aiWcD5RUSSARGZ3r4qVtO+9eWP+gA4DUpSNkWNw==\n-----END AGE ENCRYPTED FILE-----\n"
|
||||
},
|
||||
{
|
||||
"recipient": "age1swlyyk2rzvevqawyeekv75nx2dz34zpe3xqhkqme26gcgeavy4dqrfpcd8",
|
||||
"enc": "-----BEGIN AGE ENCRYPTED FILE-----\nYWdlLWVuY3J5cHRpb24ub3JnL3YxCi0+IFgyNTUxOSB5WVlWMHJNbERKUGx0elgx\nUEF1Sms4VCtNRVRraWdvUkFEaTRzYTJ0TTFZCnl0aTIxR1QyQ1VsU0RFNnN1NzBr\neTVQbHJHQjAvYklFVkZkUDRXRGxvSkEKLS0tIHdINHFyQVE2V1V1R1ZxWEFuMm5x\nUVRjSVp6NStGSkQyQ05JVHlXejBEbWsKBlMvtw9MCReN1eSHKMwwsWaEF8kq1Pns\nLNSYEeWABZ5bbPB1xBvmIIlVFThJqgy5mBVJLzQMUwqb0IvixAgFxQ==\n-----END AGE ENCRYPTED FILE-----\n"
|
||||
},
|
||||
{
|
||||
"recipient": "age1vphy2sr6uw4ptsua3gh9khrm2cqyt65t46tusmt44z98qa7q6ymq6prrdl",
|
||||
"enc": "-----BEGIN AGE ENCRYPTED FILE-----\nYWdlLWVuY3J5cHRpb24ub3JnL3YxCi0+IFgyNTUxOSBaSmNiVWlRSy91Mm5qSWJ5\nd2Z4WnEydE9ncWwzUVVCMDVoek1wRTFyOFJjCkZjOVZrVHY5d3FKRmMvaXJQWUtU\neGpSZkZITkJaOERkdWZpelA5dTJQOEkKLS0tIEtZOUNJSytYTFpSTWNuY3JjcnJv\nbFZpTXQxc29Pd1FIN0xrcEJYc3ZlV0kKyO/PLn2WNdVtTqM8cG1XFqV/5YdSqPAY\nvroStGVsLliV7W4T2MAmACeyjoMde9/gVosKfGc6awE+Bi2BUxrqpw==\n-----END AGE ENCRYPTED FILE-----\n"
|
||||
}
|
||||
],
|
||||
"lastmodified": "2025-10-17T07:22:09Z",
|
||||
"mac": "ENC[AES256_GCM,data:OxeLto6aeiTOX8OffRsQzxyluSdva7y3j4j67c+MI1ost+QCZyGAW/5pr2mMaoU2XrwYqUjZTKBhJ9p1FY6C29/EhyzrNhGUTjC5iTcXO1lbLUTgoSDN8KPmVea97sTa+easVHoSgnPLxisG2yCALv95k9/eQ7vF9FRjBBNTaIU=,iv:FQeojhtnKOlqWuQNJo1TmI/PhjYbgwtvK24gZMjbbpM=,tag:Vwum5bSSZRNNDQ3Yudw4hQ==,type:str]",
|
||||
"unencrypted_suffix": "_unencrypted",
|
||||
"version": "3.10.2"
|
||||
}
|
||||
}
|
1
vars/per-machine/b4l/yggdrasil/yggdrasil-secret/users/kurogeek
Symbolic link
1
vars/per-machine/b4l/yggdrasil/yggdrasil-secret/users/kurogeek
Symbolic link
@@ -0,0 +1 @@
|
||||
../../../../../../sops/users/kurogeek
|
Reference in New Issue
Block a user