Add LVSolarBuck64 firmware and debug console with uv support
STM32G474RB firmware for solar buck converter with MPPT, CC control, Vfly compensation, and adaptive deadtime. Includes Textual TUI debug console for real-time telemetry, parameter tuning, and SQLite logging. Added pyproject.toml for uv: `cd code64 && uv run debug-console` Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
This commit is contained in:
@@ -0,0 +1,37 @@
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/*
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* cc_pid.c
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*
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* Created on: Jun 10, 2025
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* Author: janik
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*/
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#include <PI.h>
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void PI_Init(PIController *pi, float Kp, float Ki, uint16_t out_min, uint16_t out_max)
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{
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pi->Kp = Kp;
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pi->Ki = Ki;
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pi->prev_error = 0.0f;
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pi->output = 0;
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pi->out_min = out_min;
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pi->out_max = out_max;
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}
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uint16_t PI_Update(PIController *pi, float target, float measurement)
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{
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float error = target - measurement;
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float delta = pi->Kp * (error - pi->prev_error) + pi->Ki * error;
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// Add delta to the output (cast to float for calculation)
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float new_output = (float)(pi->output) + delta;
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// Clamp
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if (new_output > (float)(pi->out_max)) new_output = (float)(pi->out_max);
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else if (new_output < (float)(pi->out_min)) new_output = (float)(pi->out_min);
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// Update internal state
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pi->output = (uint16_t)new_output;
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pi->prev_error = error;
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return pi->output;
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}
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@@ -0,0 +1,38 @@
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/*
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* cc_controller.c
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*
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* Created on: Jun 11, 2025
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* Author: janik
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*/
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#include "cc_controller.h"
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void CC_Init(CCController *cc, float gain, float min_step, float max_step,
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uint16_t out_min, uint16_t out_max, float initial_output)
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{
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cc->gain = gain;
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cc->min_step = min_step;
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cc->max_step = max_step;
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cc->out_min = out_min;
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cc->out_max = out_max;
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cc->output_f = initial_output;
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}
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uint16_t CC_Update(CCController *cc, float target, float measurement)
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{
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float error = target - measurement;
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float step = error * cc->gain;
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if (step < cc->min_step) step = cc->min_step;
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if (step > cc->max_step) step = cc->max_step;
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cc->output_f += step;
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// Clamp float output
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if (cc->output_f > (float)cc->out_max) cc->output_f = (float)cc->out_max;
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if (cc->output_f < (float)cc->out_min) cc->output_f = (float)cc->out_min;
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return (uint16_t)roundf(cc->output_f);
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}
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@@ -0,0 +1,456 @@
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/*
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* debug_protocol.c
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*
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* Created on: Mar 5, 2026
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* Author: janik
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*/
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#include "debug_protocol.h"
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#include "main.h"
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#include "cc_controller.h"
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#include "mppt.h"
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#include <string.h>
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#include <stdio.h>
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/* ---- External variables from main.c ---- */
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extern volatile float vin, iin, vout, iout, vfly, etemp;
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extern volatile int16_t last_tmp;
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extern volatile int16_t vfly_correction;
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extern uint16_t VREF;
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extern float vfly_integral;
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extern volatile float vfly_avg_debug;
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extern float vfly_kp, vfly_ki;
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extern uint16_t vfly_clamp;
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extern uint16_t vfly_loop_counter_trigger;
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extern volatile uint8_t vfly_active;
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extern CCController cc;
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extern volatile float cc_target;
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extern volatile int cc_active;
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extern float cc_gain;
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extern float CC_MIN_STEP, CC_MAX_STEP;
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extern uint16_t cc_loop_counter_trigger;
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extern MPPTController mppt;
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extern volatile int mppt_active;
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extern uint16_t mppt_loop_counter_trigger;
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extern float mppt_initial_iref;
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extern float mppt_step;
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extern float mppt_iref_min, mppt_iref_max;
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extern float mppt_dv_threshold;
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extern float mppt_deadband;
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extern float vin_min_ctrl;
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extern uint8_t dt_values[];
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/* Raw ADC DMA buffers */
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extern uint16_t DMA1BUF1; /* adc4: vbat */
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extern uint16_t DMA1BUF2[3]; /* adc1: etemp, vin, iin */
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extern uint16_t DMA1BUF3[2]; /* adc2: vfly, iout */
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extern uint16_t DMA1BUF4; /* adc5: itemp */
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extern COMP_HandleTypeDef hcomp1, hcomp3, hcomp4;
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extern FMAC_HandleTypeDef hfmac;
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/* ---- CRC8 table (poly 0x07) ---- */
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static const uint8_t crc8_table[256] = {
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0x00,0x07,0x0E,0x09,0x1C,0x1B,0x12,0x15,0x38,0x3F,0x36,0x31,0x24,0x23,0x2A,0x2D,
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0x70,0x77,0x7E,0x79,0x6C,0x6B,0x62,0x65,0x48,0x4F,0x46,0x41,0x54,0x53,0x5A,0x5D,
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0xE0,0xE7,0xEE,0xE9,0xFC,0xFB,0xF2,0xF5,0xD8,0xDF,0xD6,0xD1,0xC4,0xC3,0xCA,0xCD,
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0x90,0x97,0x9E,0x99,0x8C,0x8B,0x82,0x85,0xA8,0xAF,0xA6,0xA1,0xB4,0xB3,0xBA,0xBD,
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0xC7,0xC0,0xC9,0xCE,0xDB,0xDC,0xD5,0xD2,0xFF,0xF8,0xF1,0xF6,0xE3,0xE4,0xED,0xEA,
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0xB7,0xB0,0xB9,0xBE,0xAB,0xAC,0xA5,0xA2,0x8F,0x88,0x81,0x86,0x93,0x94,0x9D,0x9A,
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0x27,0x20,0x29,0x2E,0x3B,0x3C,0x35,0x32,0x1F,0x18,0x11,0x16,0x03,0x04,0x0D,0x0A,
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0x57,0x50,0x59,0x5E,0x4B,0x4C,0x45,0x42,0x6F,0x68,0x61,0x66,0x73,0x74,0x7D,0x7A,
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0x89,0x8E,0x87,0x80,0x95,0x92,0x9B,0x9C,0xB1,0xB6,0xBF,0xB8,0xAD,0xAA,0xA3,0xA4,
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0xF9,0xFE,0xF7,0xF0,0xE5,0xE2,0xEB,0xEC,0xC1,0xC6,0xCF,0xC8,0xDD,0xDA,0xD3,0xD4,
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0x69,0x6E,0x67,0x60,0x75,0x72,0x7B,0x7C,0x51,0x56,0x5F,0x58,0x4D,0x4A,0x43,0x44,
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0x19,0x1E,0x17,0x10,0x05,0x02,0x0B,0x0C,0x21,0x26,0x2F,0x28,0x3D,0x3A,0x33,0x34,
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0x4E,0x49,0x40,0x47,0x52,0x55,0x5C,0x5B,0x76,0x71,0x78,0x7F,0x6A,0x6D,0x64,0x63,
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0x3E,0x39,0x30,0x37,0x22,0x25,0x2C,0x2B,0x06,0x01,0x08,0x0F,0x1A,0x1D,0x14,0x13,
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0xAE,0xA9,0xA0,0xA7,0xB2,0xB5,0xBC,0xBB,0x96,0x91,0x98,0x9F,0x8A,0x8D,0x84,0x83,
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0xDE,0xD9,0xD0,0xD7,0xC2,0xC5,0xCC,0xCB,0xE6,0xE1,0xE8,0xEF,0xFA,0xFD,0xF4,0xF3,
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};
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static uint8_t crc8(const uint8_t *data, uint16_t len)
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{
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uint8_t crc = 0x00;
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for (uint16_t i = 0; i < len; i++)
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crc = crc8_table[crc ^ data[i]];
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return crc;
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}
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/* ---- Parameter table ---- */
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#define PARAM_COUNT 27
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static ParamEntry param_table[PARAM_COUNT];
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static void param_table_init(void)
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{
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int i = 0;
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/* Vfly params */
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param_table[i++] = (ParamEntry){PID_VFLY_KP, PTYPE_FLOAT, &vfly_kp, -10.0f, 10.0f};
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param_table[i++] = (ParamEntry){PID_VFLY_KI, PTYPE_FLOAT, &vfly_ki, -10.0f, 10.0f};
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param_table[i++] = (ParamEntry){PID_VFLY_CLAMP, PTYPE_UINT16, &vfly_clamp, 0, 10000};
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param_table[i++] = (ParamEntry){PID_VFLY_LOOP_COUNTER_TRIGGER, PTYPE_UINT16, &vfly_loop_counter_trigger, 1, 10000};
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param_table[i++] = (ParamEntry){PID_VFLY_ACTIVE, PTYPE_UINT8, (void*)&vfly_active, 0, 1};
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/* CC params */
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param_table[i++] = (ParamEntry){PID_CC_TARGET, PTYPE_FLOAT, (void*)&cc_target, 0, 60000};
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param_table[i++] = (ParamEntry){PID_CC_GAIN, PTYPE_FLOAT, &cc_gain, -1.0f, 1.0f};
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param_table[i++] = (ParamEntry){PID_CC_MIN_STEP, PTYPE_FLOAT, &CC_MIN_STEP, -1000, 0};
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param_table[i++] = (ParamEntry){PID_CC_MAX_STEP, PTYPE_FLOAT, &CC_MAX_STEP, 0, 1000};
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param_table[i++] = (ParamEntry){PID_CC_LOOP_COUNTER_TRIGGER, PTYPE_UINT16, &cc_loop_counter_trigger, 1, 10000};
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param_table[i++] = (ParamEntry){PID_CC_ACTIVE, PTYPE_INT32, (void*)&cc_active, 0, 1};
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param_table[i++] = (ParamEntry){PID_VREF, PTYPE_UINT16, &VREF, 3100, 3700};
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/* MPPT params */
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param_table[i++] = (ParamEntry){PID_MPPT_STEP, PTYPE_FLOAT, &mppt_step, 0, 10000};
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param_table[i++] = (ParamEntry){PID_MPPT_IREF_MIN, PTYPE_FLOAT, &mppt_iref_min, 0, 60000};
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param_table[i++] = (ParamEntry){PID_MPPT_IREF_MAX, PTYPE_FLOAT, &mppt_iref_max, 0, 60000};
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param_table[i++] = (ParamEntry){PID_MPPT_DV_THRESHOLD, PTYPE_FLOAT, &mppt_dv_threshold, 0, 10000};
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param_table[i++] = (ParamEntry){PID_MPPT_LOOP_COUNTER_TRIGGER, PTYPE_UINT16, &mppt_loop_counter_trigger, 1, 10000};
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param_table[i++] = (ParamEntry){PID_MPPT_ACTIVE, PTYPE_INT32, (void*)&mppt_active, 0, 1};
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param_table[i++] = (ParamEntry){PID_MPPT_INITIAL_IREF, PTYPE_FLOAT, &mppt_initial_iref, 0, 60000};
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param_table[i++] = (ParamEntry){PID_MPPT_DEADBAND, PTYPE_FLOAT, &mppt_deadband, 0, 1.0f};
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/* Global */
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param_table[i++] = (ParamEntry){PID_VIN_MIN_CTRL, PTYPE_FLOAT, &vin_min_ctrl, 0, 90000};
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/* Deadtime segments */
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param_table[i++] = (ParamEntry){PID_DT_SEG0, PTYPE_UINT8, &dt_values[0], DT_HARD_MIN, 200};
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param_table[i++] = (ParamEntry){PID_DT_SEG1, PTYPE_UINT8, &dt_values[1], DT_HARD_MIN, 200};
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param_table[i++] = (ParamEntry){PID_DT_SEG2, PTYPE_UINT8, &dt_values[2], DT_HARD_MIN, 200};
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param_table[i++] = (ParamEntry){PID_DT_SEG3, PTYPE_UINT8, &dt_values[3], DT_HARD_MIN, 200};
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param_table[i++] = (ParamEntry){PID_DT_SEG4, PTYPE_UINT8, &dt_values[4], DT_HARD_MIN, 200};
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param_table[i++] = (ParamEntry){PID_DT_SEG5, PTYPE_UINT8, &dt_values[5], DT_HARD_MIN, 200};
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}
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/* ---- Protocol context ---- */
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ProtoCtx proto;
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/* ---- Internal helpers ---- */
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static void start_rx(void)
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{
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HAL_UART_Receive_IT(proto.huart, &proto.rx_byte, 1);
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}
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static void uart_recover(void)
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{
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/* Clear error flags and reset UART state so TX/RX work again */
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__HAL_UART_CLEAR_FLAG(proto.huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF);
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proto.huart->gState = HAL_UART_STATE_READY;
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proto.huart->RxState = HAL_UART_STATE_READY;
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proto.huart->ErrorCode = HAL_UART_ERROR_NONE;
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/* Re-arm RX */
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start_rx();
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}
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static void send_frame(uint8_t cmd, const uint8_t *payload, uint8_t len)
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{
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/* Pick the inactive buffer */
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uint8_t buf_idx = proto.tx_active ^ 1;
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uint8_t *buf = proto.tx_buf[buf_idx];
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uint16_t total = PROTO_HEADER_SIZE + len + 1;
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buf[0] = PROTO_SYNC_BYTE;
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buf[1] = cmd;
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buf[2] = len;
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if (len > 0)
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memcpy(&buf[3], payload, len);
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buf[3 + len] = crc8(buf, 3 + len);
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proto.tx_active = buf_idx;
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if (HAL_UART_Transmit(proto.huart, buf, total, 5) != HAL_OK)
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{
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proto.uart_errors++;
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uart_recover();
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}
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}
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static ParamEntry* find_param(uint8_t id)
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{
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for (int i = 0; i < PARAM_COUNT; i++)
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{
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if (param_table[i].id == id)
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return ¶m_table[i];
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}
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return NULL;
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}
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static void apply_param_write(const ParamWritePayload *pw)
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{
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ParamEntry *p = find_param(pw->param_id);
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if (!p) return;
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/* Extract value and clamp */
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float fval;
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switch (p->type)
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{
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case PTYPE_FLOAT:
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fval = pw->value.f;
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if (fval < p->min_val) fval = p->min_val;
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if (fval > p->max_val) fval = p->max_val;
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*(float*)p->ptr = fval;
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break;
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case PTYPE_UINT16:
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fval = (float)pw->value.u16;
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if (fval < p->min_val) fval = p->min_val;
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if (fval > p->max_val) fval = p->max_val;
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*(uint16_t*)p->ptr = (uint16_t)fval;
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break;
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case PTYPE_UINT8:
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fval = (float)pw->value.u8;
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if (fval < p->min_val) fval = p->min_val;
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if (fval > p->max_val) fval = p->max_val;
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*(uint8_t*)p->ptr = (uint8_t)fval;
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break;
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case PTYPE_INT32:
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fval = (float)pw->value.i32;
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if (fval < p->min_val) fval = p->min_val;
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if (fval > p->max_val) fval = p->max_val;
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*(int32_t*)p->ptr = (int32_t)fval;
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break;
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}
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/* Side effects: VREF update -> ADC3 offset + CC output */
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if (pw->param_id == PID_VREF)
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{
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ADC3->OFR1 = (ADC3->OFR1 & ~0xFFFU) | (VREF & 0xFFF);
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cc.output_f = (float)VREF;
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}
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/* Side effects for CC params: sync struct fields */
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else if (pw->param_id == PID_CC_GAIN)
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cc.gain = cc_gain;
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else if (pw->param_id == PID_CC_MIN_STEP)
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cc.min_step = CC_MIN_STEP;
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else if (pw->param_id == PID_CC_MAX_STEP)
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cc.max_step = CC_MAX_STEP;
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/* Side effects for MPPT params: sync struct fields */
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else if (pw->param_id == PID_MPPT_STEP)
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mppt.step = mppt_step;
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else if (pw->param_id == PID_MPPT_IREF_MIN)
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mppt.iref_min = mppt_iref_min;
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else if (pw->param_id == PID_MPPT_IREF_MAX)
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mppt.iref_max = mppt_iref_max;
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else if (pw->param_id == PID_MPPT_DV_THRESHOLD)
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mppt.dv_min = mppt_dv_threshold;
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else if (pw->param_id == PID_MPPT_DEADBAND)
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mppt.deadband = mppt_deadband;
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else if (pw->param_id == PID_MPPT_ACTIVE && mppt_active)
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cc_active = 1;
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/* Send ACK: echo back the write payload */
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send_frame(CMD_PARAM_WRITE_ACK, (const uint8_t*)pw, sizeof(ParamWritePayload));
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}
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static void send_param_value(const ParamEntry *p)
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{
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ParamWritePayload pv;
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pv.param_id = p->id;
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pv.param_type = p->type;
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pv._pad[0] = 0; pv._pad[1] = 0;
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pv.value.u32 = 0;
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switch (p->type)
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{
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case PTYPE_FLOAT: pv.value.f = *(float*)p->ptr; break;
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case PTYPE_UINT16: pv.value.u16 = *(uint16_t*)p->ptr; break;
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case PTYPE_UINT8: pv.value.u8 = *(uint8_t*)p->ptr; break;
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case PTYPE_INT32: pv.value.i32 = *(int32_t*)p->ptr; break;
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}
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send_frame(CMD_PARAM_VALUE, (const uint8_t*)&pv, sizeof(ParamWritePayload));
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}
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static void send_all_params(void)
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{
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for (int i = 0; i < PARAM_COUNT; i++)
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send_param_value(¶m_table[i]);
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}
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static void process_rx_frame(uint8_t cmd, const uint8_t *payload, uint8_t len)
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{
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switch (cmd)
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{
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case CMD_PARAM_WRITE:
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if (len >= sizeof(ParamWritePayload))
|
||||
apply_param_write((const ParamWritePayload*)payload);
|
||||
break;
|
||||
case CMD_PARAM_READ_ALL:
|
||||
send_all_params();
|
||||
break;
|
||||
case CMD_PING:
|
||||
send_frame(CMD_PONG, NULL, 0);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/* ---- Public API ---- */
|
||||
|
||||
void Proto_Init(UART_HandleTypeDef *huart)
|
||||
{
|
||||
memset(&proto, 0, sizeof(proto));
|
||||
proto.huart = huart;
|
||||
proto.rx_state = RX_WAIT_SYNC;
|
||||
param_table_init();
|
||||
start_rx();
|
||||
}
|
||||
|
||||
void Proto_SendTelemetry(void)
|
||||
{
|
||||
TelemetryPayload t;
|
||||
t.vin = vin;
|
||||
t.vout = vout;
|
||||
t.iin = iin;
|
||||
t.iout = iout;
|
||||
t.vfly = vfly;
|
||||
t.etemp = etemp;
|
||||
t.last_tmp = last_tmp;
|
||||
t.VREF = VREF;
|
||||
t.vfly_correction = vfly_correction;
|
||||
t._pad0 = 0;
|
||||
t.vfly_integral = vfly_integral;
|
||||
t.vfly_avg_debug = vfly_avg_debug;
|
||||
t.cc_output_f = cc.output_f;
|
||||
t.mppt_iref = mppt.iref;
|
||||
t.mppt_last_vin = mppt.last_vin;
|
||||
t.mppt_last_iin = mppt.last_iin;
|
||||
t.p_in = vin * (-iin) / 1e6f; /* mV * mA → W */
|
||||
t.p_out = vout * iout / 1e6f; /* mV * mA → W */
|
||||
t.seq = proto.seq++;
|
||||
t._pad1[0] = 0; t._pad1[1] = 0; t._pad1[2] = 0;
|
||||
|
||||
send_frame(CMD_TELEMETRY, (const uint8_t*)&t, sizeof(TelemetryPayload));
|
||||
}
|
||||
|
||||
void Proto_SendError(const char *msg)
|
||||
{
|
||||
uint8_t len = 0;
|
||||
while (msg[len] && len < PROTO_MAX_PAYLOAD) len++;
|
||||
send_frame(CMD_ERROR_MSG, (const uint8_t*)msg, len);
|
||||
}
|
||||
|
||||
void Proto_SendDiagDump(const char *reason)
|
||||
{
|
||||
char buf[128];
|
||||
|
||||
/* Line 1: reason */
|
||||
Proto_SendError(reason);
|
||||
|
||||
/* Line 2: converted analog values (integer-only — no float printf with nano.specs) */
|
||||
snprintf(buf, sizeof(buf), "DIAG V:%lu/%lu I:%d/%lu Vfly:%lu T:%d.%u",
|
||||
(unsigned long)(vin > 0 ? (uint32_t)vin : 0),
|
||||
(unsigned long)(vout > 0 ? (uint32_t)vout : 0),
|
||||
(int)iin,
|
||||
(unsigned long)(iout > 0 ? (uint32_t)iout : 0),
|
||||
(unsigned long)(vfly > 0 ? (uint32_t)vfly : 0),
|
||||
(int)etemp, ((unsigned)(etemp > 0 ? etemp : -etemp) % 10));
|
||||
Proto_SendError(buf);
|
||||
|
||||
/* Line 3: raw ADC counts */
|
||||
snprintf(buf, sizeof(buf), "RAW adc1[%u,%u,%u] adc2[%u,%u] adc4[%u] adc5[%u]",
|
||||
DMA1BUF2[0], DMA1BUF2[1], DMA1BUF2[2],
|
||||
DMA1BUF3[0], DMA1BUF3[1],
|
||||
DMA1BUF1, DMA1BUF4);
|
||||
Proto_SendError(buf);
|
||||
|
||||
/* Line 4: controller state */
|
||||
snprintf(buf, sizeof(buf), "CTRL VREF:%u last_tmp:%d vfly_corr:%d cc_out:%d mppt_iref:%d",
|
||||
VREF, (int)last_tmp, (int)vfly_correction,
|
||||
(int)cc.output_f, (int)mppt.iref);
|
||||
Proto_SendError(buf);
|
||||
|
||||
/* Line 5: HRTIM fault status + comparator outputs */
|
||||
uint32_t hrtim_isr = HRTIM1->sCommonRegs.ISR;
|
||||
uint32_t hrtim_oenr = HRTIM1->sCommonRegs.OENR;
|
||||
uint32_t comp_out = 0;
|
||||
if (HAL_COMP_GetOutputLevel(&hcomp1) == COMP_OUTPUT_LEVEL_HIGH) comp_out |= 1;
|
||||
if (HAL_COMP_GetOutputLevel(&hcomp3) == COMP_OUTPUT_LEVEL_HIGH) comp_out |= 2;
|
||||
if (HAL_COMP_GetOutputLevel(&hcomp4) == COMP_OUTPUT_LEVEL_HIGH) comp_out |= 4;
|
||||
snprintf(buf, sizeof(buf), "HW HRTIM_ISR:%08lX OENR:%08lX COMP:%lu FMAC_SR:%08lX",
|
||||
hrtim_isr, hrtim_oenr, comp_out, FMAC->SR);
|
||||
Proto_SendError(buf);
|
||||
|
||||
/* Line 6: HRTIM duty + master compare */
|
||||
snprintf(buf, sizeof(buf), "HRTIM TE_CMP1:%lu TF_CMP1:%lu MCMP1:%lu",
|
||||
HRTIM1->sTimerxRegs[HRTIM_TIMERINDEX_TIMER_E].CMP1xR,
|
||||
HRTIM1->sTimerxRegs[HRTIM_TIMERINDEX_TIMER_F].CMP1xR,
|
||||
HRTIM1->sMasterRegs.MCMP1R);
|
||||
Proto_SendError(buf);
|
||||
|
||||
/* Line 7: active flags + ADC3 offset */
|
||||
snprintf(buf, sizeof(buf), "FLAGS cc_act:%d mppt_act:%d vfly_act:%u ADC3_OFR1:%08lX",
|
||||
cc_active, mppt_active, (unsigned)vfly_active, ADC3->OFR1);
|
||||
Proto_SendError(buf);
|
||||
}
|
||||
|
||||
/* ---- HAL Callbacks ---- */
|
||||
|
||||
void Proto_TxCpltCallback(UART_HandleTypeDef *huart)
|
||||
{
|
||||
if (huart == proto.huart)
|
||||
proto.tx_busy = 0;
|
||||
}
|
||||
|
||||
void Proto_ErrorCallback(UART_HandleTypeDef *huart)
|
||||
{
|
||||
if (huart != proto.huart)
|
||||
return;
|
||||
proto.uart_errors++;
|
||||
uart_recover();
|
||||
}
|
||||
|
||||
void Proto_RxCpltCallback(UART_HandleTypeDef *huart)
|
||||
{
|
||||
if (huart != proto.huart)
|
||||
return;
|
||||
|
||||
uint8_t b = proto.rx_byte;
|
||||
|
||||
switch (proto.rx_state)
|
||||
{
|
||||
case RX_WAIT_SYNC:
|
||||
if (b == PROTO_SYNC_BYTE)
|
||||
{
|
||||
proto.rx_buf[0] = b;
|
||||
proto.rx_state = RX_WAIT_CMD;
|
||||
}
|
||||
break;
|
||||
case RX_WAIT_CMD:
|
||||
proto.rx_cmd = b;
|
||||
proto.rx_buf[1] = b;
|
||||
proto.rx_state = RX_WAIT_LEN;
|
||||
break;
|
||||
case RX_WAIT_LEN:
|
||||
proto.rx_len = b;
|
||||
proto.rx_buf[2] = b;
|
||||
proto.rx_idx = 0;
|
||||
if (b == 0)
|
||||
proto.rx_state = RX_WAIT_CRC;
|
||||
else if (b > PROTO_MAX_PAYLOAD)
|
||||
proto.rx_state = RX_WAIT_SYNC; /* invalid, reset */
|
||||
else
|
||||
proto.rx_state = RX_WAIT_PAYLOAD;
|
||||
break;
|
||||
case RX_WAIT_PAYLOAD:
|
||||
proto.rx_buf[PROTO_HEADER_SIZE + proto.rx_idx] = b;
|
||||
proto.rx_idx++;
|
||||
if (proto.rx_idx >= proto.rx_len)
|
||||
proto.rx_state = RX_WAIT_CRC;
|
||||
break;
|
||||
case RX_WAIT_CRC:
|
||||
{
|
||||
uint8_t expected = crc8(proto.rx_buf, PROTO_HEADER_SIZE + proto.rx_len);
|
||||
if (b == expected)
|
||||
process_rx_frame(proto.rx_cmd, &proto.rx_buf[PROTO_HEADER_SIZE], proto.rx_len);
|
||||
proto.rx_state = RX_WAIT_SYNC;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/* Re-arm RX */
|
||||
start_rx();
|
||||
}
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,64 @@
|
||||
/*
|
||||
* mppt.c
|
||||
*
|
||||
* Created on: Jun 11, 2025
|
||||
* Author: janik
|
||||
*/
|
||||
|
||||
|
||||
#include "mppt.h"
|
||||
#include <math.h> // for fabsf
|
||||
|
||||
void MPPT_IncCond_Init(MPPTController *mppt,
|
||||
float initial_iref,
|
||||
float step,
|
||||
float iref_min,
|
||||
float iref_max,
|
||||
float dv_min)
|
||||
{
|
||||
mppt->last_vin = 0.0f;
|
||||
mppt->last_iin = 0.0f;
|
||||
mppt->iref = initial_iref;
|
||||
mppt->step = step;
|
||||
mppt->iref_min = iref_min;
|
||||
mppt->iref_max = iref_max;
|
||||
mppt->dv_min = dv_min;
|
||||
mppt->deadband = 0.005f;
|
||||
}
|
||||
|
||||
float MPPT_IncCond_Update(MPPTController *mppt, float vin, float iin)
|
||||
{
|
||||
float dv = vin - mppt->last_vin;
|
||||
float di = iin - mppt->last_iin;
|
||||
|
||||
// Skip if input voltage is essentially zero
|
||||
if (vin < 1e-2f)
|
||||
return mppt->iref;
|
||||
|
||||
// Suppress update if both dv and di are below noise floor
|
||||
if (fabsf(dv) < mppt->dv_min && fabsf(di) < mppt->dv_min)
|
||||
return mppt->iref;
|
||||
|
||||
/* dP = vin*di + iin*dv (avoids dv division, works even when dv is small) */
|
||||
float dp = vin * di + iin * dv;
|
||||
float p = vin * iin; /* current power (mV*mA = nW scale) */
|
||||
|
||||
/* Relative deadband: |dP| < 0.5% of P => near MPP */
|
||||
if (p > 1e3f && fabsf(dp) < mppt->deadband * fabsf(p)) {
|
||||
// At or near MPP — don't step
|
||||
} else if (dp > 0) {
|
||||
mppt->iref -= mppt->step;
|
||||
} else {
|
||||
mppt->iref += mppt->step;
|
||||
}
|
||||
|
||||
// Clamp
|
||||
if (mppt->iref > mppt->iref_max) mppt->iref = mppt->iref_max;
|
||||
if (mppt->iref < mppt->iref_min) mppt->iref = mppt->iref_min;
|
||||
|
||||
// Save state
|
||||
mppt->last_vin = vin;
|
||||
mppt->last_iin = iin;
|
||||
|
||||
return mppt->iref;
|
||||
}
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,390 @@
|
||||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32g4xx_it.c
|
||||
* @brief Interrupt Service Routines.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2025 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "main.h"
|
||||
#include "stm32g4xx_it.h"
|
||||
/* Private includes ----------------------------------------------------------*/
|
||||
/* USER CODE BEGIN Includes */
|
||||
/* USER CODE END Includes */
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* USER CODE BEGIN TD */
|
||||
|
||||
/* USER CODE END TD */
|
||||
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN PD */
|
||||
|
||||
/* USER CODE END PD */
|
||||
|
||||
/* Private macro -------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN PM */
|
||||
|
||||
/* USER CODE END PM */
|
||||
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
/* USER CODE BEGIN PV */
|
||||
|
||||
/* USER CODE END PV */
|
||||
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
/* USER CODE BEGIN PFP */
|
||||
|
||||
/* USER CODE END PFP */
|
||||
|
||||
/* Private user code ---------------------------------------------------------*/
|
||||
/* USER CODE BEGIN 0 */
|
||||
|
||||
/* USER CODE END 0 */
|
||||
|
||||
/* External variables --------------------------------------------------------*/
|
||||
extern COMP_HandleTypeDef hcomp1;
|
||||
extern COMP_HandleTypeDef hcomp3;
|
||||
extern COMP_HandleTypeDef hcomp4;
|
||||
extern DAC_HandleTypeDef hdac1;
|
||||
extern DAC_HandleTypeDef hdac3;
|
||||
extern FDCAN_HandleTypeDef hfdcan2;
|
||||
extern FMAC_HandleTypeDef hfmac;
|
||||
extern HRTIM_HandleTypeDef hhrtim1;
|
||||
extern TIM_HandleTypeDef htim1;
|
||||
extern TIM_HandleTypeDef htim6;
|
||||
extern TIM_HandleTypeDef htim7;
|
||||
extern TIM_HandleTypeDef htim16;
|
||||
extern UART_HandleTypeDef huart4;
|
||||
/* USER CODE BEGIN EV */
|
||||
|
||||
/* USER CODE END EV */
|
||||
|
||||
/******************************************************************************/
|
||||
/* Cortex-M4 Processor Interruption and Exception Handlers */
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* @brief This function handles Non maskable interrupt.
|
||||
*/
|
||||
void NMI_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
|
||||
|
||||
/* USER CODE END NonMaskableInt_IRQn 0 */
|
||||
HAL_RCC_NMI_IRQHandler();
|
||||
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
|
||||
while (1)
|
||||
{
|
||||
}
|
||||
/* USER CODE END NonMaskableInt_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Hard fault interrupt.
|
||||
*/
|
||||
void HardFault_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN HardFault_IRQn 0 */
|
||||
|
||||
/* USER CODE END HardFault_IRQn 0 */
|
||||
while (1)
|
||||
{
|
||||
/* USER CODE BEGIN W1_HardFault_IRQn 0 */
|
||||
/* USER CODE END W1_HardFault_IRQn 0 */
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Memory management fault.
|
||||
*/
|
||||
void MemManage_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN MemoryManagement_IRQn 0 */
|
||||
|
||||
/* USER CODE END MemoryManagement_IRQn 0 */
|
||||
while (1)
|
||||
{
|
||||
/* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
|
||||
/* USER CODE END W1_MemoryManagement_IRQn 0 */
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Prefetch fault, memory access fault.
|
||||
*/
|
||||
void BusFault_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN BusFault_IRQn 0 */
|
||||
|
||||
/* USER CODE END BusFault_IRQn 0 */
|
||||
while (1)
|
||||
{
|
||||
/* USER CODE BEGIN W1_BusFault_IRQn 0 */
|
||||
/* USER CODE END W1_BusFault_IRQn 0 */
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Undefined instruction or illegal state.
|
||||
*/
|
||||
void UsageFault_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN UsageFault_IRQn 0 */
|
||||
|
||||
/* USER CODE END UsageFault_IRQn 0 */
|
||||
while (1)
|
||||
{
|
||||
/* USER CODE BEGIN W1_UsageFault_IRQn 0 */
|
||||
/* USER CODE END W1_UsageFault_IRQn 0 */
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles System service call via SWI instruction.
|
||||
*/
|
||||
void SVC_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN SVCall_IRQn 0 */
|
||||
|
||||
/* USER CODE END SVCall_IRQn 0 */
|
||||
/* USER CODE BEGIN SVCall_IRQn 1 */
|
||||
|
||||
/* USER CODE END SVCall_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Debug monitor.
|
||||
*/
|
||||
void DebugMon_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN DebugMonitor_IRQn 0 */
|
||||
|
||||
/* USER CODE END DebugMonitor_IRQn 0 */
|
||||
/* USER CODE BEGIN DebugMonitor_IRQn 1 */
|
||||
|
||||
/* USER CODE END DebugMonitor_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Pendable request for system service.
|
||||
*/
|
||||
void PendSV_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN PendSV_IRQn 0 */
|
||||
|
||||
/* USER CODE END PendSV_IRQn 0 */
|
||||
/* USER CODE BEGIN PendSV_IRQn 1 */
|
||||
|
||||
/* USER CODE END PendSV_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles System tick timer.
|
||||
*/
|
||||
void SysTick_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN SysTick_IRQn 0 */
|
||||
|
||||
/* USER CODE END SysTick_IRQn 0 */
|
||||
HAL_IncTick();
|
||||
/* USER CODE BEGIN SysTick_IRQn 1 */
|
||||
|
||||
/* USER CODE END SysTick_IRQn 1 */
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/* STM32G4xx Peripheral Interrupt Handlers */
|
||||
/* Add here the Interrupt Handlers for the used peripherals. */
|
||||
/* For the available peripheral interrupt handler names, */
|
||||
/* please refer to the startup file (startup_stm32g4xx.s). */
|
||||
/******************************************************************************/
|
||||
|
||||
/**
|
||||
* @brief This function handles TIM1 update interrupt and TIM16 global interrupt.
|
||||
*/
|
||||
void TIM1_UP_TIM16_IRQHandler(void)
|
||||
{
|
||||
/* USER CODE BEGIN TIM1_UP_TIM16_IRQn 0 */
|
||||
|
||||
//__HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_UPDATE);
|
||||
//HAL_TIM_PeriodElapsedCallback(htim16);
|
||||
//return;
|
||||
|
||||
/* USER CODE END TIM1_UP_TIM16_IRQn 0 */
|
||||
HAL_TIM_IRQHandler(&htim1);
|
||||
HAL_TIM_IRQHandler(&htim16);
|
||||
/* USER CODE BEGIN TIM1_UP_TIM16_IRQn 1 */
|
||||
|
||||
/* USER CODE END TIM1_UP_TIM16_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles UART4 global interrupt / UART4 wake-up interrupt through EXTI line 34.
|
||||
*/
|
||||
void UART4_IRQHandler(void)
|
||||
{
|
||||
/* USER CODE BEGIN UART4_IRQn 0 */
|
||||
|
||||
/* USER CODE END UART4_IRQn 0 */
|
||||
HAL_UART_IRQHandler(&huart4);
|
||||
/* USER CODE BEGIN UART4_IRQn 1 */
|
||||
|
||||
/* USER CODE END UART4_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles TIM6 global interrupt, DAC1 and DAC3 channel underrun error interrupts.
|
||||
*/
|
||||
void TIM6_DAC_IRQHandler(void)
|
||||
{
|
||||
/* USER CODE BEGIN TIM6_DAC_IRQn 0 */
|
||||
|
||||
/* USER CODE END TIM6_DAC_IRQn 0 */
|
||||
HAL_TIM_IRQHandler(&htim6);
|
||||
HAL_DAC_IRQHandler(&hdac1);
|
||||
HAL_DAC_IRQHandler(&hdac3);
|
||||
/* USER CODE BEGIN TIM6_DAC_IRQn 1 */
|
||||
|
||||
/* USER CODE END TIM6_DAC_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles TIM7 global interrupt, DAC2 and DAC4 channel underrun error interrupts.
|
||||
*/
|
||||
void TIM7_DAC_IRQHandler(void)
|
||||
{
|
||||
/* USER CODE BEGIN TIM7_DAC_IRQn 0 */
|
||||
|
||||
/* USER CODE END TIM7_DAC_IRQn 0 */
|
||||
HAL_TIM_IRQHandler(&htim7);
|
||||
/* USER CODE BEGIN TIM7_DAC_IRQn 1 */
|
||||
|
||||
/* USER CODE END TIM7_DAC_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles COMP1, COMP2 and COMP3 interrupts through EXTI lines 21, 22 and 29.
|
||||
*/
|
||||
void COMP1_2_3_IRQHandler(void)
|
||||
{
|
||||
/* USER CODE BEGIN COMP1_2_3_IRQn 0 */
|
||||
HAL_GPIO_WritePin(GPIOA,GPIO_PIN_0,GPIO_PIN_SET);
|
||||
|
||||
/* USER CODE END COMP1_2_3_IRQn 0 */
|
||||
HAL_COMP_IRQHandler(&hcomp1);
|
||||
HAL_COMP_IRQHandler(&hcomp3);
|
||||
/* USER CODE BEGIN COMP1_2_3_IRQn 1 */
|
||||
|
||||
/* USER CODE END COMP1_2_3_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles COMP4, COMP5 and COMP6 interrupts through EXTI lines 30, 31 and 32.
|
||||
*/
|
||||
void COMP4_5_6_IRQHandler(void)
|
||||
{
|
||||
/* USER CODE BEGIN COMP4_5_6_IRQn 0 */
|
||||
HAL_GPIO_WritePin(GPIOA,GPIO_PIN_0,GPIO_PIN_SET);;
|
||||
|
||||
/* USER CODE END COMP4_5_6_IRQn 0 */
|
||||
HAL_COMP_IRQHandler(&hcomp4);
|
||||
/* USER CODE BEGIN COMP4_5_6_IRQn 1 */
|
||||
|
||||
/* USER CODE END COMP4_5_6_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles HRTIM fault global interrupt.
|
||||
*/
|
||||
void HRTIM1_FLT_IRQHandler(void)
|
||||
{
|
||||
/* USER CODE BEGIN HRTIM1_FLT_IRQn 0 */
|
||||
HAL_GPIO_WritePin(GPIOA,GPIO_PIN_0,GPIO_PIN_SET);
|
||||
|
||||
/* USER CODE END HRTIM1_FLT_IRQn 0 */
|
||||
HAL_HRTIM_IRQHandler(&hhrtim1,HRTIM_TIMERINDEX_COMMON);
|
||||
/* USER CODE BEGIN HRTIM1_FLT_IRQn 1 */
|
||||
|
||||
/* USER CODE END HRTIM1_FLT_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles FDCAN2 interrupt 0.
|
||||
*/
|
||||
void FDCAN2_IT0_IRQHandler(void)
|
||||
{
|
||||
/* USER CODE BEGIN FDCAN2_IT0_IRQn 0 */
|
||||
|
||||
/* USER CODE END FDCAN2_IT0_IRQn 0 */
|
||||
HAL_FDCAN_IRQHandler(&hfdcan2);
|
||||
/* USER CODE BEGIN FDCAN2_IT0_IRQn 1 */
|
||||
|
||||
/* USER CODE END FDCAN2_IT0_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles FDCAN2 interrupt 1.
|
||||
*/
|
||||
void FDCAN2_IT1_IRQHandler(void)
|
||||
{
|
||||
/* USER CODE BEGIN FDCAN2_IT1_IRQn 0 */
|
||||
|
||||
/* USER CODE END FDCAN2_IT1_IRQn 0 */
|
||||
HAL_FDCAN_IRQHandler(&hfdcan2);
|
||||
/* USER CODE BEGIN FDCAN2_IT1_IRQn 1 */
|
||||
|
||||
/* USER CODE END FDCAN2_IT1_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles FMAC interrupt.
|
||||
*/
|
||||
void FMAC_IRQHandler(void)
|
||||
{
|
||||
/* USER CODE BEGIN FMAC_IRQn 0 */
|
||||
//HAL_GPIO_TogglePin(GPIOA,GPIO_PIN_4);
|
||||
|
||||
if (FMAC->SR > 2)
|
||||
{
|
||||
HAL_FMAC_ErrorCallback(&hfmac);
|
||||
return;
|
||||
}
|
||||
|
||||
int32_t tmp;//,tmpe,tmpf;
|
||||
tmp = READ_REG(FMAC->RDATA);
|
||||
HRTIM1->sMasterRegs.MCMP1R = DUTY_TICKS_MID + vfly_correction;
|
||||
//tmpf = tmp +vfly_correction;
|
||||
//tmpe = tmp -vfly_correction;
|
||||
//tmp = (tmp > 0x00007FFF ? 0 : tmp);
|
||||
last_tmp = tmp;
|
||||
if (tmp > DUTY_TICKS_MAX) tmp = DUTY_TICKS_MAX;
|
||||
if (tmp < DUTY_TICKS_MIN) tmp = 0;
|
||||
//if (tmpf > 2448) tmpf = 2448;
|
||||
//if (tmpf < 0) tmpe = 0;
|
||||
HRTIM1->sTimerxRegs[HRTIM_TIMERINDEX_TIMER_E].CMP1xR = tmp;
|
||||
HRTIM1->sTimerxRegs[HRTIM_TIMERINDEX_TIMER_F].CMP1xR = tmp;
|
||||
|
||||
return;
|
||||
|
||||
/* USER CODE END FMAC_IRQn 0 */
|
||||
HAL_FMAC_IRQHandler(&hfmac);
|
||||
/* USER CODE BEGIN FMAC_IRQn 1 */
|
||||
|
||||
/* USER CODE END FMAC_IRQn 1 */
|
||||
}
|
||||
|
||||
/* USER CODE BEGIN 1 */
|
||||
|
||||
/* USER CODE END 1 */
|
||||
@@ -0,0 +1,176 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file syscalls.c
|
||||
* @author Auto-generated by STM32CubeIDE
|
||||
* @brief STM32CubeIDE Minimal System calls file
|
||||
*
|
||||
* For more information about which c-functions
|
||||
* need which of these lowlevel functions
|
||||
* please consult the Newlib libc-manual
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2020-2025 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Includes */
|
||||
#include <sys/stat.h>
|
||||
#include <stdlib.h>
|
||||
#include <errno.h>
|
||||
#include <stdio.h>
|
||||
#include <signal.h>
|
||||
#include <time.h>
|
||||
#include <sys/time.h>
|
||||
#include <sys/times.h>
|
||||
|
||||
|
||||
/* Variables */
|
||||
extern int __io_putchar(int ch) __attribute__((weak));
|
||||
extern int __io_getchar(void) __attribute__((weak));
|
||||
|
||||
|
||||
char *__env[1] = { 0 };
|
||||
char **environ = __env;
|
||||
|
||||
|
||||
/* Functions */
|
||||
void initialise_monitor_handles()
|
||||
{
|
||||
}
|
||||
|
||||
int _getpid(void)
|
||||
{
|
||||
return 1;
|
||||
}
|
||||
|
||||
int _kill(int pid, int sig)
|
||||
{
|
||||
(void)pid;
|
||||
(void)sig;
|
||||
errno = EINVAL;
|
||||
return -1;
|
||||
}
|
||||
|
||||
void _exit (int status)
|
||||
{
|
||||
_kill(status, -1);
|
||||
while (1) {} /* Make sure we hang here */
|
||||
}
|
||||
|
||||
__attribute__((weak)) int _read(int file, char *ptr, int len)
|
||||
{
|
||||
(void)file;
|
||||
int DataIdx;
|
||||
|
||||
for (DataIdx = 0; DataIdx < len; DataIdx++)
|
||||
{
|
||||
*ptr++ = __io_getchar();
|
||||
}
|
||||
|
||||
return len;
|
||||
}
|
||||
|
||||
__attribute__((weak)) int _write(int file, char *ptr, int len)
|
||||
{
|
||||
(void)file;
|
||||
int DataIdx;
|
||||
|
||||
for (DataIdx = 0; DataIdx < len; DataIdx++)
|
||||
{
|
||||
__io_putchar(*ptr++);
|
||||
}
|
||||
return len;
|
||||
}
|
||||
|
||||
int _close(int file)
|
||||
{
|
||||
(void)file;
|
||||
return -1;
|
||||
}
|
||||
|
||||
|
||||
int _fstat(int file, struct stat *st)
|
||||
{
|
||||
(void)file;
|
||||
st->st_mode = S_IFCHR;
|
||||
return 0;
|
||||
}
|
||||
|
||||
int _isatty(int file)
|
||||
{
|
||||
(void)file;
|
||||
return 1;
|
||||
}
|
||||
|
||||
int _lseek(int file, int ptr, int dir)
|
||||
{
|
||||
(void)file;
|
||||
(void)ptr;
|
||||
(void)dir;
|
||||
return 0;
|
||||
}
|
||||
|
||||
int _open(char *path, int flags, ...)
|
||||
{
|
||||
(void)path;
|
||||
(void)flags;
|
||||
/* Pretend like we always fail */
|
||||
return -1;
|
||||
}
|
||||
|
||||
int _wait(int *status)
|
||||
{
|
||||
(void)status;
|
||||
errno = ECHILD;
|
||||
return -1;
|
||||
}
|
||||
|
||||
int _unlink(char *name)
|
||||
{
|
||||
(void)name;
|
||||
errno = ENOENT;
|
||||
return -1;
|
||||
}
|
||||
|
||||
int _times(struct tms *buf)
|
||||
{
|
||||
(void)buf;
|
||||
return -1;
|
||||
}
|
||||
|
||||
int _stat(char *file, struct stat *st)
|
||||
{
|
||||
(void)file;
|
||||
st->st_mode = S_IFCHR;
|
||||
return 0;
|
||||
}
|
||||
|
||||
int _link(char *old, char *new)
|
||||
{
|
||||
(void)old;
|
||||
(void)new;
|
||||
errno = EMLINK;
|
||||
return -1;
|
||||
}
|
||||
|
||||
int _fork(void)
|
||||
{
|
||||
errno = EAGAIN;
|
||||
return -1;
|
||||
}
|
||||
|
||||
int _execve(char *name, char **argv, char **env)
|
||||
{
|
||||
(void)name;
|
||||
(void)argv;
|
||||
(void)env;
|
||||
errno = ENOMEM;
|
||||
return -1;
|
||||
}
|
||||
@@ -0,0 +1,79 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file sysmem.c
|
||||
* @author Generated by STM32CubeIDE
|
||||
* @brief STM32CubeIDE System Memory calls file
|
||||
*
|
||||
* For more information about which C functions
|
||||
* need which of these lowlevel functions
|
||||
* please consult the newlib libc manual
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2025 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Includes */
|
||||
#include <errno.h>
|
||||
#include <stdint.h>
|
||||
|
||||
/**
|
||||
* Pointer to the current high watermark of the heap usage
|
||||
*/
|
||||
static uint8_t *__sbrk_heap_end = NULL;
|
||||
|
||||
/**
|
||||
* @brief _sbrk() allocates memory to the newlib heap and is used by malloc
|
||||
* and others from the C library
|
||||
*
|
||||
* @verbatim
|
||||
* ############################################################################
|
||||
* # .data # .bss # newlib heap # MSP stack #
|
||||
* # # # # Reserved by _Min_Stack_Size #
|
||||
* ############################################################################
|
||||
* ^-- RAM start ^-- _end _estack, RAM end --^
|
||||
* @endverbatim
|
||||
*
|
||||
* This implementation starts allocating at the '_end' linker symbol
|
||||
* The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
|
||||
* The implementation considers '_estack' linker symbol to be RAM end
|
||||
* NOTE: If the MSP stack, at any point during execution, grows larger than the
|
||||
* reserved size, please increase the '_Min_Stack_Size'.
|
||||
*
|
||||
* @param incr Memory size
|
||||
* @return Pointer to allocated memory
|
||||
*/
|
||||
void *_sbrk(ptrdiff_t incr)
|
||||
{
|
||||
extern uint8_t _end; /* Symbol defined in the linker script */
|
||||
extern uint8_t _estack; /* Symbol defined in the linker script */
|
||||
extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
|
||||
const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
|
||||
const uint8_t *max_heap = (uint8_t *)stack_limit;
|
||||
uint8_t *prev_heap_end;
|
||||
|
||||
/* Initialize heap end at first call */
|
||||
if (NULL == __sbrk_heap_end)
|
||||
{
|
||||
__sbrk_heap_end = &_end;
|
||||
}
|
||||
|
||||
/* Protect heap from growing into the reserved MSP stack */
|
||||
if (__sbrk_heap_end + incr > max_heap)
|
||||
{
|
||||
errno = ENOMEM;
|
||||
return (void *)-1;
|
||||
}
|
||||
|
||||
prev_heap_end = __sbrk_heap_end;
|
||||
__sbrk_heap_end += incr;
|
||||
|
||||
return (void *)prev_heap_end;
|
||||
}
|
||||
@@ -0,0 +1,285 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file system_stm32g4xx.c
|
||||
* @author MCD Application Team
|
||||
* @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
|
||||
*
|
||||
* This file provides two functions and one global variable to be called from
|
||||
* user application:
|
||||
* - SystemInit(): This function is called at startup just after reset and
|
||||
* before branch to main program. This call is made inside
|
||||
* the "startup_stm32g4xx.s" file.
|
||||
*
|
||||
* - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
|
||||
* by the user application to setup the SysTick
|
||||
* timer or configure other parameters.
|
||||
*
|
||||
* - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
|
||||
* be called whenever the core clock is changed
|
||||
* during program execution.
|
||||
*
|
||||
* After each device reset the HSI (16 MHz) is used as system clock source.
|
||||
* Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
|
||||
* configure the system clock before to branch to main program.
|
||||
*
|
||||
* This file configures the system clock as follows:
|
||||
*=============================================================================
|
||||
*-----------------------------------------------------------------------------
|
||||
* System Clock source | HSI
|
||||
*-----------------------------------------------------------------------------
|
||||
* SYSCLK(Hz) | 16000000
|
||||
*-----------------------------------------------------------------------------
|
||||
* HCLK(Hz) | 16000000
|
||||
*-----------------------------------------------------------------------------
|
||||
* AHB Prescaler | 1
|
||||
*-----------------------------------------------------------------------------
|
||||
* APB1 Prescaler | 1
|
||||
*-----------------------------------------------------------------------------
|
||||
* APB2 Prescaler | 1
|
||||
*-----------------------------------------------------------------------------
|
||||
* PLL_M | 1
|
||||
*-----------------------------------------------------------------------------
|
||||
* PLL_N | 16
|
||||
*-----------------------------------------------------------------------------
|
||||
* PLL_P | 7
|
||||
*-----------------------------------------------------------------------------
|
||||
* PLL_Q | 2
|
||||
*-----------------------------------------------------------------------------
|
||||
* PLL_R | 2
|
||||
*-----------------------------------------------------------------------------
|
||||
* Require 48MHz for RNG | Disabled
|
||||
*-----------------------------------------------------------------------------
|
||||
*=============================================================================
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2019 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/** @addtogroup CMSIS
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup stm32g4xx_system
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32G4xx_System_Private_Includes
|
||||
* @{
|
||||
*/
|
||||
|
||||
#include "stm32g4xx.h"
|
||||
|
||||
#if !defined (HSE_VALUE)
|
||||
#define HSE_VALUE 24000000U /*!< Value of the External oscillator in Hz */
|
||||
#endif /* HSE_VALUE */
|
||||
|
||||
#if !defined (HSI_VALUE)
|
||||
#define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz*/
|
||||
#endif /* HSI_VALUE */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32G4xx_System_Private_Defines
|
||||
* @{
|
||||
*/
|
||||
|
||||
/************************* Miscellaneous Configuration ************************/
|
||||
/* Note: Following vector table addresses must be defined in line with linker
|
||||
configuration. */
|
||||
/*!< Uncomment the following line if you need to relocate the vector table
|
||||
anywhere in Flash or Sram, else the vector table is kept at the automatic
|
||||
remap of boot address selected */
|
||||
/* #define USER_VECT_TAB_ADDRESS */
|
||||
|
||||
#if defined(USER_VECT_TAB_ADDRESS)
|
||||
/*!< Uncomment the following line if you need to relocate your vector Table
|
||||
in Sram else user remap will be done in Flash. */
|
||||
/* #define VECT_TAB_SRAM */
|
||||
#if defined(VECT_TAB_SRAM)
|
||||
#define VECT_TAB_BASE_ADDRESS SRAM_BASE /*!< Vector Table base address field.
|
||||
This value must be a multiple of 0x200. */
|
||||
#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
|
||||
This value must be a multiple of 0x200. */
|
||||
#else
|
||||
#define VECT_TAB_BASE_ADDRESS FLASH_BASE /*!< Vector Table base address field.
|
||||
This value must be a multiple of 0x200. */
|
||||
#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
|
||||
This value must be a multiple of 0x200. */
|
||||
#endif /* VECT_TAB_SRAM */
|
||||
#endif /* USER_VECT_TAB_ADDRESS */
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32G4xx_System_Private_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32G4xx_System_Private_Variables
|
||||
* @{
|
||||
*/
|
||||
/* The SystemCoreClock variable is updated in three ways:
|
||||
1) by calling CMSIS function SystemCoreClockUpdate()
|
||||
2) by calling HAL API function HAL_RCC_GetHCLKFreq()
|
||||
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
|
||||
Note: If you use this function to configure the system clock; then there
|
||||
is no need to call the 2 first functions listed above, since SystemCoreClock
|
||||
variable is updated automatically.
|
||||
*/
|
||||
uint32_t SystemCoreClock = HSI_VALUE;
|
||||
|
||||
const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
|
||||
const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32G4xx_System_Private_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Setup the microcontroller system.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
|
||||
void SystemInit(void)
|
||||
{
|
||||
/* FPU settings ------------------------------------------------------------*/
|
||||
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
|
||||
SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2))); /* set CP10 and CP11 Full Access */
|
||||
#endif
|
||||
|
||||
/* Configure the Vector Table location add offset address ------------------*/
|
||||
#if defined(USER_VECT_TAB_ADDRESS)
|
||||
SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
|
||||
#endif /* USER_VECT_TAB_ADDRESS */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Update SystemCoreClock variable according to Clock Register Values.
|
||||
* The SystemCoreClock variable contains the core clock (HCLK), it can
|
||||
* be used by the user application to setup the SysTick timer or configure
|
||||
* other parameters.
|
||||
*
|
||||
* @note Each time the core clock (HCLK) changes, this function must be called
|
||||
* to update SystemCoreClock variable value. Otherwise, any configuration
|
||||
* based on this variable will be incorrect.
|
||||
*
|
||||
* @note - The system frequency computed by this function is not the real
|
||||
* frequency in the chip. It is calculated based on the predefined
|
||||
* constant and the selected clock source:
|
||||
*
|
||||
* - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
|
||||
*
|
||||
* - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
|
||||
*
|
||||
* - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
|
||||
* or HSI_VALUE(*) multiplied/divided by the PLL factors.
|
||||
*
|
||||
* (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
|
||||
* 16 MHz) but the real value may vary depending on the variations
|
||||
* in voltage and temperature.
|
||||
*
|
||||
* (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
|
||||
* 24 MHz), user has to ensure that HSE_VALUE is same as the real
|
||||
* frequency of the crystal used. Otherwise, this function may
|
||||
* have wrong result.
|
||||
*
|
||||
* - The result of this function could be not correct when using fractional
|
||||
* value for HSE crystal.
|
||||
*
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void SystemCoreClockUpdate(void)
|
||||
{
|
||||
uint32_t tmp, pllvco, pllr, pllsource, pllm;
|
||||
|
||||
/* Get SYSCLK source -------------------------------------------------------*/
|
||||
switch (RCC->CFGR & RCC_CFGR_SWS)
|
||||
{
|
||||
case 0x04: /* HSI used as system clock source */
|
||||
SystemCoreClock = HSI_VALUE;
|
||||
break;
|
||||
|
||||
case 0x08: /* HSE used as system clock source */
|
||||
SystemCoreClock = HSE_VALUE;
|
||||
break;
|
||||
|
||||
case 0x0C: /* PLL used as system clock source */
|
||||
/* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
|
||||
SYSCLK = PLL_VCO / PLLR
|
||||
*/
|
||||
pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
|
||||
pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
|
||||
if (pllsource == 0x02UL) /* HSI used as PLL clock source */
|
||||
{
|
||||
pllvco = (HSI_VALUE / pllm);
|
||||
}
|
||||
else /* HSE used as PLL clock source */
|
||||
{
|
||||
pllvco = (HSE_VALUE / pllm);
|
||||
}
|
||||
pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
|
||||
pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
|
||||
SystemCoreClock = pllvco/pllr;
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
/* Compute HCLK clock frequency --------------------------------------------*/
|
||||
/* Get HCLK prescaler */
|
||||
tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
|
||||
/* HCLK clock frequency */
|
||||
SystemCoreClock >>= tmp;
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
Reference in New Issue
Block a user