Files
kicad-zone-resistance/fill_resistance
janik d183bc5fd7 Document that via capping is deliberately not modeled, with error bound
Layer-to-layer the cap (>=15 um plating per fab spec) is parallel to
the annular-ring contact, so it cannot change the DC path. In-plane the
model treats every via mouth as solid layer-thickness copper; the error
is bounded by the dilute-hole correction (~ +2x mouth-area-fraction
locally), partially offset by the unmodeled annular-ring copper, and
typically well under a few percent of total R.

Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
2026-07-15 16:11:49 +07:00
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