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After a solve, the per-layer current-density maps can be pushed into the open board as reference images on User.9..User.12 (stackup order, top first) - visible right in the editor, toggled like any layer, never plotted to gerbers. Dialog checkbox, default OFF; every push replaces all reference images on those layers. Rendering (fill_resistance/overlay.py, KiCad-free and tested headless): one pixel per grid cell, opaque over copper with the log scale lifted off the colormap's near-black bottom (dark canvas), transparent elsewhere, one pixel of half-alpha edge bleed so the overlay reaches the drawn outline instead of stopping half a cell short. Pushing lives in board_io (ReferenceImage via the IPC API, KiCad >= 10.0.1; scale = width / (pixels * 1 inch / 300 PPI), position = image center); kipy 0.7.1 swallows creation errors, so the per-item status is read from the raw CreateItemsResponse. pipeline.run takes an optional overlay callback; failures are reported, never fatal. tools/kicad_overlay_test.py pushes a fiducial alignment pattern (KiCad bbox readback verified placement to half a pixel); tools/ kicad_heatmap_overlay.py runs the whole thing headless against the open board, filtering marker rectangles of other nets' analyses via the exact copper test. Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
148 lines
9.0 KiB
Python
148 lines
9.0 KiB
Python
"""All tunable constants. v1 has no GUI dialog: edit here, re-run.
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A future version may read overrides from <project>/fill_res_config.json.
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"""
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# --- Grid sizing ---
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# Benchmarked on the VOUT+ plane (147x59 mm): R changes < 0.3% from
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# 150 um cells down to 50 um. Accuracy is feature-limited (slots/necks
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# narrower than one cell), not plane-limited - override CELL_UM_OVERRIDE
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# for boards with sub-cell slots.
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TARGET_CELLS = 2_000_000 # auto cell size aims for roughly this many cells
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HARD_MAX_CELLS = 16_000_000 # abort above this (see GridSizeError message)
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MIN_CELL_UM = 25.0 # clamp for auto cell size
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MAX_CELL_UM = 500.0
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CELL_UM_OVERRIDE: float | None = None # force a cell size, bypasses auto (not HARD_MAX)
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MARGIN_CELLS = 2 # empty guard cells around the copper bbox
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# --- Physics ---
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RHO_CU_OHM_M = 1.68e-8 # copper resistivity at 20 degC
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COPPER_THICKNESS_UM: float | None = None # None -> stackup, fallback 35.0 with warning
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FALLBACK_THICKNESS_UM = 35.0
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TEST_CURRENT_A = 1.0 # default injected current (dialog/CLI-selectable)
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VIA_PLATING_UM = 18.0 # barrel plating thickness (always plated)
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VIAS_CAPPED = True # filled + capped vias (dialog checkbox):
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# outer-layer mouths carry a CAP_PLATING_UM
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# thin copper cap, inner-layer mouths are
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# holes. False = open mouths on all layers.
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# Ring/pad copper of vias is modeled either
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# way; THT-pad copper/drills are not.
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CAP_PLATING_UM = 15.0 # cap plating thickness (fab spec)
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CAP_MAX_DRILL_MM = 0.5 # fab caps only small vias: drills above this
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# stay open even with VIAS_CAPPED
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# (dialog-settable)
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INCLUDE_SMD_PADS = True # the net's SMD pad copper conducts too (exact
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# shapes on the pad's layer): pads are the
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# junctions where traces/spokes meet, and
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# selected pad contacts get their real copper.
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# Dead-end pads are dropped as floating islands
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INCLUDE_TH_PADS = True # plated through-hole pads stitch layers too;
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# their holes are modeled solder-filled (a
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# soldered component lead), so the solder core
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# conducts in parallel with the plating
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THT_LEAD_PROTRUSION_MM = 1.5 # clipped THT lead protrusion on the side
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# opposite the component: a solder cone of
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# this height at the drill wall (tapering to
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# zero at the pad edge) wraps the lead of
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# every populated THT pad. 0 = no cones
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THT_LEAD_CLEARANCE_MM = 0.25 # hole diameter minus lead diameter (fab
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# rule): a lead cylinder of drill - this
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# conducts inside every solder-filled hole
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THT_LEAD_RHO_OHM_M = 1.68e-8 # lead material resistivity: copper leads/
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# wires; brass ~6.4e-8, phosphor bronze
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# ~1.1e-7, copper-clad steel higher - raise
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# this if your components use such leads
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SKIN_SIDES = 1 # skin-effect field config: 1 = plane facing a
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# return plane (conservative), 2 = isolated foil
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# --- Solder / mask-opening buildup ---
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INCLUDE_MASK_BUILDUP = False # OFF by default; dialog-toggleable. Zones on
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# F.Mask/B.Mask = mask openings that collect
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# solder on the pour underneath
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SOLDER_THICKNESS_UM = 50.0 # solder height over opened copper
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SOLDER_RHO_OHM_M = 1.32e-7 # SAC305, ~7.9x copper
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BUILDUP_EXTRA_CU_UM = 0.0 # optional user-added copper (busbar/wire
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# soldered into the opening); dialog-settable
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# --- Zone / layer selection ---
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INCLUDE_TRACKS = True # the net's traces (straight + arc tracks)
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# conduct together with the zone fills;
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# dialog-toggleable
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TRACK_1D_FACTOR = 3.0 # traces narrower than this many grid cells
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# become exact 1D resistor chains along their
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# centerline instead of rasterized outlines
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# (no discretization error in the trace R;
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# 0 = always rasterize)
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LAYER_HINT: str | None = None # e.g. "F.Cu" to disambiguate candidate fills
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ELECTRODE_POS_LAYER = "User.1" # rectangles on this layer mark V+ contact parts
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ELECTRODE_NEG_LAYER = "User.2" # rectangles on this layer mark V- contact parts
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ALWAYS_REFILL = False # refill zones even if KiCad says they are filled
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# --- In-KiCad result overlays (EXPERIMENTAL) ---
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PUSH_OVERLAYS = False # after solving, push the per-layer |J|
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# heatmaps into the open board as unlocked
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# reference images (editor-only, never
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# plotted); dialog-toggleable
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OVERLAY_LAYERS = ("User.9", "User.10", "User.11", "User.12")
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# copper layers map here in stackup order
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# (top first); existing reference images on
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# these layers are REPLACED on every push;
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# each must be enabled in Board Setup
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OVERLAY_ALPHA = 255 # overlay opacity over copper (0-255);
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# translucency washes out over bright
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# copper - toggle the User layer instead
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# --- Adaptive grid ---
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ADAPTIVE_CELLS = True # solve on a 2:1-balanced quadtree: fine at
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# copper boundaries/electrodes/features,
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# coarse plane interiors (dialog-toggleable).
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# With the deferred-correction pass the
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# deviation from the uniform grid is <0.03%
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# measured; untick for the reference grid
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TARGET_CELLS_ADAPTIVE = 8_000_000 # auto cell-size budget with the adaptive
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# grid: unknowns no longer scale with the
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# fine cell count, so the auto sizer picks
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# a ~2x finer h (memory-bound: masks/fields)
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ADAPTIVE_MAX_CELL_UM = 1000.0 # coarsest leaf edge length (also the
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# granularity of the potential/field maps
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# on plane interiors). The MINIMUM element
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# size is the grid cell size itself (auto /
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# dialog / CELL_UM_OVERRIDE). The guard
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# distance caps leaf growth near features
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ADAPTIVE_GUARD = 4 # a leaf of size s needs >= GUARD*s cells of
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# clearance to the nearest feature
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ADAPTIVE_CORRECTION_PASSES = 1 # deferred-correction re-solves fixing the
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# coarse-fine interface flux bias (same
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# matrix, reused factorization/AMG). 1 pass
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# cuts the raw ~0.5-2% low bias to <0.03%
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# measured; 0 disables
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# --- Solver ---
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CONTACT_MODEL = "uniform" # "uniform": conductor pressed on top injects
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# orthogonally with uniform surface density
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# (J ramps across the contact); "equipotential":
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# ideal bonded lug (Dirichlet). The two bracket
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# a real contact: R_equi <= R_real <= R_uniform.
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SPSOLVE_MAX_UNKNOWNS = 500_000 # above this, AMG-preconditioned CG (pyamg;
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# Jacobi-CG if pyamg is missing). Direct is
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# exact and fastest for small grids; measured
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# at 1.4M unknowns: spsolve 13 s / ~3 GB,
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# AMG-CG 6 s at a fraction of the memory
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AMG_TOL = 1e-10 # relative residual of the AMG-CG solve
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CG_TOL = 1e-8 # Jacobi-CG fallback (no pyamg)
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CG_MAXITER = 50_000 # CG iterations are cheap; large grids need many
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# --- Geometry ---
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ARC_TOL_FRACTION = 0.5 # arc sagitta tolerance as a fraction of cell size
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# --- Plots / output ---
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CMAP_POTENTIAL = "viridis"
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CMAP_CURRENT = "inferno"
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CMAP_POWER = "magma"
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POWER_DYNAMIC_RANGE = 1e4 # LogNorm span for the power map (power ~ J^2)
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LOG_CURRENT_SCALE = True
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CURRENT_DYNAMIC_RANGE = 1e3 # LogNorm vmin = vmax / this
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DPI = 150
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INTERACTIVE = True # False -> save PNGs only, never open windows
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OUTPUT_DIRNAME = "fill_res_results"
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