pcbs and updated cad pushed up

This commit is contained in:
Stephen Hawes
2023-03-23 11:44:13 -04:00
parent 43725d327c
commit 6616317512
27 changed files with 440 additions and 278 deletions
+31 -21
View File
@@ -1,4 +1,4 @@
(kicad_pcb (version 20211014) (generator pcbnew)
(kicad_pcb (version 20221018) (generator pcbnew)
(general
(thickness 1.6)
@@ -41,14 +41,15 @@
(pad_to_mask_clearance 0)
(pcbplotparams
(layerselection 0x00010fc_ffffffff)
(plot_on_all_layers_selection 0x0000000_00000000)
(disableapertmacros false)
(usegerberextensions false)
(usegerberattributes true)
(usegerberadvancedattributes true)
(creategerberjobfile true)
(svguseinch false)
(dashed_line_dash_ratio 12.000000)
(dashed_line_gap_ratio 3.000000)
(svgprecision 6)
(excludeedgelayer true)
(plotframeref false)
(viasonmask false)
(mode 1)
@@ -70,25 +71,26 @@
(mirror false)
(drillshape 0)
(scaleselection 1)
(outputdirectory "out/rev00/")
(outputdirectory "out/rev01/")
)
)
(net 0 "")
(footprint "feeder:logo-mask" (layer "F.Cu")
(tedit 0) (tstamp 3bcd212e-7d60-45ed-93e6-ba99727bce5c)
(tstamp 3bcd212e-7d60-45ed-93e6-ba99727bce5c)
(at 2.5 -4)
(attr board_only exclude_from_pos_files exclude_from_bom)
(fp_text reference "G***" (at -6.8 0) (layer "F.SilkS") hide
(effects (font (size 1.524 1.524) (thickness 0.3)))
(effects (font (size 1.524 1.524) (thickness 0.3)))
(tstamp d3388c04-0946-424b-888f-fb390b5707dc)
)
(fp_text value "LOGO" (at 0.75 0) (layer "F.SilkS") hide
(effects (font (size 1.524 1.524) (thickness 0.3)))
(effects (font (size 1.524 1.524) (thickness 0.3)))
(tstamp ce210f58-2829-4baa-bd41-e3a6a2ff18cd)
)
(fp_poly (pts
(fp_poly
(pts
(xy 5 5)
(xy -5 5)
(xy -5 0.082884)
@@ -347,8 +349,11 @@
(xy -5 0.082884)
(xy -5 -5)
(xy 5 -5)
) (layer "F.Mask") (width 0) (fill solid) (tstamp 1268f22e-513c-45f6-b22a-81a34fd5861e))
(fp_poly (pts
)
(stroke (width 0) (type solid)) (fill solid) (layer "F.Mask") (tstamp 1268f22e-513c-45f6-b22a-81a34fd5861e))
(fp_poly
(pts
(xy 0.124383 -1.16212)
(xy 0.138097 -1.160624)
(xy 0.1556 -1.15823)
@@ -721,21 +726,26 @@
(xy 0.102177 -1.161556)
(xy 0.106804 -1.162553)
(xy 0.114079 -1.162752)
) (layer "F.Mask") (width 0) (fill solid) (tstamp 5f9fae3c-8cee-417c-a82a-540a96eec5c7))
)
(stroke (width 0) (type solid)) (fill solid) (layer "F.Mask") (tstamp 5f9fae3c-8cee-417c-a82a-540a96eec5c7))
)
(gr_rect (start 0 -7) (end 5 -1) (layer "B.Mask") (width 0.1) (fill solid) (tstamp c7313a32-9acb-4f5f-960d-cb4f7972e17b))
(gr_line (start 0 0) (end 5 0) (layer "Edge.Cuts") (width 0.1) (tstamp 5b681c77-25ce-49d8-bdaf-e79a091e461e))
(gr_line (start 0 -8) (end 0 0) (layer "Edge.Cuts") (width 0.1) (tstamp b9fde3ae-339a-4034-bd54-2839dba3ef43))
(gr_line (start 3 -7.5) (end 5 -7.5) (layer "Edge.Cuts") (width 0.1) (tstamp c622452a-f479-4323-9ad9-04db8abf27e0))
(gr_line (start 5 0) (end 5 -7.5) (layer "Edge.Cuts") (width 0.1) (tstamp c6faf540-b2b4-4eb8-b3ae-c8820f05ccf2))
(gr_line (start 0 -8) (end 2.5 -8) (layer "Edge.Cuts") (width 0.1) (tstamp da683594-5c47-4a74-95b7-db7da4d2cadd))
(gr_arc (start 3 -7.5) (mid 2.646447 -7.646447) (end 2.5 -8) (layer "Edge.Cuts") (width 0.1) (tstamp f7fd5259-72a0-49d0-b406-f8c36e16cfbb))
(gr_rect (start 0 -7) (end 5 -1)
(stroke (width 0.1) (type solid)) (fill solid) (layer "B.Mask") (tstamp c7313a32-9acb-4f5f-960d-cb4f7972e17b))
(gr_line (start 0 0) (end 5 0)
(stroke (width 0.1) (type solid)) (layer "Edge.Cuts") (tstamp 5b681c77-25ce-49d8-bdaf-e79a091e461e))
(gr_line (start 0 -8) (end 0 0)
(stroke (width 0.1) (type solid)) (layer "Edge.Cuts") (tstamp b9fde3ae-339a-4034-bd54-2839dba3ef43))
(gr_line (start 5 0) (end 5 -8)
(stroke (width 0.1) (type solid)) (layer "Edge.Cuts") (tstamp c6faf540-b2b4-4eb8-b3ae-c8820f05ccf2))
(gr_line (start 0 -8) (end 5 -8)
(stroke (width 0.1) (type solid)) (layer "Edge.Cuts") (tstamp da683594-5c47-4a74-95b7-db7da4d2cadd))
(zone (net 0) (net_name "") (layers F&B.Cu) (tstamp 6ccd810e-d903-4a6a-a236-b2ae947e0716) (hatch edge 0.508)
(zone (net 0) (net_name "") (layers "F&B.Cu") (tstamp 6ccd810e-d903-4a6a-a236-b2ae947e0716) (hatch edge 0.508)
(connect_pads (clearance 0))
(min_thickness 0.254)
(keepout (tracks not_allowed) (vias not_allowed) (pads not_allowed ) (copperpour not_allowed) (footprints allowed))
(min_thickness 0.254) (filled_areas_thickness no)
(keepout (tracks not_allowed) (vias not_allowed) (pads not_allowed) (copperpour not_allowed) (footprints allowed))
(fill (thermal_gap 0.508) (thermal_bridge_width 0.508))
(polygon
(pts
@@ -3,10 +3,12 @@
"active_layer": 44,
"active_layer_preset": "All Layers",
"auto_track_width": true,
"hidden_netclasses": [],
"hidden_nets": [],
"high_contrast_mode": 0,
"net_color_mode": 1,
"opacity": {
"images": 0.6,
"pads": 1.0,
"tracks": 1.0,
"vias": 1.0,
@@ -36,10 +38,8 @@
8,
9,
10,
11,
12,
13,
14,
15,
16,
17,
@@ -60,7 +60,9 @@
33,
34,
35,
36
36,
39,
40
],
"visible_layers": "fffffff_ffffffff",
"zone_display_mode": 0
+65 -6
View File
@@ -1,5 +1,6 @@
{
"board": {
"3dviewports": [],
"design_settings": {
"defaults": {
"board_outline_line_width": 0.09999999999999999,
@@ -56,20 +57,26 @@
"rule_severities": {
"annular_width": "error",
"clearance": "error",
"connection_width": "warning",
"copper_edge_clearance": "error",
"copper_sliver": "warning",
"courtyards_overlap": "error",
"diff_pair_gap_out_of_range": "error",
"diff_pair_uncoupled_length_too_long": "error",
"drill_out_of_range": "error",
"duplicate_footprints": "warning",
"extra_footprint": "warning",
"footprint": "error",
"footprint_type_mismatch": "error",
"hole_clearance": "error",
"hole_near_hole": "error",
"invalid_outline": "error",
"isolated_copper": "warning",
"item_on_disabled_layer": "error",
"items_not_allowed": "error",
"length_out_of_range": "error",
"lib_footprint_issues": "warning",
"lib_footprint_mismatch": "warning",
"malformed_courtyard": "error",
"microvia_drill_out_of_range": "error",
"missing_courtyard": "ignore",
@@ -79,9 +86,14 @@
"padstack": "error",
"pth_inside_courtyard": "ignore",
"shorting_items": "error",
"silk_edge_clearance": "warning",
"silk_over_copper": "warning",
"silk_overlap": "warning",
"skew_out_of_range": "error",
"solder_mask_bridge": "error",
"starved_thermal": "error",
"text_height": "warning",
"text_thickness": "warning",
"through_hole_pad_without_hole": "error",
"too_many_vias": "error",
"track_dangling": "warning",
@@ -90,7 +102,6 @@
"unconnected_items": "error",
"unresolved_variable": "error",
"via_dangling": "warning",
"zone_has_empty_net": "error",
"zones_intersect": "error"
},
"rules": {
@@ -98,26 +109,72 @@
"allow_microvias": false,
"max_error": 0.005,
"min_clearance": 0.0,
"min_connection": 0.0,
"min_copper_edge_clearance": 0.0,
"min_hole_clearance": 0.25,
"min_hole_to_hole": 0.25,
"min_microvia_diameter": 0.19999999999999998,
"min_microvia_drill": 0.09999999999999999,
"min_resolved_spokes": 2,
"min_silk_clearance": 0.0,
"min_text_height": 0.7999999999999999,
"min_text_thickness": 0.08,
"min_through_hole_diameter": 0.3,
"min_track_width": 0.19999999999999998,
"min_via_annular_width": 0.049999999999999996,
"min_via_diameter": 0.39999999999999997,
"solder_mask_clearance": 0.0,
"solder_mask_min_width": 0.0,
"solder_mask_to_copper_clearance": 0.0,
"use_height_for_length_calcs": true
},
"teardrop_options": [
{
"td_allow_use_two_tracks": true,
"td_curve_segcount": 5,
"td_on_pad_in_zone": false,
"td_onpadsmd": true,
"td_onroundshapesonly": false,
"td_ontrackend": false,
"td_onviapad": true
}
],
"teardrop_parameters": [
{
"td_curve_segcount": 0,
"td_height_ratio": 1.0,
"td_length_ratio": 0.5,
"td_maxheight": 2.0,
"td_maxlen": 1.0,
"td_target_name": "td_round_shape",
"td_width_to_size_filter_ratio": 0.9
},
{
"td_curve_segcount": 0,
"td_height_ratio": 1.0,
"td_length_ratio": 0.5,
"td_maxheight": 2.0,
"td_maxlen": 1.0,
"td_target_name": "td_rect_shape",
"td_width_to_size_filter_ratio": 0.9
},
{
"td_curve_segcount": 0,
"td_height_ratio": 1.0,
"td_length_ratio": 0.5,
"td_maxheight": 2.0,
"td_maxlen": 1.0,
"td_target_name": "td_track_end",
"td_width_to_size_filter_ratio": 0.9
}
],
"track_widths": [],
"via_dimensions": [],
"zones_allow_external_fillets": false,
"zones_use_no_outline": true
},
"layer_presets": []
"layer_presets": [],
"viewports": []
},
"boards": [],
"cvpcb": {
@@ -134,7 +191,7 @@
"net_settings": {
"classes": [
{
"bus_width": 12.0,
"bus_width": 12,
"clearance": 0.2,
"diff_pair_gap": 0.25,
"diff_pair_via_gap": 0.25,
@@ -148,13 +205,15 @@
"track_width": 0.25,
"via_diameter": 0.8,
"via_drill": 0.4,
"wire_width": 6.0
"wire_width": 6
}
],
"meta": {
"version": 2
"version": 3
},
"net_colors": null
"net_colors": null,
"netclass_assignments": null,
"netclass_patterns": []
},
"pcbnew": {
"last_paths": {