pcbs and updated cad pushed up
This commit is contained in:
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@@ -1,4 +1,4 @@
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(kicad_pcb (version 20211014) (generator pcbnew)
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(kicad_pcb (version 20221018) (generator pcbnew)
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(general
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(thickness 1.6)
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@@ -41,14 +41,15 @@
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(pad_to_mask_clearance 0)
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(pcbplotparams
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(layerselection 0x00010fc_ffffffff)
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(plot_on_all_layers_selection 0x0000000_00000000)
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(disableapertmacros false)
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(usegerberextensions false)
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(usegerberattributes true)
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(usegerberadvancedattributes true)
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(creategerberjobfile true)
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(svguseinch false)
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(dashed_line_dash_ratio 12.000000)
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(dashed_line_gap_ratio 3.000000)
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(svgprecision 6)
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(excludeedgelayer true)
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(plotframeref false)
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(viasonmask false)
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(mode 1)
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@@ -70,25 +71,26 @@
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(mirror false)
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(drillshape 0)
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(scaleselection 1)
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(outputdirectory "out/rev00/")
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(outputdirectory "out/rev01/")
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)
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)
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(net 0 "")
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(footprint "feeder:logo-mask" (layer "F.Cu")
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(tedit 0) (tstamp 3bcd212e-7d60-45ed-93e6-ba99727bce5c)
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(tstamp 3bcd212e-7d60-45ed-93e6-ba99727bce5c)
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(at 2.5 -4)
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(attr board_only exclude_from_pos_files exclude_from_bom)
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(fp_text reference "G***" (at -6.8 0) (layer "F.SilkS") hide
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(effects (font (size 1.524 1.524) (thickness 0.3)))
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(effects (font (size 1.524 1.524) (thickness 0.3)))
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(tstamp d3388c04-0946-424b-888f-fb390b5707dc)
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)
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(fp_text value "LOGO" (at 0.75 0) (layer "F.SilkS") hide
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(effects (font (size 1.524 1.524) (thickness 0.3)))
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(effects (font (size 1.524 1.524) (thickness 0.3)))
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(tstamp ce210f58-2829-4baa-bd41-e3a6a2ff18cd)
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)
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(fp_poly (pts
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(fp_poly
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(pts
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(xy 5 5)
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(xy -5 5)
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(xy -5 0.082884)
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@@ -347,8 +349,11 @@
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(xy -5 0.082884)
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(xy -5 -5)
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(xy 5 -5)
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) (layer "F.Mask") (width 0) (fill solid) (tstamp 1268f22e-513c-45f6-b22a-81a34fd5861e))
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(fp_poly (pts
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)
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(stroke (width 0) (type solid)) (fill solid) (layer "F.Mask") (tstamp 1268f22e-513c-45f6-b22a-81a34fd5861e))
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(fp_poly
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(pts
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(xy 0.124383 -1.16212)
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(xy 0.138097 -1.160624)
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(xy 0.1556 -1.15823)
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@@ -721,21 +726,26 @@
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(xy 0.102177 -1.161556)
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(xy 0.106804 -1.162553)
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(xy 0.114079 -1.162752)
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) (layer "F.Mask") (width 0) (fill solid) (tstamp 5f9fae3c-8cee-417c-a82a-540a96eec5c7))
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)
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(stroke (width 0) (type solid)) (fill solid) (layer "F.Mask") (tstamp 5f9fae3c-8cee-417c-a82a-540a96eec5c7))
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)
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(gr_rect (start 0 -7) (end 5 -1) (layer "B.Mask") (width 0.1) (fill solid) (tstamp c7313a32-9acb-4f5f-960d-cb4f7972e17b))
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(gr_line (start 0 0) (end 5 0) (layer "Edge.Cuts") (width 0.1) (tstamp 5b681c77-25ce-49d8-bdaf-e79a091e461e))
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(gr_line (start 0 -8) (end 0 0) (layer "Edge.Cuts") (width 0.1) (tstamp b9fde3ae-339a-4034-bd54-2839dba3ef43))
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(gr_line (start 3 -7.5) (end 5 -7.5) (layer "Edge.Cuts") (width 0.1) (tstamp c622452a-f479-4323-9ad9-04db8abf27e0))
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(gr_line (start 5 0) (end 5 -7.5) (layer "Edge.Cuts") (width 0.1) (tstamp c6faf540-b2b4-4eb8-b3ae-c8820f05ccf2))
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(gr_line (start 0 -8) (end 2.5 -8) (layer "Edge.Cuts") (width 0.1) (tstamp da683594-5c47-4a74-95b7-db7da4d2cadd))
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(gr_arc (start 3 -7.5) (mid 2.646447 -7.646447) (end 2.5 -8) (layer "Edge.Cuts") (width 0.1) (tstamp f7fd5259-72a0-49d0-b406-f8c36e16cfbb))
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(gr_rect (start 0 -7) (end 5 -1)
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(stroke (width 0.1) (type solid)) (fill solid) (layer "B.Mask") (tstamp c7313a32-9acb-4f5f-960d-cb4f7972e17b))
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(gr_line (start 0 0) (end 5 0)
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(stroke (width 0.1) (type solid)) (layer "Edge.Cuts") (tstamp 5b681c77-25ce-49d8-bdaf-e79a091e461e))
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(gr_line (start 0 -8) (end 0 0)
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(stroke (width 0.1) (type solid)) (layer "Edge.Cuts") (tstamp b9fde3ae-339a-4034-bd54-2839dba3ef43))
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(gr_line (start 5 0) (end 5 -8)
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(stroke (width 0.1) (type solid)) (layer "Edge.Cuts") (tstamp c6faf540-b2b4-4eb8-b3ae-c8820f05ccf2))
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(gr_line (start 0 -8) (end 5 -8)
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(stroke (width 0.1) (type solid)) (layer "Edge.Cuts") (tstamp da683594-5c47-4a74-95b7-db7da4d2cadd))
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(zone (net 0) (net_name "") (layers F&B.Cu) (tstamp 6ccd810e-d903-4a6a-a236-b2ae947e0716) (hatch edge 0.508)
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(zone (net 0) (net_name "") (layers "F&B.Cu") (tstamp 6ccd810e-d903-4a6a-a236-b2ae947e0716) (hatch edge 0.508)
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(connect_pads (clearance 0))
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(min_thickness 0.254)
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(keepout (tracks not_allowed) (vias not_allowed) (pads not_allowed ) (copperpour not_allowed) (footprints allowed))
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(min_thickness 0.254) (filled_areas_thickness no)
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(keepout (tracks not_allowed) (vias not_allowed) (pads not_allowed) (copperpour not_allowed) (footprints allowed))
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(fill (thermal_gap 0.508) (thermal_bridge_width 0.508))
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(polygon
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(pts
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@@ -3,10 +3,12 @@
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"active_layer": 44,
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"active_layer_preset": "All Layers",
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"auto_track_width": true,
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"hidden_netclasses": [],
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"hidden_nets": [],
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"high_contrast_mode": 0,
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"net_color_mode": 1,
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"opacity": {
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"images": 0.6,
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"pads": 1.0,
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"tracks": 1.0,
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"vias": 1.0,
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@@ -36,10 +38,8 @@
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8,
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9,
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10,
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11,
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12,
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13,
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14,
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15,
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16,
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17,
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@@ -60,7 +60,9 @@
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33,
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34,
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35,
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36
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36,
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39,
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40
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],
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"visible_layers": "fffffff_ffffffff",
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"zone_display_mode": 0
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@@ -1,5 +1,6 @@
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{
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"board": {
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"3dviewports": [],
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"design_settings": {
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"defaults": {
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"board_outline_line_width": 0.09999999999999999,
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@@ -56,20 +57,26 @@
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"rule_severities": {
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"annular_width": "error",
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"clearance": "error",
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"connection_width": "warning",
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"copper_edge_clearance": "error",
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"copper_sliver": "warning",
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"courtyards_overlap": "error",
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"diff_pair_gap_out_of_range": "error",
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"diff_pair_uncoupled_length_too_long": "error",
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"drill_out_of_range": "error",
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"duplicate_footprints": "warning",
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"extra_footprint": "warning",
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"footprint": "error",
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"footprint_type_mismatch": "error",
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"hole_clearance": "error",
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"hole_near_hole": "error",
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"invalid_outline": "error",
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"isolated_copper": "warning",
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"item_on_disabled_layer": "error",
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"items_not_allowed": "error",
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"length_out_of_range": "error",
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"lib_footprint_issues": "warning",
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"lib_footprint_mismatch": "warning",
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"malformed_courtyard": "error",
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"microvia_drill_out_of_range": "error",
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"missing_courtyard": "ignore",
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@@ -79,9 +86,14 @@
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"padstack": "error",
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"pth_inside_courtyard": "ignore",
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"shorting_items": "error",
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"silk_edge_clearance": "warning",
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"silk_over_copper": "warning",
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"silk_overlap": "warning",
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"skew_out_of_range": "error",
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"solder_mask_bridge": "error",
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"starved_thermal": "error",
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"text_height": "warning",
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"text_thickness": "warning",
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"through_hole_pad_without_hole": "error",
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"too_many_vias": "error",
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"track_dangling": "warning",
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@@ -90,7 +102,6 @@
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"unconnected_items": "error",
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"unresolved_variable": "error",
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"via_dangling": "warning",
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"zone_has_empty_net": "error",
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"zones_intersect": "error"
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},
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"rules": {
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@@ -98,26 +109,72 @@
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"allow_microvias": false,
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"max_error": 0.005,
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"min_clearance": 0.0,
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"min_connection": 0.0,
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"min_copper_edge_clearance": 0.0,
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"min_hole_clearance": 0.25,
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"min_hole_to_hole": 0.25,
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"min_microvia_diameter": 0.19999999999999998,
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"min_microvia_drill": 0.09999999999999999,
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"min_resolved_spokes": 2,
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"min_silk_clearance": 0.0,
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"min_text_height": 0.7999999999999999,
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"min_text_thickness": 0.08,
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"min_through_hole_diameter": 0.3,
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"min_track_width": 0.19999999999999998,
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"min_via_annular_width": 0.049999999999999996,
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"min_via_diameter": 0.39999999999999997,
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"solder_mask_clearance": 0.0,
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"solder_mask_min_width": 0.0,
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"solder_mask_to_copper_clearance": 0.0,
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"use_height_for_length_calcs": true
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},
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"teardrop_options": [
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{
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"td_allow_use_two_tracks": true,
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"td_curve_segcount": 5,
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"td_on_pad_in_zone": false,
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"td_onpadsmd": true,
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"td_onroundshapesonly": false,
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"td_ontrackend": false,
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"td_onviapad": true
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}
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],
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"teardrop_parameters": [
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{
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"td_curve_segcount": 0,
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"td_height_ratio": 1.0,
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"td_length_ratio": 0.5,
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"td_maxheight": 2.0,
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"td_maxlen": 1.0,
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"td_target_name": "td_round_shape",
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"td_width_to_size_filter_ratio": 0.9
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},
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{
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"td_curve_segcount": 0,
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"td_height_ratio": 1.0,
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"td_length_ratio": 0.5,
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"td_maxheight": 2.0,
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"td_maxlen": 1.0,
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"td_target_name": "td_rect_shape",
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"td_width_to_size_filter_ratio": 0.9
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},
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{
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"td_curve_segcount": 0,
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"td_height_ratio": 1.0,
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"td_length_ratio": 0.5,
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"td_maxheight": 2.0,
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"td_maxlen": 1.0,
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"td_target_name": "td_track_end",
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"td_width_to_size_filter_ratio": 0.9
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}
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],
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"track_widths": [],
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"via_dimensions": [],
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"zones_allow_external_fillets": false,
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"zones_use_no_outline": true
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},
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"layer_presets": []
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"layer_presets": [],
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"viewports": []
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},
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"boards": [],
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"cvpcb": {
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@@ -134,7 +191,7 @@
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"net_settings": {
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"classes": [
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{
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"bus_width": 12.0,
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"bus_width": 12,
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"clearance": 0.2,
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"diff_pair_gap": 0.25,
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"diff_pair_via_gap": 0.25,
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@@ -148,13 +205,15 @@
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"track_width": 0.25,
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"via_diameter": 0.8,
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"via_drill": 0.4,
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"wire_width": 6.0
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"wire_width": 6
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}
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],
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"meta": {
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"version": 2
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"version": 3
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},
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"net_colors": null
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"net_colors": null,
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"netclass_assignments": null,
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"netclass_patterns": []
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},
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"pcbnew": {
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"last_paths": {
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