rev06 pcb

This commit is contained in:
Stephen Hawes
2022-07-28 14:40:46 -04:00
parent e51ccdd232
commit 32e2dc15f8
34 changed files with 86072 additions and 0 deletions

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pcb/mobo/.DS_Store vendored Normal file

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pcb/mobo/.gitignore vendored Normal file
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# For PCBs designed using KiCad: https://www.kicad.org/
# Format documentation: https://kicad.org/help/file-formats/
# Temporary files
*.000
*.bak
*.bck
*.kicad_pcb-bak
*.kicad_sch-bak
*-backups
*.kicad_prl
*.sch-bak
*~
_autosave-*
*.tmp
*-save.pro
*-save.kicad_pcb
fp-info-cache
# Netlist files (exported from Eeschema)
*.net
# Autorouter files (exported from Pcbnew)
*.dsn
*.ses
# Exported BOM files
*.xml
*.csv

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pcb/mobo/config.kibot.yaml Normal file
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# Example KiPlot config file
kibot:
version: 1
filters:
- name: only_jlc_parts
comment: 'Only parts with JLC code'
type: 'generic'
include_only:
- column: 'JLCPCB'
regex: '^C\d+'
- name: fix_rotation
comment: 'Adjust rotation for JLC'
type: rot_footprint
rotations:
- ["^TI_SO-", 270.0]
- ["^SO-", 270.0]
- ["^HTSSOP-", 270.0]
- ["^OnSemi_CASE100CY", 90.0]
global:
variant: default
variants:
- name: default
comment: 'Just a place holder for the rotation filter'
type: kibom
variant: default
- name: jlcpcb
comment: 'JLCPCB requires some rotational transforms'
type: kibom
variant: jlcpcb
pre_transform: fix_rotation
- name: vcnt2020
comment: 'JLCPCB requires some rotation transforms + BOM exclusions'
type: kibom
variant: VCNT2020
pre_transform: fix_rotation
file_id: '_VCNT2020'
preflight:
# Disable ERC for now while GPereira updates these items.
run_erc: false
update_xml: true
# Disable DRC for now while GPereira updates these items.
run_drc: false
check_zone_fills: true
ignore_unconnected: false
outputs:
#- name: 'ibom'
# comment: 'Interactive Bill of Materials'
# type: ibom
# dir: ibom
- name: 'bom'
comment: 'Bill of Materials'
type: bom
dir: .
options:
csv:
hide_pcb_info: true
hide_stats_info: true
format: CSV
- name: 'bom_vcnt2020'
comment: 'Bill of Materials'
type: bom
dir: .
options:
csv:
hide_pcb_info: true
hide_stats_info: true
format: CSV
variant: vcnt2020
- name: 'html_bom'
comment: 'HTML BOM'
type: bom
dir: .
options:
html:
datasheet_as_link: Datasheet
digikey_link: Digikey
title: 'Index MOBO Bill of Materials'
- name: 'print_sch'
comment: "Print schematic (PDF)"
type: pdf_sch_print
dir: .
options:
output: Schematic.pdf
- name: 'print_sch_vcnt2020'
comment: "Print schematic (PDF, VCNT2020 Variant)"
type: pdf_sch_print
dir: .
options:
output: Schematic_vcnt2020.pdf
variant: vcnt2020
- name: 'print_front'
comment: "Print F.Cu+Dwgs.User"
type: pdf_pcb_print
dir: .
options:
output_name: PCB.pdf
separated: true
layers:
- layer: F.Cu
description: 'Front Copper'
- layer: B.Cu
description: 'Back Copper'
- layer: F.SilkS
description: 'Front Silk'
- layer: B.SilkS
description: 'Rear Silk'
- name: 'gerbers'
comment: "Gerbers for the board house"
type: gerber
dir: gerbers
options:
# generic layer options
exclude_edge_layer: true
exclude_pads_from_silkscreen: false
use_aux_axis_as_origin: false
plot_sheet_reference: false
plot_footprint_refs: true
plot_footprint_values: true
force_plot_invisible_refs_vals: false
tent_vias: true
# gerber options
line_width: 0.1
subtract_mask_from_silk: false
use_protel_extensions: false
gerber_precision: 4.6
create_gerber_job_file: true
use_gerber_x2_attributes: false
use_gerber_net_attributes: false
output: '%f.%i'
layers:
# When Moving to Four Layer, Set G2L and G3L as the suffixes
- layer: F.Cu
suffix: GTL
- layer: B.Cu
suffix: GBL
- layer: F.SilkS
suffix: GTO
- layer: B.SilkS
suffix: GBO
- layer: F.Mask
suffix: GTS
- layer: B.Mask
suffix: GBS
- layer: Edge.Cuts
suffix: GKO
- layer: F.Paste
suffix: GTP
- layer: B.Paste
suffix: GBP
- name: 'drill_file'
comment: 'Drill file for Board House'
type: excellon
dir: gerbers
options:
metric_units: false
pth_and_npth_single_file: true
- name: board_top
comment: "Top layer view"
type: pcbdraw
dir: .
options:
format: png
show_components: all
style:
board: '#242424'
copper: '#404040'
silk: '#ffffff'
pads: '#bfbfbf'
- name: board_bottom
comment: "Bottom layer view"
type: pcbdraw
dir: .
options:
format: png
bottom: true
show_components: all
style:
board: '#242424'
copper: '#404040'
silk: '#ffffff'
pads: '#bfbfbf'
- name: 'pick_and_place_file'
comment: 'Pick and Place Location File'
type: position
dir: gerbers
options:
format: CSV
- name: 'bom_jlc'
comment: "BoM for JLC"
type: bom
options:
output: '%f_bom_jlc.%x'
# exclude_filter: only_jlc_parts
ref_separator: ','
columns:
- field: Value
name: Comment
- field: References
name: Designator
- field: Footprint
name: Footprint
- field: JLCPCB
name: 'LCSC Part #'
csv:
hide_pcb_info: true
hide_stats_info: true
quote_all: true
- name: 'pick_and_place_jlc'
comment: 'Pick and place file, JLC style'
type: position
options:
output: '%f_cpl_jlc.%x'
format: CSV
units: millimeters
separate_files_for_front_and_back: false
only_smd: true
variant: jlcpcb
columns:
- id: Ref
name: Designator
- id: PosX
name: "Mid X"
- id: PosY
name: "Mid Y"
- id: Side
name: Layer
- id: Rot
name: Rotation
- name: 'step_file'
comment: 'STEP file generation'
type: step
dir: .

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pcb/mobo/fp-lib-table Normal file
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(fp_lib_table
(lib (name index)(type KiCad)(uri ${KIPRJMOD}/../../../lib/kicad/index.pretty)(options "")(descr ""))
)

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pcb/mobo/mobo.kicad_pcb Normal file

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pcb/mobo/mobo.kicad_pro Normal file
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{
"board": {
"design_settings": {
"defaults": {
"board_outline_line_width": 0.049999999999999996,
"copper_line_width": 0.19999999999999998,
"copper_text_italic": false,
"copper_text_size_h": 1.5,
"copper_text_size_v": 1.5,
"copper_text_thickness": 0.3,
"copper_text_upright": false,
"courtyard_line_width": 0.049999999999999996,
"dimension_precision": 4,
"dimension_units": 3,
"dimensions": {
"arrow_length": 1270000,
"extension_offset": 500000,
"keep_text_aligned": true,
"suppress_zeroes": false,
"text_position": 0,
"units_format": 1
},
"fab_line_width": 0.09999999999999999,
"fab_text_italic": false,
"fab_text_size_h": 1.0,
"fab_text_size_v": 1.0,
"fab_text_thickness": 0.15,
"fab_text_upright": false,
"other_line_width": 0.09999999999999999,
"other_text_italic": false,
"other_text_size_h": 1.0,
"other_text_size_v": 1.0,
"other_text_thickness": 0.15,
"other_text_upright": false,
"pads": {
"drill": 0.0,
"height": 0.3,
"width": 1.3
},
"silk_line_width": 0.12,
"silk_text_italic": false,
"silk_text_size_h": 1.0,
"silk_text_size_v": 1.0,
"silk_text_thickness": 0.15,
"silk_text_upright": false,
"zones": {
"45_degree_only": false,
"min_clearance": 0.19999999999999998
}
},
"diff_pair_dimensions": [
{
"gap": 0.0,
"via_gap": 0.0,
"width": 0.0
}
],
"drc_exclusions": [],
"meta": {
"filename": "board_design_settings.json",
"version": 2
},
"rule_severities": {
"annular_width": "error",
"clearance": "error",
"copper_edge_clearance": "error",
"courtyards_overlap": "error",
"diff_pair_gap_out_of_range": "error",
"diff_pair_uncoupled_length_too_long": "error",
"drill_out_of_range": "error",
"duplicate_footprints": "warning",
"extra_footprint": "warning",
"footprint_type_mismatch": "error",
"hole_clearance": "error",
"hole_near_hole": "error",
"invalid_outline": "error",
"item_on_disabled_layer": "error",
"items_not_allowed": "error",
"length_out_of_range": "error",
"malformed_courtyard": "error",
"microvia_drill_out_of_range": "error",
"missing_courtyard": "ignore",
"missing_footprint": "warning",
"net_conflict": "warning",
"npth_inside_courtyard": "ignore",
"padstack": "error",
"pth_inside_courtyard": "ignore",
"shorting_items": "error",
"silk_over_copper": "warning",
"silk_overlap": "warning",
"skew_out_of_range": "error",
"through_hole_pad_without_hole": "error",
"too_many_vias": "error",
"track_dangling": "warning",
"track_width": "error",
"tracks_crossing": "error",
"unconnected_items": "error",
"unresolved_variable": "error",
"via_dangling": "warning",
"zone_has_empty_net": "error",
"zones_intersect": "error"
},
"rule_severitieslegacy_courtyards_overlap": true,
"rule_severitieslegacy_no_courtyard_defined": false,
"rules": {
"allow_blind_buried_vias": false,
"allow_microvias": false,
"max_error": 0.005,
"min_clearance": 0.0,
"min_copper_edge_clearance": 0.024999999999999998,
"min_hole_clearance": 0.25,
"min_hole_to_hole": 0.25,
"min_microvia_diameter": 0.19999999999999998,
"min_microvia_drill": 0.09999999999999999,
"min_silk_clearance": 0.0,
"min_through_hole_diameter": 0.3,
"min_track_width": 0.19999999999999998,
"min_via_annular_width": 0.049999999999999996,
"min_via_diameter": 0.39999999999999997,
"use_height_for_length_calcs": true
},
"track_widths": [
0.0,
0.2,
0.3,
0.4,
0.5,
0.75,
1.0,
2.0
],
"via_dimensions": [
{
"diameter": 0.0,
"drill": 0.0
}
],
"zones_allow_external_fillets": false,
"zones_use_no_outline": true
},
"layer_presets": []
},
"boards": [],
"cvpcb": {
"equivalence_files": []
},
"erc": {
"erc_exclusions": [],
"meta": {
"version": 0
},
"pin_map": [
[
0,
0,
0,
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1,
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[
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],
"rule_severities": {
"bus_definition_conflict": "error",
"bus_entry_needed": "error",
"bus_label_syntax": "error",
"bus_to_bus_conflict": "error",
"bus_to_net_conflict": "error",
"different_unit_footprint": "error",
"different_unit_net": "error",
"duplicate_reference": "error",
"duplicate_sheet_names": "error",
"extra_units": "error",
"global_label_dangling": "warning",
"hier_label_mismatch": "error",
"label_dangling": "error",
"lib_symbol_issues": "warning",
"multiple_net_names": "warning",
"net_not_bus_member": "warning",
"no_connect_connected": "warning",
"no_connect_dangling": "warning",
"pin_not_connected": "error",
"pin_not_driven": "error",
"pin_to_pin": "warning",
"power_pin_not_driven": "error",
"similar_labels": "warning",
"unannotated": "error",
"unit_value_mismatch": "error",
"unresolved_variable": "error",
"wire_dangling": "error"
}
},
"libraries": {
"pinned_footprint_libs": [],
"pinned_symbol_libs": []
},
"meta": {
"filename": "mobo.kicad_pro",
"version": 1
},
"net_settings": {
"classes": [
{
"bus_width": 12.0,
"clearance": 0.15,
"diff_pair_gap": 0.25,
"diff_pair_via_gap": 0.25,
"diff_pair_width": 0.2,
"line_style": 0,
"microvia_diameter": 0.3,
"microvia_drill": 0.1,
"name": "Default",
"pcb_color": "rgba(0, 0, 0, 0.000)",
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.25,
"via_diameter": 0.8,
"via_drill": 0.4,
"wire_width": 6.0
}
],
"meta": {
"version": 2
},
"net_colors": null
},
"pcbnew": {
"last_paths": {
"gencad": "",
"idf": "",
"netlist": "mobo.net",
"specctra_dsn": "",
"step": "",
"vrml": ""
},
"page_layout_descr_file": ""
},
"schematic": {
"annotate_start_num": 0,
"drawing": {
"default_line_thickness": 6.0,
"default_text_size": 50.0,
"field_names": [],
"intersheets_ref_own_page": false,
"intersheets_ref_prefix": "",
"intersheets_ref_short": false,
"intersheets_ref_show": false,
"intersheets_ref_suffix": "",
"junction_size_choice": 3,
"label_size_ratio": 0.25,
"pin_symbol_size": 25.0,
"text_offset_ratio": 0.08
},
"legacy_lib_dir": "",
"legacy_lib_list": [],
"meta": {
"version": 1
},
"net_format_name": "Pcbnew",
"ngspice": {
"fix_include_paths": true,
"fix_passive_vals": false,
"meta": {
"version": 0
},
"model_mode": 0,
"workbook_filename": ""
},
"page_layout_descr_file": "",
"plot_directory": "",
"spice_adjust_passive_values": false,
"spice_external_command": "spice \"%I\"",
"subpart_first_id": 65,
"subpart_id_separator": 0
},
"sheets": [
[
"e502d1d5-04b0-4d4b-b5c3-8c52d09668e7",
""
]
],
"text_variables": {}
}

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pcb/mobo/mobo.kicad_sch Normal file

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pcb/mobo/rev06-B0.zip Normal file

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G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,(6.0.1-0)*
G04 #@! TF.CreationDate,2022-04-24T19:17:24-04:00*
G04 #@! TF.ProjectId,mobo,6d6f626f-2e6b-4696-9361-645f70636258,rev?*
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1,1,$1+$1,$4,$5*
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0 $2 width*
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21,1,$1,$2,0,0,$3*%
G04 Aperture macros list end*
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G04 APERTURE END LIST*
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3
pcb/mobo/sym-lib-table Normal file
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(sym_lib_table
(lib (name "index")(type "KiCad")(uri "${KIPRJMOD}/../../../lib/kicad/index.kicad_sym")(options "")(descr ""))
)