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There is nothing in this commit except for the changes made by nix-shell -p nixfmt-rfc-style --run "nixfmt ." If this has mucked up your open branches then sorry about that. You can probably nixfmt them to match before merging
This commit is contained in:
Daniel Barlow
@@ -33,16 +33,25 @@
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};
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};
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module = {pkgs, config, lib, lim, ... }:
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let firmware = pkgs.stdenv.mkDerivation {
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name = "wlan-firmware";
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phases = ["installPhase"];
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installPhase = ''
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mkdir $out
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cp ${pkgs.linux-firmware}/lib/firmware/mediatek/{mt7915,mt7615,mt7622}* $out
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'';
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};
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in {
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module =
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{
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pkgs,
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config,
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lib,
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lim,
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...
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}:
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let
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firmware = pkgs.stdenv.mkDerivation {
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name = "wlan-firmware";
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phases = [ "installPhase" ];
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installPhase = ''
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mkdir $out
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cp ${pkgs.linux-firmware}/lib/firmware/mediatek/{mt7915,mt7615,mt7622}* $out
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'';
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};
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in
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{
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imports = [
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../../modules/arch/mipsel.nix
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../../modules/outputs/tftpboot.nix
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@@ -53,273 +62,275 @@
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extraPatchPhase = ''
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${pkgs.openwrt.applyPatches.ramips}
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'';
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config = {
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# Initially taken from openwrt's ./target/linux/ramips/mt7621/config-5.15,
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# then tweaked here and there
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ARCH_32BIT_OFF_T="y";
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ARCH_HIBERNATION_POSSIBLE="y";
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||||
ARCH_KEEP_MEMBLOCK="y";
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||||
ARCH_MMAP_RND_BITS_MAX="15";
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ARCH_MMAP_RND_COMPAT_BITS_MAX="15";
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ARCH_SUSPEND_POSSIBLE="y";
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AT803X_PHY="y";
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BLK_MQ_PCI="y";
|
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BOARD_SCACHE="y";
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CEVT_R4K="y";
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||||
CLKSRC_MIPS_GIC="y";
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CLK_MT7621="y";
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||||
CLOCKSOURCE_WATCHDOG="y";
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||||
CLONE_BACKWARDS="y";
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CMDLINE_BOOL="y";
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||||
COMMON_CLK="y";
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||||
COMPAT_32BIT_TIME="y";
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CPU_GENERIC_DUMP_TLB="y";
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CPU_HAS_DIEI="y";
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CPU_HAS_PREFETCH="y";
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CPU_HAS_RIXI="y";
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CPU_HAS_SYNC="y";
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CPU_LITTLE_ENDIAN="y";
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CPU_MIPS32="y";
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CPU_MIPS32_R2="y";
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||||
CPU_MIPSR2="y";
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CPU_MIPSR2_IRQ_EI="y";
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||||
CPU_MIPSR2_IRQ_VI="y";
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||||
CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS="y";
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||||
CPU_R4K_CACHE_TLB="y";
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||||
CPU_RMAP="y";
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||||
CPU_SUPPORTS_32BIT_KERNEL="y";
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||||
CPU_SUPPORTS_HIGHMEM="y";
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||||
CPU_SUPPORTS_MSA="y";
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CRC16="y";
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||||
CRYPTO_DEFLATE="y";
|
||||
CRYPTO_HASH_INFO="y";
|
||||
CRYPTO_LIB_BLAKE2S_GENERIC="y";
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CRYPTO_LIB_POLY1305_RSIZE="2";
|
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CRYPTO_LZO="y";
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CRYPTO_ZSTD="y";
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||||
CSRC_R4K="y";
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DIMLIB="y";
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DMA_NONCOHERENT="y";
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DTB_RT_NONE="y";
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DTC="y";
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EARLY_PRINTK="y";
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FIXED_PHY="y";
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FWNODE_MDIO="y";
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FW_LOADER_PAGED_BUF="y";
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GENERIC_ATOMIC64="y";
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||||
GENERIC_CLOCKEVENTS="y";
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GENERIC_CMOS_UPDATE="y";
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||||
GENERIC_CPU_AUTOPROBE="y";
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||||
GENERIC_FIND_FIRST_BIT="y";
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||||
GENERIC_GETTIMEOFDAY="y";
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GENERIC_IOMAP="y";
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||||
GENERIC_IRQ_CHIP="y";
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GENERIC_IRQ_EFFECTIVE_AFF_MASK="y";
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GENERIC_IRQ_SHOW="y";
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GENERIC_LIB_ASHLDI3="y";
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GENERIC_LIB_ASHRDI3="y";
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GENERIC_LIB_CMPDI2="y";
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GENERIC_LIB_LSHRDI3="y";
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GENERIC_LIB_UCMPDI2="y";
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GENERIC_PCI_IOMAP="y";
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GENERIC_PHY="y";
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GENERIC_PINCONF="y";
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GENERIC_SCHED_CLOCK="y";
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||||
GENERIC_SMP_IDLE_THREAD="y";
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||||
GENERIC_TIME_VSYSCALL="y";
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GLOB="y";
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GPIOLIB_IRQCHIP="y";
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GPIO_CDEV="y";
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GPIO_GENERIC="y";
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GPIO_MT7621="y";
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GRO_CELLS="y";
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HANDLE_DOMAIN_IRQ="y";
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HARDWARE_WATCHPOINTS="y";
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HAS_DMA="y";
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HAS_IOMEM="y";
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HAS_IOPORT_MAP="y";
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I2C="y";
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I2C_ALGOBIT="y";
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I2C_BOARDINFO="y";
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I2C_CHARDEV="y";
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I2C_GPIO="y";
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I2C_MT7621="y";
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ICPLUS_PHY="y";
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IRQCHIP="y";
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IRQ_DOMAIN="y";
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IRQ_DOMAIN_HIERARCHY="y";
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IRQ_FORCED_THREADING="y";
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IRQ_MIPS_CPU="y";
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IRQ_WORK="y";
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||||
LIBFDT="y";
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||||
LOCK_DEBUGGING_SUPPORT="y";
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||||
LZO_COMPRESS="y";
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LZO_DECOMPRESS="y";
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MDIO_BUS="y";
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MDIO_DEVICE="y";
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MDIO_DEVRES="y";
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MEDIATEK_GE_PHY="y";
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MEMFD_CREATE="y";
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MFD_SYSCON="y";
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MIGRATION="y";
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MIKROTIK="y";
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MIKROTIK_RB_SYSFS="y";
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MIPS="y";
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MIPS_ASID_BITS="8";
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MIPS_ASID_SHIFT="0";
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MIPS_CLOCK_VSYSCALL="y";
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MIPS_CM="y";
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MIPS_CPC="y";
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||||
MIPS_CPS="y";
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MIPS_CPU_SCACHE="y";
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MIPS_GIC="y";
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||||
MIPS_L1_CACHE_SHIFT="5";
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MIPS_LD_CAN_LINK_VDSO="y";
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MIPS_MT="y";
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MIPS_MT_FPAFF="y";
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MIPS_MT_SMP="y";
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MIPS_NR_CPU_NR_MAP="4";
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||||
MIPS_PERF_SHARED_TC_COUNTERS="y";
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||||
MIPS_SPRAM="y";
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MODULES_USE_ELF_REL="y";
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||||
MTD_CMDLINE_PARTS="y";
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MTD_NAND_CORE="y";
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MTD_NAND_ECC="y";
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MTD_NAND_ECC_SW_HAMMING="y";
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||||
MTD_NAND_MT7621="y";
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||||
MTD_NAND_MTK_BMT="y";
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MTD_RAW_NAND="y";
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MTD_ROUTERBOOT_PARTS="y";
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MTD_SERCOMM_PARTS="y";
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||||
MTD_SPI_NOR="y";
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||||
MTD_SPLIT_FIT_FW="y";
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||||
MTD_SPLIT_MINOR_FW="y";
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MTD_SPLIT_SEAMA_FW="y";
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||||
MTD_SPLIT_TPLINK_FW="y";
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MTD_SPLIT_TRX_FW="y";
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||||
MTD_SPLIT_UIMAGE_FW="y";
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MTD_UBI="y";
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MTD_UBI_BEB_LIMIT="20";
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MTD_UBI_BLOCK="y";
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MTD_UBI_WL_THRESHOLD="4096";
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||||
MTD_VIRT_CONCAT="y";
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||||
NEED_DMA_MAP_STATE="y";
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||||
NET_DEVLINK="y";
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||||
NET_DSA="y";
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NET_DSA_MT7530="y";
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||||
NET_DSA_MT7530_MDIO="y";
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||||
NET_DSA_TAG_MTK="y";
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||||
NET_FLOW_LIMIT="y";
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||||
NET_MEDIATEK_SOC="y";
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||||
NET_SELFTESTS="y";
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||||
NET_SWITCHDEV="y";
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||||
NET_VENDOR_MEDIATEK="y";
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NO_HZ_COMMON="y";
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NO_HZ_IDLE="y";
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NR_CPUS="4";
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||||
NVMEM="y";
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||||
OF="y";
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||||
OF_ADDRESS="y";
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||||
OF_EARLY_FLATTREE="y";
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||||
OF_FLATTREE="y";
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||||
OF_GPIO="y";
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||||
OF_IRQ="y";
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||||
OF_KOBJ="y";
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||||
OF_MDIO="y";
|
||||
PAGE_POOL="y";
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||||
PAGE_POOL_STATS="y";
|
||||
PCI="y";
|
||||
PCIE_MT7621="y";
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||||
PCI_DISABLE_COMMON_QUIRKS="y";
|
||||
PCI_DOMAINS="y";
|
||||
PCI_DOMAINS_GENERIC="y";
|
||||
PCI_DRIVERS_GENERIC="y";
|
||||
PCS_MTK_LYNXI="y";
|
||||
PERF_USE_VMALLOC="y";
|
||||
PGTABLE_LEVELS="2";
|
||||
PHYLIB="y";
|
||||
PHYLINK="y";
|
||||
PHY_MT7621_PCI="y";
|
||||
PINCTRL="y";
|
||||
PINCTRL_AW9523="y";
|
||||
PINCTRL_MT7621="y";
|
||||
PINCTRL_RALINK="y";
|
||||
PINCTRL_SX150X="y";
|
||||
POWER_RESET="y";
|
||||
POWER_RESET_GPIO="y";
|
||||
POWER_SUPPLY="y";
|
||||
PTP_1588_CLOCK_OPTIONAL="y";
|
||||
QUEUED_RWLOCKS="y";
|
||||
QUEUED_SPINLOCKS="y";
|
||||
RALINK="y";
|
||||
RATIONAL="y";
|
||||
REGMAP="y";
|
||||
REGMAP_I2C="y";
|
||||
REGMAP_MMIO="y";
|
||||
REGULATOR="y";
|
||||
REGULATOR_FIXED_VOLTAGE="y";
|
||||
RESET_CONTROLLER="y";
|
||||
RFS_ACCEL="y";
|
||||
RPS="y";
|
||||
RTC_CLASS="y";
|
||||
RTC_DRV_BQ32K="y";
|
||||
RTC_DRV_PCF8563="y";
|
||||
RTC_I2C_AND_SPI="y";
|
||||
SCHED_SMT="y";
|
||||
SERIAL_8250="y";
|
||||
SERIAL_8250_CONSOLE="y";
|
||||
SERIAL_8250_NR_UARTS="3";
|
||||
SERIAL_8250_RUNTIME_UARTS="3";
|
||||
SERIAL_MCTRL_GPIO="y";
|
||||
SERIAL_OF_PLATFORM="y";
|
||||
SGL_ALLOC="y";
|
||||
SMP="y";
|
||||
SMP_UP="y";
|
||||
SOCK_RX_QUEUE_MAPPING="y";
|
||||
SOC_BUS="y";
|
||||
SOC_MT7621="y";
|
||||
SPI="y";
|
||||
SPI_MASTER="y";
|
||||
SPI_MEM="y";
|
||||
SPI_MT7621="y";
|
||||
SRCU="y";
|
||||
SWPHY="y";
|
||||
SYNC_R4K="y";
|
||||
SYSCTL_EXCEPTION_TRACE="y";
|
||||
SYS_HAS_CPU_MIPS32_R1="y";
|
||||
SYS_HAS_CPU_MIPS32_R2="y";
|
||||
SYS_HAS_EARLY_PRINTK="y";
|
||||
SYS_SUPPORTS_32BIT_KERNEL="y";
|
||||
SYS_SUPPORTS_ARBIT_HZ="y";
|
||||
SYS_SUPPORTS_HIGHMEM="y";
|
||||
SYS_SUPPORTS_HOTPLUG_CPU="y";
|
||||
SYS_SUPPORTS_LITTLE_ENDIAN="y";
|
||||
SYS_SUPPORTS_MIPS16="y";
|
||||
SYS_SUPPORTS_MIPS_CPS="y";
|
||||
SYS_SUPPORTS_MULTITHREADING="y";
|
||||
SYS_SUPPORTS_SCHED_SMT="y";
|
||||
SYS_SUPPORTS_SMP="y";
|
||||
SYS_SUPPORTS_ZBOOT="y";
|
||||
TARGET_ISA_REV="2";
|
||||
TICK_CPU_ACCOUNTING="y";
|
||||
TIMER_OF="y";
|
||||
TIMER_PROBE="y";
|
||||
TREE_RCU="y";
|
||||
TREE_SRCU="y";
|
||||
UBIFS_FS="y";
|
||||
USB_SUPPORT="y";
|
||||
USE_OF="y";
|
||||
WEAK_ORDERING="y";
|
||||
XPS="y";
|
||||
XXHASH="y";
|
||||
ZLIB_DEFLATE="y";
|
||||
ZLIB_INFLATE="y";
|
||||
ZSTD_COMPRESS="y";
|
||||
ZSTD_DECOMPRESS="y";
|
||||
} // lib.optionalAttrs (config.system.service ? watchdog) {
|
||||
RALINK_WDT = "y"; # watchdog
|
||||
MT7621_WDT = "y"; # or it might be this one
|
||||
};
|
||||
config =
|
||||
{
|
||||
# Initially taken from openwrt's ./target/linux/ramips/mt7621/config-5.15,
|
||||
# then tweaked here and there
|
||||
ARCH_32BIT_OFF_T = "y";
|
||||
ARCH_HIBERNATION_POSSIBLE = "y";
|
||||
ARCH_KEEP_MEMBLOCK = "y";
|
||||
ARCH_MMAP_RND_BITS_MAX = "15";
|
||||
ARCH_MMAP_RND_COMPAT_BITS_MAX = "15";
|
||||
ARCH_SUSPEND_POSSIBLE = "y";
|
||||
AT803X_PHY = "y";
|
||||
BLK_MQ_PCI = "y";
|
||||
BOARD_SCACHE = "y";
|
||||
CEVT_R4K = "y";
|
||||
CLKSRC_MIPS_GIC = "y";
|
||||
CLK_MT7621 = "y";
|
||||
CLOCKSOURCE_WATCHDOG = "y";
|
||||
CLONE_BACKWARDS = "y";
|
||||
CMDLINE_BOOL = "y";
|
||||
COMMON_CLK = "y";
|
||||
COMPAT_32BIT_TIME = "y";
|
||||
CPU_GENERIC_DUMP_TLB = "y";
|
||||
CPU_HAS_DIEI = "y";
|
||||
CPU_HAS_PREFETCH = "y";
|
||||
CPU_HAS_RIXI = "y";
|
||||
CPU_HAS_SYNC = "y";
|
||||
CPU_LITTLE_ENDIAN = "y";
|
||||
CPU_MIPS32 = "y";
|
||||
CPU_MIPS32_R2 = "y";
|
||||
CPU_MIPSR2 = "y";
|
||||
CPU_MIPSR2_IRQ_EI = "y";
|
||||
CPU_MIPSR2_IRQ_VI = "y";
|
||||
CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS = "y";
|
||||
CPU_R4K_CACHE_TLB = "y";
|
||||
CPU_RMAP = "y";
|
||||
CPU_SUPPORTS_32BIT_KERNEL = "y";
|
||||
CPU_SUPPORTS_HIGHMEM = "y";
|
||||
CPU_SUPPORTS_MSA = "y";
|
||||
CRC16 = "y";
|
||||
CRYPTO_DEFLATE = "y";
|
||||
CRYPTO_HASH_INFO = "y";
|
||||
CRYPTO_LIB_BLAKE2S_GENERIC = "y";
|
||||
CRYPTO_LIB_POLY1305_RSIZE = "2";
|
||||
CRYPTO_LZO = "y";
|
||||
CRYPTO_ZSTD = "y";
|
||||
CSRC_R4K = "y";
|
||||
DIMLIB = "y";
|
||||
DMA_NONCOHERENT = "y";
|
||||
DTB_RT_NONE = "y";
|
||||
DTC = "y";
|
||||
EARLY_PRINTK = "y";
|
||||
FIXED_PHY = "y";
|
||||
FWNODE_MDIO = "y";
|
||||
FW_LOADER_PAGED_BUF = "y";
|
||||
GENERIC_ATOMIC64 = "y";
|
||||
GENERIC_CLOCKEVENTS = "y";
|
||||
GENERIC_CMOS_UPDATE = "y";
|
||||
GENERIC_CPU_AUTOPROBE = "y";
|
||||
GENERIC_FIND_FIRST_BIT = "y";
|
||||
GENERIC_GETTIMEOFDAY = "y";
|
||||
GENERIC_IOMAP = "y";
|
||||
GENERIC_IRQ_CHIP = "y";
|
||||
GENERIC_IRQ_EFFECTIVE_AFF_MASK = "y";
|
||||
GENERIC_IRQ_SHOW = "y";
|
||||
GENERIC_LIB_ASHLDI3 = "y";
|
||||
GENERIC_LIB_ASHRDI3 = "y";
|
||||
GENERIC_LIB_CMPDI2 = "y";
|
||||
GENERIC_LIB_LSHRDI3 = "y";
|
||||
GENERIC_LIB_UCMPDI2 = "y";
|
||||
GENERIC_PCI_IOMAP = "y";
|
||||
GENERIC_PHY = "y";
|
||||
GENERIC_PINCONF = "y";
|
||||
GENERIC_SCHED_CLOCK = "y";
|
||||
GENERIC_SMP_IDLE_THREAD = "y";
|
||||
GENERIC_TIME_VSYSCALL = "y";
|
||||
GLOB = "y";
|
||||
GPIOLIB_IRQCHIP = "y";
|
||||
GPIO_CDEV = "y";
|
||||
GPIO_GENERIC = "y";
|
||||
GPIO_MT7621 = "y";
|
||||
GRO_CELLS = "y";
|
||||
HANDLE_DOMAIN_IRQ = "y";
|
||||
HARDWARE_WATCHPOINTS = "y";
|
||||
HAS_DMA = "y";
|
||||
HAS_IOMEM = "y";
|
||||
HAS_IOPORT_MAP = "y";
|
||||
I2C = "y";
|
||||
I2C_ALGOBIT = "y";
|
||||
I2C_BOARDINFO = "y";
|
||||
I2C_CHARDEV = "y";
|
||||
I2C_GPIO = "y";
|
||||
I2C_MT7621 = "y";
|
||||
ICPLUS_PHY = "y";
|
||||
IRQCHIP = "y";
|
||||
IRQ_DOMAIN = "y";
|
||||
IRQ_DOMAIN_HIERARCHY = "y";
|
||||
IRQ_FORCED_THREADING = "y";
|
||||
IRQ_MIPS_CPU = "y";
|
||||
IRQ_WORK = "y";
|
||||
LIBFDT = "y";
|
||||
LOCK_DEBUGGING_SUPPORT = "y";
|
||||
LZO_COMPRESS = "y";
|
||||
LZO_DECOMPRESS = "y";
|
||||
MDIO_BUS = "y";
|
||||
MDIO_DEVICE = "y";
|
||||
MDIO_DEVRES = "y";
|
||||
MEDIATEK_GE_PHY = "y";
|
||||
MEMFD_CREATE = "y";
|
||||
MFD_SYSCON = "y";
|
||||
MIGRATION = "y";
|
||||
MIKROTIK = "y";
|
||||
MIKROTIK_RB_SYSFS = "y";
|
||||
MIPS = "y";
|
||||
MIPS_ASID_BITS = "8";
|
||||
MIPS_ASID_SHIFT = "0";
|
||||
MIPS_CLOCK_VSYSCALL = "y";
|
||||
MIPS_CM = "y";
|
||||
MIPS_CPC = "y";
|
||||
MIPS_CPS = "y";
|
||||
MIPS_CPU_SCACHE = "y";
|
||||
MIPS_GIC = "y";
|
||||
MIPS_L1_CACHE_SHIFT = "5";
|
||||
MIPS_LD_CAN_LINK_VDSO = "y";
|
||||
MIPS_MT = "y";
|
||||
MIPS_MT_FPAFF = "y";
|
||||
MIPS_MT_SMP = "y";
|
||||
MIPS_NR_CPU_NR_MAP = "4";
|
||||
MIPS_PERF_SHARED_TC_COUNTERS = "y";
|
||||
MIPS_SPRAM = "y";
|
||||
MODULES_USE_ELF_REL = "y";
|
||||
MTD_CMDLINE_PARTS = "y";
|
||||
MTD_NAND_CORE = "y";
|
||||
MTD_NAND_ECC = "y";
|
||||
MTD_NAND_ECC_SW_HAMMING = "y";
|
||||
MTD_NAND_MT7621 = "y";
|
||||
MTD_NAND_MTK_BMT = "y";
|
||||
MTD_RAW_NAND = "y";
|
||||
MTD_ROUTERBOOT_PARTS = "y";
|
||||
MTD_SERCOMM_PARTS = "y";
|
||||
MTD_SPI_NOR = "y";
|
||||
MTD_SPLIT_FIT_FW = "y";
|
||||
MTD_SPLIT_MINOR_FW = "y";
|
||||
MTD_SPLIT_SEAMA_FW = "y";
|
||||
MTD_SPLIT_TPLINK_FW = "y";
|
||||
MTD_SPLIT_TRX_FW = "y";
|
||||
MTD_SPLIT_UIMAGE_FW = "y";
|
||||
MTD_UBI = "y";
|
||||
MTD_UBI_BEB_LIMIT = "20";
|
||||
MTD_UBI_BLOCK = "y";
|
||||
MTD_UBI_WL_THRESHOLD = "4096";
|
||||
MTD_VIRT_CONCAT = "y";
|
||||
NEED_DMA_MAP_STATE = "y";
|
||||
NET_DEVLINK = "y";
|
||||
NET_DSA = "y";
|
||||
NET_DSA_MT7530 = "y";
|
||||
NET_DSA_MT7530_MDIO = "y";
|
||||
NET_DSA_TAG_MTK = "y";
|
||||
NET_FLOW_LIMIT = "y";
|
||||
NET_MEDIATEK_SOC = "y";
|
||||
NET_SELFTESTS = "y";
|
||||
NET_SWITCHDEV = "y";
|
||||
NET_VENDOR_MEDIATEK = "y";
|
||||
NO_HZ_COMMON = "y";
|
||||
NO_HZ_IDLE = "y";
|
||||
NR_CPUS = "4";
|
||||
NVMEM = "y";
|
||||
OF = "y";
|
||||
OF_ADDRESS = "y";
|
||||
OF_EARLY_FLATTREE = "y";
|
||||
OF_FLATTREE = "y";
|
||||
OF_GPIO = "y";
|
||||
OF_IRQ = "y";
|
||||
OF_KOBJ = "y";
|
||||
OF_MDIO = "y";
|
||||
PAGE_POOL = "y";
|
||||
PAGE_POOL_STATS = "y";
|
||||
PCI = "y";
|
||||
PCIE_MT7621 = "y";
|
||||
PCI_DISABLE_COMMON_QUIRKS = "y";
|
||||
PCI_DOMAINS = "y";
|
||||
PCI_DOMAINS_GENERIC = "y";
|
||||
PCI_DRIVERS_GENERIC = "y";
|
||||
PCS_MTK_LYNXI = "y";
|
||||
PERF_USE_VMALLOC = "y";
|
||||
PGTABLE_LEVELS = "2";
|
||||
PHYLIB = "y";
|
||||
PHYLINK = "y";
|
||||
PHY_MT7621_PCI = "y";
|
||||
PINCTRL = "y";
|
||||
PINCTRL_AW9523 = "y";
|
||||
PINCTRL_MT7621 = "y";
|
||||
PINCTRL_RALINK = "y";
|
||||
PINCTRL_SX150X = "y";
|
||||
POWER_RESET = "y";
|
||||
POWER_RESET_GPIO = "y";
|
||||
POWER_SUPPLY = "y";
|
||||
PTP_1588_CLOCK_OPTIONAL = "y";
|
||||
QUEUED_RWLOCKS = "y";
|
||||
QUEUED_SPINLOCKS = "y";
|
||||
RALINK = "y";
|
||||
RATIONAL = "y";
|
||||
REGMAP = "y";
|
||||
REGMAP_I2C = "y";
|
||||
REGMAP_MMIO = "y";
|
||||
REGULATOR = "y";
|
||||
REGULATOR_FIXED_VOLTAGE = "y";
|
||||
RESET_CONTROLLER = "y";
|
||||
RFS_ACCEL = "y";
|
||||
RPS = "y";
|
||||
RTC_CLASS = "y";
|
||||
RTC_DRV_BQ32K = "y";
|
||||
RTC_DRV_PCF8563 = "y";
|
||||
RTC_I2C_AND_SPI = "y";
|
||||
SCHED_SMT = "y";
|
||||
SERIAL_8250 = "y";
|
||||
SERIAL_8250_CONSOLE = "y";
|
||||
SERIAL_8250_NR_UARTS = "3";
|
||||
SERIAL_8250_RUNTIME_UARTS = "3";
|
||||
SERIAL_MCTRL_GPIO = "y";
|
||||
SERIAL_OF_PLATFORM = "y";
|
||||
SGL_ALLOC = "y";
|
||||
SMP = "y";
|
||||
SMP_UP = "y";
|
||||
SOCK_RX_QUEUE_MAPPING = "y";
|
||||
SOC_BUS = "y";
|
||||
SOC_MT7621 = "y";
|
||||
SPI = "y";
|
||||
SPI_MASTER = "y";
|
||||
SPI_MEM = "y";
|
||||
SPI_MT7621 = "y";
|
||||
SRCU = "y";
|
||||
SWPHY = "y";
|
||||
SYNC_R4K = "y";
|
||||
SYSCTL_EXCEPTION_TRACE = "y";
|
||||
SYS_HAS_CPU_MIPS32_R1 = "y";
|
||||
SYS_HAS_CPU_MIPS32_R2 = "y";
|
||||
SYS_HAS_EARLY_PRINTK = "y";
|
||||
SYS_SUPPORTS_32BIT_KERNEL = "y";
|
||||
SYS_SUPPORTS_ARBIT_HZ = "y";
|
||||
SYS_SUPPORTS_HIGHMEM = "y";
|
||||
SYS_SUPPORTS_HOTPLUG_CPU = "y";
|
||||
SYS_SUPPORTS_LITTLE_ENDIAN = "y";
|
||||
SYS_SUPPORTS_MIPS16 = "y";
|
||||
SYS_SUPPORTS_MIPS_CPS = "y";
|
||||
SYS_SUPPORTS_MULTITHREADING = "y";
|
||||
SYS_SUPPORTS_SCHED_SMT = "y";
|
||||
SYS_SUPPORTS_SMP = "y";
|
||||
SYS_SUPPORTS_ZBOOT = "y";
|
||||
TARGET_ISA_REV = "2";
|
||||
TICK_CPU_ACCOUNTING = "y";
|
||||
TIMER_OF = "y";
|
||||
TIMER_PROBE = "y";
|
||||
TREE_RCU = "y";
|
||||
TREE_SRCU = "y";
|
||||
UBIFS_FS = "y";
|
||||
USB_SUPPORT = "y";
|
||||
USE_OF = "y";
|
||||
WEAK_ORDERING = "y";
|
||||
XPS = "y";
|
||||
XXHASH = "y";
|
||||
ZLIB_DEFLATE = "y";
|
||||
ZLIB_INFLATE = "y";
|
||||
ZSTD_COMPRESS = "y";
|
||||
ZSTD_DECOMPRESS = "y";
|
||||
}
|
||||
// lib.optionalAttrs (config.system.service ? watchdog) {
|
||||
RALINK_WDT = "y"; # watchdog
|
||||
MT7621_WDT = "y"; # or it might be this one
|
||||
};
|
||||
conditionalConfig = {
|
||||
WLAN = {
|
||||
MT7915E = "m";
|
||||
@@ -340,97 +351,100 @@
|
||||
};
|
||||
};
|
||||
filesystem =
|
||||
let inherit (pkgs.pseudofile) dir symlink;
|
||||
in
|
||||
dir {
|
||||
lib = dir {
|
||||
firmware = dir {
|
||||
mediatek = symlink firmware;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
hardware =
|
||||
let
|
||||
openwrt = pkgs.openwrt;
|
||||
mac80211 = pkgs.kmodloader.override {
|
||||
targets = [
|
||||
"mt7915e"
|
||||
];
|
||||
inherit (config.system.outputs) kernel;
|
||||
};
|
||||
in {
|
||||
# from OEM bootlog (openwrt wiki):
|
||||
# 4 cmdlinepart partitions found on MTD device raspi
|
||||
# Creating 4 MTD partitions on "raspi":
|
||||
# 0x000000000000-0x000000040000 : "uboot"
|
||||
# 0x000000040000-0x000000440000 : "uImage"
|
||||
# 0x000000440000-0x000000ff0000 : "rootfs"
|
||||
# 0x000000ff0000-0x000001000000 : "ART"
|
||||
# from openwrt bootlog (openwrt wiki):
|
||||
# 5 fixed-partitions partitions found on MTD device spi0.0
|
||||
# OF: Bad cell count for /palmbus@1e000000/spi@b00/flash@0/partitions
|
||||
# OF: Bad cell count for /palmbus@1e000000/spi@b00/flash@0/partitions
|
||||
# OF: Bad cell count for /palmbus@1e000000/spi@b00/flash@0/partitions
|
||||
# OF: Bad cell count for /palmbus@1e000000/spi@b00/flash@0/partitions
|
||||
# Creating 5 MTD partitions on "spi0.0":
|
||||
# 0x000000000000-0x000000040000 : "u-boot"
|
||||
# 0x000000040000-0x000000fa0000 : "firmware"
|
||||
# 2 uimage-fw partitions found on MTD device firmware
|
||||
# Creating 2 MTD partitions on "firmware":
|
||||
# 0x000000000000-0x0000002c0000 : "kernel"
|
||||
# 0x0000002c0000-0x000000f60000 : "rootfs"
|
||||
# mtd: setting mtd3 (rootfs) as root device
|
||||
# 1 squashfs-split partitions found on MTD device rootfs
|
||||
# 0x000000640000-0x000000f60000 : "rootfs_data"
|
||||
# 0x000000fa0000-0x000000fb0000 : "config"
|
||||
# 0x000000fb0000-0x000000ff0000 : "tplink"
|
||||
# 0x000000ff0000-0x000001000000 : "radio"
|
||||
flash = {
|
||||
# from the OEM bootlog 'Booting image at bc040000'
|
||||
# (0x40000 from 0xbc000000)
|
||||
address = lim.parseInt "0xbc040000";
|
||||
# 0x000000040000-0x000000fa0000
|
||||
size = lim.parseInt "0xf60000";
|
||||
# TODO: find in /proc/mtd on a running system
|
||||
eraseBlockSize = 65536;
|
||||
};
|
||||
|
||||
# since this is mentioned in the partition table as well?
|
||||
defaultOutput = "tplink-safeloader";
|
||||
# taken from openwrt sysupgrade image:
|
||||
# openwrt-23.05.2-ramips-mt7621-tplink_archer-ax23-v1-squashfs-sysupgrade.bin: u-boot legacy uImage, MIPS OpenWrt Linux-5.15.137, Linux/MIPS, OS Kernel Image (lzma), 2797386 bytes, Tue Nov 14 13:38:11 2023, Load Address: 0X80001000, Entry Point: 0X80001000, Header CRC: 0X19F74C5B, Data CRC: 0XF685563C
|
||||
loadAddress = lim.parseInt "0x80001000";
|
||||
entryPoint = lim.parseInt "0x80001000";
|
||||
rootDevice = "/dev/mtdblock3";
|
||||
dts = {
|
||||
src = "${openwrt.src}/target/linux/ramips/dts/mt7621_tplink_archer-ax23-v1.dts";
|
||||
includePaths = [
|
||||
"${openwrt.src}/target/linux/ramips/dts"
|
||||
"${config.system.outputs.kernel.modulesupport}/arch/arm64/boot/dts/mediatek/"
|
||||
];
|
||||
};
|
||||
|
||||
networkInterfaces =
|
||||
let
|
||||
inherit (config.system.service.network) link;
|
||||
in rec {
|
||||
lan1 = link.build { ifname = "lan1"; };
|
||||
lan2 = link.build { ifname = "lan2"; };
|
||||
lan3 = link.build { ifname = "lan3"; };
|
||||
lan4 = link.build { ifname = "lan4"; };
|
||||
wan = link.build { ifname = "wan"; };
|
||||
|
||||
wlan = link.build {
|
||||
ifname = "wlan0";
|
||||
dependencies = [ mac80211 ];
|
||||
};
|
||||
wlan5 = link.build {
|
||||
ifname = "wlan1";
|
||||
dependencies = [ mac80211 ];
|
||||
let
|
||||
inherit (pkgs.pseudofile) dir symlink;
|
||||
in
|
||||
dir {
|
||||
lib = dir {
|
||||
firmware = dir {
|
||||
mediatek = symlink firmware;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
hardware =
|
||||
let
|
||||
openwrt = pkgs.openwrt;
|
||||
mac80211 = pkgs.kmodloader.override {
|
||||
targets = [
|
||||
"mt7915e"
|
||||
];
|
||||
inherit (config.system.outputs) kernel;
|
||||
};
|
||||
in
|
||||
{
|
||||
# from OEM bootlog (openwrt wiki):
|
||||
# 4 cmdlinepart partitions found on MTD device raspi
|
||||
# Creating 4 MTD partitions on "raspi":
|
||||
# 0x000000000000-0x000000040000 : "uboot"
|
||||
# 0x000000040000-0x000000440000 : "uImage"
|
||||
# 0x000000440000-0x000000ff0000 : "rootfs"
|
||||
# 0x000000ff0000-0x000001000000 : "ART"
|
||||
# from openwrt bootlog (openwrt wiki):
|
||||
# 5 fixed-partitions partitions found on MTD device spi0.0
|
||||
# OF: Bad cell count for /palmbus@1e000000/spi@b00/flash@0/partitions
|
||||
# OF: Bad cell count for /palmbus@1e000000/spi@b00/flash@0/partitions
|
||||
# OF: Bad cell count for /palmbus@1e000000/spi@b00/flash@0/partitions
|
||||
# OF: Bad cell count for /palmbus@1e000000/spi@b00/flash@0/partitions
|
||||
# Creating 5 MTD partitions on "spi0.0":
|
||||
# 0x000000000000-0x000000040000 : "u-boot"
|
||||
# 0x000000040000-0x000000fa0000 : "firmware"
|
||||
# 2 uimage-fw partitions found on MTD device firmware
|
||||
# Creating 2 MTD partitions on "firmware":
|
||||
# 0x000000000000-0x0000002c0000 : "kernel"
|
||||
# 0x0000002c0000-0x000000f60000 : "rootfs"
|
||||
# mtd: setting mtd3 (rootfs) as root device
|
||||
# 1 squashfs-split partitions found on MTD device rootfs
|
||||
# 0x000000640000-0x000000f60000 : "rootfs_data"
|
||||
# 0x000000fa0000-0x000000fb0000 : "config"
|
||||
# 0x000000fb0000-0x000000ff0000 : "tplink"
|
||||
# 0x000000ff0000-0x000001000000 : "radio"
|
||||
flash = {
|
||||
# from the OEM bootlog 'Booting image at bc040000'
|
||||
# (0x40000 from 0xbc000000)
|
||||
address = lim.parseInt "0xbc040000";
|
||||
# 0x000000040000-0x000000fa0000
|
||||
size = lim.parseInt "0xf60000";
|
||||
# TODO: find in /proc/mtd on a running system
|
||||
eraseBlockSize = 65536;
|
||||
};
|
||||
|
||||
# since this is mentioned in the partition table as well?
|
||||
defaultOutput = "tplink-safeloader";
|
||||
# taken from openwrt sysupgrade image:
|
||||
# openwrt-23.05.2-ramips-mt7621-tplink_archer-ax23-v1-squashfs-sysupgrade.bin: u-boot legacy uImage, MIPS OpenWrt Linux-5.15.137, Linux/MIPS, OS Kernel Image (lzma), 2797386 bytes, Tue Nov 14 13:38:11 2023, Load Address: 0X80001000, Entry Point: 0X80001000, Header CRC: 0X19F74C5B, Data CRC: 0XF685563C
|
||||
loadAddress = lim.parseInt "0x80001000";
|
||||
entryPoint = lim.parseInt "0x80001000";
|
||||
rootDevice = "/dev/mtdblock3";
|
||||
dts = {
|
||||
src = "${openwrt.src}/target/linux/ramips/dts/mt7621_tplink_archer-ax23-v1.dts";
|
||||
includePaths = [
|
||||
"${openwrt.src}/target/linux/ramips/dts"
|
||||
"${config.system.outputs.kernel.modulesupport}/arch/arm64/boot/dts/mediatek/"
|
||||
];
|
||||
};
|
||||
|
||||
networkInterfaces =
|
||||
let
|
||||
inherit (config.system.service.network) link;
|
||||
in
|
||||
rec {
|
||||
lan1 = link.build { ifname = "lan1"; };
|
||||
lan2 = link.build { ifname = "lan2"; };
|
||||
lan3 = link.build { ifname = "lan3"; };
|
||||
lan4 = link.build { ifname = "lan4"; };
|
||||
wan = link.build { ifname = "wan"; };
|
||||
|
||||
wlan = link.build {
|
||||
ifname = "wlan0";
|
||||
dependencies = [ mac80211 ];
|
||||
};
|
||||
wlan5 = link.build {
|
||||
ifname = "wlan1";
|
||||
dependencies = [ mac80211 ];
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
}
|
||||
|
||||
Reference in New Issue
Block a user