{
    "$schema": "https://go.kicad.org/pcm/schemas/v2",
    "name": "Fill Resistance",
    "description": "DC/AC resistance of copper zone fills and traces between two contacts, single- or multi-layer with via coupling; current and power density maps.",
    "description_full": "Computes the DC or AC resistance of copper zone fills and traces between two contacts (marker rectangles on User.1/User.2 and/or selected pads/vias), single- or multi-layer: the chosen net's fills and tracks are solved as coupled finite-difference sheets linked by the net's via and through-hole-pad barrels. Selected vias/THT pads inject at the drill-wall barrel, and every populated THT hole carries its full solder joint (component lead, solder fill, one-sided pad coat and protruding-lead cone) with exact pad shapes and do-not-populate flags read from KiCad; traces narrower than the grid become exact 1D resistor chains, and an adaptive multi-resolution grid (fine at features, coarse plane interiors, deferred-corrected) keeps large boards fast.\n\nShows per-layer rasterized maps, potential, current density and power density, reports per-via currents (via ampacity) and total dissipation at a selectable test current. At a user-set frequency the exact 1D foil/barrel skin-effect correction is applied (AC results are a rigorous lower bound). PNGs, a text summary and a re-solvable geometry dump are saved per run.\n\nNote: the first load builds the plugin's Python environment (numpy, scipy, pyamg, matplotlib, PySide6) and can take several minutes.",
    "identifier": "th.co.b4l.fill-resistance",
    "type": "plugin",
    "author": {
        "name": "janik",
        "contact": {
            "email": "oltmanns@b4l.co.th"
        }
    },
    "license": "GPL-3.0-or-later",
    "resources": {
        "homepage": "https://git.b4l.co.th/B4L/kicad-zone-resistance"
    },
    "versions": [
        {
            "version": "1.1.0",
            "status": "stable",
            "kicad_version": "10.0",
            "runtime": "ipc"
        }
    ]
}