diff --git a/cad/FDM/frame-8.20260331-100905.FCBak b/cad/FDM/frame-8.20260331-101544.FCBak similarity index 98% rename from cad/FDM/frame-8.20260331-100905.FCBak rename to cad/FDM/frame-8.20260331-101544.FCBak index d899eea..48b9afc 100644 Binary files a/cad/FDM/frame-8.20260331-100905.FCBak and b/cad/FDM/frame-8.20260331-101544.FCBak differ diff --git a/cad/FDM/frame-8.FCStd b/cad/FDM/frame-8.FCStd index 48b9afc..415bbac 100644 Binary files a/cad/FDM/frame-8.FCStd and b/cad/FDM/frame-8.FCStd differ diff --git a/code/Core/Src/main.c b/code/Core/Src/main.c index 2662d23..db9b2ea 100644 --- a/code/Core/Src/main.c +++ b/code/Core/Src/main.c @@ -59,7 +59,7 @@ #define BACKWARDS_FEED_FILM_SLACK_REMOVAL_TIME 350 // ms to take up slack after backward #define BACKLASH_COMP_TENTH_MM 10 // 1mm backlash compensation #define FEED_SETTLE_TIME 50 // ms to wait for position to settle -#define FEED_POSITION_TOLERANCE 10 // encoder counts tolerance (~0.044mm) +#define FEED_POSITION_TOLERANCE 15 // encoder counts tolerance (~0.066mm) // OneWire timing (microseconds) @@ -86,6 +86,7 @@ #define FLOOR_ADDRESS_NOT_PROGRAMMED 0x00 #define FLOOR_ADDRESS_NOT_DETECTED 0xFF + // Position overflow prevention #define POSITION_OVERFLOW_THRESHOLD (INT32_MAX / 2) #define POSITION_RESET_AMOUNT (INT32_MAX / 4) @@ -168,6 +169,8 @@ uint32_t feed_timeout_time = 0; // absolute timeout for driving phase int16_t feed_distance_tenths = 0; // requested feed distance in 0.1mm uint8_t feed_direction = 1; // 1 = forward, 0 = backward int32_t feed_target_position = 0; // target encoder position for current phase +uint8_t peel_done = 1; // peel phase complete flag +uint8_t drive_done = 1; // motor reached position flag uint8_t feed_retry_count = 0; // retry counter #define FEED_RETRY_LIMIT 3 @@ -1171,7 +1174,7 @@ void HAL_TIM_PeriodElapsedCallback (TIM_HandleTypeDef * htim) int32_t brake_distance = velocity * brake_time_tenths / 10; - if (error > FEED_POSITION_TOLERANCE && (is_stopped || error > brake_distance)) + if (error >= FEED_POSITION_TOLERANCE && (is_stopped || error > brake_distance)) { set_Feeder_PWM(PWM_MAX, 1); // Full forward debug_pid_output = PWM_MAX; @@ -1282,9 +1285,12 @@ void rs485_transmit(uint8_t *data, uint16_t len) { // Turnaround delay — let controller switch to RX mode HAL_Delay(1); - // Disable receiver, transmit, re-enable receiver, re-arm DMA + // Stop DMA receive before transmitting + HAL_UART_AbortReceive(&huart2); + // Disable receiver, transmit HAL_GPIO_WritePin(USART2_NRE_GPIO_Port, USART2_NRE_Pin, GPIO_PIN_SET); // NRE high = receiver off HAL_UART_Transmit(&huart2, data, len, 100); + // Re-enable receiver and re-arm DMA HAL_GPIO_WritePin(USART2_NRE_GPIO_Port, USART2_NRE_Pin, GPIO_PIN_RESET); // NRE low = receiver on HAL_UARTEx_ReceiveToIdle_DMA(&huart2, DMA_buffer, 64); __HAL_DMA_DISABLE_IT(huart2.hdmarx, DMA_IT_HT); @@ -1787,9 +1793,10 @@ uint16_t calculate_expected_feed_time(uint8_t distance, uint8_t forward) if (forward) { // Forward: peel time + peel backoff + drive time + extra for first feed + // Report realistic expected time, not the timeout value uint16_t time = (distance * PEEL_TIME_PER_TENTH_MM) + PEEL_BACKOFF_TIME + - (distance * TIMEOUT_TIME_PER_TENTH_MM) + 200; + (distance * 10) + 200; // ~10ms per 0.1mm actual drive time return time; } else @@ -1819,12 +1826,15 @@ void start_feed(int16_t distance_tenths, uint8_t forward) if (forward) { - // Forward feed: drive both motors simultaneously - feed_state = FEED_STATE_PEEL_FORWARD; + // Forward feed: drive both motors simultaneously, tracked independently + feed_state = FEED_STATE_DRIVING; feed_state_start_time = HAL_GetTick(); + // Peel: runs for timed duration + peel_done = 0; feed_state_duration = distance_tenths * PEEL_TIME_PER_TENTH_MM; - peel_motor(1); // Peel forward - // Start feed motor at the same time + peel_motor(1); + // Drive: ISR drives toward target, state machine monitors + drive_done = 0; feed_timeout_time = HAL_GetTick() + (distance_tenths * TIMEOUT_TIME_PER_TENTH_MM) + 500; feed_target_position = total_count + tenths_to_counts(distance_tenths); target_count = feed_target_position; @@ -1853,14 +1863,7 @@ void feed_state_machine_update(void) switch (feed_state) { case FEED_STATE_PEEL_FORWARD: - // Peeling film while feed motor drives simultaneously - if (elapsed >= feed_state_duration) - { - peel_brake(); // Peel done, feed motor continues via PID - feed_state = FEED_STATE_DRIVING; - feed_state_start_time = now; - // feed_target_position and feed_timeout_time already set in start_feed - } + // Legacy: not used for forward feeds anymore break; case FEED_STATE_UNPEEL: @@ -1879,8 +1882,15 @@ void feed_state_machine_update(void) break; case FEED_STATE_DRIVING: - // Check for position reached, overshoot, and timeout + // Track peel independently: stop peel when timer expires { + if (!peel_done && elapsed >= feed_state_duration) + { + peel_brake(); + peel_done = 1; + } + + // Track drive independently: check position int32_t error = feed_target_position - total_count; int32_t abs_error = error < 0 ? -error : error; @@ -1888,27 +1898,30 @@ void feed_state_machine_update(void) // <5: none, >=5: ±5, >=10: ±10, >=20: ±20 int32_t brake_adj = abs_error >= 20 ? 20 : abs_error >= 10 ? 10 : abs_error >= 5 ? 5 : 0; - if (abs_error < FEED_POSITION_TOLERANCE) + if (!drive_done && abs_error < FEED_POSITION_TOLERANCE) { - // Position reached - fine-tune brake time based on where we stopped - if (error < 0) // overshot + // Position reached - fine-tune brake time + if (error < 0) brake_time_tenths += brake_adj; - else if (error > 0 && brake_time_tenths > brake_adj) // undershot + else if (error > 0 && brake_time_tenths > brake_adj) brake_time_tenths -= brake_adj; else if (error > 0) brake_time_tenths = 1; + drive_done = 1; + } + // Both done? Feed complete + if (peel_done && drive_done) + { if (!feed_direction) { - // Backward feed: take up slack then do final approach feed_state = FEED_STATE_SLACK_REMOVAL; feed_state_start_time = now; feed_state_duration = BACKWARDS_FEED_FILM_SLACK_REMOVAL_TIME; - peel_motor(1); // Peel forward to take up slack + peel_motor(1); } else { - // Forward feed complete feed_state = FEED_STATE_SETTLING; feed_state_start_time = now; feed_state_duration = FEED_SETTLE_TIME; diff --git a/code/Debug/Core/Src/main.cyclo b/code/Debug/Core/Src/main.cyclo index 32c5c7f..28db4f0 100644 --- a/code/Debug/Core/Src/main.cyclo +++ b/code/Debug/Core/Src/main.cyclo @@ -1,40 +1,40 @@ -../Core/Src/main.c:574:6:SystemClock_Config 3 -../Core/Src/main.c:1088:6:HAL_TIM_PeriodElapsedCallback 19 -../Core/Src/main.c:1214:6:HAL_GPIO_EXTI_Falling_Callback 5 -../Core/Src/main.c:1238:6:HAL_UARTEx_RxEventCallback 4 -../Core/Src/main.c:1259:6:HAL_UART_ErrorCallback 2 -../Core/Src/main.c:1271:6:set_LED 1 -../Core/Src/main.c:1281:6:rs485_transmit 1 -../Core/Src/main.c:1293:6:comp_crc_header 1 -../Core/Src/main.c:1632:6:update_Feeder_Target 2 -../Core/Src/main.c:1659:6:set_Feeder_PWM 2 -../Core/Src/main.c:1674:6:peel_motor 1 -../Core/Src/main.c:1679:6:peel_brake 1 -../Core/Src/main.c:1684:6:peel_ramp_update 9 -../Core/Src/main.c:1728:6:drive_continuous 2 -../Core/Src/main.c:1737:6:halt_all 1 -../Core/Src/main.c:1754:6:identify_feeder 2 -../Core/Src/main.c:1766:6:show_version 1 -../Core/Src/main.c:1776:9:tenths_to_counts 1 -../Core/Src/main.c:1785:10:calculate_expected_feed_time 2 -../Core/Src/main.c:1805:6:start_feed 3 -../Core/Src/main.c:1843:6:feed_state_machine_update 29 -../Core/Src/main.c:2036:6:handle_vendor_options 5 -../Core/Src/main.c:2094:6:onewire_delay_us 3 -../Core/Src/main.c:2114:6:onewire_drive_low 1 -../Core/Src/main.c:2119:6:onewire_release 1 -../Core/Src/main.c:2124:9:onewire_read_bit 1 -../Core/Src/main.c:2130:9:onewire_reset 1 -../Core/Src/main.c:2147:6:onewire_write_bit 2 -../Core/Src/main.c:2167:9:onewire_read_bit_slot 1 -../Core/Src/main.c:2184:6:onewire_write_byte 2 -../Core/Src/main.c:2193:9:onewire_read_byte 2 -../Core/Src/main.c:2208:9:read_floor_address 2 -../Core/Src/main.c:2238:9:write_floor_address 6 -../Core/Src/main.c:1313:6:handleRS485Message 44 -../Core/Src/main.c:2333:9:debug_itoa 6 -../Core/Src/main.c:2349:9:debug_hex8 1 -../Core/Src/main.c:2357:6:debug_output 5 -../Core/Src/main.c:2420:6:reset_position_if_needed 3 -../Core/Src/main.c:276:5:main 69 -../Core/Src/main.c:2453:6:Error_Handler 1 +../Core/Src/main.c:576:6:SystemClock_Config 3 +../Core/Src/main.c:1090:6:HAL_TIM_PeriodElapsedCallback 19 +../Core/Src/main.c:1216:6:HAL_GPIO_EXTI_Falling_Callback 5 +../Core/Src/main.c:1240:6:HAL_UARTEx_RxEventCallback 4 +../Core/Src/main.c:1261:6:HAL_UART_ErrorCallback 2 +../Core/Src/main.c:1273:6:set_LED 1 +../Core/Src/main.c:1283:6:rs485_transmit 1 +../Core/Src/main.c:1298:6:comp_crc_header 1 +../Core/Src/main.c:1637:6:update_Feeder_Target 2 +../Core/Src/main.c:1664:6:set_Feeder_PWM 2 +../Core/Src/main.c:1679:6:peel_motor 1 +../Core/Src/main.c:1684:6:peel_brake 1 +../Core/Src/main.c:1689:6:peel_ramp_update 9 +../Core/Src/main.c:1733:6:drive_continuous 2 +../Core/Src/main.c:1742:6:halt_all 1 +../Core/Src/main.c:1759:6:identify_feeder 2 +../Core/Src/main.c:1771:6:show_version 1 +../Core/Src/main.c:1781:9:tenths_to_counts 1 +../Core/Src/main.c:1790:10:calculate_expected_feed_time 2 +../Core/Src/main.c:1811:6:start_feed 3 +../Core/Src/main.c:1852:6:feed_state_machine_update 32 +../Core/Src/main.c:2048:6:handle_vendor_options 5 +../Core/Src/main.c:2106:6:onewire_delay_us 3 +../Core/Src/main.c:2126:6:onewire_drive_low 1 +../Core/Src/main.c:2131:6:onewire_release 1 +../Core/Src/main.c:2136:9:onewire_read_bit 1 +../Core/Src/main.c:2142:9:onewire_reset 1 +../Core/Src/main.c:2159:6:onewire_write_bit 2 +../Core/Src/main.c:2179:9:onewire_read_bit_slot 1 +../Core/Src/main.c:2196:6:onewire_write_byte 2 +../Core/Src/main.c:2205:9:onewire_read_byte 2 +../Core/Src/main.c:2220:9:read_floor_address 2 +../Core/Src/main.c:2250:9:write_floor_address 6 +../Core/Src/main.c:1318:6:handleRS485Message 44 +../Core/Src/main.c:2345:9:debug_itoa 6 +../Core/Src/main.c:2361:9:debug_hex8 1 +../Core/Src/main.c:2369:6:debug_output 5 +../Core/Src/main.c:2432:6:reset_position_if_needed 3 +../Core/Src/main.c:278:5:main 69 +../Core/Src/main.c:2465:6:Error_Handler 1 diff --git a/code/Debug/Core/Src/main.o b/code/Debug/Core/Src/main.o index 7d1946f..f064048 100644 Binary files a/code/Debug/Core/Src/main.o and b/code/Debug/Core/Src/main.o differ diff --git a/code/Debug/Core/Src/main.su b/code/Debug/Core/Src/main.su index e05379c..3c04482 100644 --- a/code/Debug/Core/Src/main.su +++ b/code/Debug/Core/Src/main.su @@ -1,40 +1,40 @@ -../Core/Src/main.c:574:6:SystemClock_Config 64 static,ignoring_inline_asm -../Core/Src/main.c:1088:6:HAL_TIM_PeriodElapsedCallback 24 static -../Core/Src/main.c:1214:6:HAL_GPIO_EXTI_Falling_Callback 8 static -../Core/Src/main.c:1238:6:HAL_UARTEx_RxEventCallback 16 static -../Core/Src/main.c:1259:6:HAL_UART_ErrorCallback 8 static -../Core/Src/main.c:1271:6:set_LED 16 static -../Core/Src/main.c:1281:6:rs485_transmit 16 static -../Core/Src/main.c:1293:6:comp_crc_header 16 static -../Core/Src/main.c:1632:6:update_Feeder_Target 8 static -../Core/Src/main.c:1659:6:set_Feeder_PWM 0 static -../Core/Src/main.c:1674:6:peel_motor 0 static -../Core/Src/main.c:1679:6:peel_brake 0 static -../Core/Src/main.c:1684:6:peel_ramp_update 24 static -../Core/Src/main.c:1728:6:drive_continuous 0 static -../Core/Src/main.c:1737:6:halt_all 0 static -../Core/Src/main.c:1754:6:identify_feeder 8 static -../Core/Src/main.c:1766:6:show_version 8 static -../Core/Src/main.c:1776:9:tenths_to_counts 8 static -../Core/Src/main.c:1785:10:calculate_expected_feed_time 0 static -../Core/Src/main.c:1805:6:start_feed 40 static -../Core/Src/main.c:1843:6:feed_state_machine_update 32 static -../Core/Src/main.c:2036:6:handle_vendor_options 16 static -../Core/Src/main.c:2094:6:onewire_delay_us 16 static -../Core/Src/main.c:2114:6:onewire_drive_low 0 static -../Core/Src/main.c:2119:6:onewire_release 0 static -../Core/Src/main.c:2124:9:onewire_read_bit 0 static -../Core/Src/main.c:2130:9:onewire_reset 16 static -../Core/Src/main.c:2147:6:onewire_write_bit 16 static -../Core/Src/main.c:2167:9:onewire_read_bit_slot 16 static -../Core/Src/main.c:2184:6:onewire_write_byte 16 static -../Core/Src/main.c:2193:9:onewire_read_byte 16 static -../Core/Src/main.c:2208:9:read_floor_address 8 static,ignoring_inline_asm -../Core/Src/main.c:2238:9:write_floor_address 24 static,ignoring_inline_asm -../Core/Src/main.c:1313:6:handleRS485Message 64 static -../Core/Src/main.c:2333:9:debug_itoa 48 static -../Core/Src/main.c:2349:9:debug_hex8 40 static -../Core/Src/main.c:2357:6:debug_output 32 static -../Core/Src/main.c:2420:6:reset_position_if_needed 16 static,ignoring_inline_asm -../Core/Src/main.c:276:5:main 160 static,ignoring_inline_asm -../Core/Src/main.c:2453:6:Error_Handler 0 static,ignoring_inline_asm +../Core/Src/main.c:576:6:SystemClock_Config 64 static,ignoring_inline_asm +../Core/Src/main.c:1090:6:HAL_TIM_PeriodElapsedCallback 24 static +../Core/Src/main.c:1216:6:HAL_GPIO_EXTI_Falling_Callback 8 static +../Core/Src/main.c:1240:6:HAL_UARTEx_RxEventCallback 16 static +../Core/Src/main.c:1261:6:HAL_UART_ErrorCallback 8 static +../Core/Src/main.c:1273:6:set_LED 16 static +../Core/Src/main.c:1283:6:rs485_transmit 16 static +../Core/Src/main.c:1298:6:comp_crc_header 16 static +../Core/Src/main.c:1637:6:update_Feeder_Target 8 static +../Core/Src/main.c:1664:6:set_Feeder_PWM 0 static +../Core/Src/main.c:1679:6:peel_motor 0 static +../Core/Src/main.c:1684:6:peel_brake 0 static +../Core/Src/main.c:1689:6:peel_ramp_update 24 static +../Core/Src/main.c:1733:6:drive_continuous 0 static +../Core/Src/main.c:1742:6:halt_all 0 static +../Core/Src/main.c:1759:6:identify_feeder 8 static +../Core/Src/main.c:1771:6:show_version 8 static +../Core/Src/main.c:1781:9:tenths_to_counts 8 static +../Core/Src/main.c:1790:10:calculate_expected_feed_time 0 static +../Core/Src/main.c:1811:6:start_feed 40 static +../Core/Src/main.c:1852:6:feed_state_machine_update 32 static +../Core/Src/main.c:2048:6:handle_vendor_options 16 static +../Core/Src/main.c:2106:6:onewire_delay_us 16 static +../Core/Src/main.c:2126:6:onewire_drive_low 0 static +../Core/Src/main.c:2131:6:onewire_release 0 static +../Core/Src/main.c:2136:9:onewire_read_bit 0 static +../Core/Src/main.c:2142:9:onewire_reset 16 static +../Core/Src/main.c:2159:6:onewire_write_bit 16 static +../Core/Src/main.c:2179:9:onewire_read_bit_slot 16 static +../Core/Src/main.c:2196:6:onewire_write_byte 16 static +../Core/Src/main.c:2205:9:onewire_read_byte 16 static +../Core/Src/main.c:2220:9:read_floor_address 8 static,ignoring_inline_asm +../Core/Src/main.c:2250:9:write_floor_address 24 static,ignoring_inline_asm +../Core/Src/main.c:1318:6:handleRS485Message 64 static +../Core/Src/main.c:2345:9:debug_itoa 48 static +../Core/Src/main.c:2361:9:debug_hex8 40 static +../Core/Src/main.c:2369:6:debug_output 32 static +../Core/Src/main.c:2432:6:reset_position_if_needed 16 static,ignoring_inline_asm +../Core/Src/main.c:278:5:main 160 static,ignoring_inline_asm +../Core/Src/main.c:2465:6:Error_Handler 0 static,ignoring_inline_asm diff --git a/code/Debug/feeder_mk2.elf b/code/Debug/feeder_mk2.elf index d5e1f57..2cf1c55 100644 Binary files a/code/Debug/feeder_mk2.elf and b/code/Debug/feeder_mk2.elf differ diff --git a/code/Debug/feeder_mk2.list b/code/Debug/feeder_mk2.list index d6010ff..f7d14c7 100644 --- a/code/Debug/feeder_mk2.list +++ b/code/Debug/feeder_mk2.list @@ -5,49 +5,49 @@ Sections: Idx Name Size VMA LMA File off Algn 0 .isr_vector 000000c0 08000000 08000000 00001000 2**0 CONTENTS, ALLOC, LOAD, READONLY, DATA - 1 .text 00005150 080000c0 080000c0 000010c0 2**2 + 1 .text 00005244 080000c0 080000c0 000010c0 2**2 CONTENTS, ALLOC, LOAD, READONLY, CODE - 2 .rodata 000000a8 08005210 08005210 00006210 2**2 + 2 .rodata 000000a8 08005304 08005304 00006304 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA - 3 .ARM.extab 00000000 080052b8 080052b8 00007030 2**0 + 3 .ARM.extab 00000000 080053ac 080053ac 00007034 2**0 CONTENTS, READONLY - 4 .ARM 00000008 080052b8 080052b8 000062b8 2**2 + 4 .ARM 00000008 080053ac 080053ac 000063ac 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA - 5 .preinit_array 00000000 080052c0 080052c0 00007030 2**0 + 5 .preinit_array 00000000 080053b4 080053b4 00007034 2**0 CONTENTS, ALLOC, LOAD, DATA - 6 .init_array 00000004 080052c0 080052c0 000062c0 2**2 + 6 .init_array 00000004 080053b4 080053b4 000063b4 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA - 7 .fini_array 00000004 080052c4 080052c4 000062c4 2**2 + 7 .fini_array 00000004 080053b8 080053b8 000063b8 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA - 8 .data 00000030 20000000 080052c8 00007000 2**2 + 8 .data 00000034 20000000 080053bc 00007000 2**2 CONTENTS, ALLOC, LOAD, DATA - 9 .bss 00001334 20000030 080052f8 00007030 2**2 + 9 .bss 00001334 20000034 080053f0 00007034 2**2 ALLOC - 10 ._user_heap_stack 00000604 20001364 080052f8 00007364 2**0 + 10 ._user_heap_stack 00000600 20001368 080053f0 00007368 2**0 ALLOC - 11 .ARM.attributes 00000028 00000000 00000000 00007030 2**0 + 11 .ARM.attributes 00000028 00000000 00000000 00007034 2**0 CONTENTS, READONLY - 12 .debug_info 0001b022 00000000 00000000 00007058 2**0 + 12 .debug_info 0001b071 00000000 00000000 0000705c 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 13 .debug_abbrev 00002ea9 00000000 00000000 0002207a 2**0 + 13 .debug_abbrev 00002ea9 00000000 00000000 000220cd 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 14 .debug_loclists 0000c0a2 00000000 00000000 00024f23 2**0 + 14 .debug_loclists 0000bf8f 00000000 00000000 00024f76 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 15 .debug_aranges 00000f48 00000000 00000000 00030fc8 2**3 + 15 .debug_aranges 00000f48 00000000 00000000 00030f08 2**3 CONTENTS, READONLY, DEBUGGING, OCTETS - 16 .debug_rnglists 000013d0 00000000 00000000 00031f10 2**0 + 16 .debug_rnglists 000013c2 00000000 00000000 00031e50 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 17 .debug_macro 00015b92 00000000 00000000 000332e0 2**0 + 17 .debug_macro 00015b92 00000000 00000000 00033212 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 18 .debug_line 0001a310 00000000 00000000 00048e72 2**0 + 18 .debug_line 0001a342 00000000 00000000 00048da4 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 19 .debug_str 0008ebf3 00000000 00000000 00063182 2**0 + 19 .debug_str 0008ec08 00000000 00000000 000630e6 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 20 .comment 00000043 00000000 00000000 000f1d75 2**0 + 20 .comment 00000043 00000000 00000000 000f1cee 2**0 CONTENTS, READONLY - 21 .debug_frame 00002bb0 00000000 00000000 000f1db8 2**2 + 21 .debug_frame 00002bb0 00000000 00000000 000f1d34 2**2 CONTENTS, READONLY, DEBUGGING, OCTETS - 22 .debug_line_str 0000004d 00000000 00000000 000f4968 2**0 + 22 .debug_line_str 0000004d 00000000 00000000 000f48e4 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS Disassembly of section .text: @@ -67,9 +67,9 @@ Disassembly of section .text: 80000d6: 2301 movs r3, #1 80000d8: 7023 strb r3, [r4, #0] 80000da: bd10 pop {r4, pc} - 80000dc: 20000030 .word 0x20000030 + 80000dc: 20000034 .word 0x20000034 80000e0: 00000000 .word 0x00000000 - 80000e4: 080051f8 .word 0x080051f8 + 80000e4: 080052ec .word 0x080052ec 080000e8 : 80000e8: 4b04 ldr r3, [pc, #16] @ (80000fc ) @@ -83,8 +83,8 @@ Disassembly of section .text: 80000f8: bd10 pop {r4, pc} 80000fa: 46c0 nop @ (mov r8, r8) 80000fc: 00000000 .word 0x00000000 - 8000100: 20000034 .word 0x20000034 - 8000104: 080051f8 .word 0x080051f8 + 8000100: 20000038 .word 0x20000038 + 8000104: 080052ec .word 0x080052ec 08000108 <__gnu_thumb1_case_uqi>: 8000108: b402 push {r1} @@ -970,12 +970,12 @@ void SystemClock_Config(void) 8000784: 2218 movs r2, #24 8000786: 2100 movs r1, #0 8000788: a806 add r0, sp, #24 - 800078a: f004 fcff bl 800518c + 800078a: f004 fd79 bl 8005280 RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; 800078e: 2214 movs r2, #20 8000790: 2100 movs r1, #0 8000792: 4668 mov r0, sp - 8000794: f004 fcfa bl 800518c + 8000794: f004 fd74 bl 8005280 __HAL_FLASH_SET_LATENCY(FLASH_LATENCY_1); 8000798: 4a11 ldr r2, [pc, #68] @ (80007e0 ) */ @@ -1003,7 +1003,7 @@ void SystemClock_Config(void) 80007b0: 3340 adds r3, #64 @ 0x40 80007b2: 930a str r3, [sp, #40] @ 0x28 if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) - 80007b4: f002 fdca bl 800334c + 80007b4: f002 fde4 bl 8003380 80007b8: 2800 cmp r0, #0 80007ba: d001 beq.n 80007c0 \details Disables IRQ interrupts by setting special-purpose register PRIMASK. @@ -1034,7 +1034,7 @@ void Error_Handler(void) RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK 80007cc: 9600 str r6, [sp, #0] if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK) - 80007ce: f002 ff21 bl 8003614 + 80007ce: f002 ff3b bl 8003648 80007d2: 2800 cmp r0, #0 80007d4: d001 beq.n 80007da 80007d6: b672 cpsid i @@ -1185,8 +1185,8 @@ void Error_Handler(void) 8000892: 4b3a ldr r3, [pc, #232] @ (800097c ) 8000894: 4e3a ldr r6, [pc, #232] @ (8000980 ) 8000896: 681b ldr r3, [r3, #0] - if (error > FEED_POSITION_TOLERANCE && (is_stopped || error > brake_distance)) - 8000898: 2d0a cmp r5, #10 + if (error >= FEED_POSITION_TOLERANCE && (is_stopped || error > brake_distance)) + 8000898: 2d0e cmp r5, #14 800089a: dd2e ble.n 80008fa 800089c: 2a28 cmp r2, #40 @ 0x28 800089e: d807 bhi.n 80008b0 @@ -1196,7 +1196,7 @@ void Error_Handler(void) 80008a4: 6810 ldr r0, [r2, #0] 80008a6: 4358 muls r0, r3 80008a8: f7ff fccc bl 8000244 <__divsi3> - if (error > FEED_POSITION_TOLERANCE && (is_stopped || error > brake_distance)) + if (error >= FEED_POSITION_TOLERANCE && (is_stopped || error > brake_distance)) 80008ac: 4285 cmp r5, r0 80008ae: dd2d ble.n 800090c htim1.Instance->CCR1 = PWM; @@ -1253,7 +1253,7 @@ void Error_Handler(void) 80008f6: b292 uxth r2, r2 80008f8: e7c7 b.n 800088a else if (error < -FEED_POSITION_TOLERANCE) - 80008fa: 350a adds r5, #10 + 80008fa: 350f adds r5, #15 80008fc: da06 bge.n 800090c htim1.Instance->CCR1 = 0; 80008fe: 2300 movs r3, #0 @@ -1294,33 +1294,33 @@ void Error_Handler(void) sw2_pressed = 0; 8000930: 4b1a ldr r3, [pc, #104] @ (800099c ) 8000932: e7f7 b.n 8000924 - 8000934: 20001218 .word 0x20001218 - 8000938: 200012b0 .word 0x200012b0 - 800093c: 20001264 .word 0x20001264 - 8000940: 20000f94 .word 0x20000f94 - 8000944: 20000f98 .word 0x20000f98 + 8000934: 2000121c .word 0x2000121c + 8000938: 200012b4 .word 0x200012b4 + 800093c: 20001268 .word 0x20001268 + 8000940: 20000f98 .word 0x20000f98 + 8000944: 20000f9c .word 0x20000f9c 8000948: 0000fc17 .word 0x0000fc17 - 800094c: 20000154 .word 0x20000154 - 8000950: 20000150 .word 0x20000150 + 800094c: 20000158 .word 0x20000158 + 8000950: 20000154 .word 0x20000154 8000954: e0000001 .word 0xe0000001 - 8000958: 20000104 .word 0x20000104 + 8000958: 20000108 .word 0x20000108 800095c: ffffe001 .word 0xffffe001 - 8000960: 200000e4 .word 0x200000e4 - 8000964: 20000124 .word 0x20000124 - 8000968: 2000005c .word 0x2000005c - 800096c: 20000058 .word 0x20000058 - 8000970: 20000054 .word 0x20000054 - 8000974: 20000050 .word 0x20000050 - 8000978: 2000004c .word 0x2000004c - 800097c: 20000004 .word 0x20000004 - 8000980: 2000007c .word 0x2000007c + 8000960: 200000e8 .word 0x200000e8 + 8000964: 20000128 .word 0x20000128 + 8000968: 20000060 .word 0x20000060 + 800096c: 2000005c .word 0x2000005c + 8000970: 20000058 .word 0x20000058 + 8000974: 20000054 .word 0x20000054 + 8000978: 20000050 .word 0x20000050 + 800097c: 20000008 .word 0x20000008 + 8000980: 20000080 .word 0x20000080 8000984: 1fffffff .word 0x1fffffff 8000988: 00001fff .word 0x00001fff 800098c: fffff6a0 .word 0xfffff6a0 - 8000990: 200011cc .word 0x200011cc - 8000994: 20000f9d .word 0x20000f9d - 8000998: 20001180 .word 0x20001180 - 800099c: 20000f9c .word 0x20000f9c + 8000990: 200011d0 .word 0x200011d0 + 8000994: 20000fa1 .word 0x20000fa1 + 8000998: 20001184 .word 0x20001184 + 800099c: 20000fa0 .word 0x20000fa0 080009a0 : if(GPIO_Pin == SW1_Pin) // SW1 (lower button) @@ -1356,17 +1356,17 @@ void Error_Handler(void) 80009c8: 6802 ldr r2, [r0, #0] 80009ca: 6253 str r3, [r2, #36] @ 0x24 HAL_TIM_Base_Start_IT(&htim17); - 80009cc: f003 f8ac bl 8003b28 + 80009cc: f003 f8c6 bl 8003b5c sw2_pressed = 1; 80009d0: 2301 movs r3, #1 80009d2: 7023 strb r3, [r4, #0] } 80009d4: e7ee b.n 80009b4 80009d6: 46c0 nop @ (mov r8, r8) - 80009d8: 20000f9d .word 0x20000f9d - 80009dc: 200011cc .word 0x200011cc - 80009e0: 20000f9c .word 0x20000f9c - 80009e4: 20001180 .word 0x20001180 + 80009d8: 20000fa1 .word 0x20000fa1 + 80009dc: 200011d0 .word 0x200011d0 + 80009e0: 20000fa0 .word 0x20000fa0 + 80009e4: 20001184 .word 0x20001184 080009e8 : { @@ -1395,7 +1395,7 @@ void Error_Handler(void) 8000a08: 002a movs r2, r5 8000a0a: 18c0 adds r0, r0, r3 8000a0c: 490f ldr r1, [pc, #60] @ (8000a4c ) - 8000a0e: f004 fbe9 bl 80051e4 + 8000a0e: f004 fc63 bl 80052d8 msg_buf_size[i] = Size; 8000a12: 4b0f ldr r3, [pc, #60] @ (8000a50 ) 8000a14: b2ed uxtb r5, r5 @@ -1408,7 +1408,7 @@ void Error_Handler(void) 8000a1e: 2240 movs r2, #64 @ 0x40 8000a20: 0020 movs r0, r4 8000a22: 490a ldr r1, [pc, #40] @ (8000a4c ) - 8000a24: f004 fb72 bl 800510c + 8000a24: f004 fbec bl 8005200 __HAL_DMA_DISABLE_IT(huart2.hdmarx, DMA_IT_HT); 8000a28: 2104 movs r1, #4 8000a2a: 3404 adds r4, #4 @@ -1424,12 +1424,12 @@ void Error_Handler(void) 8000a3a: 2c36 cmp r4, #54 @ 0x36 8000a3c: d1df bne.n 80009fe 8000a3e: e7ed b.n 8000a1c - 8000a40: 20000158 .word 0x20000158 - 8000a44: 20000f50 .word 0x20000f50 - 8000a48: 2000019a .word 0x2000019a - 8000a4c: 2000015a .word 0x2000015a - 8000a50: 20000f1a .word 0x20000f1a - 8000a54: 20001058 .word 0x20001058 + 8000a40: 2000015c .word 0x2000015c + 8000a44: 20000f54 .word 0x20000f54 + 8000a48: 2000019e .word 0x2000019e + 8000a4c: 2000015e .word 0x2000015e + 8000a50: 20000f1e .word 0x20000f1e + 8000a54: 2000105c .word 0x2000105c 08000a58 : if (huart->Instance == USART2) @@ -1460,7 +1460,7 @@ void Error_Handler(void) 8000a74: 6213 str r3, [r2, #32] HAL_UARTEx_ReceiveToIdle_DMA(&huart2, DMA_buffer, 64); 8000a76: 2240 movs r2, #64 @ 0x40 - 8000a78: f004 fb48 bl 800510c + 8000a78: f004 fbc2 bl 8005200 __HAL_DMA_DISABLE_IT(huart2.hdmarx, DMA_IT_HT); 8000a7c: 2104 movs r1, #4 8000a7e: 3404 adds r4, #4 @@ -1472,9 +1472,9 @@ void Error_Handler(void) } 8000a8a: bd10 pop {r4, pc} 8000a8c: 40004400 .word 0x40004400 - 8000a90: 2000007a .word 0x2000007a - 8000a94: 20001058 .word 0x20001058 - 8000a98: 2000015a .word 0x2000015a + 8000a90: 2000007e .word 0x2000007e + 8000a94: 2000105c .word 0x2000105c + 8000a98: 2000015e .word 0x2000015e 08000a9c : { @@ -1494,17 +1494,17 @@ void Error_Handler(void) 8000aae: b2c2 uxtb r2, r0 8000ab0: 2108 movs r1, #8 8000ab2: 4807 ldr r0, [pc, #28] @ (8000ad0 ) - 8000ab4: f002 fc2e bl 8003314 + 8000ab4: f002 fc48 bl 8003348 HAL_GPIO_WritePin(LED_G_GPIO_Port,LED_G_Pin,G); 8000ab8: b2ea uxtb r2, r5 8000aba: 2120 movs r1, #32 8000abc: 4804 ldr r0, [pc, #16] @ (8000ad0 ) - 8000abe: f002 fc29 bl 8003314 + 8000abe: f002 fc43 bl 8003348 HAL_GPIO_WritePin(LED_B_GPIO_Port,LED_B_Pin,B); 8000ac2: 2110 movs r1, #16 8000ac4: 4802 ldr r0, [pc, #8] @ (8000ad0 ) 8000ac6: b2e2 uxtb r2, r4 - 8000ac8: f002 fc24 bl 8003314 + 8000ac8: f002 fc3e bl 8003348 } 8000acc: bd70 pop {r4, r5, r6, pc} 8000ace: 46c0 nop @ (mov r8, r8) @@ -1519,12950 +1519,13091 @@ void Error_Handler(void) { 8000ada: 000e movs r6, r1 HAL_Delay(1); - 8000adc: f001 ff06 bl 80028ec + 8000adc: f001 ff1e bl 800291c + HAL_UART_AbortReceive(&huart2); + 8000ae0: 4c11 ldr r4, [pc, #68] @ (8000b28 ) + 8000ae2: 0020 movs r0, r4 + 8000ae4: f003 fd3c bl 8004560 HAL_GPIO_WritePin(USART2_NRE_GPIO_Port, USART2_NRE_Pin, GPIO_PIN_SET); // NRE high = receiver off - 8000ae0: 2201 movs r2, #1 - 8000ae2: 20a0 movs r0, #160 @ 0xa0 - 8000ae4: 0011 movs r1, r2 - 8000ae6: 05c0 lsls r0, r0, #23 - 8000ae8: f002 fc14 bl 8003314 + 8000ae8: 2201 movs r2, #1 + 8000aea: 20a0 movs r0, #160 @ 0xa0 + 8000aec: 0011 movs r1, r2 + 8000aee: 05c0 lsls r0, r0, #23 + 8000af0: f002 fc2a bl 8003348 HAL_UART_Transmit(&huart2, data, len, 100); - 8000aec: 4c0c ldr r4, [pc, #48] @ (8000b20 ) - 8000aee: 2364 movs r3, #100 @ 0x64 - 8000af0: 0032 movs r2, r6 - 8000af2: 0029 movs r1, r5 - 8000af4: 0020 movs r0, r4 - 8000af6: f004 f8de bl 8004cb6 + 8000af4: 2364 movs r3, #100 @ 0x64 + 8000af6: 0032 movs r2, r6 + 8000af8: 0029 movs r1, r5 + 8000afa: 0020 movs r0, r4 + 8000afc: f004 f955 bl 8004daa HAL_GPIO_WritePin(USART2_NRE_GPIO_Port, USART2_NRE_Pin, GPIO_PIN_RESET); // NRE low = receiver on - 8000afa: 20a0 movs r0, #160 @ 0xa0 - 8000afc: 2200 movs r2, #0 - 8000afe: 2101 movs r1, #1 - 8000b00: 05c0 lsls r0, r0, #23 - 8000b02: f002 fc07 bl 8003314 + 8000b00: 20a0 movs r0, #160 @ 0xa0 + 8000b02: 2200 movs r2, #0 + 8000b04: 2101 movs r1, #1 + 8000b06: 05c0 lsls r0, r0, #23 + 8000b08: f002 fc1e bl 8003348 HAL_UARTEx_ReceiveToIdle_DMA(&huart2, DMA_buffer, 64); - 8000b06: 2240 movs r2, #64 @ 0x40 - 8000b08: 0020 movs r0, r4 - 8000b0a: 4906 ldr r1, [pc, #24] @ (8000b24 ) - 8000b0c: f004 fafe bl 800510c + 8000b0c: 2240 movs r2, #64 @ 0x40 + 8000b0e: 0020 movs r0, r4 + 8000b10: 4906 ldr r1, [pc, #24] @ (8000b2c ) + 8000b12: f004 fb75 bl 8005200 __HAL_DMA_DISABLE_IT(huart2.hdmarx, DMA_IT_HT); - 8000b10: 2104 movs r1, #4 - 8000b12: 3404 adds r4, #4 - 8000b14: 6fe3 ldr r3, [r4, #124] @ 0x7c - 8000b16: 681a ldr r2, [r3, #0] - 8000b18: 6813 ldr r3, [r2, #0] - 8000b1a: 438b bics r3, r1 - 8000b1c: 6013 str r3, [r2, #0] + 8000b16: 2104 movs r1, #4 + 8000b18: 3404 adds r4, #4 + 8000b1a: 6fe3 ldr r3, [r4, #124] @ 0x7c + 8000b1c: 681a ldr r2, [r3, #0] + 8000b1e: 6813 ldr r3, [r2, #0] + 8000b20: 438b bics r3, r1 + 8000b22: 6013 str r3, [r2, #0] } - 8000b1e: bd70 pop {r4, r5, r6, pc} - 8000b20: 20001058 .word 0x20001058 - 8000b24: 2000015a .word 0x2000015a + 8000b24: bd70 pop {r4, r5, r6, pc} + 8000b26: 46c0 nop @ (mov r8, r8) + 8000b28: 2000105c .word 0x2000105c + 8000b2c: 2000015e .word 0x2000015e -08000b28 : +08000b30 : { - 8000b28: b570 push {r4, r5, r6, lr} - 8000b2a: 000d movs r5, r1 - 8000b2c: 0004 movs r4, r0 + 8000b30: b570 push {r4, r5, r6, lr} + 8000b32: 000d movs r5, r1 + 8000b34: 0004 movs r4, r0 CRC8_107_add(lcrc,lresponse->header.toAddress); - 8000b2e: 7809 ldrb r1, [r1, #0] - 8000b30: f7ff fe0c bl 800074c - CRC8_107_add(lcrc,lresponse->header.fromAddress); - 8000b34: 7869 ldrb r1, [r5, #1] - 8000b36: 0020 movs r0, r4 + 8000b36: 7809 ldrb r1, [r1, #0] 8000b38: f7ff fe08 bl 800074c - CRC8_107_add(lcrc,lresponse->header.packetId); - 8000b3c: 78a9 ldrb r1, [r5, #2] + CRC8_107_add(lcrc,lresponse->header.fromAddress); + 8000b3c: 7869 ldrb r1, [r5, #1] 8000b3e: 0020 movs r0, r4 8000b40: f7ff fe04 bl 800074c - CRC8_107_add(lcrc,lresponse->header.payloadLength); - 8000b44: 78e9 ldrb r1, [r5, #3] + CRC8_107_add(lcrc,lresponse->header.packetId); + 8000b44: 78a9 ldrb r1, [r5, #2] 8000b46: 0020 movs r0, r4 8000b48: f7ff fe00 bl 800074c + CRC8_107_add(lcrc,lresponse->header.payloadLength); + 8000b4c: 78e9 ldrb r1, [r5, #3] + 8000b4e: 0020 movs r0, r4 + 8000b50: f7ff fdfc bl 800074c } - 8000b4c: bd70 pop {r4, r5, r6, pc} + 8000b54: bd70 pop {r4, r5, r6, pc} ... -08000b50 : +08000b58 : { - 8000b50: b5f8 push {r3, r4, r5, r6, r7, lr} + 8000b58: b5f8 push {r3, r4, r5, r6, r7, lr} uint32_t now = HAL_GetTick(); - 8000b52: f001 fec5 bl 80028e0 + 8000b5a: f001 fed9 bl 8002910 uint32_t dt = now - peel_last_ramp_time; - 8000b56: 4b1d ldr r3, [pc, #116] @ (8000bcc ) - 8000b58: 681a ldr r2, [r3, #0] - 8000b5a: 1a81 subs r1, r0, r2 + 8000b5e: 4b1d ldr r3, [pc, #116] @ (8000bd4 ) + 8000b60: 681a ldr r2, [r3, #0] + 8000b62: 1a81 subs r1, r0, r2 if (dt == 0) return; - 8000b5c: 4290 cmp r0, r2 - 8000b5e: d024 beq.n 8000baa + 8000b64: 4290 cmp r0, r2 + 8000b66: d024 beq.n 8000bb2 if (peel_current_pwm == peel_target_pwm) return; - 8000b60: 4e1b ldr r6, [pc, #108] @ (8000bd0 ) + 8000b68: 4e1b ldr r6, [pc, #108] @ (8000bd8 ) peel_last_ramp_time = now; - 8000b62: 6018 str r0, [r3, #0] + 8000b6a: 6018 str r0, [r3, #0] if (peel_current_pwm == peel_target_pwm) return; - 8000b64: 2300 movs r3, #0 - 8000b66: 5ef7 ldrsh r7, [r6, r3] - 8000b68: 4b1a ldr r3, [pc, #104] @ (8000bd4 ) - 8000b6a: 2400 movs r4, #0 - 8000b6c: 5f1c ldrsh r4, [r3, r4] - 8000b6e: 42a7 cmp r7, r4 - 8000b70: d01b beq.n 8000baa + 8000b6c: 2300 movs r3, #0 + 8000b6e: 5ef7 ldrsh r7, [r6, r3] + 8000b70: 4b1a ldr r3, [pc, #104] @ (8000bdc ) + 8000b72: 2400 movs r4, #0 + 8000b74: 5f1c ldrsh r4, [r3, r4] + 8000b76: 42a7 cmp r7, r4 + 8000b78: d01b beq.n 8000bb2 int16_t step = (int16_t)((int32_t)PWM_MAX * dt / PEEL_RAMP_TIME_MS); - 8000b72: 2096 movs r0, #150 @ 0x96 - 8000b74: 0100 lsls r0, r0, #4 - 8000b76: 4348 muls r0, r1 - 8000b78: 2164 movs r1, #100 @ 0x64 - 8000b7a: f7ff fad9 bl 8000130 <__udivsi3> - 8000b7e: 1c03 adds r3, r0, #0 + 8000b7a: 2096 movs r0, #150 @ 0x96 + 8000b7c: 0100 lsls r0, r0, #4 + 8000b7e: 4348 muls r0, r1 + 8000b80: 2164 movs r1, #100 @ 0x64 + 8000b82: f7ff fad5 bl 8000130 <__udivsi3> + 8000b86: 1c03 adds r3, r0, #0 if (step < 1) step = 1; - 8000b80: b200 sxth r0, r0 + 8000b88: b200 sxth r0, r0 peel_current_pwm += step; - 8000b82: b2bd uxth r5, r7 + 8000b8a: b2bd uxth r5, r7 if (step < 1) step = 1; - 8000b84: 2800 cmp r0, #0 - 8000b86: dc00 bgt.n 8000b8a - 8000b88: 2301 movs r3, #1 + 8000b8c: 2800 cmp r0, #0 + 8000b8e: dc00 bgt.n 8000b92 + 8000b90: 2301 movs r3, #1 peel_current_pwm += step; - 8000b8a: b29b uxth r3, r3 + 8000b92: b29b uxth r3, r3 if (peel_target_pwm > peel_current_pwm) - 8000b8c: 42a7 cmp r7, r4 - 8000b8e: da0d bge.n 8000bac + 8000b94: 42a7 cmp r7, r4 + 8000b96: da0d bge.n 8000bb4 peel_current_pwm += step; - 8000b90: 18eb adds r3, r5, r3 - 8000b92: b21b sxth r3, r3 + 8000b98: 18eb adds r3, r5, r3 + 8000b9a: b21b sxth r3, r3 if (peel_current_pwm > peel_target_pwm) - 8000b94: 429c cmp r4, r3 - 8000b96: db0d blt.n 8000bb4 + 8000b9c: 429c cmp r4, r3 + 8000b9e: db0d blt.n 8000bbc if (peel_current_pwm < peel_target_pwm) - 8000b98: 001c movs r4, r3 + 8000ba0: 001c movs r4, r3 peel_current_pwm = peel_target_pwm; - 8000b9a: 8033 strh r3, [r6, #0] + 8000ba2: 8033 strh r3, [r6, #0] htim1.Instance->CCR3 = peel_current_pwm; - 8000b9c: 4b0e ldr r3, [pc, #56] @ (8000bd8 ) - 8000b9e: 681b ldr r3, [r3, #0] + 8000ba4: 4b0e ldr r3, [pc, #56] @ (8000be0 ) + 8000ba6: 681b ldr r3, [r3, #0] if (peel_current_pwm > 0) - 8000ba0: 2c00 cmp r4, #0 - 8000ba2: dd09 ble.n 8000bb8 + 8000ba8: 2c00 cmp r4, #0 + 8000baa: dd09 ble.n 8000bc0 htim1.Instance->CCR4 = 0; - 8000ba4: 2200 movs r2, #0 + 8000bac: 2200 movs r2, #0 htim1.Instance->CCR3 = peel_current_pwm; - 8000ba6: 63dc str r4, [r3, #60] @ 0x3c + 8000bae: 63dc str r4, [r3, #60] @ 0x3c htim1.Instance->CCR4 = 0; - 8000ba8: 641a str r2, [r3, #64] @ 0x40 + 8000bb0: 641a str r2, [r3, #64] @ 0x40 } - 8000baa: bdf8 pop {r3, r4, r5, r6, r7, pc} + 8000bb2: bdf8 pop {r3, r4, r5, r6, r7, pc} peel_current_pwm -= step; - 8000bac: 1aeb subs r3, r5, r3 - 8000bae: b21b sxth r3, r3 + 8000bb4: 1aeb subs r3, r5, r3 + 8000bb6: b21b sxth r3, r3 if (peel_current_pwm < peel_target_pwm) - 8000bb0: 429c cmp r4, r3 - 8000bb2: ddf1 ble.n 8000b98 - 8000bb4: 0023 movs r3, r4 - 8000bb6: e7f0 b.n 8000b9a + 8000bb8: 429c cmp r4, r3 + 8000bba: ddf1 ble.n 8000ba0 + 8000bbc: 0023 movs r3, r4 + 8000bbe: e7f0 b.n 8000ba2 else if (peel_current_pwm < 0) - 8000bb8: 2c00 cmp r4, #0 - 8000bba: d004 beq.n 8000bc6 + 8000bc0: 2c00 cmp r4, #0 + 8000bc2: d004 beq.n 8000bce htim1.Instance->CCR3 = 0; - 8000bbc: 2200 movs r2, #0 + 8000bc4: 2200 movs r2, #0 htim1.Instance->CCR4 = -peel_current_pwm; - 8000bbe: 4264 negs r4, r4 + 8000bc6: 4264 negs r4, r4 htim1.Instance->CCR3 = 0; - 8000bc0: 63da str r2, [r3, #60] @ 0x3c + 8000bc8: 63da str r2, [r3, #60] @ 0x3c htim1.Instance->CCR4 = 0; - 8000bc2: 641c str r4, [r3, #64] @ 0x40 - 8000bc4: e7f1 b.n 8000baa + 8000bca: 641c str r4, [r3, #64] @ 0x40 + 8000bcc: e7f1 b.n 8000bb2 htim1.Instance->CCR3 = 0; - 8000bc6: 63dc str r4, [r3, #60] @ 0x3c - 8000bc8: e7fb b.n 8000bc2 - 8000bca: 46c0 nop @ (mov r8, r8) - 8000bcc: 200000f8 .word 0x200000f8 - 8000bd0: 200000fc .word 0x200000fc - 8000bd4: 200000fe .word 0x200000fe - 8000bd8: 200012b0 .word 0x200012b0 + 8000bce: 63dc str r4, [r3, #60] @ 0x3c + 8000bd0: e7fb b.n 8000bca + 8000bd2: 46c0 nop @ (mov r8, r8) + 8000bd4: 200000fc .word 0x200000fc + 8000bd8: 20000100 .word 0x20000100 + 8000bdc: 20000102 .word 0x20000102 + 8000be0: 200012b4 .word 0x200012b4 -08000bdc : +08000be4 : target_count = total_count + 10000; - 8000bdc: 4b05 ldr r3, [pc, #20] @ (8000bf4 ) - 8000bde: 681a ldr r2, [r3, #0] + 8000be4: 4b05 ldr r3, [pc, #20] @ (8000bfc ) + 8000be6: 681a ldr r2, [r3, #0] target_count = total_count - 10000; - 8000be0: 4b05 ldr r3, [pc, #20] @ (8000bf8 ) - 8000be2: 18d3 adds r3, r2, r3 - if (forward) - 8000be4: 2800 cmp r0, #0 - 8000be6: d001 beq.n 8000bec - target_count = total_count + 10000; - 8000be8: 4b04 ldr r3, [pc, #16] @ (8000bfc ) + 8000be8: 4b05 ldr r3, [pc, #20] @ (8000c00 ) 8000bea: 18d3 adds r3, r2, r3 - 8000bec: 4a04 ldr r2, [pc, #16] @ (8000c00 ) -} - 8000bee: 6013 str r3, [r2, #0] - 8000bf0: 4770 bx lr - 8000bf2: 46c0 nop @ (mov r8, r8) - 8000bf4: 20000154 .word 0x20000154 - 8000bf8: ffffd8f0 .word 0xffffd8f0 - 8000bfc: 00002710 .word 0x00002710 - 8000c00: 20000150 .word 0x20000150 - -08000c04 : - htim1.Instance->CCR1 = PWM_MAX; - 8000c04: 4b09 ldr r3, [pc, #36] @ (8000c2c ) - peel_target_pwm = 0; - 8000c06: 490a ldr r1, [pc, #40] @ (8000c30 ) - htim1.Instance->CCR1 = PWM_MAX; - 8000c08: 681a ldr r2, [r3, #0] - 8000c0a: 2396 movs r3, #150 @ 0x96 - 8000c0c: 011b lsls r3, r3, #4 - 8000c0e: 6353 str r3, [r2, #52] @ 0x34 - htim1.Instance->CCR2 = PWM_MAX; - 8000c10: 6393 str r3, [r2, #56] @ 0x38 - peel_target_pwm = 0; - 8000c12: 2300 movs r3, #0 - 8000c14: 800b strh r3, [r1, #0] - peel_current_pwm = 0; - 8000c16: 4907 ldr r1, [pc, #28] @ (8000c34 ) - htim1.Instance->CCR3 = 0; - 8000c18: 63d3 str r3, [r2, #60] @ 0x3c - peel_current_pwm = 0; - 8000c1a: 800b strh r3, [r1, #0] - target_count = total_count; - 8000c1c: 4906 ldr r1, [pc, #24] @ (8000c38 ) - htim1.Instance->CCR4 = 0; - 8000c1e: 6413 str r3, [r2, #64] @ 0x40 - target_count = total_count; - 8000c20: 6809 ldr r1, [r1, #0] - 8000c22: 4a06 ldr r2, [pc, #24] @ (8000c3c ) - 8000c24: 6011 str r1, [r2, #0] - pid_add = 0; - 8000c26: 4a06 ldr r2, [pc, #24] @ (8000c40 ) - 8000c28: 6013 str r3, [r2, #0] -} - 8000c2a: 4770 bx lr - 8000c2c: 200012b0 .word 0x200012b0 - 8000c30: 200000fe .word 0x200000fe - 8000c34: 200000fc .word 0x200000fc - 8000c38: 20000154 .word 0x20000154 - 8000c3c: 20000150 .word 0x20000150 - 8000c40: 20000124 .word 0x20000124 - -08000c44 : -{ - 8000c44: b510 push {r4, lr} - 8000c46: 2403 movs r4, #3 - set_LED(1, 1, 1); - 8000c48: 2201 movs r2, #1 - 8000c4a: 0011 movs r1, r2 - 8000c4c: 0010 movs r0, r2 - 8000c4e: f7ff ff25 bl 8000a9c - HAL_Delay(300); - 8000c52: 2096 movs r0, #150 @ 0x96 - 8000c54: 0040 lsls r0, r0, #1 - 8000c56: f001 fe49 bl 80028ec - set_LED(0, 0, 0); - 8000c5a: 2200 movs r2, #0 - 8000c5c: 0010 movs r0, r2 - 8000c5e: 0011 movs r1, r2 - 8000c60: f7ff ff1c bl 8000a9c - HAL_Delay(300); - 8000c64: 2096 movs r0, #150 @ 0x96 - for (int i = 0; i < 3; i++) - 8000c66: 3c01 subs r4, #1 - HAL_Delay(300); - 8000c68: 0040 lsls r0, r0, #1 - 8000c6a: f001 fe3f bl 80028ec - for (int i = 0; i < 3; i++) - 8000c6e: 2c00 cmp r4, #0 - 8000c70: d1ea bne.n 8000c48 -} - 8000c72: bd10 pop {r4, pc} - -08000c74 : - set_LED(0, 1, 0); - 8000c74: 2200 movs r2, #0 -{ - 8000c76: b510 push {r4, lr} - set_LED(0, 1, 0); - 8000c78: 0010 movs r0, r2 - 8000c7a: 2101 movs r1, #1 - 8000c7c: f7ff ff0e bl 8000a9c - HAL_Delay(250); - 8000c80: 20fa movs r0, #250 @ 0xfa - 8000c82: f001 fe33 bl 80028ec - set_LED(0, 0, 0); - 8000c86: 2200 movs r2, #0 - 8000c88: 0010 movs r0, r2 - 8000c8a: 0011 movs r1, r2 - 8000c8c: f7ff ff06 bl 8000a9c - HAL_Delay(250); - 8000c90: 20fa movs r0, #250 @ 0xfa - 8000c92: f001 fe2b bl 80028ec -} - 8000c96: bd10 pop {r4, pc} - -08000c98 : -{ - 8000c98: b5f0 push {r4, r5, r6, r7, lr} - if (feed_state != FEED_STATE_IDLE) - 8000c9a: 4b2a ldr r3, [pc, #168] @ (8000d44 ) -{ - 8000c9c: b085 sub sp, #20 - if (feed_state != FEED_STATE_IDLE) - 8000c9e: 9301 str r3, [sp, #4] - 8000ca0: 781b ldrb r3, [r3, #0] -{ - 8000ca2: 0004 movs r4, r0 - 8000ca4: 9102 str r1, [sp, #8] - if (feed_state != FEED_STATE_IDLE) - 8000ca6: b2da uxtb r2, r3 - 8000ca8: 2b00 cmp r3, #0 - 8000caa: d13c bne.n 8000d26 - feed_in_progress = 1; - 8000cac: 2501 movs r5, #1 - feed_distance_tenths = distance_tenths; - 8000cae: 4b26 ldr r3, [pc, #152] @ (8000d48 ) - 8000cb0: 8018 strh r0, [r3, #0] - feed_direction = forward; - 8000cb2: 4b26 ldr r3, [pc, #152] @ (8000d4c ) - set_LED(1, 1, 1); // White during feed - 8000cb4: 0028 movs r0, r5 - feed_direction = forward; - 8000cb6: 7019 strb r1, [r3, #0] - feed_retry_count = 0; - 8000cb8: 4b25 ldr r3, [pc, #148] @ (8000d50 ) - set_LED(1, 1, 1); // White during feed - 8000cba: 0029 movs r1, r5 - feed_retry_count = 0; - 8000cbc: 701a strb r2, [r3, #0] - feed_in_progress = 1; - 8000cbe: 4b25 ldr r3, [pc, #148] @ (8000d54 ) - 8000cc0: 701d strb r5, [r3, #0] - last_feed_status = STATUS_OK; - 8000cc2: 4b25 ldr r3, [pc, #148] @ (8000d58 ) - 8000cc4: 701a strb r2, [r3, #0] - set_LED(1, 1, 1); // White during feed - 8000cc6: 002a movs r2, r5 - 8000cc8: f7ff fee8 bl 8000a9c if (forward) - 8000ccc: 4b23 ldr r3, [pc, #140] @ (8000d5c ) - 8000cce: 4f24 ldr r7, [pc, #144] @ (8000d60 ) - 8000cd0: 9303 str r3, [sp, #12] - 8000cd2: 9b02 ldr r3, [sp, #8] - 8000cd4: 4e23 ldr r6, [pc, #140] @ (8000d64 ) - 8000cd6: 2b00 cmp r3, #0 - 8000cd8: d027 beq.n 8000d2a - feed_state = FEED_STATE_PEEL_FORWARD; - 8000cda: 9b01 ldr r3, [sp, #4] - 8000cdc: 701d strb r5, [r3, #0] + 8000bec: 2800 cmp r0, #0 + 8000bee: d001 beq.n 8000bf4 + target_count = total_count + 10000; + 8000bf0: 4b04 ldr r3, [pc, #16] @ (8000c04 ) + 8000bf2: 18d3 adds r3, r2, r3 + 8000bf4: 4a04 ldr r2, [pc, #16] @ (8000c08 ) +} + 8000bf6: 6013 str r3, [r2, #0] + 8000bf8: 4770 bx lr + 8000bfa: 46c0 nop @ (mov r8, r8) + 8000bfc: 20000158 .word 0x20000158 + 8000c00: ffffd8f0 .word 0xffffd8f0 + 8000c04: 00002710 .word 0x00002710 + 8000c08: 20000154 .word 0x20000154 + +08000c0c : + htim1.Instance->CCR1 = PWM_MAX; + 8000c0c: 4b09 ldr r3, [pc, #36] @ (8000c34 ) + peel_target_pwm = 0; + 8000c0e: 490a ldr r1, [pc, #40] @ (8000c38 ) + htim1.Instance->CCR1 = PWM_MAX; + 8000c10: 681a ldr r2, [r3, #0] + 8000c12: 2396 movs r3, #150 @ 0x96 + 8000c14: 011b lsls r3, r3, #4 + 8000c16: 6353 str r3, [r2, #52] @ 0x34 + htim1.Instance->CCR2 = PWM_MAX; + 8000c18: 6393 str r3, [r2, #56] @ 0x38 + peel_target_pwm = 0; + 8000c1a: 2300 movs r3, #0 + 8000c1c: 800b strh r3, [r1, #0] + peel_current_pwm = 0; + 8000c1e: 4907 ldr r1, [pc, #28] @ (8000c3c ) + htim1.Instance->CCR3 = 0; + 8000c20: 63d3 str r3, [r2, #60] @ 0x3c + peel_current_pwm = 0; + 8000c22: 800b strh r3, [r1, #0] + target_count = total_count; + 8000c24: 4906 ldr r1, [pc, #24] @ (8000c40 ) + htim1.Instance->CCR4 = 0; + 8000c26: 6413 str r3, [r2, #64] @ 0x40 + target_count = total_count; + 8000c28: 6809 ldr r1, [r1, #0] + 8000c2a: 4a06 ldr r2, [pc, #24] @ (8000c44 ) + 8000c2c: 6011 str r1, [r2, #0] + pid_add = 0; + 8000c2e: 4a06 ldr r2, [pc, #24] @ (8000c48 ) + 8000c30: 6013 str r3, [r2, #0] +} + 8000c32: 4770 bx lr + 8000c34: 200012b4 .word 0x200012b4 + 8000c38: 20000102 .word 0x20000102 + 8000c3c: 20000100 .word 0x20000100 + 8000c40: 20000158 .word 0x20000158 + 8000c44: 20000154 .word 0x20000154 + 8000c48: 20000128 .word 0x20000128 + +08000c4c : +{ + 8000c4c: b510 push {r4, lr} + 8000c4e: 2403 movs r4, #3 + set_LED(1, 1, 1); + 8000c50: 2201 movs r2, #1 + 8000c52: 0011 movs r1, r2 + 8000c54: 0010 movs r0, r2 + 8000c56: f7ff ff21 bl 8000a9c + HAL_Delay(300); + 8000c5a: 2096 movs r0, #150 @ 0x96 + 8000c5c: 0040 lsls r0, r0, #1 + 8000c5e: f001 fe5d bl 800291c + set_LED(0, 0, 0); + 8000c62: 2200 movs r2, #0 + 8000c64: 0010 movs r0, r2 + 8000c66: 0011 movs r1, r2 + 8000c68: f7ff ff18 bl 8000a9c + HAL_Delay(300); + 8000c6c: 2096 movs r0, #150 @ 0x96 + for (int i = 0; i < 3; i++) + 8000c6e: 3c01 subs r4, #1 + HAL_Delay(300); + 8000c70: 0040 lsls r0, r0, #1 + 8000c72: f001 fe53 bl 800291c + for (int i = 0; i < 3; i++) + 8000c76: 2c00 cmp r4, #0 + 8000c78: d1ea bne.n 8000c50 +} + 8000c7a: bd10 pop {r4, pc} + +08000c7c : + set_LED(0, 1, 0); + 8000c7c: 2200 movs r2, #0 +{ + 8000c7e: b510 push {r4, lr} + set_LED(0, 1, 0); + 8000c80: 0010 movs r0, r2 + 8000c82: 2101 movs r1, #1 + 8000c84: f7ff ff0a bl 8000a9c + HAL_Delay(250); + 8000c88: 20fa movs r0, #250 @ 0xfa + 8000c8a: f001 fe47 bl 800291c + set_LED(0, 0, 0); + 8000c8e: 2200 movs r2, #0 + 8000c90: 0010 movs r0, r2 + 8000c92: 0011 movs r1, r2 + 8000c94: f7ff ff02 bl 8000a9c + HAL_Delay(250); + 8000c98: 20fa movs r0, #250 @ 0xfa + 8000c9a: f001 fe3f bl 800291c +} + 8000c9e: bd10 pop {r4, pc} + +08000ca0 : +{ + 8000ca0: b5f0 push {r4, r5, r6, r7, lr} + if (feed_state != FEED_STATE_IDLE) + 8000ca2: 4b2c ldr r3, [pc, #176] @ (8000d54 ) +{ + 8000ca4: b085 sub sp, #20 + if (feed_state != FEED_STATE_IDLE) + 8000ca6: 9301 str r3, [sp, #4] + 8000ca8: 781b ldrb r3, [r3, #0] +{ + 8000caa: 0004 movs r4, r0 + 8000cac: 9102 str r1, [sp, #8] + if (feed_state != FEED_STATE_IDLE) + 8000cae: b2dd uxtb r5, r3 + 8000cb0: 2b00 cmp r3, #0 + 8000cb2: d140 bne.n 8000d36 + feed_distance_tenths = distance_tenths; + 8000cb4: 4b28 ldr r3, [pc, #160] @ (8000d58 ) + 8000cb6: 8018 strh r0, [r3, #0] + feed_in_progress = 1; + 8000cb8: 2001 movs r0, #1 + feed_direction = forward; + 8000cba: 4b28 ldr r3, [pc, #160] @ (8000d5c ) + set_LED(1, 1, 1); // White during feed + 8000cbc: 0002 movs r2, r0 + feed_direction = forward; + 8000cbe: 7019 strb r1, [r3, #0] + feed_retry_count = 0; + 8000cc0: 4b27 ldr r3, [pc, #156] @ (8000d60 ) + set_LED(1, 1, 1); // White during feed + 8000cc2: 0001 movs r1, r0 + feed_retry_count = 0; + 8000cc4: 701d strb r5, [r3, #0] + feed_in_progress = 1; + 8000cc6: 4b27 ldr r3, [pc, #156] @ (8000d64 ) + 8000cc8: 7018 strb r0, [r3, #0] + last_feed_status = STATUS_OK; + 8000cca: 4b27 ldr r3, [pc, #156] @ (8000d68 ) + 8000ccc: 701d strb r5, [r3, #0] + set_LED(1, 1, 1); // White during feed + 8000cce: f7ff fee5 bl 8000a9c + if (forward) + 8000cd2: 4b26 ldr r3, [pc, #152] @ (8000d6c ) + 8000cd4: 4f26 ldr r7, [pc, #152] @ (8000d70 ) + 8000cd6: 9303 str r3, [sp, #12] + 8000cd8: 9b02 ldr r3, [sp, #8] + 8000cda: 4e26 ldr r6, [pc, #152] @ (8000d74 ) + 8000cdc: 2b00 cmp r3, #0 + 8000cde: d02c beq.n 8000d3a + feed_state = FEED_STATE_DRIVING; + 8000ce0: 2304 movs r3, #4 + 8000ce2: 9a01 ldr r2, [sp, #4] + 8000ce4: 7013 strb r3, [r2, #0] feed_state_start_time = HAL_GetTick(); - 8000cde: f001 fdff bl 80028e0 + 8000ce6: f001 fe13 bl 8002910 + peel_done = 0; + 8000cea: 4b23 ldr r3, [pc, #140] @ (8000d78 ) + peel_target_pwm = forward ? PWM_MAX : -PWM_MAX; + 8000cec: 9a03 ldr r2, [sp, #12] + peel_done = 0; + 8000cee: 701d strb r5, [r3, #0] feed_state_duration = distance_tenths * PEEL_TIME_PER_TENTH_MM; - 8000ce2: 2312 movs r3, #18 - 8000ce4: 4363 muls r3, r4 - 8000ce6: 6033 str r3, [r6, #0] + 8000cf0: 2312 movs r3, #18 + 8000cf2: 4363 muls r3, r4 + 8000cf4: 6033 str r3, [r6, #0] peel_target_pwm = forward ? PWM_MAX : -PWM_MAX; - 8000ce8: 2396 movs r3, #150 @ 0x96 - 8000cea: 9a03 ldr r2, [sp, #12] - 8000cec: 011b lsls r3, r3, #4 - 8000cee: 8013 strh r3, [r2, #0] + 8000cf6: 2396 movs r3, #150 @ 0x96 + 8000cf8: 011b lsls r3, r3, #4 + 8000cfa: 8013 strh r3, [r2, #0] + drive_done = 0; + 8000cfc: 4b1f ldr r3, [pc, #124] @ (8000d7c ) feed_state_start_time = HAL_GetTick(); - 8000cf0: 6038 str r0, [r7, #0] + 8000cfe: 6038 str r0, [r7, #0] + drive_done = 0; + 8000d00: 701d strb r5, [r3, #0] feed_timeout_time = HAL_GetTick() + (distance_tenths * TIMEOUT_TIME_PER_TENTH_MM) + 500; - 8000cf2: f001 fdf5 bl 80028e0 - 8000cf6: 2364 movs r3, #100 @ 0x64 - 8000cf8: 4363 muls r3, r4 - 8000cfa: 33f5 adds r3, #245 @ 0xf5 - 8000cfc: 4a1a ldr r2, [pc, #104] @ (8000d68 ) - 8000cfe: 33ff adds r3, #255 @ 0xff - 8000d00: 181b adds r3, r3, r0 - 8000d02: 6013 str r3, [r2, #0] + 8000d02: f001 fe05 bl 8002910 + 8000d06: 2364 movs r3, #100 @ 0x64 + 8000d08: 4363 muls r3, r4 + 8000d0a: 33f5 adds r3, #245 @ 0xf5 + 8000d0c: 4a1c ldr r2, [pc, #112] @ (8000d80 ) + 8000d0e: 33ff adds r3, #255 @ 0xff + 8000d10: 181b adds r3, r3, r0 + 8000d12: 6013 str r3, [r2, #0] int64_t temp = ((int64_t)tenths * 100 * GEAR_RATIO * ENCODER_CPR) / UM_PER_REV; - 8000d04: 0020 movs r0, r4 - 8000d06: 2300 movs r3, #0 - 8000d08: 4a18 ldr r2, [pc, #96] @ (8000d6c ) - 8000d0a: 17e1 asrs r1, r4, #31 - 8000d0c: f7ff fbaa bl 8000464 <__aeabi_lmul> - 8000d10: 2300 movs r3, #0 - 8000d12: 4a17 ldr r2, [pc, #92] @ (8000d70 ) - 8000d14: f7ff fb82 bl 800041c <__aeabi_ldivmod> + 8000d14: 0020 movs r0, r4 + 8000d16: 2300 movs r3, #0 + 8000d18: 4a1a ldr r2, [pc, #104] @ (8000d84 ) + 8000d1a: 17e1 asrs r1, r4, #31 + 8000d1c: f7ff fba2 bl 8000464 <__aeabi_lmul> + 8000d20: 2300 movs r3, #0 + 8000d22: 4a19 ldr r2, [pc, #100] @ (8000d88 ) + 8000d24: f7ff fb7a bl 800041c <__aeabi_ldivmod> feed_target_position = total_count + tenths_to_counts(distance_tenths); - 8000d18: 4b16 ldr r3, [pc, #88] @ (8000d74 ) - 8000d1a: 681b ldr r3, [r3, #0] - 8000d1c: 1818 adds r0, r3, r0 - 8000d1e: 4b16 ldr r3, [pc, #88] @ (8000d78 ) - 8000d20: 6018 str r0, [r3, #0] + 8000d28: 4b18 ldr r3, [pc, #96] @ (8000d8c ) + 8000d2a: 681b ldr r3, [r3, #0] + 8000d2c: 1818 adds r0, r3, r0 + 8000d2e: 4b18 ldr r3, [pc, #96] @ (8000d90 ) + 8000d30: 6018 str r0, [r3, #0] target_count = feed_target_position; - 8000d22: 4b16 ldr r3, [pc, #88] @ (8000d7c ) - 8000d24: 6018 str r0, [r3, #0] + 8000d32: 4b18 ldr r3, [pc, #96] @ (8000d94 ) + 8000d34: 6018 str r0, [r3, #0] } - 8000d26: b005 add sp, #20 - 8000d28: bdf0 pop {r4, r5, r6, r7, pc} + 8000d36: b005 add sp, #20 + 8000d38: bdf0 pop {r4, r5, r6, r7, pc} feed_state = FEED_STATE_UNPEEL; - 8000d2a: 2303 movs r3, #3 - 8000d2c: 9a01 ldr r2, [sp, #4] - 8000d2e: 7013 strb r3, [r2, #0] + 8000d3a: 2303 movs r3, #3 + 8000d3c: 9a01 ldr r2, [sp, #4] + 8000d3e: 7013 strb r3, [r2, #0] feed_state_start_time = HAL_GetTick(); - 8000d30: f001 fdd6 bl 80028e0 + 8000d40: f001 fde6 bl 8002910 feed_state_duration = distance_tenths * BACKWARDS_PEEL_TIME_PER_TENTH_MM; - 8000d34: 231e movs r3, #30 - 8000d36: 4363 muls r3, r4 + 8000d44: 231e movs r3, #30 + 8000d46: 4363 muls r3, r4 peel_target_pwm = forward ? PWM_MAX : -PWM_MAX; - 8000d38: 9a03 ldr r2, [sp, #12] + 8000d48: 9a03 ldr r2, [sp, #12] feed_state_duration = distance_tenths * BACKWARDS_PEEL_TIME_PER_TENTH_MM; - 8000d3a: 6033 str r3, [r6, #0] + 8000d4a: 6033 str r3, [r6, #0] peel_target_pwm = forward ? PWM_MAX : -PWM_MAX; - 8000d3c: 4b10 ldr r3, [pc, #64] @ (8000d80 ) + 8000d4c: 4b12 ldr r3, [pc, #72] @ (8000d98 ) feed_state_start_time = HAL_GetTick(); - 8000d3e: 6038 str r0, [r7, #0] + 8000d4e: 6038 str r0, [r7, #0] peel_target_pwm = forward ? PWM_MAX : -PWM_MAX; - 8000d40: 8013 strh r3, [r2, #0] + 8000d50: 8013 strh r3, [r2, #0] } - 8000d42: e7f0 b.n 8000d26 - 8000d44: 20000118 .word 0x20000118 - 8000d48: 20000108 .word 0x20000108 - 8000d4c: 20000002 .word 0x20000002 - 8000d50: 20000100 .word 0x20000100 - 8000d54: 20000121 .word 0x20000121 - 8000d58: 20000122 .word 0x20000122 - 8000d5c: 200000fe .word 0x200000fe - 8000d60: 20000114 .word 0x20000114 - 8000d64: 20000110 .word 0x20000110 - 8000d68: 2000010c .word 0x2000010c - 8000d6c: 002c01a0 .word 0x002c01a0 - 8000d70: 0001f377 .word 0x0001f377 - 8000d74: 20000154 .word 0x20000154 - 8000d78: 20000104 .word 0x20000104 - 8000d7c: 20000150 .word 0x20000150 - 8000d80: fffff6a0 .word 0xfffff6a0 + 8000d52: e7f0 b.n 8000d36 + 8000d54: 2000011c .word 0x2000011c + 8000d58: 2000010c .word 0x2000010c + 8000d5c: 20000004 .word 0x20000004 + 8000d60: 20000104 .word 0x20000104 + 8000d64: 20000125 .word 0x20000125 + 8000d68: 20000126 .word 0x20000126 + 8000d6c: 20000102 .word 0x20000102 + 8000d70: 20000118 .word 0x20000118 + 8000d74: 20000114 .word 0x20000114 + 8000d78: 20000003 .word 0x20000003 + 8000d7c: 20000002 .word 0x20000002 + 8000d80: 20000110 .word 0x20000110 + 8000d84: 002c01a0 .word 0x002c01a0 + 8000d88: 0001f377 .word 0x0001f377 + 8000d8c: 20000158 .word 0x20000158 + 8000d90: 20000108 .word 0x20000108 + 8000d94: 20000154 .word 0x20000154 + 8000d98: fffff6a0 .word 0xfffff6a0 -08000d84 : +08000d9c : { - 8000d84: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr} + 8000d9c: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr} if (feed_state == FEED_STATE_IDLE) - 8000d86: 4ea6 ldr r6, [pc, #664] @ (8001020 ) - 8000d88: 7833 ldrb r3, [r6, #0] - 8000d8a: 2b00 cmp r3, #0 - 8000d8c: d01f beq.n 8000dce + 8000d9e: 4eaa ldr r6, [pc, #680] @ (8001048 ) + 8000da0: 7833 ldrb r3, [r6, #0] + 8000da2: 2b00 cmp r3, #0 + 8000da4: d03a beq.n 8000e1c uint32_t now = HAL_GetTick(); - 8000d8e: f001 fda7 bl 80028e0 + 8000da6: f001 fdb3 bl 8002910 uint32_t elapsed = now - feed_state_start_time; - 8000d92: 4da4 ldr r5, [pc, #656] @ (8001024 ) + 8000daa: 4da8 ldr r5, [pc, #672] @ (800104c ) uint32_t now = HAL_GetTick(); - 8000d94: 0004 movs r4, r0 + 8000dac: 0004 movs r4, r0 uint32_t elapsed = now - feed_state_start_time; - 8000d96: 682b ldr r3, [r5, #0] - 8000d98: 1ac3 subs r3, r0, r3 + 8000dae: 682b ldr r3, [r5, #0] + 8000db0: 1ac3 subs r3, r0, r3 switch (feed_state) - 8000d9a: 7830 ldrb r0, [r6, #0] - 8000d9c: 3801 subs r0, #1 - 8000d9e: 2808 cmp r0, #8 - 8000da0: d900 bls.n 8000da4 - 8000da2: e135 b.n 8001010 - 8000da4: f7ff f9ba bl 800011c <__gnu_thumb1_case_uhi> - 8000da8: 01340009 .word 0x01340009 - 8000dac: 003a0014 .word 0x003a0014 - 8000db0: 00c700af .word 0x00c700af - 8000db4: 00e500de .word 0x00e500de - 8000db8: 00f4 .short 0x00f4 + 8000db2: 7830 ldrb r0, [r6, #0] + 8000db4: 3801 subs r0, #1 + 8000db6: 2808 cmp r0, #8 + 8000db8: d900 bls.n 8000dbc + 8000dba: e142 b.n 8001042 + 8000dbc: f7ff f9ae bl 800011c <__gnu_thumb1_case_uhi> + 8000dc0: 0141002e .word 0x0141002e + 8000dc4: 002f0009 .word 0x002f0009 + 8000dc8: 00d400bc .word 0x00d400bc + 8000dcc: 00f200eb .word 0x00f200eb + 8000dd0: 0101 .short 0x0101 if (elapsed >= feed_state_duration) - 8000dba: 4a9b ldr r2, [pc, #620] @ (8001028 ) - 8000dbc: 6812 ldr r2, [r2, #0] - 8000dbe: 4293 cmp r3, r2 - 8000dc0: d305 bcc.n 8000dce + 8000dd2: 4a9f ldr r2, [pc, #636] @ (8001050 ) + 8000dd4: 6812 ldr r2, [r2, #0] + 8000dd6: 4293 cmp r3, r2 + 8000dd8: d320 bcc.n 8000e1c peel_target_pwm = 0; - 8000dc2: 2200 movs r2, #0 - 8000dc4: 4b99 ldr r3, [pc, #612] @ (800102c ) + 8000dda: 2200 movs r2, #0 + 8000ddc: 4b9d ldr r3, [pc, #628] @ (8001054 ) feed_state_start_time = now; - 8000dc6: 602c str r4, [r5, #0] + 8000dde: 602c str r4, [r5, #0] peel_target_pwm = 0; - 8000dc8: 801a strh r2, [r3, #0] + 8000de0: 801a strh r2, [r3, #0] feed_state = FEED_STATE_DRIVING; - 8000dca: 2304 movs r3, #4 - 8000dcc: 7033 strb r3, [r6, #0] -} - 8000dce: bdf7 pop {r0, r1, r2, r4, r5, r6, r7, pc} - if (elapsed >= feed_state_duration) - 8000dd0: 4a95 ldr r2, [pc, #596] @ (8001028 ) - 8000dd2: 6812 ldr r2, [r2, #0] - 8000dd4: 4293 cmp r3, r2 - 8000dd6: d3fa bcc.n 8000dce - peel_target_pwm = 0; - 8000dd8: 2200 movs r2, #0 - 8000dda: 4b94 ldr r3, [pc, #592] @ (800102c ) - feed_state_start_time = now; - 8000ddc: 602c str r4, [r5, #0] - peel_target_pwm = 0; - 8000dde: 801a strh r2, [r3, #0] - feed_state = FEED_STATE_DRIVING; - 8000de0: 2304 movs r3, #4 - 8000de2: 7033 strb r3, [r6, #0] + 8000de2: 2304 movs r3, #4 + 8000de4: 7033 strb r3, [r6, #0] int16_t total_backward = feed_distance_tenths + BACKLASH_COMP_TENTH_MM; - 8000de4: 4b92 ldr r3, [pc, #584] @ (8001030 ) + 8000de6: 4b9c ldr r3, [pc, #624] @ (8001058 ) feed_timeout_time = now + (total_backward * TIMEOUT_TIME_PER_TENTH_MM) + 500; - 8000de6: 4a93 ldr r2, [pc, #588] @ (8001034 ) + 8000de8: 4a9c ldr r2, [pc, #624] @ (800105c ) int16_t total_backward = feed_distance_tenths + BACKLASH_COMP_TENTH_MM; - 8000de8: 8818 ldrh r0, [r3, #0] + 8000dea: 8818 ldrh r0, [r3, #0] feed_timeout_time = now + (total_backward * TIMEOUT_TIME_PER_TENTH_MM) + 500; - 8000dea: 2364 movs r3, #100 @ 0x64 + 8000dec: 2364 movs r3, #100 @ 0x64 int16_t total_backward = feed_distance_tenths + BACKLASH_COMP_TENTH_MM; - 8000dec: 300a adds r0, #10 - 8000dee: b200 sxth r0, r0 + 8000dee: 300a adds r0, #10 + 8000df0: b200 sxth r0, r0 feed_timeout_time = now + (total_backward * TIMEOUT_TIME_PER_TENTH_MM) + 500; - 8000df0: 4343 muls r3, r0 - 8000df2: 33f5 adds r3, #245 @ 0xf5 - 8000df4: 33ff adds r3, #255 @ 0xff - 8000df6: 191b adds r3, r3, r4 - 8000df8: 6013 str r3, [r2, #0] + 8000df2: 4343 muls r3, r0 + 8000df4: 33f5 adds r3, #245 @ 0xf5 + 8000df6: 33ff adds r3, #255 @ 0xff + 8000df8: 191b adds r3, r3, r4 + 8000dfa: 6013 str r3, [r2, #0] int64_t temp = ((int64_t)tenths * 100 * GEAR_RATIO * ENCODER_CPR) / UM_PER_REV; - 8000dfa: 17c1 asrs r1, r0, #31 - 8000dfc: 2300 movs r3, #0 - 8000dfe: 4a8e ldr r2, [pc, #568] @ (8001038 ) - 8000e00: f7ff fb30 bl 8000464 <__aeabi_lmul> - 8000e04: 2300 movs r3, #0 - 8000e06: 4a8d ldr r2, [pc, #564] @ (800103c ) - 8000e08: f7ff fb08 bl 800041c <__aeabi_ldivmod> + 8000dfc: 17c1 asrs r1, r0, #31 + 8000dfe: 2300 movs r3, #0 + 8000e00: 4a97 ldr r2, [pc, #604] @ (8001060 ) + 8000e02: f7ff fb2f bl 8000464 <__aeabi_lmul> + 8000e06: 2300 movs r3, #0 + 8000e08: 4a96 ldr r2, [pc, #600] @ (8001064 ) + 8000e0a: f7ff fb07 bl 800041c <__aeabi_ldivmod> feed_target_position = total_count - tenths_to_counts(total_backward); - 8000e0c: 4c8c ldr r4, [pc, #560] @ (8001040 ) - 8000e0e: 6823 ldr r3, [r4, #0] - 8000e10: 1a18 subs r0, r3, r0 - 8000e12: 4b8c ldr r3, [pc, #560] @ (8001044 ) - 8000e14: 6018 str r0, [r3, #0] + 8000e0e: 4c96 ldr r4, [pc, #600] @ (8001068 ) + 8000e10: 6823 ldr r3, [r4, #0] + 8000e12: 1a18 subs r0, r3, r0 + 8000e14: 4b95 ldr r3, [pc, #596] @ (800106c ) + 8000e16: 6018 str r0, [r3, #0] target_count = feed_target_position; - 8000e16: 4b8c ldr r3, [pc, #560] @ (8001048 ) - 8000e18: 6018 str r0, [r3, #0] - 8000e1a: e7d8 b.n 8000dce + 8000e18: 4b95 ldr r3, [pc, #596] @ (8001070 ) + 8000e1a: 6018 str r0, [r3, #0] +} + 8000e1c: bdf7 pop {r0, r1, r2, r4, r5, r6, r7, pc} + if (!peel_done && elapsed >= feed_state_duration) + 8000e1e: 4995 ldr r1, [pc, #596] @ (8001074 ) + 8000e20: 780a ldrb r2, [r1, #0] + 8000e22: 2a00 cmp r2, #0 + 8000e24: d107 bne.n 8000e36 + 8000e26: 488a ldr r0, [pc, #552] @ (8001050 ) + 8000e28: 6800 ldr r0, [r0, #0] + 8000e2a: 4283 cmp r3, r0 + 8000e2c: d303 bcc.n 8000e36 + peel_target_pwm = 0; + 8000e2e: 4b89 ldr r3, [pc, #548] @ (8001054 ) + 8000e30: 801a strh r2, [r3, #0] + peel_done = 1; + 8000e32: 3201 adds r2, #1 + 8000e34: 700a strb r2, [r1, #0] int32_t error = feed_target_position - total_count; - 8000e1c: 4b88 ldr r3, [pc, #544] @ (8001040 ) - 8000e1e: 4f89 ldr r7, [pc, #548] @ (8001044 ) - 8000e20: 681a ldr r2, [r3, #0] - 8000e22: 683b ldr r3, [r7, #0] - 8000e24: 1a9b subs r3, r3, r2 + 8000e36: 4b8c ldr r3, [pc, #560] @ (8001068 ) + 8000e38: 681b ldr r3, [r3, #0] + 8000e3a: 469c mov ip, r3 + 8000e3c: 4b8b ldr r3, [pc, #556] @ (800106c ) + 8000e3e: 6819 ldr r1, [r3, #0] + 8000e40: 9301 str r3, [sp, #4] + 8000e42: 4663 mov r3, ip + 8000e44: 1ac9 subs r1, r1, r3 int32_t abs_error = error < 0 ? -error : error; - 8000e26: 17d8 asrs r0, r3, #31 - 8000e28: 1819 adds r1, r3, r0 - 8000e2a: 4041 eors r1, r0 + 8000e46: 17cb asrs r3, r1, #31 + 8000e48: 18c8 adds r0, r1, r3 + 8000e4a: 4058 eors r0, r3 int32_t brake_adj = abs_error >= 20 ? 20 : abs_error >= 10 ? 10 : abs_error >= 5 ? 5 : 0; - 8000e2c: 2913 cmp r1, #19 - 8000e2e: dc2e bgt.n 8000e8e - 8000e30: 2909 cmp r1, #9 - 8000e32: dc59 bgt.n 8000ee8 - 8000e34: 2904 cmp r1, #4 - 8000e36: dd00 ble.n 8000e3a - 8000e38: e0ec b.n 8001014 - if (error < 0) // overshot - 8000e3a: 2b00 cmp r3, #0 - 8000e3c: da14 bge.n 8000e68 - 8000e3e: 2300 movs r3, #0 + 8000e4c: 2314 movs r3, #20 + 8000e4e: 2813 cmp r0, #19 + 8000e50: dc06 bgt.n 8000e60 + 8000e52: 3b0a subs r3, #10 + 8000e54: 2809 cmp r0, #9 + 8000e56: dc03 bgt.n 8000e60 + 8000e58: 2300 movs r3, #0 + 8000e5a: 2804 cmp r0, #4 + 8000e5c: dd00 ble.n 8000e60 + 8000e5e: 3305 adds r3, #5 + if (!drive_done && abs_error < FEED_POSITION_TOLERANCE) + 8000e60: 4f85 ldr r7, [pc, #532] @ (8001078 ) + 8000e62: 783f ldrb r7, [r7, #0] + 8000e64: 2f00 cmp r7, #0 + 8000e66: d10a bne.n 8000e7e + 8000e68: 280e cmp r0, #14 + 8000e6a: dc2c bgt.n 8000ec6 + if (error < 0) + 8000e6c: 2900 cmp r1, #0 + 8000e6e: da13 bge.n 8000e98 brake_time_tenths += brake_adj; - 8000e40: 4a82 ldr r2, [pc, #520] @ (800104c ) - 8000e42: 6811 ldr r1, [r2, #0] - 8000e44: 185b adds r3, r3, r1 - 8000e46: 6013 str r3, [r2, #0] + 8000e70: 4f82 ldr r7, [pc, #520] @ (800107c ) + 8000e72: 6838 ldr r0, [r7, #0] + 8000e74: 18c0 adds r0, r0, r3 + 8000e76: 6038 str r0, [r7, #0] + drive_done = 1; + 8000e78: 2701 movs r7, #1 + 8000e7a: 487f ldr r0, [pc, #508] @ (8001078 ) + 8000e7c: 7007 strb r7, [r0, #0] + if (peel_done && drive_done) + 8000e7e: 2a00 cmp r2, #0 + 8000e80: d021 beq.n 8000ec6 if (!feed_direction) - 8000e48: 4b81 ldr r3, [pc, #516] @ (8001050 ) - 8000e4a: 781a ldrb r2, [r3, #0] - 8000e4c: 4b76 ldr r3, [pc, #472] @ (8001028 ) - 8000e4e: 2a00 cmp r2, #0 - 8000e50: d117 bne.n 8000e82 - feed_state = FEED_STATE_SLACK_REMOVAL; - 8000e52: 3205 adds r2, #5 - 8000e54: 7032 strb r2, [r6, #0] - feed_state_duration = BACKWARDS_FEED_FILM_SLACK_REMOVAL_TIME; - 8000e56: 325a adds r2, #90 @ 0x5a - 8000e58: 32ff adds r2, #255 @ 0xff - 8000e5a: 601a str r2, [r3, #0] - peel_target_pwm = forward ? PWM_MAX : -PWM_MAX; - 8000e5c: 2296 movs r2, #150 @ 0x96 - 8000e5e: 4b73 ldr r3, [pc, #460] @ (800102c ) - 8000e60: 0112 lsls r2, r2, #4 + 8000e82: 4b7f ldr r3, [pc, #508] @ (8001080 ) + 8000e84: 781a ldrb r2, [r3, #0] + 8000e86: 4b72 ldr r3, [pc, #456] @ (8001050 ) + 8000e88: 2a00 cmp r2, #0 + 8000e8a: d011 beq.n 8000eb0 + feed_state = FEED_STATE_SETTLING; + 8000e8c: 2207 movs r2, #7 feed_state_start_time = now; - 8000e62: 602c str r4, [r5, #0] - peel_target_pwm = forward ? PWM_MAX : -PWM_MAX; - 8000e64: 801a strh r2, [r3, #0] -} - 8000e66: e7b2 b.n 8000dce - else if (error > 0 && brake_time_tenths > brake_adj) // undershot - 8000e68: 2b00 cmp r3, #0 - 8000e6a: d0ed beq.n 8000e48 - 8000e6c: 2200 movs r2, #0 - 8000e6e: 4b77 ldr r3, [pc, #476] @ (800104c ) - 8000e70: 6819 ldr r1, [r3, #0] - 8000e72: 4291 cmp r1, r2 - 8000e74: dd03 ble.n 8000e7e + 8000e8e: 602c str r4, [r5, #0] + feed_state = FEED_STATE_SETTLING; + 8000e90: 7032 strb r2, [r6, #0] + feed_state_duration = FEED_SETTLE_TIME; + 8000e92: 2232 movs r2, #50 @ 0x32 + 8000e94: 601a str r2, [r3, #0] + 8000e96: e7c1 b.n 8000e1c + else if (error > 0 && brake_time_tenths > brake_adj) + 8000e98: 2900 cmp r1, #0 + 8000e9a: d0ed beq.n 8000e78 + 8000e9c: 4877 ldr r0, [pc, #476] @ (800107c ) + 8000e9e: 6807 ldr r7, [r0, #0] + 8000ea0: 42bb cmp r3, r7 + 8000ea2: da03 bge.n 8000eac brake_time_tenths -= brake_adj; - 8000e76: 6819 ldr r1, [r3, #0] - 8000e78: 1a8a subs r2, r1, r2 + 8000ea4: 6807 ldr r7, [r0, #0] + 8000ea6: 1aff subs r7, r7, r3 brake_time_tenths = 1; - 8000e7a: 601a str r2, [r3, #0] - 8000e7c: e7e4 b.n 8000e48 - 8000e7e: 2201 movs r2, #1 - 8000e80: e7fb b.n 8000e7a - feed_state = FEED_STATE_SETTLING; - 8000e82: 2207 movs r2, #7 + 8000ea8: 6007 str r7, [r0, #0] + 8000eaa: e7e5 b.n 8000e78 + 8000eac: 2701 movs r7, #1 + 8000eae: e7fb b.n 8000ea8 + feed_state = FEED_STATE_SLACK_REMOVAL; + 8000eb0: 2205 movs r2, #5 + 8000eb2: 7032 strb r2, [r6, #0] + feed_state_duration = BACKWARDS_FEED_FILM_SLACK_REMOVAL_TIME; + 8000eb4: 325a adds r2, #90 @ 0x5a + 8000eb6: 32ff adds r2, #255 @ 0xff + 8000eb8: 601a str r2, [r3, #0] + peel_target_pwm = forward ? PWM_MAX : -PWM_MAX; + 8000eba: 2296 movs r2, #150 @ 0x96 + 8000ebc: 4b65 ldr r3, [pc, #404] @ (8001054 ) + 8000ebe: 0112 lsls r2, r2, #4 feed_state_start_time = now; - 8000e84: 602c str r4, [r5, #0] - feed_state = FEED_STATE_SETTLING; - 8000e86: 7032 strb r2, [r6, #0] - feed_state_duration = FEED_SETTLE_TIME; - 8000e88: 2232 movs r2, #50 @ 0x32 - 8000e8a: 601a str r2, [r3, #0] - 8000e8c: e79f b.n 8000dce - int32_t brake_adj = abs_error >= 20 ? 20 : abs_error >= 10 ? 10 : abs_error >= 5 ? 5 : 0; - 8000e8e: 2114 movs r1, #20 + 8000ec0: 602c str r4, [r5, #0] + peel_target_pwm = forward ? PWM_MAX : -PWM_MAX; + 8000ec2: 801a strh r2, [r3, #0] +} + 8000ec4: e7aa b.n 8000e1c else if (error < -FEED_POSITION_TOLERANCE) - 8000e90: 4e68 ldr r6, [pc, #416] @ (8001034 ) - 8000e92: 330a adds r3, #10 - 8000e94: da2a bge.n 8000eec + 8000ec6: 4e65 ldr r6, [pc, #404] @ (800105c ) + 8000ec8: 310f adds r1, #15 + 8000eca: da28 bge.n 8000f1e brake_time_tenths += brake_adj; - 8000e96: 486d ldr r0, [pc, #436] @ (800104c ) - 8000e98: 6803 ldr r3, [r0, #0] - 8000e9a: 185b adds r3, r3, r1 + 8000ecc: 496b ldr r1, [pc, #428] @ (800107c ) + 8000ece: 680a ldr r2, [r1, #0] + 8000ed0: 189b adds r3, r3, r2 feed_retry_total++; - 8000e9c: 496d ldr r1, [pc, #436] @ (8001054 ) + 8000ed2: 4a6c ldr r2, [pc, #432] @ (8001084 ) else brake_time_tenths = 1; - 8000e9e: 6003 str r3, [r0, #0] + 8000ed4: 600b str r3, [r1, #0] feed_retry_total++; - 8000ea0: 880b ldrh r3, [r1, #0] + 8000ed6: 8813 ldrh r3, [r2, #0] target_count = total_count - tenths_to_counts(10); - 8000ea2: 3ae1 subs r2, #225 @ 0xe1 + 8000ed8: 4f65 ldr r7, [pc, #404] @ (8001070 ) feed_retry_total++; - 8000ea4: 3301 adds r3, #1 - 8000ea6: b29b uxth r3, r3 - 8000ea8: 800b strh r3, [r1, #0] + 8000eda: 3301 adds r3, #1 + 8000edc: b29b uxth r3, r3 + 8000ede: 8013 strh r3, [r2, #0] target_count = total_count - tenths_to_counts(10); - 8000eaa: 4b67 ldr r3, [pc, #412] @ (8001048 ) + 8000ee0: 4663 mov r3, ip HAL_Delay(200); - 8000eac: 20c8 movs r0, #200 @ 0xc8 + 8000ee2: 20c8 movs r0, #200 @ 0xc8 target_count = total_count - tenths_to_counts(10); - 8000eae: 601a str r2, [r3, #0] - 8000eb0: 9301 str r3, [sp, #4] + 8000ee4: 3be1 subs r3, #225 @ 0xe1 + 8000ee6: 603b str r3, [r7, #0] HAL_Delay(200); - 8000eb2: f001 fd1b bl 80028ec + 8000ee8: f001 fd18 bl 800291c htim1.Instance->CCR1 = PWM_MAX; - 8000eb6: 2296 movs r2, #150 @ 0x96 - 8000eb8: 4b67 ldr r3, [pc, #412] @ (8001058 ) - 8000eba: 0112 lsls r2, r2, #4 - 8000ebc: 681b ldr r3, [r3, #0] + 8000eec: 2296 movs r2, #150 @ 0x96 + 8000eee: 4b66 ldr r3, [pc, #408] @ (8001088 ) + 8000ef0: 0112 lsls r2, r2, #4 + 8000ef2: 681b ldr r3, [r3, #0] HAL_Delay(50); - 8000ebe: 2032 movs r0, #50 @ 0x32 + 8000ef4: 2032 movs r0, #50 @ 0x32 htim1.Instance->CCR1 = PWM_MAX; - 8000ec0: 635a str r2, [r3, #52] @ 0x34 + 8000ef6: 635a str r2, [r3, #52] @ 0x34 htim1.Instance->CCR2 = PWM_MAX; - 8000ec2: 639a str r2, [r3, #56] @ 0x38 + 8000ef8: 639a str r2, [r3, #56] @ 0x38 HAL_Delay(50); - 8000ec4: f001 fd12 bl 80028ec + 8000efa: f001 fd0f bl 800291c target_count = feed_target_position; - 8000ec8: 683b ldr r3, [r7, #0] - 8000eca: 9a01 ldr r2, [sp, #4] + 8000efe: 9b01 ldr r3, [sp, #4] feed_state_start_time = now; - 8000ecc: 602c str r4, [r5, #0] + 8000f00: 602c str r4, [r5, #0] target_count = feed_target_position; - 8000ece: 6013 str r3, [r2, #0] + 8000f02: 681b ldr r3, [r3, #0] + 8000f04: 603b str r3, [r7, #0] feed_timeout_time = HAL_GetTick() + (feed_distance_tenths * TIMEOUT_TIME_PER_TENTH_MM) + 500; - 8000ed0: f001 fd06 bl 80028e0 - 8000ed4: 4b56 ldr r3, [pc, #344] @ (8001030 ) - 8000ed6: 2200 movs r2, #0 - 8000ed8: 5e9a ldrsh r2, [r3, r2] - 8000eda: 2364 movs r3, #100 @ 0x64 - 8000edc: 4353 muls r3, r2 - 8000ede: 33f5 adds r3, #245 @ 0xf5 - 8000ee0: 33ff adds r3, #255 @ 0xff - 8000ee2: 181b adds r3, r3, r0 - 8000ee4: 6033 str r3, [r6, #0] - 8000ee6: e772 b.n 8000dce - int32_t brake_adj = abs_error >= 20 ? 20 : abs_error >= 10 ? 10 : abs_error >= 5 ? 5 : 0; - 8000ee8: 210a movs r1, #10 - 8000eea: e7d1 b.n 8000e90 + 8000f06: f001 fd03 bl 8002910 + 8000f0a: 4b53 ldr r3, [pc, #332] @ (8001058 ) + 8000f0c: 2200 movs r2, #0 + 8000f0e: 5e9a ldrsh r2, [r3, r2] + 8000f10: 2364 movs r3, #100 @ 0x64 + 8000f12: 4353 muls r3, r2 + 8000f14: 33f5 adds r3, #245 @ 0xf5 + 8000f16: 33ff adds r3, #255 @ 0xff + 8000f18: 181b adds r3, r3, r0 + 8000f1a: 6033 str r3, [r6, #0] + 8000f1c: e77e b.n 8000e1c else if (now > feed_timeout_time) - 8000eec: 6833 ldr r3, [r6, #0] - 8000eee: 429c cmp r4, r3 - 8000ef0: d800 bhi.n 8000ef4 - 8000ef2: e76c b.n 8000dce + 8000f1e: 6832 ldr r2, [r6, #0] + 8000f20: 4294 cmp r4, r2 + 8000f22: d800 bhi.n 8000f26 + 8000f24: e77a b.n 8000e1c if (brake_time_tenths > brake_adj) brake_time_tenths -= brake_adj; - 8000ef4: 4855 ldr r0, [pc, #340] @ (800104c ) - 8000ef6: 6803 ldr r3, [r0, #0] - 8000ef8: 4299 cmp r1, r3 - 8000efa: da02 bge.n 8000f02 - 8000efc: 6803 ldr r3, [r0, #0] - 8000efe: 1a5b subs r3, r3, r1 - 8000f00: e7cc b.n 8000e9c + 8000f26: 4955 ldr r1, [pc, #340] @ (800107c ) + 8000f28: 680a ldr r2, [r1, #0] + 8000f2a: 4293 cmp r3, r2 + 8000f2c: da02 bge.n 8000f34 + 8000f2e: 680a ldr r2, [r1, #0] + 8000f30: 1ad3 subs r3, r2, r3 + 8000f32: e7ce b.n 8000ed2 else brake_time_tenths = 1; - 8000f02: 2301 movs r3, #1 - 8000f04: e7ca b.n 8000e9c + 8000f34: 2301 movs r3, #1 + 8000f36: e7cc b.n 8000ed2 if (elapsed >= feed_state_duration) - 8000f06: 4a48 ldr r2, [pc, #288] @ (8001028 ) - 8000f08: 6812 ldr r2, [r2, #0] - 8000f0a: 4293 cmp r3, r2 - 8000f0c: d200 bcs.n 8000f10 - 8000f0e: e75e b.n 8000dce + 8000f38: 4a45 ldr r2, [pc, #276] @ (8001050 ) + 8000f3a: 6812 ldr r2, [r2, #0] + 8000f3c: 4293 cmp r3, r2 + 8000f3e: d200 bcs.n 8000f42 + 8000f40: e76c b.n 8000e1c peel_target_pwm = 0; - 8000f10: 2200 movs r2, #0 - 8000f12: 4b46 ldr r3, [pc, #280] @ (800102c ) + 8000f42: 2200 movs r2, #0 + 8000f44: 4b43 ldr r3, [pc, #268] @ (8001054 ) feed_state_start_time = now; - 8000f14: 602c str r4, [r5, #0] + 8000f46: 602c str r4, [r5, #0] peel_target_pwm = 0; - 8000f16: 801a strh r2, [r3, #0] + 8000f48: 801a strh r2, [r3, #0] feed_state = FEED_STATE_DRIVING_BACKLASH; - 8000f18: 2306 movs r3, #6 + 8000f4a: 2306 movs r3, #6 feed_timeout_time = now + (BACKLASH_COMP_TENTH_MM * TIMEOUT_TIME_PER_TENTH_MM) + 200; - 8000f1a: 2296 movs r2, #150 @ 0x96 + 8000f4c: 2296 movs r2, #150 @ 0x96 feed_state = FEED_STATE_DRIVING_BACKLASH; - 8000f1c: 7033 strb r3, [r6, #0] - feed_timeout_time = now + (BACKLASH_COMP_TENTH_MM * TIMEOUT_TIME_PER_TENTH_MM) + 200; - 8000f1e: 00d2 lsls r2, r2, #3 - 8000f20: 4b44 ldr r3, [pc, #272] @ (8001034 ) - 8000f22: 18a4 adds r4, r4, r2 - 8000f24: 601c str r4, [r3, #0] - feed_target_position = total_count + tenths_to_counts(BACKLASH_COMP_TENTH_MM); - 8000f26: 4b46 ldr r3, [pc, #280] @ (8001040 ) - 8000f28: 4a46 ldr r2, [pc, #280] @ (8001044 ) - 8000f2a: 681b ldr r3, [r3, #0] - 8000f2c: 33e1 adds r3, #225 @ 0xe1 - 8000f2e: 6013 str r3, [r2, #0] - target_count = feed_target_position; - 8000f30: 4a45 ldr r2, [pc, #276] @ (8001048 ) - feed_timeout_time = HAL_GetTick() + (feed_distance_tenths * TIMEOUT_TIME_PER_TENTH_MM) + 500; - 8000f32: 6013 str r3, [r2, #0] - 8000f34: e74b b.n 8000dce - int32_t error = feed_target_position - total_count; - 8000f36: 4b43 ldr r3, [pc, #268] @ (8001044 ) - 8000f38: 4a41 ldr r2, [pc, #260] @ (8001040 ) - 8000f3a: 681b ldr r3, [r3, #0] - 8000f3c: 6812 ldr r2, [r2, #0] - 8000f3e: 1a9b subs r3, r3, r2 - if (error < 0) error = -error; - 8000f40: 17da asrs r2, r3, #31 - 8000f42: 189b adds r3, r3, r2 - 8000f44: 4053 eors r3, r2 - if (error < FEED_POSITION_TOLERANCE) - 8000f46: 2b09 cmp r3, #9 - 8000f48: dc04 bgt.n 8000f54 - feed_state = FEED_STATE_SETTLING; - 8000f4a: 2307 movs r3, #7 - feed_state_start_time = now; - 8000f4c: 602c str r4, [r5, #0] - feed_state = FEED_STATE_SETTLING; 8000f4e: 7033 strb r3, [r6, #0] - feed_state_duration = FEED_SETTLE_TIME; - 8000f50: 4b35 ldr r3, [pc, #212] @ (8001028 ) - 8000f52: e799 b.n 8000e88 - else if (now > feed_timeout_time) - 8000f54: 4b37 ldr r3, [pc, #220] @ (8001034 ) - 8000f56: 681b ldr r3, [r3, #0] - 8000f58: 429c cmp r4, r3 - 8000f5a: d800 bhi.n 8000f5e - 8000f5c: e737 b.n 8000dce - feed_state = FEED_STATE_TIMEOUT; - 8000f5e: 2309 movs r3, #9 - feed_state = FEED_STATE_IDLE; - 8000f60: 7033 strb r3, [r6, #0] - break; - 8000f62: e734 b.n 8000dce - if (elapsed >= feed_state_duration) - 8000f64: 4a30 ldr r2, [pc, #192] @ (8001028 ) - 8000f66: 6812 ldr r2, [r2, #0] - 8000f68: 4293 cmp r3, r2 - 8000f6a: d200 bcs.n 8000f6e - 8000f6c: e72f b.n 8000dce - feed_state = FEED_STATE_COMPLETE; - 8000f6e: 2308 movs r3, #8 - 8000f70: e7f6 b.n 8000f60 - feed_state = FEED_STATE_IDLE; - 8000f72: 2300 movs r3, #0 - feed_in_progress = 0; - 8000f74: 4a39 ldr r2, [pc, #228] @ (800105c ) - feed_state = FEED_STATE_IDLE; - 8000f76: 7033 strb r3, [r6, #0] - feed_in_progress = 0; - 8000f78: 7013 strb r3, [r2, #0] - last_feed_status = STATUS_OK; - 8000f7a: 4a39 ldr r2, [pc, #228] @ (8001060 ) - 8000f7c: 7013 strb r3, [r2, #0] - feed_just_completed = 1; - 8000f7e: 2201 movs r2, #1 - 8000f80: 4b38 ldr r3, [pc, #224] @ (8001064 ) - 8000f82: 701a strb r2, [r3, #0] - feed_ok_count++; - 8000f84: 4a38 ldr r2, [pc, #224] @ (8001068 ) - 8000f86: 8813 ldrh r3, [r2, #0] - 8000f88: 3301 adds r3, #1 - 8000f8a: b29b uxth r3, r3 - 8000f8c: 8013 strh r3, [r2, #0] - break; - 8000f8e: e71e b.n 8000dce - if (feed_retry_count < FEED_RETRY_LIMIT) - 8000f90: 4a36 ldr r2, [pc, #216] @ (800106c ) - 8000f92: 7813 ldrb r3, [r2, #0] - 8000f94: 2b02 cmp r3, #2 - 8000f96: d829 bhi.n 8000fec - feed_retry_count++; - 8000f98: 3301 adds r3, #1 - 8000f9a: 7013 strb r3, [r2, #0] - feed_retry_total++; - 8000f9c: 4a2d ldr r2, [pc, #180] @ (8001054 ) - target_count = total_count - tenths_to_counts(10); - 8000f9e: 4f2a ldr r7, [pc, #168] @ (8001048 ) - feed_retry_total++; - 8000fa0: 8813 ldrh r3, [r2, #0] - HAL_Delay(200); // Let motor reverse past backlash - 8000fa2: 20c8 movs r0, #200 @ 0xc8 - feed_retry_total++; - 8000fa4: 3301 adds r3, #1 - 8000fa6: b29b uxth r3, r3 - 8000fa8: 8013 strh r3, [r2, #0] - target_count = total_count - tenths_to_counts(10); - 8000faa: 4b25 ldr r3, [pc, #148] @ (8001040 ) - 8000fac: 681b ldr r3, [r3, #0] - 8000fae: 3be1 subs r3, #225 @ 0xe1 - 8000fb0: 603b str r3, [r7, #0] - HAL_Delay(200); // Let motor reverse past backlash - 8000fb2: f001 fc9b bl 80028ec - htim1.Instance->CCR1 = PWM_MAX; - 8000fb6: 2296 movs r2, #150 @ 0x96 - 8000fb8: 4b27 ldr r3, [pc, #156] @ (8001058 ) - 8000fba: 0112 lsls r2, r2, #4 - 8000fbc: 681b ldr r3, [r3, #0] - HAL_Delay(50); // Settle - 8000fbe: 2032 movs r0, #50 @ 0x32 - htim1.Instance->CCR1 = PWM_MAX; - 8000fc0: 635a str r2, [r3, #52] @ 0x34 - htim1.Instance->CCR2 = PWM_MAX; - 8000fc2: 639a str r2, [r3, #56] @ 0x38 - HAL_Delay(50); // Settle - 8000fc4: f001 fc92 bl 80028ec + feed_timeout_time = now + (BACKLASH_COMP_TENTH_MM * TIMEOUT_TIME_PER_TENTH_MM) + 200; + 8000f50: 00d2 lsls r2, r2, #3 + 8000f52: 4b42 ldr r3, [pc, #264] @ (800105c ) + 8000f54: 18a4 adds r4, r4, r2 + 8000f56: 601c str r4, [r3, #0] + feed_target_position = total_count + tenths_to_counts(BACKLASH_COMP_TENTH_MM); + 8000f58: 4b43 ldr r3, [pc, #268] @ (8001068 ) + 8000f5a: 4a44 ldr r2, [pc, #272] @ (800106c ) + 8000f5c: 681b ldr r3, [r3, #0] + 8000f5e: 33e1 adds r3, #225 @ 0xe1 + 8000f60: 6013 str r3, [r2, #0] target_count = feed_target_position; - 8000fc8: 4b1e ldr r3, [pc, #120] @ (8001044 ) - feed_state_start_time = now; - 8000fca: 602c str r4, [r5, #0] - target_count = feed_target_position; - 8000fcc: 681b ldr r3, [r3, #0] - 8000fce: 603b str r3, [r7, #0] - feed_state = FEED_STATE_DRIVING; - 8000fd0: 2304 movs r3, #4 - 8000fd2: 7033 strb r3, [r6, #0] + 8000f62: 4a43 ldr r2, [pc, #268] @ (8001070 ) feed_timeout_time = HAL_GetTick() + (feed_distance_tenths * TIMEOUT_TIME_PER_TENTH_MM) + 500; - 8000fd4: f001 fc84 bl 80028e0 - 8000fd8: 4b15 ldr r3, [pc, #84] @ (8001030 ) - 8000fda: 4a16 ldr r2, [pc, #88] @ (8001034 ) - 8000fdc: 2100 movs r1, #0 - 8000fde: 5e59 ldrsh r1, [r3, r1] - 8000fe0: 2364 movs r3, #100 @ 0x64 - 8000fe2: 434b muls r3, r1 - 8000fe4: 33f5 adds r3, #245 @ 0xf5 - 8000fe6: 33ff adds r3, #255 @ 0xff - 8000fe8: 181b adds r3, r3, r0 - 8000fea: e7a2 b.n 8000f32 - feed_state = FEED_STATE_IDLE; - 8000fec: 2300 movs r3, #0 - feed_in_progress = 0; - 8000fee: 4a1b ldr r2, [pc, #108] @ (800105c ) - feed_state = FEED_STATE_IDLE; - 8000ff0: 7033 strb r3, [r6, #0] - feed_in_progress = 0; - 8000ff2: 7013 strb r3, [r2, #0] - last_feed_status = STATUS_COULDNT_REACH; - 8000ff4: 2202 movs r2, #2 - 8000ff6: 4b1a ldr r3, [pc, #104] @ (8001060 ) - 8000ff8: 701a strb r2, [r3, #0] - feed_just_completed = 1; - 8000ffa: 4b1a ldr r3, [pc, #104] @ (8001064 ) - 8000ffc: 3a01 subs r2, #1 - 8000ffe: 701a strb r2, [r3, #0] - feed_fail_count++; - 8001000: 4a1b ldr r2, [pc, #108] @ (8001070 ) - 8001002: 8813 ldrh r3, [r2, #0] - 8001004: 3301 adds r3, #1 - 8001006: b29b uxth r3, r3 - 8001008: 8013 strh r3, [r2, #0] - halt_all(); - 800100a: f7ff fdfb bl 8000c04 - 800100e: e6de b.n 8000dce + 8000f64: 6013 str r3, [r2, #0] + 8000f66: e759 b.n 8000e1c + int32_t error = feed_target_position - total_count; + 8000f68: 4b40 ldr r3, [pc, #256] @ (800106c ) + 8000f6a: 4a3f ldr r2, [pc, #252] @ (8001068 ) + 8000f6c: 681b ldr r3, [r3, #0] + 8000f6e: 6812 ldr r2, [r2, #0] + 8000f70: 1a9b subs r3, r3, r2 + if (error < 0) error = -error; + 8000f72: 17da asrs r2, r3, #31 + 8000f74: 189b adds r3, r3, r2 + 8000f76: 4053 eors r3, r2 + if (error < FEED_POSITION_TOLERANCE) + 8000f78: 2b0e cmp r3, #14 + 8000f7a: dc04 bgt.n 8000f86 + feed_state = FEED_STATE_SETTLING; + 8000f7c: 2307 movs r3, #7 + feed_state_start_time = now; + 8000f7e: 602c str r4, [r5, #0] + feed_state = FEED_STATE_SETTLING; + 8000f80: 7033 strb r3, [r6, #0] + feed_state_duration = FEED_SETTLE_TIME; + 8000f82: 4b33 ldr r3, [pc, #204] @ (8001050 ) + 8000f84: e785 b.n 8000e92 + else if (now > feed_timeout_time) + 8000f86: 4b35 ldr r3, [pc, #212] @ (800105c ) + 8000f88: 681b ldr r3, [r3, #0] + 8000f8a: 429c cmp r4, r3 + 8000f8c: d800 bhi.n 8000f90 + 8000f8e: e745 b.n 8000e1c + feed_state = FEED_STATE_TIMEOUT; + 8000f90: 2309 movs r3, #9 feed_state = FEED_STATE_IDLE; - 8001010: 2300 movs r3, #0 - 8001012: e7a5 b.n 8000f60 - if (error < 0) // overshot - 8001014: 2205 movs r2, #5 - 8001016: 2b00 cmp r3, #0 - 8001018: db00 blt.n 800101c - 800101a: e728 b.n 8000e6e - 800101c: 2305 movs r3, #5 - 800101e: e70f b.n 8000e40 - 8001020: 20000118 .word 0x20000118 - 8001024: 20000114 .word 0x20000114 - 8001028: 20000110 .word 0x20000110 - 800102c: 200000fe .word 0x200000fe - 8001030: 20000108 .word 0x20000108 - 8001034: 2000010c .word 0x2000010c - 8001038: 002c01a0 .word 0x002c01a0 - 800103c: 0001f377 .word 0x0001f377 - 8001040: 20000154 .word 0x20000154 - 8001044: 20000104 .word 0x20000104 - 8001048: 20000150 .word 0x20000150 - 800104c: 20000004 .word 0x20000004 - 8001050: 20000002 .word 0x20000002 - 8001054: 2000011a .word 0x2000011a - 8001058: 200012b0 .word 0x200012b0 - 800105c: 20000121 .word 0x20000121 - 8001060: 20000122 .word 0x20000122 - 8001064: 20000120 .word 0x20000120 - 8001068: 2000011e .word 0x2000011e - 800106c: 20000100 .word 0x20000100 - 8001070: 2000011c .word 0x2000011c - -08001074 : -{ - 8001074: b570 push {r4, r5, r6, lr} - uint8_t command = options[0]; - 8001076: 7803 ldrb r3, [r0, #0] -{ - 8001078: 000c movs r4, r1 - if (command <= 0x0F) - 800107a: 2b0f cmp r3, #15 - 800107c: d80e bhi.n 800109c - size_t start_index = command * VENDOR_SPECIFIC_OPTIONS_LENGTH; - 800107e: 2214 movs r2, #20 - 8001080: 4353 muls r3, r2 - if (start_index < version_len) - 8001082: 2b08 cmp r3, #8 - 8001084: dc1a bgt.n 80010bc - size_t remaining = version_len - start_index; - 8001086: 2509 movs r5, #9 - memcpy(response, VERSION_STRING + start_index, copy_len); - 8001088: 490f ldr r1, [pc, #60] @ (80010c8 ) - size_t remaining = version_len - start_index; - 800108a: 1aed subs r5, r5, r3 - memcpy(response, VERSION_STRING + start_index, copy_len); - 800108c: 1859 adds r1, r3, r1 - 800108e: 002a movs r2, r5 - 8001090: 0020 movs r0, r4 - 8001092: f004 f8a7 bl 80051e4 - response[copy_len] = '\0'; - 8001096: 2300 movs r3, #0 - 8001098: 5563 strb r3, [r4, r5] -} - 800109a: bd70 pop {r4, r5, r6, pc} - switch (command) - 800109c: 2b10 cmp r3, #16 - 800109e: d10c bne.n 80010ba - uint8_t led_mask = options[1]; - 80010a0: 7840 ldrb r0, [r0, #1] - if (set) - 80010a2: 0702 lsls r2, r0, #28 - 80010a4: d5f9 bpl.n 800109a - set_LED(red, green, blue); - 80010a6: 2401 movs r4, #1 - 80010a8: 0002 movs r2, r0 - int green = (led_mask >> 1) & 1; - 80010aa: 0841 lsrs r1, r0, #1 - int red = (led_mask >> 2) & 1; - 80010ac: 0880 lsrs r0, r0, #2 - set_LED(red, green, blue); - 80010ae: 4022 ands r2, r4 - 80010b0: 4021 ands r1, r4 - 80010b2: 4020 ands r0, r4 - 80010b4: f7ff fcf2 bl 8000a9c - 80010b8: e7ef b.n 800109a - memset(response, 0, VENDOR_SPECIFIC_OPTIONS_LENGTH); - 80010ba: 2214 movs r2, #20 - 80010bc: 2100 movs r1, #0 - 80010be: 0020 movs r0, r4 - 80010c0: f004 f864 bl 800518c + 8000f92: 7033 strb r3, [r6, #0] break; - 80010c4: e7e9 b.n 800109a - 80010c6: 46c0 nop @ (mov r8, r8) - 80010c8: 08005221 .word 0x08005221 + 8000f94: e742 b.n 8000e1c + if (elapsed >= feed_state_duration) + 8000f96: 4a2e ldr r2, [pc, #184] @ (8001050 ) + 8000f98: 6812 ldr r2, [r2, #0] + 8000f9a: 4293 cmp r3, r2 + 8000f9c: d200 bcs.n 8000fa0 + 8000f9e: e73d b.n 8000e1c + feed_state = FEED_STATE_COMPLETE; + 8000fa0: 2308 movs r3, #8 + 8000fa2: e7f6 b.n 8000f92 + feed_state = FEED_STATE_IDLE; + 8000fa4: 2300 movs r3, #0 + feed_in_progress = 0; + 8000fa6: 4a39 ldr r2, [pc, #228] @ (800108c ) + feed_state = FEED_STATE_IDLE; + 8000fa8: 7033 strb r3, [r6, #0] + feed_in_progress = 0; + 8000faa: 7013 strb r3, [r2, #0] + last_feed_status = STATUS_OK; + 8000fac: 4a38 ldr r2, [pc, #224] @ (8001090 ) + 8000fae: 7013 strb r3, [r2, #0] + feed_just_completed = 1; + 8000fb0: 2201 movs r2, #1 + 8000fb2: 4b38 ldr r3, [pc, #224] @ (8001094 ) + 8000fb4: 701a strb r2, [r3, #0] + feed_ok_count++; + 8000fb6: 4a38 ldr r2, [pc, #224] @ (8001098 ) + 8000fb8: 8813 ldrh r3, [r2, #0] + 8000fba: 3301 adds r3, #1 + 8000fbc: b29b uxth r3, r3 + 8000fbe: 8013 strh r3, [r2, #0] + break; + 8000fc0: e72c b.n 8000e1c + if (feed_retry_count < FEED_RETRY_LIMIT) + 8000fc2: 4a36 ldr r2, [pc, #216] @ (800109c ) + 8000fc4: 7813 ldrb r3, [r2, #0] + 8000fc6: 2b02 cmp r3, #2 + 8000fc8: d829 bhi.n 800101e + feed_retry_count++; + 8000fca: 3301 adds r3, #1 + 8000fcc: 7013 strb r3, [r2, #0] + feed_retry_total++; + 8000fce: 4a2d ldr r2, [pc, #180] @ (8001084 ) + target_count = total_count - tenths_to_counts(10); + 8000fd0: 4f27 ldr r7, [pc, #156] @ (8001070 ) + feed_retry_total++; + 8000fd2: 8813 ldrh r3, [r2, #0] + HAL_Delay(200); // Let motor reverse past backlash + 8000fd4: 20c8 movs r0, #200 @ 0xc8 + feed_retry_total++; + 8000fd6: 3301 adds r3, #1 + 8000fd8: b29b uxth r3, r3 + 8000fda: 8013 strh r3, [r2, #0] + target_count = total_count - tenths_to_counts(10); + 8000fdc: 4b22 ldr r3, [pc, #136] @ (8001068 ) + 8000fde: 681b ldr r3, [r3, #0] + 8000fe0: 3be1 subs r3, #225 @ 0xe1 + 8000fe2: 603b str r3, [r7, #0] + HAL_Delay(200); // Let motor reverse past backlash + 8000fe4: f001 fc9a bl 800291c + htim1.Instance->CCR1 = PWM_MAX; + 8000fe8: 2296 movs r2, #150 @ 0x96 + 8000fea: 4b27 ldr r3, [pc, #156] @ (8001088 ) + 8000fec: 0112 lsls r2, r2, #4 + 8000fee: 681b ldr r3, [r3, #0] + HAL_Delay(50); // Settle + 8000ff0: 2032 movs r0, #50 @ 0x32 + htim1.Instance->CCR1 = PWM_MAX; + 8000ff2: 635a str r2, [r3, #52] @ 0x34 + htim1.Instance->CCR2 = PWM_MAX; + 8000ff4: 639a str r2, [r3, #56] @ 0x38 + HAL_Delay(50); // Settle + 8000ff6: f001 fc91 bl 800291c + target_count = feed_target_position; + 8000ffa: 4b1c ldr r3, [pc, #112] @ (800106c ) + feed_state_start_time = now; + 8000ffc: 602c str r4, [r5, #0] + target_count = feed_target_position; + 8000ffe: 681b ldr r3, [r3, #0] + 8001000: 603b str r3, [r7, #0] + feed_state = FEED_STATE_DRIVING; + 8001002: 2304 movs r3, #4 + 8001004: 7033 strb r3, [r6, #0] + feed_timeout_time = HAL_GetTick() + (feed_distance_tenths * TIMEOUT_TIME_PER_TENTH_MM) + 500; + 8001006: f001 fc83 bl 8002910 + 800100a: 4b13 ldr r3, [pc, #76] @ (8001058 ) + 800100c: 4a13 ldr r2, [pc, #76] @ (800105c ) + 800100e: 2100 movs r1, #0 + 8001010: 5e59 ldrsh r1, [r3, r1] + 8001012: 2364 movs r3, #100 @ 0x64 + 8001014: 434b muls r3, r1 + 8001016: 33f5 adds r3, #245 @ 0xf5 + 8001018: 33ff adds r3, #255 @ 0xff + 800101a: 181b adds r3, r3, r0 + 800101c: e7a2 b.n 8000f64 + feed_state = FEED_STATE_IDLE; + 800101e: 2300 movs r3, #0 + feed_in_progress = 0; + 8001020: 4a1a ldr r2, [pc, #104] @ (800108c ) + feed_state = FEED_STATE_IDLE; + 8001022: 7033 strb r3, [r6, #0] + feed_in_progress = 0; + 8001024: 7013 strb r3, [r2, #0] + last_feed_status = STATUS_COULDNT_REACH; + 8001026: 2202 movs r2, #2 + 8001028: 4b19 ldr r3, [pc, #100] @ (8001090 ) + 800102a: 701a strb r2, [r3, #0] + feed_just_completed = 1; + 800102c: 4b19 ldr r3, [pc, #100] @ (8001094 ) + 800102e: 3a01 subs r2, #1 + 8001030: 701a strb r2, [r3, #0] + feed_fail_count++; + 8001032: 4a1b ldr r2, [pc, #108] @ (80010a0 ) + 8001034: 8813 ldrh r3, [r2, #0] + 8001036: 3301 adds r3, #1 + 8001038: b29b uxth r3, r3 + 800103a: 8013 strh r3, [r2, #0] + halt_all(); + 800103c: f7ff fde6 bl 8000c0c + 8001040: e6ec b.n 8000e1c + feed_state = FEED_STATE_IDLE; + 8001042: 2300 movs r3, #0 + 8001044: e7a5 b.n 8000f92 + 8001046: 46c0 nop @ (mov r8, r8) + 8001048: 2000011c .word 0x2000011c + 800104c: 20000118 .word 0x20000118 + 8001050: 20000114 .word 0x20000114 + 8001054: 20000102 .word 0x20000102 + 8001058: 2000010c .word 0x2000010c + 800105c: 20000110 .word 0x20000110 + 8001060: 002c01a0 .word 0x002c01a0 + 8001064: 0001f377 .word 0x0001f377 + 8001068: 20000158 .word 0x20000158 + 800106c: 20000108 .word 0x20000108 + 8001070: 20000154 .word 0x20000154 + 8001074: 20000003 .word 0x20000003 + 8001078: 20000002 .word 0x20000002 + 800107c: 20000008 .word 0x20000008 + 8001080: 20000004 .word 0x20000004 + 8001084: 2000011e .word 0x2000011e + 8001088: 200012b4 .word 0x200012b4 + 800108c: 20000125 .word 0x20000125 + 8001090: 20000126 .word 0x20000126 + 8001094: 20000124 .word 0x20000124 + 8001098: 20000122 .word 0x20000122 + 800109c: 20000104 .word 0x20000104 + 80010a0: 20000120 .word 0x20000120 -080010cc : +080010a4 : +{ + 80010a4: b570 push {r4, r5, r6, lr} + uint8_t command = options[0]; + 80010a6: 7803 ldrb r3, [r0, #0] +{ + 80010a8: 000c movs r4, r1 + if (command <= 0x0F) + 80010aa: 2b0f cmp r3, #15 + 80010ac: d80e bhi.n 80010cc + size_t start_index = command * VENDOR_SPECIFIC_OPTIONS_LENGTH; + 80010ae: 2214 movs r2, #20 + 80010b0: 4353 muls r3, r2 + if (start_index < version_len) + 80010b2: 2b08 cmp r3, #8 + 80010b4: dc1a bgt.n 80010ec + size_t remaining = version_len - start_index; + 80010b6: 2509 movs r5, #9 + memcpy(response, VERSION_STRING + start_index, copy_len); + 80010b8: 490f ldr r1, [pc, #60] @ (80010f8 ) + size_t remaining = version_len - start_index; + 80010ba: 1aed subs r5, r5, r3 + memcpy(response, VERSION_STRING + start_index, copy_len); + 80010bc: 1859 adds r1, r3, r1 + 80010be: 002a movs r2, r5 + 80010c0: 0020 movs r0, r4 + 80010c2: f004 f909 bl 80052d8 + response[copy_len] = '\0'; + 80010c6: 2300 movs r3, #0 + 80010c8: 5563 strb r3, [r4, r5] +} + 80010ca: bd70 pop {r4, r5, r6, pc} + switch (command) + 80010cc: 2b10 cmp r3, #16 + 80010ce: d10c bne.n 80010ea + uint8_t led_mask = options[1]; + 80010d0: 7840 ldrb r0, [r0, #1] + if (set) + 80010d2: 0702 lsls r2, r0, #28 + 80010d4: d5f9 bpl.n 80010ca + set_LED(red, green, blue); + 80010d6: 2401 movs r4, #1 + 80010d8: 0002 movs r2, r0 + int green = (led_mask >> 1) & 1; + 80010da: 0841 lsrs r1, r0, #1 + int red = (led_mask >> 2) & 1; + 80010dc: 0880 lsrs r0, r0, #2 + set_LED(red, green, blue); + 80010de: 4022 ands r2, r4 + 80010e0: 4021 ands r1, r4 + 80010e2: 4020 ands r0, r4 + 80010e4: f7ff fcda bl 8000a9c + 80010e8: e7ef b.n 80010ca + memset(response, 0, VENDOR_SPECIFIC_OPTIONS_LENGTH); + 80010ea: 2214 movs r2, #20 + 80010ec: 2100 movs r1, #0 + 80010ee: 0020 movs r0, r4 + 80010f0: f004 f8c6 bl 8005280 + break; + 80010f4: e7e9 b.n 80010ca + 80010f6: 46c0 nop @ (mov r8, r8) + 80010f8: 08005315 .word 0x08005315 + +080010fc : uint32_t cycles = us * 48; - 80010cc: 2330 movs r3, #48 @ 0x30 - 80010ce: 4358 muls r0, r3 + 80010fc: 2330 movs r3, #48 @ 0x30 + 80010fe: 4358 muls r0, r3 uint32_t elapsed = 0; - 80010d0: 2300 movs r3, #0 + 8001100: 2300 movs r3, #0 { - 80010d2: b570 push {r4, r5, r6, lr} + 8001102: b570 push {r4, r5, r6, lr} uint32_t reload = SysTick->LOAD; - 80010d4: 4c08 ldr r4, [pc, #32] @ (80010f8 ) - 80010d6: 6865 ldr r5, [r4, #4] + 8001104: 4c08 ldr r4, [pc, #32] @ (8001128 ) + 8001106: 6865 ldr r5, [r4, #4] uint32_t prev = SysTick->VAL; - 80010d8: 68a2 ldr r2, [r4, #8] + 8001108: 68a2 ldr r2, [r4, #8] elapsed += prev + reload + 1 - now; - 80010da: 3501 adds r5, #1 + 800110a: 3501 adds r5, #1 while (elapsed < cycles) - 80010dc: 4283 cmp r3, r0 - 80010de: d300 bcc.n 80010e2 + 800110c: 4283 cmp r3, r0 + 800110e: d300 bcc.n 8001112 } - 80010e0: bd70 pop {r4, r5, r6, pc} + 8001110: bd70 pop {r4, r5, r6, pc} uint32_t now = SysTick->VAL; - 80010e2: 68a1 ldr r1, [r4, #8] + 8001112: 68a1 ldr r1, [r4, #8] if (now <= prev) - 80010e4: 428a cmp r2, r1 - 80010e6: d303 bcc.n 80010f0 + 8001114: 428a cmp r2, r1 + 8001116: d303 bcc.n 8001120 elapsed += prev - now; - 80010e8: 18d3 adds r3, r2, r3 - 80010ea: 1a5b subs r3, r3, r1 + 8001118: 18d3 adds r3, r2, r3 + 800111a: 1a5b subs r3, r3, r1 { - 80010ec: 000a movs r2, r1 - 80010ee: e7f5 b.n 80010dc + 800111c: 000a movs r2, r1 + 800111e: e7f5 b.n 800110c elapsed += prev + reload + 1 - now; - 80010f0: 1a6e subs r6, r5, r1 - 80010f2: 18b2 adds r2, r6, r2 - 80010f4: 189b adds r3, r3, r2 - 80010f6: e7f9 b.n 80010ec - 80010f8: e000e010 .word 0xe000e010 + 8001120: 1a6e subs r6, r5, r1 + 8001122: 18b2 adds r2, r6, r2 + 8001124: 189b adds r3, r3, r2 + 8001126: e7f9 b.n 800111c + 8001128: e000e010 .word 0xe000e010 -080010fc : +0800112c : return (ONEWIRE_GPIO_Port->IDR & ONEWIRE_Pin) ? 1 : 0; - 80010fc: 23a0 movs r3, #160 @ 0xa0 - 80010fe: 05db lsls r3, r3, #23 - 8001100: 6918 ldr r0, [r3, #16] - 8001102: 0640 lsls r0, r0, #25 - 8001104: 0fc0 lsrs r0, r0, #31 + 800112c: 23a0 movs r3, #160 @ 0xa0 + 800112e: 05db lsls r3, r3, #23 + 8001130: 6918 ldr r0, [r3, #16] + 8001132: 0640 lsls r0, r0, #25 + 8001134: 0fc0 lsrs r0, r0, #31 } - 8001106: 4770 bx lr + 8001136: 4770 bx lr -08001108 : -{ - 8001108: b570 push {r4, r5, r6, lr} - ONEWIRE_GPIO_Port->BRR = ONEWIRE_Pin; // Direct register for speed - 800110a: 24a0 movs r4, #160 @ 0xa0 - 800110c: 2540 movs r5, #64 @ 0x40 - onewire_delay_us(ONEWIRE_DELAY_H); // 480us - 800110e: 20f0 movs r0, #240 @ 0xf0 - ONEWIRE_GPIO_Port->BRR = ONEWIRE_Pin; // Direct register for speed - 8001110: 05e4 lsls r4, r4, #23 - 8001112: 62a5 str r5, [r4, #40] @ 0x28 - onewire_delay_us(ONEWIRE_DELAY_H); // 480us - 8001114: 0040 lsls r0, r0, #1 - 8001116: f7ff ffd9 bl 80010cc - ONEWIRE_GPIO_Port->BSRR = ONEWIRE_Pin; // Direct register for speed - 800111a: 61a5 str r5, [r4, #24] - onewire_delay_us(ONEWIRE_DELAY_I); // 70us - 800111c: 2046 movs r0, #70 @ 0x46 - 800111e: f7ff ffd5 bl 80010cc - presence = !onewire_read_bit(); // Device pulls low if present - 8001122: f7ff ffeb bl 80010fc - 8001126: 0004 movs r4, r0 - onewire_delay_us(ONEWIRE_DELAY_J); // 410us - 8001128: 20cd movs r0, #205 @ 0xcd - 800112a: 0040 lsls r0, r0, #1 - 800112c: f7ff ffce bl 80010cc - return presence; - 8001130: 2001 movs r0, #1 - 8001132: 4060 eors r0, r4 - 8001134: b2c0 uxtb r0, r0 -} - 8001136: bd70 pop {r4, r5, r6, pc} - -08001138 : +08001138 : { 8001138: b570 push {r4, r5, r6, lr} - 800113a: 25a0 movs r5, #160 @ 0xa0 - 800113c: 2440 movs r4, #64 @ 0x40 - 800113e: 05ed lsls r5, r5, #23 ONEWIRE_GPIO_Port->BRR = ONEWIRE_Pin; // Direct register for speed - 8001140: 62ac str r4, [r5, #40] @ 0x28 + 800113a: 24a0 movs r4, #160 @ 0xa0 + 800113c: 2540 movs r5, #64 @ 0x40 + onewire_delay_us(ONEWIRE_DELAY_H); // 480us + 800113e: 20f0 movs r0, #240 @ 0xf0 + ONEWIRE_GPIO_Port->BRR = ONEWIRE_Pin; // Direct register for speed + 8001140: 05e4 lsls r4, r4, #23 + 8001142: 62a5 str r5, [r4, #40] @ 0x28 + onewire_delay_us(ONEWIRE_DELAY_H); // 480us + 8001144: 0040 lsls r0, r0, #1 + 8001146: f7ff ffd9 bl 80010fc + ONEWIRE_GPIO_Port->BSRR = ONEWIRE_Pin; // Direct register for speed + 800114a: 61a5 str r5, [r4, #24] + onewire_delay_us(ONEWIRE_DELAY_I); // 70us + 800114c: 2046 movs r0, #70 @ 0x46 + 800114e: f7ff ffd5 bl 80010fc + presence = !onewire_read_bit(); // Device pulls low if present + 8001152: f7ff ffeb bl 800112c + 8001156: 0004 movs r4, r0 + onewire_delay_us(ONEWIRE_DELAY_J); // 410us + 8001158: 20cd movs r0, #205 @ 0xcd + 800115a: 0040 lsls r0, r0, #1 + 800115c: f7ff ffce bl 80010fc + return presence; + 8001160: 2001 movs r0, #1 + 8001162: 4060 eors r0, r4 + 8001164: b2c0 uxtb r0, r0 +} + 8001166: bd70 pop {r4, r5, r6, pc} + +08001168 : +{ + 8001168: b570 push {r4, r5, r6, lr} + 800116a: 25a0 movs r5, #160 @ 0xa0 + 800116c: 2440 movs r4, #64 @ 0x40 + 800116e: 05ed lsls r5, r5, #23 + ONEWIRE_GPIO_Port->BRR = ONEWIRE_Pin; // Direct register for speed + 8001170: 62ac str r4, [r5, #40] @ 0x28 if (bit) - 8001142: 2800 cmp r0, #0 - 8001144: d007 beq.n 8001156 + 8001172: 2800 cmp r0, #0 + 8001174: d007 beq.n 8001186 onewire_delay_us(ONEWIRE_DELAY_A); // 6us - 8001146: 2006 movs r0, #6 - 8001148: f7ff ffc0 bl 80010cc + 8001176: 2006 movs r0, #6 + 8001178: f7ff ffc0 bl 80010fc onewire_delay_us(ONEWIRE_DELAY_B); // 64us - 800114c: 0020 movs r0, r4 + 800117c: 0020 movs r0, r4 ONEWIRE_GPIO_Port->BSRR = ONEWIRE_Pin; // Direct register for speed - 800114e: 61ac str r4, [r5, #24] + 800117e: 61ac str r4, [r5, #24] onewire_delay_us(ONEWIRE_DELAY_D); // 10us - 8001150: f7ff ffbc bl 80010cc + 8001180: f7ff ffbc bl 80010fc } - 8001154: bd70 pop {r4, r5, r6, pc} + 8001184: bd70 pop {r4, r5, r6, pc} onewire_delay_us(ONEWIRE_DELAY_C); // 60us - 8001156: 203c movs r0, #60 @ 0x3c - 8001158: f7ff ffb8 bl 80010cc + 8001186: 203c movs r0, #60 @ 0x3c + 8001188: f7ff ffb8 bl 80010fc onewire_delay_us(ONEWIRE_DELAY_D); // 10us - 800115c: 200a movs r0, #10 + 800118c: 200a movs r0, #10 ONEWIRE_GPIO_Port->BSRR = ONEWIRE_Pin; // Direct register for speed - 800115e: 61ac str r4, [r5, #24] + 800118e: 61ac str r4, [r5, #24] onewire_delay_us(ONEWIRE_DELAY_D); // 10us - 8001160: e7f6 b.n 8001150 + 8001190: e7f6 b.n 8001180 -08001162 : +08001192 : { - 8001162: b570 push {r4, r5, r6, lr} + 8001192: b570 push {r4, r5, r6, lr} ONEWIRE_GPIO_Port->BRR = ONEWIRE_Pin; // Direct register for speed - 8001164: 24a0 movs r4, #160 @ 0xa0 - 8001166: 2540 movs r5, #64 @ 0x40 - 8001168: 05e4 lsls r4, r4, #23 - 800116a: 62a5 str r5, [r4, #40] @ 0x28 + 8001194: 24a0 movs r4, #160 @ 0xa0 + 8001196: 2540 movs r5, #64 @ 0x40 + 8001198: 05e4 lsls r4, r4, #23 + 800119a: 62a5 str r5, [r4, #40] @ 0x28 onewire_delay_us(ONEWIRE_DELAY_A); // 6us - 800116c: 2006 movs r0, #6 - 800116e: f7ff ffad bl 80010cc + 800119c: 2006 movs r0, #6 + 800119e: f7ff ffad bl 80010fc ONEWIRE_GPIO_Port->BSRR = ONEWIRE_Pin; // Direct register for speed - 8001172: 61a5 str r5, [r4, #24] + 80011a2: 61a5 str r5, [r4, #24] onewire_delay_us(ONEWIRE_DELAY_E); // 9us - 8001174: 2009 movs r0, #9 - 8001176: f7ff ffa9 bl 80010cc + 80011a4: 2009 movs r0, #9 + 80011a6: f7ff ffa9 bl 80010fc bit = onewire_read_bit(); - 800117a: f7ff ffbf bl 80010fc - 800117e: 0004 movs r4, r0 + 80011aa: f7ff ffbf bl 800112c + 80011ae: 0004 movs r4, r0 onewire_delay_us(ONEWIRE_DELAY_F); // 55us - 8001180: 2037 movs r0, #55 @ 0x37 - 8001182: f7ff ffa3 bl 80010cc + 80011b0: 2037 movs r0, #55 @ 0x37 + 80011b2: f7ff ffa3 bl 80010fc } - 8001186: 0020 movs r0, r4 - 8001188: bd70 pop {r4, r5, r6, pc} + 80011b6: 0020 movs r0, r4 + 80011b8: bd70 pop {r4, r5, r6, pc} -0800118a : +080011ba : { - 800118a: b570 push {r4, r5, r6, lr} - 800118c: 0004 movs r4, r0 - 800118e: 2508 movs r5, #8 + 80011ba: b570 push {r4, r5, r6, lr} + 80011bc: 0004 movs r4, r0 + 80011be: 2508 movs r5, #8 onewire_write_bit(byte & 0x01); - 8001190: 2601 movs r6, #1 - 8001192: 0020 movs r0, r4 + 80011c0: 2601 movs r6, #1 + 80011c2: 0020 movs r0, r4 for (int i = 0; i < 8; i++) - 8001194: 3d01 subs r5, #1 + 80011c4: 3d01 subs r5, #1 onewire_write_bit(byte & 0x01); - 8001196: 4030 ands r0, r6 - 8001198: f7ff ffce bl 8001138 + 80011c6: 4030 ands r0, r6 + 80011c8: f7ff ffce bl 8001168 byte >>= 1; - 800119c: 0864 lsrs r4, r4, #1 + 80011cc: 0864 lsrs r4, r4, #1 for (int i = 0; i < 8; i++) - 800119e: 2d00 cmp r5, #0 - 80011a0: d1f7 bne.n 8001192 + 80011ce: 2d00 cmp r5, #0 + 80011d0: d1f7 bne.n 80011c2 } - 80011a2: bd70 pop {r4, r5, r6, pc} + 80011d2: bd70 pop {r4, r5, r6, pc} -080011a4 : +080011d4 : { - 80011a4: b570 push {r4, r5, r6, lr} - 80011a6: 2508 movs r5, #8 + 80011d4: b570 push {r4, r5, r6, lr} + 80011d6: 2508 movs r5, #8 uint8_t byte = 0; - 80011a8: 2400 movs r4, #0 + 80011d8: 2400 movs r4, #0 if (onewire_read_bit_slot()) - 80011aa: 267f movs r6, #127 @ 0x7f - 80011ac: f7ff ffd9 bl 8001162 - 80011b0: 4240 negs r0, r0 + 80011da: 267f movs r6, #127 @ 0x7f + 80011dc: f7ff ffd9 bl 8001192 + 80011e0: 4240 negs r0, r0 byte >>= 1; - 80011b2: 0864 lsrs r4, r4, #1 + 80011e2: 0864 lsrs r4, r4, #1 if (onewire_read_bit_slot()) - 80011b4: 43b0 bics r0, r6 - 80011b6: 4304 orrs r4, r0 + 80011e4: 43b0 bics r0, r6 + 80011e6: 4304 orrs r4, r0 for (int i = 0; i < 8; i++) - 80011b8: 3d01 subs r5, #1 + 80011e8: 3d01 subs r5, #1 if (onewire_read_bit_slot()) - 80011ba: b2e4 uxtb r4, r4 + 80011ea: b2e4 uxtb r4, r4 for (int i = 0; i < 8; i++) - 80011bc: 2d00 cmp r5, #0 - 80011be: d1f5 bne.n 80011ac + 80011ec: 2d00 cmp r5, #0 + 80011ee: d1f5 bne.n 80011dc } - 80011c0: 0020 movs r0, r4 - 80011c2: bd70 pop {r4, r5, r6, pc} + 80011f0: 0020 movs r0, r4 + 80011f2: bd70 pop {r4, r5, r6, pc} -080011c4 : +080011f4 : { - 80011c4: b510 push {r4, lr} - 80011c6: b672 cpsid i + 80011f4: b510 push {r4, lr} + 80011f6: b672 cpsid i if (!onewire_reset()) - 80011c8: f7ff ff9e bl 8001108 - 80011cc: 2800 cmp r0, #0 - 80011ce: d102 bne.n 80011d6 + 80011f8: f7ff ff9e bl 8001138 + 80011fc: 2800 cmp r0, #0 + 80011fe: d102 bne.n 8001206 __ASM volatile ("cpsie i" : : : "memory"); - 80011d0: b662 cpsie i + 8001200: b662 cpsie i return FLOOR_ADDRESS_NOT_DETECTED; - 80011d2: 30ff adds r0, #255 @ 0xff + 8001202: 30ff adds r0, #255 @ 0xff } - 80011d4: bd10 pop {r4, pc} + 8001204: bd10 pop {r4, pc} onewire_write_byte(DS2431_SKIP_ROM); - 80011d6: 20cc movs r0, #204 @ 0xcc - 80011d8: f7ff ffd7 bl 800118a + 8001206: 20cc movs r0, #204 @ 0xcc + 8001208: f7ff ffd7 bl 80011ba onewire_write_byte(DS2431_READ_MEMORY); - 80011dc: 20f0 movs r0, #240 @ 0xf0 - 80011de: f7ff ffd4 bl 800118a + 800120c: 20f0 movs r0, #240 @ 0xf0 + 800120e: f7ff ffd4 bl 80011ba onewire_write_byte(FLOOR_ADDRESS_LOCATION & 0xFF); - 80011e2: 2000 movs r0, #0 - 80011e4: f7ff ffd1 bl 800118a + 8001212: 2000 movs r0, #0 + 8001214: f7ff ffd1 bl 80011ba onewire_write_byte((FLOOR_ADDRESS_LOCATION >> 8) & 0xFF); - 80011e8: 2000 movs r0, #0 - 80011ea: f7ff ffce bl 800118a + 8001218: 2000 movs r0, #0 + 800121a: f7ff ffce bl 80011ba uint8_t address = onewire_read_byte(); - 80011ee: f7ff ffd9 bl 80011a4 - 80011f2: b662 cpsie i + 800121e: f7ff ffd9 bl 80011d4 + 8001222: b662 cpsie i return address; - 80011f4: e7ee b.n 80011d4 + 8001224: e7ee b.n 8001204 -080011f6 : +08001226 : { - 80011f6: b5f8 push {r3, r4, r5, r6, r7, lr} - 80011f8: 0004 movs r4, r0 + 8001226: b5f8 push {r3, r4, r5, r6, r7, lr} + 8001228: 0004 movs r4, r0 __ASM volatile ("cpsid i" : : : "memory"); - 80011fa: b672 cpsid i + 800122a: b672 cpsid i if (!onewire_reset()) - 80011fc: f7ff ff84 bl 8001108 - 8001200: 2800 cmp r0, #0 - 8001202: d102 bne.n 800120a + 800122c: f7ff ff84 bl 8001138 + 8001230: 2800 cmp r0, #0 + 8001232: d102 bne.n 800123a __ASM volatile ("cpsie i" : : : "memory"); - 8001204: b662 cpsie i + 8001234: b662 cpsie i return 0; // Device not present - 8001206: 2000 movs r0, #0 + 8001236: 2000 movs r0, #0 } - 8001208: bdf8 pop {r3, r4, r5, r6, r7, pc} + 8001238: bdf8 pop {r3, r4, r5, r6, r7, pc} onewire_write_byte(DS2431_SKIP_ROM); - 800120a: 20cc movs r0, #204 @ 0xcc - 800120c: f7ff ffbd bl 800118a + 800123a: 20cc movs r0, #204 @ 0xcc + 800123c: f7ff ffbd bl 80011ba onewire_write_byte(DS2431_WRITE_SCRATCHPAD); - 8001210: 200f movs r0, #15 - 8001212: f7ff ffba bl 800118a + 8001240: 200f movs r0, #15 + 8001242: f7ff ffba bl 80011ba onewire_write_byte(FLOOR_ADDRESS_LOCATION & 0xFF); - 8001216: 2000 movs r0, #0 - 8001218: f7ff ffb7 bl 800118a + 8001246: 2000 movs r0, #0 + 8001248: f7ff ffb7 bl 80011ba onewire_write_byte((FLOOR_ADDRESS_LOCATION >> 8) & 0xFF); - 800121c: 2000 movs r0, #0 - 800121e: f7ff ffb4 bl 800118a + 800124c: 2000 movs r0, #0 + 800124e: f7ff ffb4 bl 80011ba onewire_write_byte(address); - 8001222: 0020 movs r0, r4 - 8001224: f7ff ffb1 bl 800118a - 8001228: 2507 movs r5, #7 + 8001252: 0020 movs r0, r4 + 8001254: f7ff ffb1 bl 80011ba + 8001258: 2507 movs r5, #7 onewire_write_byte(0xFF); // Pad with 0xFF - 800122a: 20ff movs r0, #255 @ 0xff + 800125a: 20ff movs r0, #255 @ 0xff for (int i = 1; i < 8; i++) - 800122c: 3d01 subs r5, #1 + 800125c: 3d01 subs r5, #1 onewire_write_byte(0xFF); // Pad with 0xFF - 800122e: f7ff ffac bl 800118a + 800125e: f7ff ffac bl 80011ba for (int i = 1; i < 8; i++) - 8001232: 2d00 cmp r5, #0 - 8001234: d1f9 bne.n 800122a + 8001262: 2d00 cmp r5, #0 + 8001264: d1f9 bne.n 800125a onewire_delay_us(100); - 8001236: 2064 movs r0, #100 @ 0x64 - 8001238: f7ff ff48 bl 80010cc + 8001266: 2064 movs r0, #100 @ 0x64 + 8001268: f7ff ff48 bl 80010fc if (!onewire_reset()) - 800123c: f7ff ff64 bl 8001108 - 8001240: 2800 cmp r0, #0 - 8001242: d0df beq.n 8001204 + 800126c: f7ff ff64 bl 8001138 + 8001270: 2800 cmp r0, #0 + 8001272: d0df beq.n 8001234 onewire_write_byte(DS2431_SKIP_ROM); - 8001244: 20cc movs r0, #204 @ 0xcc - 8001246: f7ff ffa0 bl 800118a + 8001274: 20cc movs r0, #204 @ 0xcc + 8001276: f7ff ffa0 bl 80011ba onewire_write_byte(DS2431_READ_SCRATCHPAD); - 800124a: 20aa movs r0, #170 @ 0xaa - 800124c: f7ff ff9d bl 800118a + 800127a: 20aa movs r0, #170 @ 0xaa + 800127c: f7ff ff9d bl 80011ba uint8_t ta1 = onewire_read_byte(); // Target address 1 - 8001250: f7ff ffa8 bl 80011a4 - 8001254: 0007 movs r7, r0 + 8001280: f7ff ffa8 bl 80011d4 + 8001284: 0007 movs r7, r0 uint8_t ta2 = onewire_read_byte(); // Target address 2 - 8001256: f7ff ffa5 bl 80011a4 - 800125a: 0006 movs r6, r0 + 8001286: f7ff ffa5 bl 80011d4 + 800128a: 0006 movs r6, r0 uint8_t es = onewire_read_byte(); // E/S register - 800125c: f7ff ffa2 bl 80011a4 - 8001260: 0005 movs r5, r0 + 800128c: f7ff ffa2 bl 80011d4 + 8001290: 0005 movs r5, r0 uint8_t verify = onewire_read_byte(); - 8001262: f7ff ff9f bl 80011a4 + 8001292: f7ff ff9f bl 80011d4 if (verify != address) - 8001266: 4284 cmp r4, r0 - 8001268: d1cc bne.n 8001204 + 8001296: 4284 cmp r4, r0 + 8001298: d1cc bne.n 8001234 onewire_read_byte(); - 800126a: f7ff ff9b bl 80011a4 - 800126e: f7ff ff99 bl 80011a4 - 8001272: f7ff ff97 bl 80011a4 - 8001276: f7ff ff95 bl 80011a4 - 800127a: f7ff ff93 bl 80011a4 - 800127e: f7ff ff91 bl 80011a4 - 8001282: f7ff ff8f bl 80011a4 + 800129a: f7ff ff9b bl 80011d4 + 800129e: f7ff ff99 bl 80011d4 + 80012a2: f7ff ff97 bl 80011d4 + 80012a6: f7ff ff95 bl 80011d4 + 80012aa: f7ff ff93 bl 80011d4 + 80012ae: f7ff ff91 bl 80011d4 + 80012b2: f7ff ff8f bl 80011d4 if (!onewire_reset()) - 8001286: f7ff ff3f bl 8001108 - 800128a: 2800 cmp r0, #0 - 800128c: d0ba beq.n 8001204 + 80012b6: f7ff ff3f bl 8001138 + 80012ba: 2800 cmp r0, #0 + 80012bc: d0ba beq.n 8001234 onewire_write_byte(DS2431_SKIP_ROM); - 800128e: 20cc movs r0, #204 @ 0xcc - 8001290: f7ff ff7b bl 800118a + 80012be: 20cc movs r0, #204 @ 0xcc + 80012c0: f7ff ff7b bl 80011ba onewire_write_byte(DS2431_COPY_SCRATCHPAD); - 8001294: 2055 movs r0, #85 @ 0x55 - 8001296: f7ff ff78 bl 800118a + 80012c4: 2055 movs r0, #85 @ 0x55 + 80012c6: f7ff ff78 bl 80011ba onewire_write_byte(ta1); - 800129a: 0038 movs r0, r7 - 800129c: f7ff ff75 bl 800118a + 80012ca: 0038 movs r0, r7 + 80012cc: f7ff ff75 bl 80011ba onewire_write_byte(ta2); - 80012a0: 0030 movs r0, r6 - 80012a2: f7ff ff72 bl 800118a + 80012d0: 0030 movs r0, r6 + 80012d2: f7ff ff72 bl 80011ba onewire_write_byte(es); - 80012a6: 0028 movs r0, r5 - 80012a8: f7ff ff6f bl 800118a - 80012ac: b662 cpsie i + 80012d6: 0028 movs r0, r5 + 80012d8: f7ff ff6f bl 80011ba + 80012dc: b662 cpsie i HAL_Delay(15); - 80012ae: 200f movs r0, #15 - 80012b0: f001 fb1c bl 80028ec + 80012de: 200f movs r0, #15 + 80012e0: f001 fb1c bl 800291c uint8_t read_back = read_floor_address(); - 80012b4: f7ff ff86 bl 80011c4 + 80012e4: f7ff ff86 bl 80011f4 return (read_back == address) ? 1 : 0; - 80012b8: 1a20 subs r0, r4, r0 - 80012ba: 4243 negs r3, r0 - 80012bc: 4158 adcs r0, r3 - 80012be: b2c0 uxtb r0, r0 - 80012c0: e7a2 b.n 8001208 + 80012e8: 1a20 subs r0, r4, r0 + 80012ea: 4243 negs r3, r0 + 80012ec: 4158 adcs r0, r3 + 80012ee: b2c0 uxtb r0, r0 + 80012f0: e7a2 b.n 8001238 ... -080012c4 : +080012f4 : { - 80012c4: b5f0 push {r4, r5, r6, r7, lr} + 80012f4: b5f0 push {r4, r5, r6, r7, lr} last_rx_size = size; - 80012c6: 4bbb ldr r3, [pc, #748] @ (80015b4 ) + 80012f6: 4bbb ldr r3, [pc, #748] @ (80015e4 ) { - 80012c8: b08b sub sp, #44 @ 0x2c + 80012f8: b08b sub sp, #44 @ 0x2c last_rx_size = size; - 80012ca: 7019 strb r1, [r3, #0] - 80012cc: 2300 movs r3, #0 + 80012fa: 7019 strb r1, [r3, #0] + 80012fc: 2300 movs r3, #0 { - 80012ce: 0005 movs r5, r0 + 80012fe: 0005 movs r5, r0 for (uint8_t i = 0; i < 8 && i < size; i++) last_rx_bytes[i] = buffer[i]; - 80012d0: 48b9 ldr r0, [pc, #740] @ (80015b8 ) - 80012d2: b2da uxtb r2, r3 - 80012d4: 4291 cmp r1, r2 - 80012d6: d807 bhi.n 80012e8 + 8001300: 48b9 ldr r0, [pc, #740] @ (80015e8 ) + 8001302: b2da uxtb r2, r3 + 8001304: 4291 cmp r1, r2 + 8001306: d807 bhi.n 8001318 if (size >= 1 && buffer[0] == my_address) - 80012d8: 2900 cmp r1, #0 - 80012da: d10a bne.n 80012f2 + 8001308: 2900 cmp r1, #0 + 800130a: d10a bne.n 8001322 drop_size++; - 80012dc: 4ab7 ldr r2, [pc, #732] @ (80015bc ) + 800130c: 4ab7 ldr r2, [pc, #732] @ (80015ec ) drop_addr++; - 80012de: 8813 ldrh r3, [r2, #0] - 80012e0: 3301 adds r3, #1 - 80012e2: b29b uxth r3, r3 - 80012e4: 8013 strh r3, [r2, #0] + 800130e: 8813 ldrh r3, [r2, #0] + 8001310: 3301 adds r3, #1 + 8001312: b29b uxth r3, r3 + 8001314: 8013 strh r3, [r2, #0] return; // message not for us - 80012e6: e036 b.n 8001356 + 8001316: e036 b.n 8001386 for (uint8_t i = 0; i < 8 && i < size; i++) last_rx_bytes[i] = buffer[i]; - 80012e8: 5cea ldrb r2, [r5, r3] - 80012ea: 54c2 strb r2, [r0, r3] - 80012ec: 3301 adds r3, #1 - 80012ee: 2b08 cmp r3, #8 - 80012f0: d1ef bne.n 80012d2 + 8001318: 5cea ldrb r2, [r5, r3] + 800131a: 54c2 strb r2, [r0, r3] + 800131c: 3301 adds r3, #1 + 800131e: 2b08 cmp r3, #8 + 8001320: d1ef bne.n 8001302 if (size >= 1 && buffer[0] == my_address) - 80012f2: 4fb3 ldr r7, [pc, #716] @ (80015c0 ) - 80012f4: 782a ldrb r2, [r5, #0] - 80012f6: 783b ldrb r3, [r7, #0] - 80012f8: 429a cmp r2, r3 - 80012fa: d02e beq.n 800135a + 8001322: 4fb3 ldr r7, [pc, #716] @ (80015f0 ) + 8001324: 782a ldrb r2, [r5, #0] + 8001326: 783b ldrb r3, [r7, #0] + 8001328: 429a cmp r2, r3 + 800132a: d02e beq.n 800138a if (size < sizeof(PhotonPacketHeader) + 1) // header + at least commandId - 80012fc: 2905 cmp r1, #5 - 80012fe: d9ed bls.n 80012dc + 800132c: 2905 cmp r1, #5 + 800132e: d9ed bls.n 800130c uint32_t crc; } CRC8_107; static inline void CRC8_107_init(CRC8_107 *ctx) { ctx->crc = 0x0u; - 8001300: 2400 movs r4, #0 + 8001330: 2400 movs r4, #0 last_rx_to = header->toAddress; - 8001302: 4bb0 ldr r3, [pc, #704] @ (80015c4 ) - 8001304: 7829 ldrb r1, [r5, #0] + 8001332: 4bb0 ldr r3, [pc, #704] @ (80015f4 ) + 8001334: 7829 ldrb r1, [r5, #0] CRC8_107_add(&rx_crc, header->toAddress); - 8001306: a801 add r0, sp, #4 + 8001336: a801 add r0, sp, #4 last_rx_to = header->toAddress; - 8001308: 7019 strb r1, [r3, #0] - 800130a: 9401 str r4, [sp, #4] + 8001338: 7019 strb r1, [r3, #0] + 800133a: 9401 str r4, [sp, #4] CRC8_107_add(&rx_crc, header->toAddress); - 800130c: f7ff fa1e bl 800074c + 800133c: f7ff fa06 bl 800074c CRC8_107_add(&rx_crc, header->fromAddress); - 8001310: 7869 ldrb r1, [r5, #1] - 8001312: a801 add r0, sp, #4 - 8001314: f7ff fa1a bl 800074c + 8001340: 7869 ldrb r1, [r5, #1] + 8001342: a801 add r0, sp, #4 + 8001344: f7ff fa02 bl 800074c CRC8_107_add(&rx_crc, header->packetId); - 8001318: 78a9 ldrb r1, [r5, #2] - 800131a: a801 add r0, sp, #4 - 800131c: f7ff fa16 bl 800074c + 8001348: 78a9 ldrb r1, [r5, #2] + 800134a: a801 add r0, sp, #4 + 800134c: f7ff f9fe bl 800074c CRC8_107_add(&rx_crc, header->payloadLength); - 8001320: 78e9 ldrb r1, [r5, #3] - 8001322: a801 add r0, sp, #4 - 8001324: f7ff fa12 bl 800074c + 8001350: 78e9 ldrb r1, [r5, #3] + 8001352: a801 add r0, sp, #4 + 8001354: f7ff f9fa bl 800074c for (uint8_t i = 0; i < header->payloadLength; i++) - 8001328: 78eb ldrb r3, [r5, #3] - 800132a: 42a3 cmp r3, r4 - 800132c: d822 bhi.n 8001374 + 8001358: 78eb ldrb r3, [r5, #3] + 800135a: 42a3 cmp r3, r4 + 800135c: d822 bhi.n 80013a4 if (CRC8_107_getChecksum(&rx_crc) != header->crc) - 800132e: a801 add r0, sp, #4 - 8001330: f7ff fa20 bl 8000774 - 8001334: 792b ldrb r3, [r5, #4] + 800135e: a801 add r0, sp, #4 + 8001360: f7ff fa08 bl 8000774 + 8001364: 792b ldrb r3, [r5, #4] if (header->toAddress == my_address) - 8001336: 782c ldrb r4, [r5, #0] - 8001338: 783a ldrb r2, [r7, #0] + 8001366: 782c ldrb r4, [r5, #0] + 8001368: 783a ldrb r2, [r7, #0] if (CRC8_107_getChecksum(&rx_crc) != header->crc) - 800133a: 4283 cmp r3, r0 - 800133c: d022 beq.n 8001384 + 800136a: 4283 cmp r3, r0 + 800136c: d022 beq.n 80013b4 drop_crc++; - 800133e: 49a2 ldr r1, [pc, #648] @ (80015c8 ) - 8001340: 880b ldrh r3, [r1, #0] - 8001342: 3301 adds r3, #1 - 8001344: b29b uxth r3, r3 - 8001346: 800b strh r3, [r1, #0] + 800136e: 49a2 ldr r1, [pc, #648] @ (80015f8 ) + 8001370: 880b ldrh r3, [r1, #0] + 8001372: 3301 adds r3, #1 + 8001374: b29b uxth r3, r3 + 8001376: 800b strh r3, [r1, #0] if (header->toAddress == my_address) - 8001348: 4294 cmp r4, r2 - 800134a: d104 bne.n 8001356 + 8001378: 4294 cmp r4, r2 + 800137a: d104 bne.n 8001386 my_addr_crc_exp = CRC8_107_getChecksum(&rx_crc); - 800134c: a801 add r0, sp, #4 - 800134e: f7ff fa11 bl 8000774 - 8001352: 4b9e ldr r3, [pc, #632] @ (80015cc ) - 8001354: 7018 strb r0, [r3, #0] + 800137c: a801 add r0, sp, #4 + 800137e: f7ff f9f9 bl 8000774 + 8001382: 4b9e ldr r3, [pc, #632] @ (80015fc ) + 8001384: 7018 strb r0, [r3, #0] } - 8001356: b00b add sp, #44 @ 0x2c - 8001358: bdf0 pop {r4, r5, r6, r7, pc} + 8001386: b00b add sp, #44 @ 0x2c + 8001388: bdf0 pop {r4, r5, r6, r7, pc} my_addr_size = size; - 800135a: 4b9d ldr r3, [pc, #628] @ (80015d0 ) + 800138a: 4b9d ldr r3, [pc, #628] @ (8001600 ) for (uint8_t i = 0; i < 8 && i < size; i++) my_addr_bytes[i] = buffer[i]; - 800135c: 489d ldr r0, [pc, #628] @ (80015d4 ) + 800138c: 489d ldr r0, [pc, #628] @ (8001604 ) my_addr_size = size; - 800135e: 7019 strb r1, [r3, #0] - 8001360: 2300 movs r3, #0 + 800138e: 7019 strb r1, [r3, #0] + 8001390: 2300 movs r3, #0 for (uint8_t i = 0; i < 8 && i < size; i++) my_addr_bytes[i] = buffer[i]; - 8001362: 5cea ldrb r2, [r5, r3] - 8001364: 54c2 strb r2, [r0, r3] - 8001366: 2b07 cmp r3, #7 - 8001368: d0c8 beq.n 80012fc - 800136a: 3301 adds r3, #1 - 800136c: b2da uxtb r2, r3 - 800136e: 428a cmp r2, r1 - 8001370: d3f7 bcc.n 8001362 - 8001372: e7c3 b.n 80012fc - CRC8_107_add(&rx_crc, buffer[sizeof(PhotonPacketHeader) + i]); - 8001374: 192b adds r3, r5, r4 - 8001376: 7959 ldrb r1, [r3, #5] - 8001378: a801 add r0, sp, #4 - for (uint8_t i = 0; i < header->payloadLength; i++) - 800137a: 3401 adds r4, #1 - CRC8_107_add(&rx_crc, buffer[sizeof(PhotonPacketHeader) + i]); - 800137c: f7ff f9e6 bl 800074c - for (uint8_t i = 0; i < header->payloadLength; i++) - 8001380: b2e4 uxtb r4, r4 - 8001382: e7d1 b.n 8001328 - if ((header->toAddress != PHOTON_NETWORK_BROADCAST_ADDRESS) && - 8001384: 2cff cmp r4, #255 @ 0xff - 8001386: d003 beq.n 8001390 - 8001388: 4294 cmp r4, r2 - 800138a: d001 beq.n 8001390 - drop_addr++; - 800138c: 4a92 ldr r2, [pc, #584] @ (80015d8 ) - 800138e: e7a6 b.n 80012de - 8001390: 2600 movs r6, #0 - msg_handled++; - 8001392: 4992 ldr r1, [pc, #584] @ (80015dc ) - last_rx_cmd = buffer[sizeof(PhotonPacketHeader)]; // commandId - 8001394: 7968 ldrb r0, [r5, #5] - msg_handled++; - 8001396: 880b ldrh r3, [r1, #0] - response.header.fromAddress = my_address; - 8001398: ac03 add r4, sp, #12 - msg_handled++; + 8001392: 5cea ldrb r2, [r5, r3] + 8001394: 54c2 strb r2, [r0, r3] + 8001396: 2b07 cmp r3, #7 + 8001398: d0c8 beq.n 800132c 800139a: 3301 adds r3, #1 - 800139c: b29b uxth r3, r3 - 800139e: 800b strh r3, [r1, #0] + 800139c: b2da uxtb r2, r3 + 800139e: 428a cmp r2, r1 + 80013a0: d3f7 bcc.n 8001392 + 80013a2: e7c3 b.n 800132c + CRC8_107_add(&rx_crc, buffer[sizeof(PhotonPacketHeader) + i]); + 80013a4: 192b adds r3, r5, r4 + 80013a6: 7959 ldrb r1, [r3, #5] + 80013a8: a801 add r0, sp, #4 + for (uint8_t i = 0; i < header->payloadLength; i++) + 80013aa: 3401 adds r4, #1 + CRC8_107_add(&rx_crc, buffer[sizeof(PhotonPacketHeader) + i]); + 80013ac: f7ff f9ce bl 800074c + for (uint8_t i = 0; i < header->payloadLength; i++) + 80013b0: b2e4 uxtb r4, r4 + 80013b2: e7d1 b.n 8001358 + if ((header->toAddress != PHOTON_NETWORK_BROADCAST_ADDRESS) && + 80013b4: 2cff cmp r4, #255 @ 0xff + 80013b6: d003 beq.n 80013c0 + 80013b8: 4294 cmp r4, r2 + 80013ba: d001 beq.n 80013c0 + drop_addr++; + 80013bc: 4a92 ldr r2, [pc, #584] @ (8001608 ) + 80013be: e7a6 b.n 800130e + 80013c0: 2600 movs r6, #0 + msg_handled++; + 80013c2: 4992 ldr r1, [pc, #584] @ (800160c ) last_rx_cmd = buffer[sizeof(PhotonPacketHeader)]; // commandId - 80013a0: 4b8f ldr r3, [pc, #572] @ (80015e0 ) - 80013a2: 9602 str r6, [sp, #8] - 80013a4: 7018 strb r0, [r3, #0] + 80013c4: 7968 ldrb r0, [r5, #5] + msg_handled++; + 80013c6: 880b ldrh r3, [r1, #0] response.header.fromAddress = my_address; - 80013a6: 7062 strb r2, [r4, #1] + 80013c8: ac03 add r4, sp, #12 + msg_handled++; + 80013ca: 3301 adds r3, #1 + 80013cc: b29b uxth r3, r3 + 80013ce: 800b strh r3, [r1, #0] + last_rx_cmd = buffer[sizeof(PhotonPacketHeader)]; // commandId + 80013d0: 4b8f ldr r3, [pc, #572] @ (8001610 ) + 80013d2: 9602 str r6, [sp, #8] + 80013d4: 7018 strb r0, [r3, #0] + response.header.fromAddress = my_address; + 80013d6: 7062 strb r2, [r4, #1] response.header.packetId = command->header.packetId; - 80013a8: 78ab ldrb r3, [r5, #2] - 80013aa: 70a3 strb r3, [r4, #2] + 80013d8: 78ab ldrb r3, [r5, #2] + 80013da: 70a3 strb r3, [r4, #2] response.header.toAddress = command->header.fromAddress; - 80013ac: 786b ldrb r3, [r5, #1] - 80013ae: 7023 strb r3, [r4, #0] + 80013dc: 786b ldrb r3, [r5, #1] + 80013de: 7023 strb r3, [r4, #0] switch (command->commandId) - 80013b0: 2806 cmp r0, #6 - 80013b2: d809 bhi.n 80013c8 - 80013b4: 42b0 cmp r0, r6 - 80013b6: d0ce beq.n 8001356 - 80013b8: 3802 subs r0, #2 - 80013ba: 2804 cmp r0, #4 - 80013bc: d813 bhi.n 80013e6 - 80013be: f7fe fea3 bl 8000108 <__gnu_thumb1_case_uqi> - 80013c2: 5430 .short 0x5430 - 80013c4: aa68 .short 0xaa68 - 80013c6: f0 .byte 0xf0 - 80013c7: 00 .byte 0x00 - 80013c8: 0003 movs r3, r0 - 80013ca: 3341 adds r3, #65 @ 0x41 - 80013cc: b2db uxtb r3, r3 - 80013ce: 2b04 cmp r3, #4 - 80013d0: d8c1 bhi.n 8001356 - 80013d2: 38c0 subs r0, #192 @ 0xc0 - 80013d4: 2803 cmp r0, #3 - 80013d6: d900 bls.n 80013da - 80013d8: e10c b.n 80015f4 - 80013da: f7fe fe9f bl 800011c <__gnu_thumb1_case_uhi> - 80013de: 0146 .short 0x0146 - 80013e0: 0179015a .word 0x0179015a - 80013e4: 0189 .short 0x0189 + 80013e0: 2806 cmp r0, #6 + 80013e2: d809 bhi.n 80013f8 + 80013e4: 42b0 cmp r0, r6 + 80013e6: d0ce beq.n 8001386 + 80013e8: 3802 subs r0, #2 + 80013ea: 2804 cmp r0, #4 + 80013ec: d813 bhi.n 8001416 + 80013ee: f7fe fe8b bl 8000108 <__gnu_thumb1_case_uqi> + 80013f2: 5430 .short 0x5430 + 80013f4: aa68 .short 0xaa68 + 80013f6: f0 .byte 0xf0 + 80013f7: 00 .byte 0x00 + 80013f8: 0003 movs r3, r0 + 80013fa: 3341 adds r3, #65 @ 0x41 + 80013fc: b2db uxtb r3, r3 + 80013fe: 2b04 cmp r3, #4 + 8001400: d8c1 bhi.n 8001386 + 8001402: 38c0 subs r0, #192 @ 0xc0 + 8001404: 2803 cmp r0, #3 + 8001406: d900 bls.n 800140a + 8001408: e10c b.n 8001624 + 800140a: f7fe fe87 bl 800011c <__gnu_thumb1_case_uhi> + 800140e: 0146 .short 0x0146 + 8001410: 0179015a .word 0x0179015a + 8001414: 0189 .short 0x0189 memcpy(response.payload.getFeederId.uuid,UUID,UUID_LENGTH); - 80013e6: 2012 movs r0, #18 - 80013e8: 497e ldr r1, [pc, #504] @ (80015e4 ) - 80013ea: 220c movs r2, #12 - 80013ec: 4468 add r0, sp - 80013ee: f003 fef9 bl 80051e4 + 8001416: 2012 movs r0, #18 + 8001418: 497e ldr r1, [pc, #504] @ (8001614 ) + 800141a: 220c movs r2, #12 + 800141c: 4468 add r0, sp + 800141e: f003 ff5b bl 80052d8 response.header.payloadLength = sizeof(response.payload.getFeederId)+1; // +1 for status byte - 80013f2: 230d movs r3, #13 + 8001422: 230d movs r3, #13 comp_crc_header(&crc,&response); - 80013f4: 0021 movs r1, r4 - 80013f6: a802 add r0, sp, #8 + 8001424: 0021 movs r1, r4 + 8001426: a802 add r0, sp, #8 response.status = STATUS_OK; - 80013f8: 7166 strb r6, [r4, #5] + 8001428: 7166 strb r6, [r4, #5] response.header.payloadLength = sizeof(response.payload.getFeederId)+1; // +1 for status byte - 80013fa: 70e3 strb r3, [r4, #3] + 800142a: 70e3 strb r3, [r4, #3] comp_crc_header(&crc,&response); - 80013fc: f7ff fb94 bl 8000b28 + 800142c: f7ff fb80 bl 8000b30 for (uint32_t i = 0; i + 8001430: 78e3 ldrb r3, [r4, #3] + 8001432: 42b3 cmp r3, r6 + 8001434: d806 bhi.n 8001444 response.header.crc = CRC8_107_getChecksum(&crc); - 8001406: a802 add r0, sp, #8 - 8001408: f7ff f9b4 bl 8000774 + 8001436: a802 add r0, sp, #8 + 8001438: f7ff f99c bl 8000774 packet_len = sizeof(PhotonPacketHeader) + response.header.payloadLength; - 800140c: 78e1 ldrb r1, [r4, #3] + 800143c: 78e1 ldrb r1, [r4, #3] response.header.crc = CRC8_107_getChecksum(&crc); - 800140e: 7120 strb r0, [r4, #4] + 800143e: 7120 strb r0, [r4, #4] rs485_transmit((uint8_t *)&response, packet_len); - 8001410: 3105 adds r1, #5 - 8001412: e126 b.n 8001662 + 8001440: 3105 adds r1, #5 + 8001442: e126 b.n 8001692 CRC8_107_add(&crc,*(payload_ptr+i)); - 8001414: 19a3 adds r3, r4, r6 - 8001416: 7959 ldrb r1, [r3, #5] - 8001418: a802 add r0, sp, #8 - 800141a: f7ff f997 bl 800074c + 8001444: 19a3 adds r3, r4, r6 + 8001446: 7959 ldrb r1, [r3, #5] + 8001448: a802 add r0, sp, #8 + 800144a: f7ff f97f bl 800074c for (uint32_t i = 0; i + 800144e: 3601 adds r6, #1 + 8001450: e7ee b.n 8001430 memcpy(response.payload.initializeFeeder.uuid,UUID,UUID_LENGTH); - 8001422: 2012 movs r0, #18 - 8001424: 4e6f ldr r6, [pc, #444] @ (80015e4 ) - 8001426: 220c movs r2, #12 - 8001428: 0031 movs r1, r6 - 800142a: 4468 add r0, sp - 800142c: f003 feda bl 80051e4 + 8001452: 2012 movs r0, #18 + 8001454: 4e6f ldr r6, [pc, #444] @ (8001614 ) + 8001456: 220c movs r2, #12 + 8001458: 0031 movs r1, r6 + 800145a: 4468 add r0, sp + 800145c: f003 ff3c bl 80052d8 if(memcmp(UUID,command->payload.initializeFeeder.uuid,UUID_LENGTH) == 0) - 8001430: 220c movs r2, #12 - 8001432: 0030 movs r0, r6 - 8001434: 1da9 adds r1, r5, #6 - 8001436: f003 fe9b bl 8005170 - 800143a: 2301 movs r3, #1 - 800143c: 2800 cmp r0, #0 - 800143e: d102 bne.n 8001446 - is_initialized = 1; - 8001440: 4a69 ldr r2, [pc, #420] @ (80015e8 ) - 8001442: 7013 strb r3, [r2, #0] - response.status = STATUS_OK; - 8001444: 0003 movs r3, r0 - 8001446: 7163 strb r3, [r4, #5] - response.header.payloadLength = sizeof(response.payload.initializeFeeder)+1; - 8001448: 230d movs r3, #13 - comp_crc_header(&crc,&response); - 800144a: 0021 movs r1, r4 - 800144c: a802 add r0, sp, #8 - response.header.payloadLength = sizeof(response.payload.initializeFeeder)+1; - 800144e: 70e3 strb r3, [r4, #3] - for (uint32_t i = 0; i - for (uint32_t i = 0; i - CRC8_107_add(&crc,*(payload_ptr+i)); - 800145c: 1963 adds r3, r4, r5 - 800145e: 7959 ldrb r1, [r3, #5] - 8001460: a802 add r0, sp, #8 - 8001462: f7ff f973 bl 800074c - for (uint32_t i = 0; i - response.payload.protocolVersion.version = PROTOCOL_VERSION; + 8001460: 220c movs r2, #12 + 8001462: 0030 movs r0, r6 + 8001464: 1da9 adds r1, r5, #6 + 8001466: f003 fefd bl 8005264 800146a: 2301 movs r3, #1 - response.status = STATUS_OK; - 800146c: 2500 movs r5, #0 - response.payload.protocolVersion.version = PROTOCOL_VERSION; - 800146e: 71a3 strb r3, [r4, #6] + 800146c: 2800 cmp r0, #0 + 800146e: d102 bne.n 8001476 + is_initialized = 1; + 8001470: 4a69 ldr r2, [pc, #420] @ (8001618 ) + 8001472: 7013 strb r3, [r2, #0] + response.status = STATUS_OK; + 8001474: 0003 movs r3, r0 + 8001476: 7163 strb r3, [r4, #5] + response.header.payloadLength = sizeof(response.payload.initializeFeeder)+1; + 8001478: 230d movs r3, #13 comp_crc_header(&crc,&response); - 8001470: 0021 movs r1, r4 - response.header.payloadLength = sizeof(response.payload.protocolVersion)+1; - 8001472: 18db adds r3, r3, r3 - comp_crc_header(&crc,&response); - 8001474: a802 add r0, sp, #8 - response.status = STATUS_OK; - 8001476: 7165 strb r5, [r4, #5] - response.header.payloadLength = sizeof(response.payload.protocolVersion)+1; - 8001478: 70e3 strb r3, [r4, #3] - comp_crc_header(&crc,&response); - 800147a: f7ff fb55 bl 8000b28 + 800147a: 0021 movs r1, r4 + 800147c: a802 add r0, sp, #8 + response.header.payloadLength = sizeof(response.payload.initializeFeeder)+1; + 800147e: 70e3 strb r3, [r4, #3] for (uint32_t i = 0; i + 8001480: 2500 movs r5, #0 + comp_crc_header(&crc,&response); + 8001482: f7ff fb55 bl 8000b30 + for (uint32_t i = 0; i CRC8_107_add(&crc,*(payload_ptr+i)); - 8001484: 1963 adds r3, r4, r5 - 8001486: 7959 ldrb r1, [r3, #5] - 8001488: a802 add r0, sp, #8 - 800148a: f7ff f95f bl 800074c + 800148c: 1963 adds r3, r4, r5 + 800148e: 7959 ldrb r1, [r3, #5] + 8001490: a802 add r0, sp, #8 + 8001492: f7ff f95b bl 800074c for (uint32_t i = 0; i + 8001496: 3501 adds r5, #1 + 8001498: e7f5 b.n 8001486 + response.payload.protocolVersion.version = PROTOCOL_VERSION; + 800149a: 2301 movs r3, #1 + response.status = STATUS_OK; + 800149c: 2500 movs r5, #0 + response.payload.protocolVersion.version = PROTOCOL_VERSION; + 800149e: 71a3 strb r3, [r4, #6] + comp_crc_header(&crc,&response); + 80014a0: 0021 movs r1, r4 + response.header.payloadLength = sizeof(response.payload.protocolVersion)+1; + 80014a2: 18db adds r3, r3, r3 + comp_crc_header(&crc,&response); + 80014a4: a802 add r0, sp, #8 + response.status = STATUS_OK; + 80014a6: 7165 strb r5, [r4, #5] + response.header.payloadLength = sizeof(response.payload.protocolVersion)+1; + 80014a8: 70e3 strb r3, [r4, #3] + comp_crc_header(&crc,&response); + 80014aa: f7ff fb41 bl 8000b30 + for (uint32_t i = 0; i + CRC8_107_add(&crc,*(payload_ptr+i)); + 80014b4: 1963 adds r3, r4, r5 + 80014b6: 7959 ldrb r1, [r3, #5] + 80014b8: a802 add r0, sp, #8 + 80014ba: f7ff f947 bl 800074c + for (uint32_t i = 0; i if (!is_initialized) - 8001492: 4b55 ldr r3, [pc, #340] @ (80015e8 ) - 8001494: 781e ldrb r6, [r3, #0] - 8001496: 2e00 cmp r6, #0 - 8001498: d117 bne.n 80014ca + 80014c2: 4b55 ldr r3, [pc, #340] @ (8001618 ) + 80014c4: 781e ldrb r6, [r3, #0] + 80014c6: 2e00 cmp r6, #0 + 80014c8: d117 bne.n 80014fa memcpy(response.payload.initializeFeeder.uuid, UUID, UUID_LENGTH); - 800149a: 2012 movs r0, #18 + 80014ca: 2012 movs r0, #18 response.status = STATUS_UNINITIALIZED_FEEDER; - 800149c: 2303 movs r3, #3 + 80014cc: 2303 movs r3, #3 memcpy(response.payload.initializeFeeder.uuid, UUID, UUID_LENGTH); - 800149e: 4951 ldr r1, [pc, #324] @ (80015e4 ) - 80014a0: 220c movs r2, #12 - 80014a2: 4468 add r0, sp + 80014ce: 4951 ldr r1, [pc, #324] @ (8001614 ) + 80014d0: 220c movs r2, #12 + 80014d2: 4468 add r0, sp response.status = STATUS_UNINITIALIZED_FEEDER; - 80014a4: 7163 strb r3, [r4, #5] + 80014d4: 7163 strb r3, [r4, #5] memcpy(response.payload.initializeFeeder.uuid, UUID, UUID_LENGTH); - 80014a6: f003 fe9d bl 80051e4 + 80014d6: f003 feff bl 80052d8 response.header.payloadLength = sizeof(response.payload.initializeFeeder) + 1; - 80014aa: 230d movs r3, #13 + 80014da: 230d movs r3, #13 comp_crc_header(&crc, &response); - 80014ac: 0021 movs r1, r4 - 80014ae: a802 add r0, sp, #8 + 80014dc: 0021 movs r1, r4 + 80014de: a802 add r0, sp, #8 response.header.payloadLength = sizeof(response.payload.initializeFeeder) + 1; - 80014b0: 70e3 strb r3, [r4, #3] - comp_crc_header(&crc, &response); - 80014b2: f7ff fb39 bl 8000b28 - for (uint32_t i = 0; i < response.header.payloadLength; i++) - 80014b6: 78e3 ldrb r3, [r4, #3] - 80014b8: 42b3 cmp r3, r6 - 80014ba: d9a4 bls.n 8001406 - CRC8_107_add(&crc, *(payload_ptr + i)); - 80014bc: 19a3 adds r3, r4, r6 - 80014be: 7959 ldrb r1, [r3, #5] - 80014c0: a802 add r0, sp, #8 - 80014c2: f7ff f943 bl 800074c - for (uint32_t i = 0; i < response.header.payloadLength; i++) - 80014c6: 3601 adds r6, #1 - 80014c8: e7f5 b.n 80014b6 - PEEL_BACKOFF_TIME + - 80014ca: 2276 movs r2, #118 @ 0x76 - 80014cc: 79ab ldrb r3, [r5, #6] - response.status = STATUS_OK; - 80014ce: 2600 movs r6, #0 - PEEL_BACKOFF_TIME + - 80014d0: 4353 muls r3, r2 - uint16_t time = (distance * PEEL_TIME_PER_TENTH_MM) + - 80014d2: 33e6 adds r3, #230 @ 0xe6 - uint16_t exp_time_be = (exp_time >> 8) | (exp_time << 8); // byte swap for network order - 80014d4: ba5b rev16 r3, r3 - response.payload.expectedTimeToFeed.expectedFeedTime = exp_time_be; - 80014d6: 80e3 strh r3, [r4, #6] - response.header.payloadLength = sizeof(response.payload.expectedTimeToFeed) + 1; - 80014d8: 2303 movs r3, #3 - comp_crc_header(&crc, &response); - 80014da: 0021 movs r1, r4 - 80014dc: a802 add r0, sp, #8 - response.status = STATUS_OK; - 80014de: 7166 strb r6, [r4, #5] - response.header.payloadLength = sizeof(response.payload.expectedTimeToFeed) + 1; 80014e0: 70e3 strb r3, [r4, #3] comp_crc_header(&crc, &response); - 80014e2: f7ff fb21 bl 8000b28 + 80014e2: f7ff fb25 bl 8000b30 for (uint32_t i = 0; i < response.header.payloadLength; i++) 80014e6: 78e3 ldrb r3, [r4, #3] 80014e8: 42b3 cmp r3, r6 - 80014ea: d80d bhi.n 8001508 - response.header.crc = CRC8_107_getChecksum(&crc); - 80014ec: a802 add r0, sp, #8 - 80014ee: f7ff f941 bl 8000774 - packet_len = sizeof(PhotonPacketHeader) + response.header.payloadLength; - 80014f2: 78e1 ldrb r1, [r4, #3] - response.header.crc = CRC8_107_getChecksum(&crc); - 80014f4: 7120 strb r0, [r4, #4] - rs485_transmit((uint8_t *)&response, packet_len); - 80014f6: 3105 adds r1, #5 - 80014f8: 0020 movs r0, r4 - 80014fa: f7ff faeb bl 8000ad4 - start_feed(command->payload.move.distance, 1); - 80014fe: 2101 movs r1, #1 - 8001500: 79a8 ldrb r0, [r5, #6] - start_feed(command->payload.move.distance, 0); - 8001502: f7ff fbc9 bl 8000c98 - break; - 8001506: e726 b.n 8001356 + 80014ea: d9a4 bls.n 8001436 CRC8_107_add(&crc, *(payload_ptr + i)); - 8001508: 19a3 adds r3, r4, r6 - 800150a: 7959 ldrb r1, [r3, #5] - 800150c: a802 add r0, sp, #8 - 800150e: f7ff f91d bl 800074c + 80014ec: 19a3 adds r3, r4, r6 + 80014ee: 7959 ldrb r1, [r3, #5] + 80014f0: a802 add r0, sp, #8 + 80014f2: f7ff f92b bl 800074c for (uint32_t i = 0; i < response.header.payloadLength; i++) - 8001512: 3601 adds r6, #1 - 8001514: e7e7 b.n 80014e6 - if (!is_initialized) - 8001516: 4b34 ldr r3, [pc, #208] @ (80015e8 ) - 8001518: 781e ldrb r6, [r3, #0] - 800151a: 2e00 cmp r6, #0 - 800151c: d118 bne.n 8001550 - memcpy(response.payload.initializeFeeder.uuid, UUID, UUID_LENGTH); - 800151e: 2012 movs r0, #18 - response.status = STATUS_UNINITIALIZED_FEEDER; - 8001520: 2303 movs r3, #3 - memcpy(response.payload.initializeFeeder.uuid, UUID, UUID_LENGTH); - 8001522: 4930 ldr r1, [pc, #192] @ (80015e4 ) - 8001524: 220c movs r2, #12 - 8001526: 4468 add r0, sp - response.status = STATUS_UNINITIALIZED_FEEDER; - 8001528: 7163 strb r3, [r4, #5] - memcpy(response.payload.initializeFeeder.uuid, UUID, UUID_LENGTH); - 800152a: f003 fe5b bl 80051e4 - response.header.payloadLength = sizeof(response.payload.initializeFeeder) + 1; - 800152e: 230d movs r3, #13 - comp_crc_header(&crc, &response); - 8001530: 0021 movs r1, r4 - 8001532: a802 add r0, sp, #8 - response.header.payloadLength = sizeof(response.payload.initializeFeeder) + 1; - 8001534: 70e3 strb r3, [r4, #3] - comp_crc_header(&crc, &response); - 8001536: f7ff faf7 bl 8000b28 - for (uint32_t i = 0; i < response.header.payloadLength; i++) - 800153a: 78e3 ldrb r3, [r4, #3] - 800153c: 42b3 cmp r3, r6 - 800153e: d800 bhi.n 8001542 - 8001540: e761 b.n 8001406 - CRC8_107_add(&crc, *(payload_ptr + i)); - 8001542: 19a3 adds r3, r4, r6 - 8001544: 7959 ldrb r1, [r3, #5] - 8001546: a802 add r0, sp, #8 - 8001548: f7ff f900 bl 800074c - for (uint32_t i = 0; i < response.header.payloadLength; i++) - 800154c: 3601 adds r6, #1 - 800154e: e7f4 b.n 800153a - return (distance * BACKWARDS_PEEL_TIME_PER_TENTH_MM) + - 8001550: 231e movs r3, #30 - 8001552: 2164 movs r1, #100 @ 0x64 - uint16_t exp_time = calculate_expected_feed_time(command->payload.move.distance, 0); - 8001554: 79aa ldrb r2, [r5, #6] + 80014f6: 3601 adds r6, #1 + 80014f8: e7f5 b.n 80014e6 + PEEL_BACKOFF_TIME + + 80014fa: 221c movs r2, #28 + 80014fc: 79ab ldrb r3, [r5, #6] response.status = STATUS_OK; - 8001556: 2600 movs r6, #0 - return (distance * BACKWARDS_PEEL_TIME_PER_TENTH_MM) + - 8001558: 4353 muls r3, r2 - ((distance + (BACKLASH_COMP_TENTH_MM * 2)) * TIMEOUT_TIME_PER_TENTH_MM) + - 800155a: 3214 adds r2, #20 - return (distance * BACKWARDS_PEEL_TIME_PER_TENTH_MM) + - 800155c: 434a muls r2, r1 - BACKWARDS_FEED_FILM_SLACK_REMOVAL_TIME + 50; - 800155e: 3391 adds r3, #145 @ 0x91 - 8001560: 33ff adds r3, #255 @ 0xff - 8001562: 189b adds r3, r3, r2 + 80014fe: 2600 movs r6, #0 + PEEL_BACKOFF_TIME + + 8001500: 4353 muls r3, r2 + uint16_t time = (distance * PEEL_TIME_PER_TENTH_MM) + + 8001502: 33e6 adds r3, #230 @ 0xe6 uint16_t exp_time_be = (exp_time >> 8) | (exp_time << 8); // byte swap for network order - 8001564: ba5b rev16 r3, r3 + 8001504: ba5b rev16 r3, r3 response.payload.expectedTimeToFeed.expectedFeedTime = exp_time_be; - 8001566: 80e3 strh r3, [r4, #6] + 8001506: 80e3 strh r3, [r4, #6] response.header.payloadLength = sizeof(response.payload.expectedTimeToFeed) + 1; - 8001568: 2303 movs r3, #3 + 8001508: 2303 movs r3, #3 comp_crc_header(&crc, &response); - 800156a: 0021 movs r1, r4 - 800156c: a802 add r0, sp, #8 + 800150a: 0021 movs r1, r4 + 800150c: a802 add r0, sp, #8 response.status = STATUS_OK; - 800156e: 7166 strb r6, [r4, #5] + 800150e: 7166 strb r6, [r4, #5] response.header.payloadLength = sizeof(response.payload.expectedTimeToFeed) + 1; - 8001570: 70e3 strb r3, [r4, #3] + 8001510: 70e3 strb r3, [r4, #3] comp_crc_header(&crc, &response); - 8001572: f7ff fad9 bl 8000b28 + 8001512: f7ff fb0d bl 8000b30 for (uint32_t i = 0; i < response.header.payloadLength; i++) - 8001576: 78e3 ldrb r3, [r4, #3] - 8001578: 42b3 cmp r3, r6 - 800157a: d80b bhi.n 8001594 + 8001516: 78e3 ldrb r3, [r4, #3] + 8001518: 42b3 cmp r3, r6 + 800151a: d80d bhi.n 8001538 response.header.crc = CRC8_107_getChecksum(&crc); - 800157c: a802 add r0, sp, #8 - 800157e: f7ff f8f9 bl 8000774 + 800151c: a802 add r0, sp, #8 + 800151e: f7ff f929 bl 8000774 packet_len = sizeof(PhotonPacketHeader) + response.header.payloadLength; - 8001582: 78e1 ldrb r1, [r4, #3] + 8001522: 78e1 ldrb r1, [r4, #3] response.header.crc = CRC8_107_getChecksum(&crc); - 8001584: 7120 strb r0, [r4, #4] + 8001524: 7120 strb r0, [r4, #4] rs485_transmit((uint8_t *)&response, packet_len); - 8001586: 3105 adds r1, #5 - 8001588: 0020 movs r0, r4 - 800158a: f7ff faa3 bl 8000ad4 + 8001526: 3105 adds r1, #5 + 8001528: 0020 movs r0, r4 + 800152a: f7ff fad3 bl 8000ad4 + start_feed(command->payload.move.distance, 1); + 800152e: 2101 movs r1, #1 + 8001530: 79a8 ldrb r0, [r5, #6] start_feed(command->payload.move.distance, 0); - 800158e: 2100 movs r1, #0 - 8001590: 79a8 ldrb r0, [r5, #6] - 8001592: e7b6 b.n 8001502 + 8001532: f7ff fbb5 bl 8000ca0 + break; + 8001536: e726 b.n 8001386 CRC8_107_add(&crc, *(payload_ptr + i)); - 8001594: 19a3 adds r3, r4, r6 - 8001596: 7959 ldrb r1, [r3, #5] - 8001598: a802 add r0, sp, #8 - 800159a: f7ff f8d7 bl 800074c + 8001538: 19a3 adds r3, r4, r6 + 800153a: 7959 ldrb r1, [r3, #5] + 800153c: a802 add r0, sp, #8 + 800153e: f7ff f905 bl 800074c for (uint32_t i = 0; i < response.header.payloadLength; i++) - 800159e: 3601 adds r6, #1 - 80015a0: e7e9 b.n 8001576 - if (feed_in_progress) - 80015a2: 4b12 ldr r3, [pc, #72] @ (80015ec ) - 80015a4: 781a ldrb r2, [r3, #0] - response.status = STATUS_FEEDING_IN_PROGRESS; - 80015a6: 2304 movs r3, #4 - if (feed_in_progress) - 80015a8: 2a00 cmp r2, #0 - 80015aa: d101 bne.n 80015b0 - response.status = last_feed_status; - 80015ac: 4b10 ldr r3, [pc, #64] @ (80015f0 ) - 80015ae: 781b ldrb r3, [r3, #0] - response.status = STATUS_OK; - 80015b0: 7163 strb r3, [r4, #5] - 80015b2: e063 b.n 800167c - 80015b4: 20000071 .word 0x20000071 - 80015b8: 20000067 .word 0x20000067 - 80015bc: 20000078 .word 0x20000078 - 80015c0: 20000020 .word 0x20000020 - 80015c4: 20000070 .word 0x20000070 - 80015c8: 20000076 .word 0x20000076 - 80015cc: 2000005d .word 0x2000005d - 80015d0: 2000005e .word 0x2000005e - 80015d4: 2000005f .word 0x2000005f - 80015d8: 20000074 .word 0x20000074 - 80015dc: 20000072 .word 0x20000072 - 80015e0: 2000006f .word 0x2000006f - 80015e4: 20000f87 .word 0x20000f87 - 80015e8: 20000f86 .word 0x20000f86 - 80015ec: 20000121 .word 0x20000121 - 80015f0: 20000122 .word 0x20000122 + 8001542: 3601 adds r6, #1 + 8001544: e7e7 b.n 8001516 if (!is_initialized) - 80015f4: 4b4d ldr r3, [pc, #308] @ (800172c ) - 80015f6: 781f ldrb r7, [r3, #0] - 80015f8: 2f00 cmp r7, #0 - 80015fa: d119 bne.n 8001630 - response.status = STATUS_UNINITIALIZED_FEEDER; - 80015fc: 2303 movs r3, #3 - 80015fe: 7163 strb r3, [r4, #5] + 8001546: 4b34 ldr r3, [pc, #208] @ (8001618 ) + 8001548: 781e ldrb r6, [r3, #0] + 800154a: 2e00 cmp r6, #0 + 800154c: d118 bne.n 8001580 memcpy(response.payload.initializeFeeder.uuid, UUID, UUID_LENGTH); - 8001600: 330f adds r3, #15 - 8001602: 446b add r3, sp - 8001604: 0018 movs r0, r3 - 8001606: 494a ldr r1, [pc, #296] @ (8001730 ) - 8001608: 220c movs r2, #12 - 800160a: f003 fdeb bl 80051e4 + 800154e: 2012 movs r0, #18 + response.status = STATUS_UNINITIALIZED_FEEDER; + 8001550: 2303 movs r3, #3 + memcpy(response.payload.initializeFeeder.uuid, UUID, UUID_LENGTH); + 8001552: 4930 ldr r1, [pc, #192] @ (8001614 ) + 8001554: 220c movs r2, #12 + 8001556: 4468 add r0, sp + response.status = STATUS_UNINITIALIZED_FEEDER; + 8001558: 7163 strb r3, [r4, #5] + memcpy(response.payload.initializeFeeder.uuid, UUID, UUID_LENGTH); + 800155a: f003 febd bl 80052d8 response.header.payloadLength = sizeof(response.payload.initializeFeeder) + 1; - 800160e: 230d movs r3, #13 + 800155e: 230d movs r3, #13 comp_crc_header(&crc, &response); - 8001610: 0021 movs r1, r4 - 8001612: a802 add r0, sp, #8 + 8001560: 0021 movs r1, r4 + 8001562: a802 add r0, sp, #8 response.header.payloadLength = sizeof(response.payload.initializeFeeder) + 1; - 8001614: 70e3 strb r3, [r4, #3] + 8001564: 70e3 strb r3, [r4, #3] comp_crc_header(&crc, &response); - 8001616: f7ff fa87 bl 8000b28 + 8001566: f7ff fae3 bl 8000b30 for (uint32_t i = 0; i < response.header.payloadLength; i++) - 800161a: 78e3 ldrb r3, [r4, #3] - 800161c: 42bb cmp r3, r7 - 800161e: d800 bhi.n 8001622 - 8001620: e6f1 b.n 8001406 + 800156a: 78e3 ldrb r3, [r4, #3] + 800156c: 42b3 cmp r3, r6 + 800156e: d800 bhi.n 8001572 + 8001570: e761 b.n 8001436 CRC8_107_add(&crc, *(payload_ptr + i)); - 8001622: 19e3 adds r3, r4, r7 - 8001624: 7959 ldrb r1, [r3, #5] - 8001626: a802 add r0, sp, #8 - 8001628: f7ff f890 bl 800074c + 8001572: 19a3 adds r3, r4, r6 + 8001574: 7959 ldrb r1, [r3, #5] + 8001576: a802 add r0, sp, #8 + 8001578: f7ff f8e8 bl 800074c for (uint32_t i = 0; i < response.header.payloadLength; i++) - 800162c: 3701 adds r7, #1 - 800162e: e7f4 b.n 800161a - handle_vendor_options(command->payload.vendorOptions.options, response.payload.vendorOptions.options); - 8001630: 2312 movs r3, #18 - 8001632: 446b add r3, sp - 8001634: 0019 movs r1, r3 - 8001636: 1da8 adds r0, r5, #6 - 8001638: f7ff fd1c bl 8001074 - comp_crc_header(&crc,&response); - 800163c: 0021 movs r1, r4 - 800163e: a802 add r0, sp, #8 - response.status = STATUS_OK; - 8001640: 7166 strb r6, [r4, #5] - comp_crc_header(&crc,&response); - 8001642: f7ff fa71 bl 8000b28 - CRC8_107_add(&crc,*(payload_ptr+i)); - 8001646: 19a3 adds r3, r4, r6 - 8001648: 7959 ldrb r1, [r3, #5] - 800164a: a802 add r0, sp, #8 - for (uint32_t i = 0; i - for (uint32_t i = 0; i - response.header.crc = CRC8_107_getChecksum(&crc); - 8001656: a802 add r0, sp, #8 - 8001658: f7ff f88c bl 8000774 - rs485_transmit((uint8_t *)&response, packet_len); - 800165c: 211a movs r1, #26 - response.header.crc = CRC8_107_getChecksum(&crc); - 800165e: 7120 strb r0, [r4, #4] - response.header.payloadLength = sizeof(response.payload.vendorOptions)+1; // +1 for the status byte - 8001660: 70e6 strb r6, [r4, #3] - rs485_transmit((uint8_t *)&response, packet_len); - 8001662: 0020 movs r0, r4 - 8001664: f7ff fa36 bl 8000ad4 - break; - 8001668: e675 b.n 8001356 - if(memcmp(UUID,command->payload.getFeederAddress.uuid,UUID_LENGTH) == 0) - 800166a: 220c movs r2, #12 - 800166c: 4830 ldr r0, [pc, #192] @ (8001730 ) - 800166e: 1da9 adds r1, r5, #6 - 8001670: f003 fd7e bl 8005170 - 8001674: 2800 cmp r0, #0 - 8001676: d000 beq.n 800167a - 8001678: e66d b.n 8001356 + 800157c: 3601 adds r6, #1 + 800157e: e7f4 b.n 800156a + return (distance * BACKWARDS_PEEL_TIME_PER_TENTH_MM) + + 8001580: 231e movs r3, #30 + 8001582: 2164 movs r1, #100 @ 0x64 + uint16_t exp_time = calculate_expected_feed_time(command->payload.move.distance, 0); + 8001584: 79aa ldrb r2, [r5, #6] response.status = STATUS_OK; - 800167a: 7160 strb r0, [r4, #5] - response.header.payloadLength = 1; // only status byte - 800167c: 2301 movs r3, #1 + 8001586: 2600 movs r6, #0 + return (distance * BACKWARDS_PEEL_TIME_PER_TENTH_MM) + + 8001588: 4353 muls r3, r2 + ((distance + (BACKLASH_COMP_TENTH_MM * 2)) * TIMEOUT_TIME_PER_TENTH_MM) + + 800158a: 3214 adds r2, #20 + return (distance * BACKWARDS_PEEL_TIME_PER_TENTH_MM) + + 800158c: 434a muls r2, r1 + BACKWARDS_FEED_FILM_SLACK_REMOVAL_TIME + 50; + 800158e: 3391 adds r3, #145 @ 0x91 + 8001590: 33ff adds r3, #255 @ 0xff + 8001592: 189b adds r3, r3, r2 + uint16_t exp_time_be = (exp_time >> 8) | (exp_time << 8); // byte swap for network order + 8001594: ba5b rev16 r3, r3 + response.payload.expectedTimeToFeed.expectedFeedTime = exp_time_be; + 8001596: 80e3 strh r3, [r4, #6] + response.header.payloadLength = sizeof(response.payload.expectedTimeToFeed) + 1; + 8001598: 2303 movs r3, #3 comp_crc_header(&crc, &response); - 800167e: 0021 movs r1, r4 - 8001680: a802 add r0, sp, #8 - response.header.payloadLength = 1; // only status byte - 8001682: 70e3 strb r3, [r4, #3] + 800159a: 0021 movs r1, r4 + 800159c: a802 add r0, sp, #8 + response.status = STATUS_OK; + 800159e: 7166 strb r6, [r4, #5] + response.header.payloadLength = sizeof(response.payload.expectedTimeToFeed) + 1; + 80015a0: 70e3 strb r3, [r4, #3] comp_crc_header(&crc, &response); - 8001684: f7ff fa50 bl 8000b28 - CRC8_107_add(&crc, response.status); - 8001688: 7961 ldrb r1, [r4, #5] - 800168a: a802 add r0, sp, #8 - 800168c: f7ff f85e bl 800074c + 80015a2: f7ff fac5 bl 8000b30 + for (uint32_t i = 0; i < response.header.payloadLength; i++) + 80015a6: 78e3 ldrb r3, [r4, #3] + 80015a8: 42b3 cmp r3, r6 + 80015aa: d80b bhi.n 80015c4 response.header.crc = CRC8_107_getChecksum(&crc); - 8001690: e6b9 b.n 8001406 - if(memcmp(UUID,command->payload.identifyFeeder.uuid,UUID_LENGTH) == 0) - 8001692: 220c movs r2, #12 - 8001694: 4826 ldr r0, [pc, #152] @ (8001730 ) - 8001696: 1da9 adds r1, r5, #6 - 8001698: f003 fd6a bl 8005170 - 800169c: 2800 cmp r0, #0 - 800169e: d000 beq.n 80016a2 - 80016a0: e659 b.n 8001356 - response.header.payloadLength = 1; // only status byte - 80016a2: 2301 movs r3, #1 - comp_crc_header(&crc,&response); - 80016a4: 0021 movs r1, r4 - response.status = STATUS_OK; - 80016a6: 7160 strb r0, [r4, #5] - comp_crc_header(&crc,&response); - 80016a8: a802 add r0, sp, #8 - response.header.payloadLength = 1; // only status byte - 80016aa: 70e3 strb r3, [r4, #3] - comp_crc_header(&crc,&response); - 80016ac: f7ff fa3c bl 8000b28 - CRC8_107_add(&crc,response.status); - 80016b0: 7961 ldrb r1, [r4, #5] - 80016b2: a802 add r0, sp, #8 - 80016b4: f7ff f84a bl 800074c - response.header.crc = CRC8_107_getChecksum(&crc); - 80016b8: a802 add r0, sp, #8 - 80016ba: f7ff f85b bl 8000774 - packet_len = sizeof(PhotonPacketHeader) + response.header.payloadLength; - 80016be: 78e1 ldrb r1, [r4, #3] - response.header.crc = CRC8_107_getChecksum(&crc); - 80016c0: 7120 strb r0, [r4, #4] - rs485_transmit((uint8_t *)&response, packet_len); - 80016c2: 3105 adds r1, #5 - 80016c4: 0020 movs r0, r4 - 80016c6: f7ff fa05 bl 8000ad4 - identify_feeder(); - 80016ca: f7ff fabb bl 8000c44 - break; - 80016ce: e642 b.n 8001356 - uint8_t new_address = command->payload.programFeederFloorAddress.address; - 80016d0: 7cad ldrb r5, [r5, #18] - uint8_t write_success = write_floor_address(new_address); - 80016d2: 0028 movs r0, r5 - 80016d4: f7ff fd8f bl 80011f6 - if (write_success) - 80016d8: 2305 movs r3, #5 - 80016da: 2800 cmp r0, #0 - 80016dc: d100 bne.n 80016e0 - 80016de: e767 b.n 80015b0 - floor_address_status = 2; - 80016e0: 2202 movs r2, #2 - floor_address = new_address; - 80016e2: 4b14 ldr r3, [pc, #80] @ (8001734 ) - my_address = new_address; - 80016e4: 703d strb r5, [r7, #0] - floor_address = new_address; - 80016e6: 701d strb r5, [r3, #0] - floor_address_status = 2; - 80016e8: 4b13 ldr r3, [pc, #76] @ (8001738 ) - 80016ea: 701a strb r2, [r3, #0] + 80015ac: a802 add r0, sp, #8 + 80015ae: f7ff f8e1 bl 8000774 + packet_len = sizeof(PhotonPacketHeader) + response.header.payloadLength; + 80015b2: 78e1 ldrb r1, [r4, #3] + response.header.crc = CRC8_107_getChecksum(&crc); + 80015b4: 7120 strb r0, [r4, #4] + rs485_transmit((uint8_t *)&response, packet_len); + 80015b6: 3105 adds r1, #5 + 80015b8: 0020 movs r0, r4 + 80015ba: f7ff fa8b bl 8000ad4 + start_feed(command->payload.move.distance, 0); + 80015be: 2100 movs r1, #0 + 80015c0: 79a8 ldrb r0, [r5, #6] + 80015c2: e7b6 b.n 8001532 + CRC8_107_add(&crc, *(payload_ptr + i)); + 80015c4: 19a3 adds r3, r4, r6 + 80015c6: 7959 ldrb r1, [r3, #5] + 80015c8: a802 add r0, sp, #8 + 80015ca: f7ff f8bf bl 800074c + for (uint32_t i = 0; i < response.header.payloadLength; i++) + 80015ce: 3601 adds r6, #1 + 80015d0: e7e9 b.n 80015a6 + if (feed_in_progress) + 80015d2: 4b12 ldr r3, [pc, #72] @ (800161c ) + 80015d4: 781a ldrb r2, [r3, #0] + response.status = STATUS_FEEDING_IN_PROGRESS; + 80015d6: 2304 movs r3, #4 + if (feed_in_progress) + 80015d8: 2a00 cmp r2, #0 + 80015da: d101 bne.n 80015e0 + response.status = last_feed_status; + 80015dc: 4b10 ldr r3, [pc, #64] @ (8001620 ) + 80015de: 781b ldrb r3, [r3, #0] response.status = STATUS_OK; - 80016ec: 2300 movs r3, #0 - 80016ee: e75f b.n 80015b0 - if (is_initialized) return; - 80016f0: 4b0e ldr r3, [pc, #56] @ (800172c ) - 80016f2: 781d ldrb r5, [r3, #0] - 80016f4: 2d00 cmp r5, #0 - 80016f6: d000 beq.n 80016fa - 80016f8: e62d b.n 8001356 - memcpy(response.payload.getFeederId.uuid,UUID,UUID_LENGTH); - 80016fa: 2012 movs r0, #18 - 80016fc: 490c ldr r1, [pc, #48] @ (8001730 ) - 80016fe: 220c movs r2, #12 - 8001700: 4468 add r0, sp - 8001702: f003 fd6f bl 80051e4 - response.header.payloadLength = sizeof(response.payload.getFeederId)+1; - 8001706: 230d movs r3, #13 + 80015e0: 7163 strb r3, [r4, #5] + 80015e2: e063 b.n 80016ac + 80015e4: 20000075 .word 0x20000075 + 80015e8: 2000006b .word 0x2000006b + 80015ec: 2000007c .word 0x2000007c + 80015f0: 20000024 .word 0x20000024 + 80015f4: 20000074 .word 0x20000074 + 80015f8: 2000007a .word 0x2000007a + 80015fc: 20000061 .word 0x20000061 + 8001600: 20000062 .word 0x20000062 + 8001604: 20000063 .word 0x20000063 + 8001608: 20000078 .word 0x20000078 + 800160c: 20000076 .word 0x20000076 + 8001610: 20000073 .word 0x20000073 + 8001614: 20000f8b .word 0x20000f8b + 8001618: 20000f8a .word 0x20000f8a + 800161c: 20000125 .word 0x20000125 + 8001620: 20000126 .word 0x20000126 + if (!is_initialized) + 8001624: 4b4d ldr r3, [pc, #308] @ (800175c ) + 8001626: 781f ldrb r7, [r3, #0] + 8001628: 2f00 cmp r7, #0 + 800162a: d119 bne.n 8001660 + response.status = STATUS_UNINITIALIZED_FEEDER; + 800162c: 2303 movs r3, #3 + 800162e: 7163 strb r3, [r4, #5] + memcpy(response.payload.initializeFeeder.uuid, UUID, UUID_LENGTH); + 8001630: 330f adds r3, #15 + 8001632: 446b add r3, sp + 8001634: 0018 movs r0, r3 + 8001636: 494a ldr r1, [pc, #296] @ (8001760 ) + 8001638: 220c movs r2, #12 + 800163a: f003 fe4d bl 80052d8 + response.header.payloadLength = sizeof(response.payload.initializeFeeder) + 1; + 800163e: 230d movs r3, #13 + comp_crc_header(&crc, &response); + 8001640: 0021 movs r1, r4 + 8001642: a802 add r0, sp, #8 + response.header.payloadLength = sizeof(response.payload.initializeFeeder) + 1; + 8001644: 70e3 strb r3, [r4, #3] + comp_crc_header(&crc, &response); + 8001646: f7ff fa73 bl 8000b30 + for (uint32_t i = 0; i < response.header.payloadLength; i++) + 800164a: 78e3 ldrb r3, [r4, #3] + 800164c: 42bb cmp r3, r7 + 800164e: d800 bhi.n 8001652 + 8001650: e6f1 b.n 8001436 + CRC8_107_add(&crc, *(payload_ptr + i)); + 8001652: 19e3 adds r3, r4, r7 + 8001654: 7959 ldrb r1, [r3, #5] + 8001656: a802 add r0, sp, #8 + 8001658: f7ff f878 bl 800074c + for (uint32_t i = 0; i < response.header.payloadLength; i++) + 800165c: 3701 adds r7, #1 + 800165e: e7f4 b.n 800164a + handle_vendor_options(command->payload.vendorOptions.options, response.payload.vendorOptions.options); + 8001660: 2312 movs r3, #18 + 8001662: 446b add r3, sp + 8001664: 0019 movs r1, r3 + 8001666: 1da8 adds r0, r5, #6 + 8001668: f7ff fd1c bl 80010a4 comp_crc_header(&crc,&response); - 8001708: 0021 movs r1, r4 - 800170a: a802 add r0, sp, #8 - response.status=STATUS_OK; - 800170c: 7165 strb r5, [r4, #5] - response.header.payloadLength = sizeof(response.payload.getFeederId)+1; - 800170e: 70e3 strb r3, [r4, #3] + 800166c: 0021 movs r1, r4 + 800166e: a802 add r0, sp, #8 + response.status = STATUS_OK; + 8001670: 7166 strb r6, [r4, #5] comp_crc_header(&crc,&response); - 8001710: f7ff fa0a bl 8000b28 - for (uint32_t i = 0; i - 800171a: e674 b.n 8001406 + 8001672: f7ff fa5d bl 8000b30 CRC8_107_add(&crc,*(payload_ptr+i)); - 800171c: 1963 adds r3, r4, r5 - 800171e: 7959 ldrb r1, [r3, #5] - 8001720: a802 add r0, sp, #8 - 8001722: f7ff f813 bl 800074c + 8001676: 19a3 adds r3, r4, r6 + 8001678: 7959 ldrb r1, [r3, #5] + 800167a: a802 add r0, sp, #8 + for (uint32_t i = 0; i + for (uint32_t i = 0; i + response.header.crc = CRC8_107_getChecksum(&crc); + 8001686: a802 add r0, sp, #8 + 8001688: f7ff f874 bl 8000774 + rs485_transmit((uint8_t *)&response, packet_len); + 800168c: 211a movs r1, #26 + response.header.crc = CRC8_107_getChecksum(&crc); + 800168e: 7120 strb r0, [r4, #4] + response.header.payloadLength = sizeof(response.payload.vendorOptions)+1; // +1 for the status byte + 8001690: 70e6 strb r6, [r4, #3] + rs485_transmit((uint8_t *)&response, packet_len); + 8001692: 0020 movs r0, r4 + 8001694: f7ff fa1e bl 8000ad4 + break; + 8001698: e675 b.n 8001386 + if(memcmp(UUID,command->payload.getFeederAddress.uuid,UUID_LENGTH) == 0) + 800169a: 220c movs r2, #12 + 800169c: 4830 ldr r0, [pc, #192] @ (8001760 ) + 800169e: 1da9 adds r1, r5, #6 + 80016a0: f003 fde0 bl 8005264 + 80016a4: 2800 cmp r0, #0 + 80016a6: d000 beq.n 80016aa + 80016a8: e66d b.n 8001386 + response.status = STATUS_OK; + 80016aa: 7160 strb r0, [r4, #5] + response.header.payloadLength = 1; // only status byte + 80016ac: 2301 movs r3, #1 + comp_crc_header(&crc, &response); + 80016ae: 0021 movs r1, r4 + 80016b0: a802 add r0, sp, #8 + response.header.payloadLength = 1; // only status byte + 80016b2: 70e3 strb r3, [r4, #3] + comp_crc_header(&crc, &response); + 80016b4: f7ff fa3c bl 8000b30 + CRC8_107_add(&crc, response.status); + 80016b8: 7961 ldrb r1, [r4, #5] + 80016ba: a802 add r0, sp, #8 + 80016bc: f7ff f846 bl 800074c + response.header.crc = CRC8_107_getChecksum(&crc); + 80016c0: e6b9 b.n 8001436 + if(memcmp(UUID,command->payload.identifyFeeder.uuid,UUID_LENGTH) == 0) + 80016c2: 220c movs r2, #12 + 80016c4: 4826 ldr r0, [pc, #152] @ (8001760 ) + 80016c6: 1da9 adds r1, r5, #6 + 80016c8: f003 fdcc bl 8005264 + 80016cc: 2800 cmp r0, #0 + 80016ce: d000 beq.n 80016d2 + 80016d0: e659 b.n 8001386 + response.header.payloadLength = 1; // only status byte + 80016d2: 2301 movs r3, #1 + comp_crc_header(&crc,&response); + 80016d4: 0021 movs r1, r4 + response.status = STATUS_OK; + 80016d6: 7160 strb r0, [r4, #5] + comp_crc_header(&crc,&response); + 80016d8: a802 add r0, sp, #8 + response.header.payloadLength = 1; // only status byte + 80016da: 70e3 strb r3, [r4, #3] + comp_crc_header(&crc,&response); + 80016dc: f7ff fa28 bl 8000b30 + CRC8_107_add(&crc,response.status); + 80016e0: 7961 ldrb r1, [r4, #5] + 80016e2: a802 add r0, sp, #8 + 80016e4: f7ff f832 bl 800074c + response.header.crc = CRC8_107_getChecksum(&crc); + 80016e8: a802 add r0, sp, #8 + 80016ea: f7ff f843 bl 8000774 + packet_len = sizeof(PhotonPacketHeader) + response.header.payloadLength; + 80016ee: 78e1 ldrb r1, [r4, #3] + response.header.crc = CRC8_107_getChecksum(&crc); + 80016f0: 7120 strb r0, [r4, #4] + rs485_transmit((uint8_t *)&response, packet_len); + 80016f2: 3105 adds r1, #5 + 80016f4: 0020 movs r0, r4 + 80016f6: f7ff f9ed bl 8000ad4 + identify_feeder(); + 80016fa: f7ff faa7 bl 8000c4c + break; + 80016fe: e642 b.n 8001386 + uint8_t new_address = command->payload.programFeederFloorAddress.address; + 8001700: 7cad ldrb r5, [r5, #18] + uint8_t write_success = write_floor_address(new_address); + 8001702: 0028 movs r0, r5 + 8001704: f7ff fd8f bl 8001226 + if (write_success) + 8001708: 2305 movs r3, #5 + 800170a: 2800 cmp r0, #0 + 800170c: d100 bne.n 8001710 + 800170e: e767 b.n 80015e0 + floor_address_status = 2; + 8001710: 2202 movs r2, #2 + floor_address = new_address; + 8001712: 4b14 ldr r3, [pc, #80] @ (8001764 ) + my_address = new_address; + 8001714: 703d strb r5, [r7, #0] + floor_address = new_address; + 8001716: 701d strb r5, [r3, #0] + floor_address_status = 2; + 8001718: 4b13 ldr r3, [pc, #76] @ (8001768 ) + 800171a: 701a strb r2, [r3, #0] + response.status = STATUS_OK; + 800171c: 2300 movs r3, #0 + 800171e: e75f b.n 80015e0 + if (is_initialized) return; + 8001720: 4b0e ldr r3, [pc, #56] @ (800175c ) + 8001722: 781d ldrb r5, [r3, #0] + 8001724: 2d00 cmp r5, #0 + 8001726: d000 beq.n 800172a + 8001728: e62d b.n 8001386 + memcpy(response.payload.getFeederId.uuid,UUID,UUID_LENGTH); + 800172a: 2012 movs r0, #18 + 800172c: 490c ldr r1, [pc, #48] @ (8001760 ) + 800172e: 220c movs r2, #12 + 8001730: 4468 add r0, sp + 8001732: f003 fdd1 bl 80052d8 + response.header.payloadLength = sizeof(response.payload.getFeederId)+1; + 8001736: 230d movs r3, #13 + comp_crc_header(&crc,&response); + 8001738: 0021 movs r1, r4 + 800173a: a802 add r0, sp, #8 + response.status=STATUS_OK; + 800173c: 7165 strb r5, [r4, #5] + response.header.payloadLength = sizeof(response.payload.getFeederId)+1; + 800173e: 70e3 strb r3, [r4, #3] + comp_crc_header(&crc,&response); + 8001740: f7ff f9f6 bl 8000b30 for (uint32_t i = 0; i - 800172a: 46c0 nop @ (mov r8, r8) - 800172c: 20000f86 .word 0x20000f86 - 8001730: 20000f87 .word 0x20000f87 - 8001734: 20000001 .word 0x20000001 - 8001738: 200000e8 .word 0x200000e8 + 8001744: 78e3 ldrb r3, [r4, #3] + 8001746: 42ab cmp r3, r5 + 8001748: d800 bhi.n 800174c + 800174a: e674 b.n 8001436 + CRC8_107_add(&crc,*(payload_ptr+i)); + 800174c: 1963 adds r3, r4, r5 + 800174e: 7959 ldrb r1, [r3, #5] + 8001750: a802 add r0, sp, #8 + 8001752: f7fe fffb bl 800074c + for (uint32_t i = 0; i + 800175a: 46c0 nop @ (mov r8, r8) + 800175c: 20000f8a .word 0x20000f8a + 8001760: 20000f8b .word 0x20000f8b + 8001764: 20000001 .word 0x20000001 + 8001768: 200000ec .word 0x200000ec -0800173c : +0800176c : { - 800173c: b5f0 push {r4, r5, r6, r7, lr} - 800173e: 0004 movs r4, r0 - 8001740: 000d movs r5, r1 - 8001742: b087 sub sp, #28 + 800176c: b5f0 push {r4, r5, r6, r7, lr} + 800176e: 0004 movs r4, r0 + 8001770: 000d movs r5, r1 + 8001772: b087 sub sp, #28 if (val < 0) { neg = 1; val = -val; } - 8001744: 2800 cmp r0, #0 - 8001746: da1a bge.n 800177e - 8001748: 2601 movs r6, #1 - 800174a: 4244 negs r4, r0 + 8001774: 2800 cmp r0, #0 + 8001776: da1a bge.n 80017ae + 8001778: 2601 movs r6, #1 + 800177a: 4244 negs r4, r0 uint8_t i = 0, len = 0; - 800174c: 2700 movs r7, #0 + 800177c: 2700 movs r7, #0 else { while (val > 0) { tmp[i++] = '0' + (val % 10); val /= 10; } } - 800174e: 0020 movs r0, r4 - 8001750: 210a movs r1, #10 - 8001752: 9701 str r7, [sp, #4] - 8001754: f7fe fe5c bl 8000410 <__aeabi_idivmod> - 8001758: 9a01 ldr r2, [sp, #4] - 800175a: 3130 adds r1, #48 @ 0x30 - 800175c: ab03 add r3, sp, #12 - 800175e: 0020 movs r0, r4 - 8001760: 5499 strb r1, [r3, r2] - 8001762: 210a movs r1, #10 - 8001764: f7fe fd6e bl 8000244 <__divsi3> - 8001768: 3701 adds r7, #1 - 800176a: 0004 movs r4, r0 - 800176c: b2ff uxtb r7, r7 - 800176e: 2800 cmp r0, #0 - 8001770: d1ed bne.n 800174e + 800177e: 0020 movs r0, r4 + 8001780: 210a movs r1, #10 + 8001782: 9701 str r7, [sp, #4] + 8001784: f7fe fe44 bl 8000410 <__aeabi_idivmod> + 8001788: 9a01 ldr r2, [sp, #4] + 800178a: 3130 adds r1, #48 @ 0x30 + 800178c: ab03 add r3, sp, #12 + 800178e: 0020 movs r0, r4 + 8001790: 5499 strb r1, [r3, r2] + 8001792: 210a movs r1, #10 + 8001794: f7fe fd56 bl 8000244 <__divsi3> + 8001798: 3701 adds r7, #1 + 800179a: 0004 movs r4, r0 + 800179c: b2ff uxtb r7, r7 + 800179e: 2800 cmp r0, #0 + 80017a0: d1ed bne.n 800177e if (neg) { *buf++ = '-'; len++; } - 8001772: 2e00 cmp r6, #0 - 8001774: d00c beq.n 8001790 - 8001776: 232d movs r3, #45 @ 0x2d - 8001778: 702b strb r3, [r5, #0] - 800177a: 3501 adds r5, #1 - 800177c: e008 b.n 8001790 + 80017a2: 2e00 cmp r6, #0 + 80017a4: d00c beq.n 80017c0 + 80017a6: 232d movs r3, #45 @ 0x2d + 80017a8: 702b strb r3, [r5, #0] + 80017aa: 3501 adds r5, #1 + 80017ac: e008 b.n 80017c0 if (val == 0) { tmp[i++] = '0'; } - 800177e: 2800 cmp r0, #0 - 8001780: d001 beq.n 8001786 - 8001782: 2600 movs r6, #0 - 8001784: e7e2 b.n 800174c - 8001786: 2330 movs r3, #48 @ 0x30 + 80017ae: 2800 cmp r0, #0 + 80017b0: d001 beq.n 80017b6 + 80017b2: 2600 movs r6, #0 + 80017b4: e7e2 b.n 800177c + 80017b6: 2330 movs r3, #48 @ 0x30 uint8_t i = 0, len = 0; - 8001788: 0006 movs r6, r0 + 80017b8: 0006 movs r6, r0 if (val == 0) { tmp[i++] = '0'; } - 800178a: 2701 movs r7, #1 - 800178c: aa02 add r2, sp, #8 - 800178e: 7113 strb r3, [r2, #4] - 8001790: 003b movs r3, r7 + 80017ba: 2701 movs r7, #1 + 80017bc: aa02 add r2, sp, #8 + 80017be: 7113 strb r3, [r2, #4] + 80017c0: 003b movs r3, r7 while (i > 0) { *buf++ = tmp[--i]; len++; } - 8001792: 2b00 cmp r3, #0 - 8001794: d103 bne.n 800179e + 80017c2: 2b00 cmp r3, #0 + 80017c4: d103 bne.n 80017ce return len; - 8001796: 19f0 adds r0, r6, r7 - 8001798: b2c0 uxtb r0, r0 + 80017c6: 19f0 adds r0, r6, r7 + 80017c8: b2c0 uxtb r0, r0 } - 800179a: b007 add sp, #28 - 800179c: bdf0 pop {r4, r5, r6, r7, pc} + 80017ca: b007 add sp, #28 + 80017cc: bdf0 pop {r4, r5, r6, r7, pc} while (i > 0) { *buf++ = tmp[--i]; len++; } - 800179e: 3b01 subs r3, #1 - 80017a0: b2db uxtb r3, r3 - 80017a2: aa03 add r2, sp, #12 - 80017a4: 5cd2 ldrb r2, [r2, r3] - 80017a6: 702a strb r2, [r5, #0] - 80017a8: 3501 adds r5, #1 - 80017aa: e7f2 b.n 8001792 + 80017ce: 3b01 subs r3, #1 + 80017d0: b2db uxtb r3, r3 + 80017d2: aa03 add r2, sp, #12 + 80017d4: 5cd2 ldrb r2, [r2, r3] + 80017d6: 702a strb r2, [r5, #0] + 80017d8: 3501 adds r5, #1 + 80017da: e7f2 b.n 80017c2 -080017ac : +080017dc : { - 80017ac: b570 push {r4, r5, r6, lr} - 80017ae: 0004 movs r4, r0 - 80017b0: 000d movs r5, r1 - 80017b2: b086 sub sp, #24 + 80017dc: b570 push {r4, r5, r6, lr} + 80017de: 0004 movs r4, r0 + 80017e0: 000d movs r5, r1 + 80017e2: b086 sub sp, #24 const char hex[] = "0123456789ABCDEF"; - 80017b4: ae01 add r6, sp, #4 - 80017b6: 2211 movs r2, #17 - 80017b8: 0030 movs r0, r6 - 80017ba: 4906 ldr r1, [pc, #24] @ (80017d4 ) - 80017bc: f003 fd12 bl 80051e4 + 80017e4: ae01 add r6, sp, #4 + 80017e6: 2211 movs r2, #17 + 80017e8: 0030 movs r0, r6 + 80017ea: 4906 ldr r1, [pc, #24] @ (8001804 ) + 80017ec: f003 fd74 bl 80052d8 buf[0] = hex[(val >> 4) & 0x0F]; - 80017c0: 0923 lsrs r3, r4, #4 - 80017c2: 5cf3 ldrb r3, [r6, r3] + 80017f0: 0923 lsrs r3, r4, #4 + 80017f2: 5cf3 ldrb r3, [r6, r3] } - 80017c4: 2002 movs r0, #2 + 80017f4: 2002 movs r0, #2 buf[0] = hex[(val >> 4) & 0x0F]; - 80017c6: 702b strb r3, [r5, #0] + 80017f6: 702b strb r3, [r5, #0] buf[1] = hex[val & 0x0F]; - 80017c8: 230f movs r3, #15 - 80017ca: 401c ands r4, r3 - 80017cc: 5d33 ldrb r3, [r6, r4] - 80017ce: 706b strb r3, [r5, #1] + 80017f8: 230f movs r3, #15 + 80017fa: 401c ands r4, r3 + 80017fc: 5d33 ldrb r3, [r6, r4] + 80017fe: 706b strb r3, [r5, #1] } - 80017d0: b006 add sp, #24 - 80017d2: bd70 pop {r4, r5, r6, pc} - 80017d4: 08005210 .word 0x08005210 + 8001800: b006 add sp, #24 + 8001802: bd70 pop {r4, r5, r6, pc} + 8001804: 08005304 .word 0x08005304 -080017d8 : +08001808 : { - 80017d8: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr} + 8001808: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr} if (!debug_enabled) return; - 80017da: 4b6b ldr r3, [pc, #428] @ (8001988 ) - 80017dc: 781b ldrb r3, [r3, #0] - 80017de: 2b00 cmp r3, #0 - 80017e0: d100 bne.n 80017e4 - 80017e2: e0cf b.n 8001984 + 800180a: 4b6b ldr r3, [pc, #428] @ (80019b8 ) + 800180c: 781b ldrb r3, [r3, #0] + 800180e: 2b00 cmp r3, #0 + 8001810: d100 bne.n 8001814 + 8001812: e0cf b.n 80019b4 uint32_t now = HAL_GetTick(); - 80017e4: f001 f87c bl 80028e0 + 8001814: f001 f87c bl 8002910 if ((now - last_debug_output_time) < DEBUG_OUTPUT_INTERVAL_MS) return; - 80017e8: 4a68 ldr r2, [pc, #416] @ (800198c ) - 80017ea: 6813 ldr r3, [r2, #0] - 80017ec: 1ac3 subs r3, r0, r3 - 80017ee: 2b63 cmp r3, #99 @ 0x63 - 80017f0: d800 bhi.n 80017f4 - 80017f2: e0c7 b.n 8001984 + 8001818: 4a68 ldr r2, [pc, #416] @ (80019bc ) + 800181a: 6813 ldr r3, [r2, #0] + 800181c: 1ac3 subs r3, r0, r3 + 800181e: 2b63 cmp r3, #99 @ 0x63 + 8001820: d800 bhi.n 8001824 + 8001822: e0c7 b.n 80019b4 *p++ = '$'; *p++ = 'P'; *p++ = ':'; - 80017f4: 2324 movs r3, #36 @ 0x24 - 80017f6: 243a movs r4, #58 @ 0x3a - 80017f8: 4d65 ldr r5, [pc, #404] @ (8001990 ) + 8001824: 2324 movs r3, #36 @ 0x24 + 8001826: 243a movs r4, #58 @ 0x3a + 8001828: 4d65 ldr r5, [pc, #404] @ (80019c0 ) p += debug_itoa(total_count, p); - 80017fa: 4e66 ldr r6, [pc, #408] @ (8001994 ) - 80017fc: 4f66 ldr r7, [pc, #408] @ (8001998 ) + 800182a: 4e66 ldr r6, [pc, #408] @ (80019c4 ) + 800182c: 4f66 ldr r7, [pc, #408] @ (80019c8 ) last_debug_output_time = now; - 80017fe: 6010 str r0, [r2, #0] + 800182e: 6010 str r0, [r2, #0] p += debug_itoa(total_count, p); - 8001800: 0039 movs r1, r7 - 8001802: 6830 ldr r0, [r6, #0] + 8001830: 0039 movs r1, r7 + 8001832: 6830 ldr r0, [r6, #0] *p++ = '$'; *p++ = 'P'; *p++ = ':'; - 8001804: 702b strb r3, [r5, #0] - 8001806: 332c adds r3, #44 @ 0x2c - 8001808: 706b strb r3, [r5, #1] - 800180a: 70ac strb r4, [r5, #2] + 8001834: 702b strb r3, [r5, #0] + 8001836: 332c adds r3, #44 @ 0x2c + 8001838: 706b strb r3, [r5, #1] + 800183a: 70ac strb r4, [r5, #2] p += debug_itoa(total_count, p); - 800180c: f7ff ff96 bl 800173c - 8001810: 183f adds r7, r7, r0 + 800183c: f7ff ff96 bl 800176c + 8001840: 183f adds r7, r7, r0 *p++ = ':'; - 8001812: 1c7b adds r3, r7, #1 - 8001814: 703c strb r4, [r7, #0] + 8001842: 1c7b adds r3, r7, #1 + 8001844: 703c strb r4, [r7, #0] p += debug_itoa(target_count, p); - 8001816: 4f61 ldr r7, [pc, #388] @ (800199c ) - 8001818: 0019 movs r1, r3 - 800181a: 6838 ldr r0, [r7, #0] + 8001846: 4f61 ldr r7, [pc, #388] @ (80019cc ) + 8001848: 0019 movs r1, r3 + 800184a: 6838 ldr r0, [r7, #0] *p++ = ':'; - 800181c: 9301 str r3, [sp, #4] + 800184c: 9301 str r3, [sp, #4] p += debug_itoa(target_count, p); - 800181e: f7ff ff8d bl 800173c - 8001822: 9b01 ldr r3, [sp, #4] - 8001824: 1818 adds r0, r3, r0 + 800184e: f7ff ff8d bl 800176c + 8001852: 9b01 ldr r3, [sp, #4] + 8001854: 1818 adds r0, r3, r0 *p++ = ':'; - 8001826: 1c43 adds r3, r0, #1 - 8001828: 9301 str r3, [sp, #4] - 800182a: 7004 strb r4, [r0, #0] + 8001856: 1c43 adds r3, r0, #1 + 8001858: 9301 str r3, [sp, #4] + 800185a: 7004 strb r4, [r0, #0] p += debug_itoa(target_count - total_count, p); - 800182c: 6833 ldr r3, [r6, #0] - 800182e: 6838 ldr r0, [r7, #0] - 8001830: 9901 ldr r1, [sp, #4] - 8001832: 1ac0 subs r0, r0, r3 - 8001834: f7ff ff82 bl 800173c - 8001838: 9b01 ldr r3, [sp, #4] + 800185c: 6833 ldr r3, [r6, #0] + 800185e: 6838 ldr r0, [r7, #0] + 8001860: 9901 ldr r1, [sp, #4] + 8001862: 1ac0 subs r0, r0, r3 + 8001864: f7ff ff82 bl 800176c + 8001868: 9b01 ldr r3, [sp, #4] *p++ = ','; *p++ = 'I'; *p++ = ':'; - 800183a: 272c movs r7, #44 @ 0x2c + 800186a: 272c movs r7, #44 @ 0x2c p += debug_itoa(target_count - total_count, p); - 800183c: 1818 adds r0, r3, r0 + 800186c: 1818 adds r0, r3, r0 *p++ = ','; *p++ = 'I'; *p++ = ':'; - 800183e: 2349 movs r3, #73 @ 0x49 - 8001840: 7043 strb r3, [r0, #1] + 800186e: 2349 movs r3, #73 @ 0x49 + 8001870: 7043 strb r3, [r0, #1] p += debug_itoa(debug_pid_output, p); - 8001842: 4b57 ldr r3, [pc, #348] @ (80019a0 ) + 8001872: 4b57 ldr r3, [pc, #348] @ (80019d0 ) *p++ = ','; *p++ = 'I'; *p++ = ':'; - 8001844: 1cc6 adds r6, r0, #3 - 8001846: 7007 strb r7, [r0, #0] - 8001848: 7084 strb r4, [r0, #2] + 8001874: 1cc6 adds r6, r0, #3 + 8001876: 7007 strb r7, [r0, #0] + 8001878: 7084 strb r4, [r0, #2] p += debug_itoa(debug_pid_output, p); - 800184a: 8818 ldrh r0, [r3, #0] - 800184c: 0031 movs r1, r6 - 800184e: b200 sxth r0, r0 - 8001850: f7ff ff74 bl 800173c + 800187a: 8818 ldrh r0, [r3, #0] + 800187c: 0031 movs r1, r6 + 800187e: b200 sxth r0, r0 + 8001880: f7ff ff74 bl 800176c *p++ = ','; *p++ = 'S'; *p++ = ':'; - 8001854: 2353 movs r3, #83 @ 0x53 + 8001884: 2353 movs r3, #83 @ 0x53 p += debug_itoa(debug_pid_output, p); - 8001856: 1830 adds r0, r6, r0 + 8001886: 1830 adds r0, r6, r0 *p++ = ','; *p++ = 'S'; *p++ = ':'; - 8001858: 7043 strb r3, [r0, #1] + 8001888: 7043 strb r3, [r0, #1] *p++ = '0' + feed_state; // State as single digit 0-9 - 800185a: 4b52 ldr r3, [pc, #328] @ (80019a4 ) + 800188a: 4b52 ldr r3, [pc, #328] @ (80019d4 ) *p++ = ','; *p++ = 'C'; *p++ = ':'; - 800185c: 0006 movs r6, r0 + 800188c: 0006 movs r6, r0 *p++ = '0' + feed_state; // State as single digit 0-9 - 800185e: 781b ldrb r3, [r3, #0] + 800188e: 781b ldrb r3, [r3, #0] *p++ = ','; *p++ = 'S'; *p++ = ':'; - 8001860: 7007 strb r7, [r0, #0] + 8001890: 7007 strb r7, [r0, #0] *p++ = '0' + feed_state; // State as single digit 0-9 - 8001862: 3330 adds r3, #48 @ 0x30 - 8001864: 70c3 strb r3, [r0, #3] + 8001892: 3330 adds r3, #48 @ 0x30 + 8001894: 70c3 strb r3, [r0, #3] *p++ = ','; *p++ = 'F'; *p++ = ':'; - 8001866: 2346 movs r3, #70 @ 0x46 - 8001868: 7143 strb r3, [r0, #5] + 8001896: 2346 movs r3, #70 @ 0x46 + 8001898: 7143 strb r3, [r0, #5] *p++ = '0' + is_initialized; - 800186a: 4b4f ldr r3, [pc, #316] @ (80019a8 ) + 800189a: 4b4f ldr r3, [pc, #316] @ (80019d8 ) *p++ = ','; *p++ = 'S'; *p++ = ':'; - 800186c: 7084 strb r4, [r0, #2] + 800189c: 7084 strb r4, [r0, #2] *p++ = '0' + is_initialized; - 800186e: 781b ldrb r3, [r3, #0] + 800189e: 781b ldrb r3, [r3, #0] *p++ = ','; *p++ = 'F'; *p++ = ':'; - 8001870: 7107 strb r7, [r0, #4] + 80018a0: 7107 strb r7, [r0, #4] *p++ = '0' + is_initialized; - 8001872: 3330 adds r3, #48 @ 0x30 - 8001874: 71c3 strb r3, [r0, #7] + 80018a2: 3330 adds r3, #48 @ 0x30 + 80018a4: 71c3 strb r3, [r0, #7] *p++ = '0' + feed_in_progress; - 8001876: 4b4d ldr r3, [pc, #308] @ (80019ac ) + 80018a6: 4b4d ldr r3, [pc, #308] @ (80019dc ) *p++ = ','; *p++ = 'F'; *p++ = ':'; - 8001878: 7184 strb r4, [r0, #6] + 80018a8: 7184 strb r4, [r0, #6] *p++ = '0' + feed_in_progress; - 800187a: 781b ldrb r3, [r3, #0] + 80018aa: 781b ldrb r3, [r3, #0] *p++ = ','; *p++ = 'C'; *p++ = ':'; - 800187c: 7247 strb r7, [r0, #9] + 80018ac: 7247 strb r7, [r0, #9] *p++ = '0' + feed_in_progress; - 800187e: 3330 adds r3, #48 @ 0x30 - 8001880: 7203 strb r3, [r0, #8] + 80018ae: 3330 adds r3, #48 @ 0x30 + 80018b0: 7203 strb r3, [r0, #8] *p++ = ','; *p++ = 'C'; *p++ = ':'; - 8001882: 2343 movs r3, #67 @ 0x43 - 8001884: 7283 strb r3, [r0, #10] + 80018b2: 2343 movs r3, #67 @ 0x43 + 80018b4: 7283 strb r3, [r0, #10] p += debug_itoa(feed_ok_count, p); - 8001886: 4b4a ldr r3, [pc, #296] @ (80019b0 ) + 80018b6: 4b4a ldr r3, [pc, #296] @ (80019e0 ) *p++ = ','; *p++ = 'C'; *p++ = ':'; - 8001888: 72c4 strb r4, [r0, #11] + 80018b8: 72c4 strb r4, [r0, #11] p += debug_itoa(feed_ok_count, p); - 800188a: 8818 ldrh r0, [r3, #0] + 80018ba: 8818 ldrh r0, [r3, #0] *p++ = ','; *p++ = 'C'; *p++ = ':'; - 800188c: 360c adds r6, #12 + 80018bc: 360c adds r6, #12 p += debug_itoa(feed_ok_count, p); - 800188e: 0031 movs r1, r6 - 8001890: b280 uxth r0, r0 - 8001892: f7ff ff53 bl 800173c + 80018be: 0031 movs r1, r6 + 80018c0: b280 uxth r0, r0 + 80018c2: f7ff ff53 bl 800176c p += debug_itoa(feed_fail_count, p); - 8001896: 4b47 ldr r3, [pc, #284] @ (80019b4 ) + 80018c6: 4b47 ldr r3, [pc, #284] @ (80019e4 ) p += debug_itoa(feed_ok_count, p); - 8001898: 1830 adds r0, r6, r0 + 80018c8: 1830 adds r0, r6, r0 *p++ = ':'; - 800189a: 1c46 adds r6, r0, #1 - 800189c: 7004 strb r4, [r0, #0] + 80018ca: 1c46 adds r6, r0, #1 + 80018cc: 7004 strb r4, [r0, #0] p += debug_itoa(feed_fail_count, p); - 800189e: 8818 ldrh r0, [r3, #0] - 80018a0: 0031 movs r1, r6 - 80018a2: b280 uxth r0, r0 - 80018a4: f7ff ff4a bl 800173c + 80018ce: 8818 ldrh r0, [r3, #0] + 80018d0: 0031 movs r1, r6 + 80018d2: b280 uxth r0, r0 + 80018d4: f7ff ff4a bl 800176c p += debug_itoa(brake_time_tenths, p); - 80018a8: 4b43 ldr r3, [pc, #268] @ (80019b8 ) + 80018d8: 4b43 ldr r3, [pc, #268] @ (80019e8 ) p += debug_itoa(feed_fail_count, p); - 80018aa: 1830 adds r0, r6, r0 + 80018da: 1830 adds r0, r6, r0 *p++ = ':'; - 80018ac: 1c46 adds r6, r0, #1 + 80018dc: 1c46 adds r6, r0, #1 p += debug_itoa(brake_time_tenths, p); - 80018ae: 0031 movs r1, r6 + 80018de: 0031 movs r1, r6 *p++ = ':'; - 80018b0: 7004 strb r4, [r0, #0] + 80018e0: 7004 strb r4, [r0, #0] p += debug_itoa(brake_time_tenths, p); - 80018b2: 6818 ldr r0, [r3, #0] - 80018b4: f7ff ff42 bl 800173c + 80018e2: 6818 ldr r0, [r3, #0] + 80018e4: f7ff ff42 bl 800176c p += debug_itoa(feed_retry_total, p); - 80018b8: 4b40 ldr r3, [pc, #256] @ (80019bc ) + 80018e8: 4b40 ldr r3, [pc, #256] @ (80019ec ) p += debug_itoa(brake_time_tenths, p); - 80018ba: 1830 adds r0, r6, r0 + 80018ea: 1830 adds r0, r6, r0 *p++ = ':'; - 80018bc: 1c46 adds r6, r0, #1 - 80018be: 7004 strb r4, [r0, #0] + 80018ec: 1c46 adds r6, r0, #1 + 80018ee: 7004 strb r4, [r0, #0] p += debug_itoa(feed_retry_total, p); - 80018c0: 8818 ldrh r0, [r3, #0] - 80018c2: 0031 movs r1, r6 - 80018c4: b280 uxth r0, r0 - 80018c6: f7ff ff39 bl 800173c + 80018f0: 8818 ldrh r0, [r3, #0] + 80018f2: 0031 movs r1, r6 + 80018f4: b280 uxth r0, r0 + 80018f6: f7ff ff39 bl 800176c *p++ = ','; *p++ = 'A'; *p++ = ':'; - 80018ca: 2341 movs r3, #65 @ 0x41 + 80018fa: 2341 movs r3, #65 @ 0x41 p += debug_itoa(feed_retry_total, p); - 80018cc: 1836 adds r6, r6, r0 + 80018fc: 1836 adds r6, r6, r0 *p++ = ','; *p++ = 'A'; *p++ = ':'; - 80018ce: 7073 strb r3, [r6, #1] + 80018fe: 7073 strb r3, [r6, #1] p += debug_hex8(my_address, p); - 80018d0: 4b3b ldr r3, [pc, #236] @ (80019c0 ) + 8001900: 4b3b ldr r3, [pc, #236] @ (80019f0 ) *p++ = ','; *p++ = 'A'; *p++ = ':'; - 80018d2: 7037 strb r7, [r6, #0] - 80018d4: 70b4 strb r4, [r6, #2] - 80018d6: 1cf1 adds r1, r6, #3 + 8001902: 7037 strb r7, [r6, #0] + 8001904: 70b4 strb r4, [r6, #2] + 8001906: 1cf1 adds r1, r6, #3 p += debug_hex8(my_address, p); - 80018d8: 7818 ldrb r0, [r3, #0] - 80018da: f7ff ff67 bl 80017ac + 8001908: 7818 ldrb r0, [r3, #0] + 800190a: f7ff ff67 bl 80017dc *p++ = ','; *p++ = 'R'; *p++ = ':'; - 80018de: 2352 movs r3, #82 @ 0x52 - 80018e0: 71b3 strb r3, [r6, #6] - 80018e2: 0033 movs r3, r6 - 80018e4: 3308 adds r3, #8 - 80018e6: 9301 str r3, [sp, #4] + 800190e: 2352 movs r3, #82 @ 0x52 + 8001910: 71b3 strb r3, [r6, #6] + 8001912: 0033 movs r3, r6 + 8001914: 3308 adds r3, #8 + 8001916: 9301 str r3, [sp, #4] p += debug_itoa(drop_crc, p); - 80018e8: 4b36 ldr r3, [pc, #216] @ (80019c4 ) + 8001918: 4b36 ldr r3, [pc, #216] @ (80019f4 ) *p++ = ','; *p++ = 'R'; *p++ = ':'; - 80018ea: 7177 strb r7, [r6, #5] + 800191a: 7177 strb r7, [r6, #5] p += debug_itoa(drop_crc, p); - 80018ec: 8818 ldrh r0, [r3, #0] + 800191c: 8818 ldrh r0, [r3, #0] *p++ = ','; *p++ = 'R'; *p++ = ':'; - 80018ee: 71f4 strb r4, [r6, #7] + 800191e: 71f4 strb r4, [r6, #7] p += debug_itoa(drop_crc, p); - 80018f0: 9901 ldr r1, [sp, #4] - 80018f2: b280 uxth r0, r0 - 80018f4: f7ff ff22 bl 800173c - 80018f8: 9b01 ldr r3, [sp, #4] - 80018fa: 1818 adds r0, r3, r0 + 8001920: 9901 ldr r1, [sp, #4] + 8001922: b280 uxth r0, r0 + 8001924: f7ff ff22 bl 800176c + 8001928: 9b01 ldr r3, [sp, #4] + 800192a: 1818 adds r0, r3, r0 p += debug_itoa(msg_handled, p); - 80018fc: 4b32 ldr r3, [pc, #200] @ (80019c8 ) + 800192c: 4b32 ldr r3, [pc, #200] @ (80019f8 ) *p++ = ':'; - 80018fe: 1c46 adds r6, r0, #1 - 8001900: 7004 strb r4, [r0, #0] + 800192e: 1c46 adds r6, r0, #1 + 8001930: 7004 strb r4, [r0, #0] p += debug_itoa(msg_handled, p); - 8001902: 8818 ldrh r0, [r3, #0] - 8001904: 0031 movs r1, r6 - 8001906: b280 uxth r0, r0 - 8001908: f7ff ff18 bl 800173c + 8001932: 8818 ldrh r0, [r3, #0] + 8001934: 0031 movs r1, r6 + 8001936: b280 uxth r0, r0 + 8001938: f7ff ff18 bl 800176c p += debug_itoa(uart_error_count, p); - 800190c: 4b2f ldr r3, [pc, #188] @ (80019cc ) + 800193c: 4b2f ldr r3, [pc, #188] @ (80019fc ) p += debug_itoa(msg_handled, p); - 800190e: 1830 adds r0, r6, r0 + 800193e: 1830 adds r0, r6, r0 *p++ = ':'; - 8001910: 1c46 adds r6, r0, #1 - 8001912: 7004 strb r4, [r0, #0] + 8001940: 1c46 adds r6, r0, #1 + 8001942: 7004 strb r4, [r0, #0] p += debug_itoa(uart_error_count, p); - 8001914: 8818 ldrh r0, [r3, #0] - 8001916: 0031 movs r1, r6 - 8001918: b280 uxth r0, r0 - 800191a: f7ff ff0f bl 800173c + 8001944: 8818 ldrh r0, [r3, #0] + 8001946: 0031 movs r1, r6 + 8001948: b280 uxth r0, r0 + 800194a: f7ff ff0f bl 800176c *p++ = ','; *p++ = 'T'; *p++ = ':'; - 800191e: 2354 movs r3, #84 @ 0x54 + 800194e: 2354 movs r3, #84 @ 0x54 p += debug_itoa(uart_error_count, p); - 8001920: 1830 adds r0, r6, r0 + 8001950: 1830 adds r0, r6, r0 *p++ = ','; *p++ = 'T'; *p++ = ':'; - 8001922: 7007 strb r7, [r0, #0] + 8001952: 7007 strb r7, [r0, #0] p += debug_itoa(my_addr_size, p); - 8001924: 4f2a ldr r7, [pc, #168] @ (80019d0 ) + 8001954: 4f2a ldr r7, [pc, #168] @ (8001a00 ) *p++ = ','; *p++ = 'T'; *p++ = ':'; - 8001926: 1cc6 adds r6, r0, #3 - 8001928: 7084 strb r4, [r0, #2] - 800192a: 7043 strb r3, [r0, #1] + 8001956: 1cc6 adds r6, r0, #3 + 8001958: 7084 strb r4, [r0, #2] + 800195a: 7043 strb r3, [r0, #1] p += debug_itoa(my_addr_size, p); - 800192c: 7838 ldrb r0, [r7, #0] - 800192e: 0031 movs r1, r6 - 8001930: b2c0 uxtb r0, r0 - 8001932: f7ff ff03 bl 800173c - 8001936: 1830 adds r0, r6, r0 + 800195c: 7838 ldrb r0, [r7, #0] + 800195e: 0031 movs r1, r6 + 8001960: b2c0 uxtb r0, r0 + 8001962: f7ff ff03 bl 800176c + 8001966: 1830 adds r0, r6, r0 *p++ = ':'; - 8001938: 7004 strb r4, [r0, #0] - 800193a: 2400 movs r4, #0 - 800193c: 1c46 adds r6, r0, #1 + 8001968: 7004 strb r4, [r0, #0] + 800196a: 2400 movs r4, #0 + 800196c: 1c46 adds r6, r0, #1 for (uint8_t i = 0; i < 8 && i < my_addr_size; i++) - 800193e: 783a ldrb r2, [r7, #0] - 8001940: b2e3 uxtb r3, r4 - 8001942: 429a cmp r2, r3 - 8001944: d909 bls.n 800195a + 800196e: 783a ldrb r2, [r7, #0] + 8001970: b2e3 uxtb r3, r4 + 8001972: 429a cmp r2, r3 + 8001974: d909 bls.n 800198a p += debug_hex8(my_addr_bytes[i], p); - 8001946: 4b23 ldr r3, [pc, #140] @ (80019d4 ) - 8001948: 0031 movs r1, r6 - 800194a: 5d18 ldrb r0, [r3, r4] + 8001976: 4b23 ldr r3, [pc, #140] @ (8001a04 ) + 8001978: 0031 movs r1, r6 + 800197a: 5d18 ldrb r0, [r3, r4] for (uint8_t i = 0; i < 8 && i < my_addr_size; i++) - 800194c: 3401 adds r4, #1 + 800197c: 3401 adds r4, #1 p += debug_hex8(my_addr_bytes[i], p); - 800194e: b2c0 uxtb r0, r0 - 8001950: f7ff ff2c bl 80017ac - 8001954: 3602 adds r6, #2 + 800197e: b2c0 uxtb r0, r0 + 8001980: f7ff ff2c bl 80017dc + 8001984: 3602 adds r6, #2 for (uint8_t i = 0; i < 8 && i < my_addr_size; i++) - 8001956: 2c08 cmp r4, #8 - 8001958: d1f1 bne.n 800193e + 8001986: 2c08 cmp r4, #8 + 8001988: d1f1 bne.n 800196e *p++ = ':'; - 800195a: 233a movs r3, #58 @ 0x3a - 800195c: 7033 strb r3, [r6, #0] + 800198a: 233a movs r3, #58 @ 0x3a + 800198c: 7033 strb r3, [r6, #0] p += debug_hex8(my_addr_crc_exp, p); - 800195e: 4b1e ldr r3, [pc, #120] @ (80019d8 ) + 800198e: 4b1e ldr r3, [pc, #120] @ (8001a08 ) *p++ = ':'; - 8001960: 1c71 adds r1, r6, #1 + 8001990: 1c71 adds r1, r6, #1 p += debug_hex8(my_addr_crc_exp, p); - 8001962: 7818 ldrb r0, [r3, #0] - 8001964: b2c0 uxtb r0, r0 - 8001966: f7ff ff21 bl 80017ac + 8001992: 7818 ldrb r0, [r3, #0] + 8001994: b2c0 uxtb r0, r0 + 8001996: f7ff ff21 bl 80017dc *p++ = '*'; *p++ = '\r'; *p++ = '\n'; - 800196a: 232a movs r3, #42 @ 0x2a - 800196c: 70f3 strb r3, [r6, #3] - 800196e: 3b1d subs r3, #29 - 8001970: 7133 strb r3, [r6, #4] - 8001972: 3b03 subs r3, #3 - 8001974: 7173 strb r3, [r6, #5] - 8001976: 3606 adds r6, #6 + 800199a: 232a movs r3, #42 @ 0x2a + 800199c: 70f3 strb r3, [r6, #3] + 800199e: 3b1d subs r3, #29 + 80019a0: 7133 strb r3, [r6, #4] + 80019a2: 3b03 subs r3, #3 + 80019a4: 7173 strb r3, [r6, #5] + 80019a6: 3606 adds r6, #6 HAL_UART_Transmit(&huart1, (uint8_t*)debug_tx_buffer, p - debug_tx_buffer, 10); - 8001978: 1b72 subs r2, r6, r5 - 800197a: 0029 movs r1, r5 - 800197c: 4817 ldr r0, [pc, #92] @ (80019dc ) - 800197e: b292 uxth r2, r2 - 8001980: f003 f999 bl 8004cb6 + 80019a8: 1b72 subs r2, r6, r5 + 80019aa: 0029 movs r1, r5 + 80019ac: 4817 ldr r0, [pc, #92] @ (8001a0c ) + 80019ae: b292 uxth r2, r2 + 80019b0: f003 f9fb bl 8004daa } - 8001984: bdf7 pop {r0, r1, r2, r4, r5, r6, r7, pc} - 8001986: 46c0 nop @ (mov r8, r8) - 8001988: 20000000 .word 0x20000000 - 800198c: 200000e0 .word 0x200000e0 - 8001990: 2000007e .word 0x2000007e - 8001994: 20000154 .word 0x20000154 - 8001998: 20000081 .word 0x20000081 - 800199c: 20000150 .word 0x20000150 - 80019a0: 2000007c .word 0x2000007c - 80019a4: 20000118 .word 0x20000118 - 80019a8: 20000f86 .word 0x20000f86 - 80019ac: 20000121 .word 0x20000121 - 80019b0: 2000011e .word 0x2000011e - 80019b4: 2000011c .word 0x2000011c - 80019b8: 20000004 .word 0x20000004 - 80019bc: 2000011a .word 0x2000011a - 80019c0: 20000020 .word 0x20000020 - 80019c4: 20000076 .word 0x20000076 - 80019c8: 20000072 .word 0x20000072 - 80019cc: 2000007a .word 0x2000007a - 80019d0: 2000005e .word 0x2000005e - 80019d4: 2000005f .word 0x2000005f - 80019d8: 2000005d .word 0x2000005d - 80019dc: 200010ec .word 0x200010ec + 80019b4: bdf7 pop {r0, r1, r2, r4, r5, r6, r7, pc} + 80019b6: 46c0 nop @ (mov r8, r8) + 80019b8: 20000000 .word 0x20000000 + 80019bc: 200000e4 .word 0x200000e4 + 80019c0: 20000082 .word 0x20000082 + 80019c4: 20000158 .word 0x20000158 + 80019c8: 20000085 .word 0x20000085 + 80019cc: 20000154 .word 0x20000154 + 80019d0: 20000080 .word 0x20000080 + 80019d4: 2000011c .word 0x2000011c + 80019d8: 20000f8a .word 0x20000f8a + 80019dc: 20000125 .word 0x20000125 + 80019e0: 20000122 .word 0x20000122 + 80019e4: 20000120 .word 0x20000120 + 80019e8: 20000008 .word 0x20000008 + 80019ec: 2000011e .word 0x2000011e + 80019f0: 20000024 .word 0x20000024 + 80019f4: 2000007a .word 0x2000007a + 80019f8: 20000076 .word 0x20000076 + 80019fc: 2000007e .word 0x2000007e + 8001a00: 20000062 .word 0x20000062 + 8001a04: 20000063 .word 0x20000063 + 8001a08: 20000061 .word 0x20000061 + 8001a0c: 200010f0 .word 0x200010f0 -080019e0 : +08001a10 : { - 80019e0: b570 push {r4, r5, r6, lr} + 8001a10: b570 push {r4, r5, r6, lr} if ((total_count % counts_per_mm) == 0 && feed_state == FEED_STATE_IDLE) - 80019e2: 4d12 ldr r5, [pc, #72] @ (8001a2c ) - 80019e4: 4b12 ldr r3, [pc, #72] @ (8001a30 ) - 80019e6: 6828 ldr r0, [r5, #0] - 80019e8: 4a12 ldr r2, [pc, #72] @ (8001a34 ) - 80019ea: 4343 muls r3, r0 - 80019ec: 189b adds r3, r3, r2 - 80019ee: 4a12 ldr r2, [pc, #72] @ (8001a38 ) - 80019f0: 4293 cmp r3, r2 - 80019f2: d819 bhi.n 8001a28 - 80019f4: 4b11 ldr r3, [pc, #68] @ (8001a3c ) - 80019f6: 781b ldrb r3, [r3, #0] - 80019f8: b2dc uxtb r4, r3 - 80019fa: 2b00 cmp r3, #0 - 80019fc: d114 bne.n 8001a28 + 8001a12: 4d12 ldr r5, [pc, #72] @ (8001a5c ) + 8001a14: 4b12 ldr r3, [pc, #72] @ (8001a60 ) + 8001a16: 6828 ldr r0, [r5, #0] + 8001a18: 4a12 ldr r2, [pc, #72] @ (8001a64 ) + 8001a1a: 4343 muls r3, r0 + 8001a1c: 189b adds r3, r3, r2 + 8001a1e: 4a12 ldr r2, [pc, #72] @ (8001a68 ) + 8001a20: 4293 cmp r3, r2 + 8001a22: d819 bhi.n 8001a58 + 8001a24: 4b11 ldr r3, [pc, #68] @ (8001a6c ) + 8001a26: 781b ldrb r3, [r3, #0] + 8001a28: b2dc uxtb r4, r3 + 8001a2a: 2b00 cmp r3, #0 + 8001a2c: d114 bne.n 8001a58 int32_t mm_moved = total_count / counts_per_mm; - 80019fe: 21e1 movs r1, #225 @ 0xe1 - 8001a00: f7fe fc20 bl 8000244 <__divsi3> + 8001a2e: 21e1 movs r1, #225 @ 0xe1 + 8001a30: f7fe fc08 bl 8000244 <__divsi3> mm_position += mm_moved; - 8001a04: 4e0e ldr r6, [pc, #56] @ (8001a40 ) - 8001a06: 6833 ldr r3, [r6, #0] - 8001a08: 181b adds r3, r3, r0 - 8001a0a: 6033 str r3, [r6, #0] + 8001a34: 4e0e ldr r6, [pc, #56] @ (8001a70 ) + 8001a36: 6833 ldr r3, [r6, #0] + 8001a38: 181b adds r3, r3, r0 + 8001a3a: 6033 str r3, [r6, #0] __ASM volatile ("cpsid i" : : : "memory"); - 8001a0c: b672 cpsid i + 8001a3c: b672 cpsid i encoder_count_extra = 0; - 8001a0e: 4b0d ldr r3, [pc, #52] @ (8001a44 ) + 8001a3e: 4b0d ldr r3, [pc, #52] @ (8001a74 ) total_count = 0; - 8001a10: 602c str r4, [r5, #0] + 8001a40: 602c str r4, [r5, #0] encoder_count_extra = 0; - 8001a12: 601c str r4, [r3, #0] + 8001a42: 601c str r4, [r3, #0] htim3.Instance->CNT = 0; - 8001a14: 4b0c ldr r3, [pc, #48] @ (8001a48 ) - 8001a16: 681b ldr r3, [r3, #0] - 8001a18: 625c str r4, [r3, #36] @ 0x24 + 8001a44: 4b0c ldr r3, [pc, #48] @ (8001a78 ) + 8001a46: 681b ldr r3, [r3, #0] + 8001a48: 625c str r4, [r3, #36] @ 0x24 encoder_previous = 0; - 8001a1a: 4b0c ldr r3, [pc, #48] @ (8001a4c ) - 8001a1c: 801c strh r4, [r3, #0] + 8001a4a: 4b0c ldr r3, [pc, #48] @ (8001a7c ) + 8001a4c: 801c strh r4, [r3, #0] target_count = 0; - 8001a1e: 4b0c ldr r3, [pc, #48] @ (8001a50 ) - 8001a20: 601c str r4, [r3, #0] + 8001a4e: 4b0c ldr r3, [pc, #48] @ (8001a80 ) + 8001a50: 601c str r4, [r3, #0] feed_target_position = 0; - 8001a22: 4b0c ldr r3, [pc, #48] @ (8001a54 ) - 8001a24: 601c str r4, [r3, #0] + 8001a52: 4b0c ldr r3, [pc, #48] @ (8001a84 ) + 8001a54: 601c str r4, [r3, #0] __ASM volatile ("cpsie i" : : : "memory"); - 8001a26: b662 cpsie i + 8001a56: b662 cpsie i } - 8001a28: bd70 pop {r4, r5, r6, pc} - 8001a2a: 46c0 nop @ (mov r8, r8) - 8001a2c: 20000154 .word 0x20000154 - 8001a30: 87654321 .word 0x87654321 - 8001a34: 0091a2b3 .word 0x0091a2b3 - 8001a38: 01234566 .word 0x01234566 - 8001a3c: 20000118 .word 0x20000118 - 8001a40: 200000e4 .word 0x200000e4 - 8001a44: 20000f98 .word 0x20000f98 - 8001a48: 20001264 .word 0x20001264 - 8001a4c: 20000f94 .word 0x20000f94 - 8001a50: 20000150 .word 0x20000150 - 8001a54: 20000104 .word 0x20000104 + 8001a58: bd70 pop {r4, r5, r6, pc} + 8001a5a: 46c0 nop @ (mov r8, r8) + 8001a5c: 20000158 .word 0x20000158 + 8001a60: 87654321 .word 0x87654321 + 8001a64: 0091a2b3 .word 0x0091a2b3 + 8001a68: 01234566 .word 0x01234566 + 8001a6c: 2000011c .word 0x2000011c + 8001a70: 200000e8 .word 0x200000e8 + 8001a74: 20000f9c .word 0x20000f9c + 8001a78: 20001268 .word 0x20001268 + 8001a7c: 20000f98 .word 0x20000f98 + 8001a80: 20000154 .word 0x20000154 + 8001a84: 20000108 .word 0x20000108 -08001a58
: +08001a88
: { - 8001a58: b5f0 push {r4, r5, r6, r7, lr} - 8001a5a: b0a3 sub sp, #140 @ 0x8c + 8001a88: b5f0 push {r4, r5, r6, r7, lr} + 8001a8a: b0a3 sub sp, #140 @ 0x8c HAL_Init(); - 8001a5c: f000 ff28 bl 80028b0 + 8001a8c: f000 ff28 bl 80028e0 pid_init(&motor_pid,kp,ki,kd,i_min,i_max,PWM_MAX,pid_max_step); - 8001a60: 4bd4 ldr r3, [pc, #848] @ (8001db4 ) - 8001a62: 4ed5 ldr r6, [pc, #852] @ (8001db8 ) - 8001a64: 681d ldr r5, [r3, #0] - 8001a66: 4bd5 ldr r3, [pc, #852] @ (8001dbc ) + 8001a90: 4bd4 ldr r3, [pc, #848] @ (8001de4 ) + 8001a92: 4ed5 ldr r6, [pc, #852] @ (8001de8 ) + 8001a94: 681d ldr r5, [r3, #0] + 8001a96: 4bd5 ldr r3, [pc, #852] @ (8001dec ) int32_t integrator_min, int32_t integrator_max, int32_t out_max, int32_t max_output_step) { pid->kp = kp; - 8001a68: 6836 ldr r6, [r6, #0] - 8001a6a: 681c ldr r4, [r3, #0] - 8001a6c: 4bd4 ldr r3, [pc, #848] @ (8001dc0 ) + 8001a98: 6836 ldr r6, [r6, #0] + 8001a9a: 681c ldr r4, [r3, #0] + 8001a9c: 4bd4 ldr r3, [pc, #848] @ (8001df0 ) GPIO_InitTypeDef GPIO_InitStruct = {0}; - 8001a6e: af15 add r7, sp, #84 @ 0x54 + 8001a9e: af15 add r7, sp, #84 @ 0x54 pid_init(&motor_pid,kp,ki,kd,i_min,i_max,PWM_MAX,pid_max_step); - 8001a70: 6818 ldr r0, [r3, #0] - 8001a72: 4bd4 ldr r3, [pc, #848] @ (8001dc4 ) - 8001a74: 6819 ldr r1, [r3, #0] - 8001a76: 4bd4 ldr r3, [pc, #848] @ (8001dc8 ) - 8001a78: 681a ldr r2, [r3, #0] - 8001a7a: 4bd4 ldr r3, [pc, #848] @ (8001dcc ) + 8001aa0: 6818 ldr r0, [r3, #0] + 8001aa2: 4bd4 ldr r3, [pc, #848] @ (8001df4 ) + 8001aa4: 6819 ldr r1, [r3, #0] + 8001aa6: 4bd4 ldr r3, [pc, #848] @ (8001df8 ) + 8001aa8: 681a ldr r2, [r3, #0] + 8001aaa: 4bd4 ldr r3, [pc, #848] @ (8001dfc ) pid->integrator = 0; pid->prev_error = 0; pid->integrator_min = integrator_min; pid->integrator_max = integrator_max; - 8001a7c: 6199 str r1, [r3, #24] + 8001aac: 6199 str r1, [r3, #24] pid->out_max = out_max; - 8001a7e: 2196 movs r1, #150 @ 0x96 + 8001aae: 2196 movs r1, #150 @ 0x96 pid->ki = ki; - 8001a80: 605d str r5, [r3, #4] + 8001ab0: 605d str r5, [r3, #4] pid->integrator = 0; - 8001a82: 2500 movs r5, #0 + 8001ab2: 2500 movs r5, #0 pid->out_max = out_max; - 8001a84: 0109 lsls r1, r1, #4 + 8001ab4: 0109 lsls r1, r1, #4 pid->kp = kp; - 8001a86: 601e str r6, [r3, #0] + 8001ab6: 601e str r6, [r3, #0] pid->kd = kd; - 8001a88: 609c str r4, [r3, #8] + 8001ab8: 609c str r4, [r3, #8] pid->integrator_min = integrator_min; - 8001a8a: 6158 str r0, [r3, #20] + 8001aba: 6158 str r0, [r3, #20] pid->out_max = out_max; - 8001a8c: 61d9 str r1, [r3, #28] + 8001abc: 61d9 str r1, [r3, #28] pid->max_output_step = max_output_step; - 8001a8e: 621a str r2, [r3, #32] + 8001abe: 621a str r2, [r3, #32] pid->integrator = 0; - 8001a90: 60dd str r5, [r3, #12] + 8001ac0: 60dd str r5, [r3, #12] pid->prev_error = 0; - 8001a92: 611d str r5, [r3, #16] + 8001ac2: 611d str r5, [r3, #16] pid->last_output = 0; - 8001a94: 625d str r5, [r3, #36] @ 0x24 + 8001ac4: 625d str r5, [r3, #36] @ 0x24 SystemClock_Config(); - 8001a96: f7fe fe71 bl 800077c + 8001ac6: f7fe fe59 bl 800077c GPIO_InitTypeDef GPIO_InitStruct = {0}; - 8001a9a: 2214 movs r2, #20 - 8001a9c: 0029 movs r1, r5 - 8001a9e: 0038 movs r0, r7 - 8001aa0: f003 fb74 bl 800518c + 8001aca: 2214 movs r2, #20 + 8001acc: 0029 movs r1, r5 + 8001ace: 0038 movs r0, r7 + 8001ad0: f003 fbd6 bl 8005280 __HAL_RCC_GPIOF_CLK_ENABLE(); - 8001aa4: 2220 movs r2, #32 + 8001ad4: 2220 movs r2, #32 __HAL_RCC_GPIOA_CLK_ENABLE(); - 8001aa6: 2601 movs r6, #1 + 8001ad6: 2601 movs r6, #1 __HAL_RCC_GPIOF_CLK_ENABLE(); - 8001aa8: 4cc9 ldr r4, [pc, #804] @ (8001dd0 ) + 8001ad8: 4cc9 ldr r4, [pc, #804] @ (8001e00 ) HAL_GPIO_WritePin(GPIOA, USART2_NRE_Pin|ONEWIRE_Pin, GPIO_PIN_RESET); - 8001aaa: 20a0 movs r0, #160 @ 0xa0 + 8001ada: 20a0 movs r0, #160 @ 0xa0 __HAL_RCC_GPIOF_CLK_ENABLE(); - 8001aac: 6b63 ldr r3, [r4, #52] @ 0x34 - HAL_GPIO_WritePin(GPIOA, USART2_NRE_Pin|ONEWIRE_Pin, GPIO_PIN_RESET); - 8001aae: 2141 movs r1, #65 @ 0x41 - __HAL_RCC_GPIOF_CLK_ENABLE(); - 8001ab0: 4313 orrs r3, r2 - 8001ab2: 6363 str r3, [r4, #52] @ 0x34 - 8001ab4: 6b63 ldr r3, [r4, #52] @ 0x34 - HAL_GPIO_WritePin(GPIOA, USART2_NRE_Pin|ONEWIRE_Pin, GPIO_PIN_RESET); - 8001ab6: 05c0 lsls r0, r0, #23 - __HAL_RCC_GPIOF_CLK_ENABLE(); - 8001ab8: 4013 ands r3, r2 - 8001aba: 9303 str r3, [sp, #12] - 8001abc: 9b03 ldr r3, [sp, #12] - __HAL_RCC_GPIOA_CLK_ENABLE(); - 8001abe: 6b63 ldr r3, [r4, #52] @ 0x34 - __HAL_RCC_GPIOB_CLK_ENABLE(); - 8001ac0: 3a1e subs r2, #30 - __HAL_RCC_GPIOA_CLK_ENABLE(); - 8001ac2: 4333 orrs r3, r6 - 8001ac4: 6363 str r3, [r4, #52] @ 0x34 - 8001ac6: 6b63 ldr r3, [r4, #52] @ 0x34 - 8001ac8: 4033 ands r3, r6 - 8001aca: 9304 str r3, [sp, #16] - 8001acc: 9b04 ldr r3, [sp, #16] - __HAL_RCC_GPIOB_CLK_ENABLE(); - 8001ace: 6b63 ldr r3, [r4, #52] @ 0x34 - 8001ad0: 4313 orrs r3, r2 - 8001ad2: 6363 str r3, [r4, #52] @ 0x34 - 8001ad4: 6b63 ldr r3, [r4, #52] @ 0x34 - 8001ad6: 4013 ands r3, r2 - 8001ad8: 9305 str r3, [sp, #20] - 8001ada: 9b05 ldr r3, [sp, #20] - __HAL_RCC_GPIOC_CLK_ENABLE(); 8001adc: 6b63 ldr r3, [r4, #52] @ 0x34 - 8001ade: 3202 adds r2, #2 + HAL_GPIO_WritePin(GPIOA, USART2_NRE_Pin|ONEWIRE_Pin, GPIO_PIN_RESET); + 8001ade: 2141 movs r1, #65 @ 0x41 + __HAL_RCC_GPIOF_CLK_ENABLE(); 8001ae0: 4313 orrs r3, r2 8001ae2: 6363 str r3, [r4, #52] @ 0x34 8001ae4: 6b63 ldr r3, [r4, #52] @ 0x34 - 8001ae6: 4013 ands r3, r2 - 8001ae8: 9306 str r3, [sp, #24] HAL_GPIO_WritePin(GPIOA, USART2_NRE_Pin|ONEWIRE_Pin, GPIO_PIN_RESET); - 8001aea: 002a movs r2, r5 + 8001ae6: 05c0 lsls r0, r0, #23 + __HAL_RCC_GPIOF_CLK_ENABLE(); + 8001ae8: 4013 ands r3, r2 + 8001aea: 9303 str r3, [sp, #12] + 8001aec: 9b03 ldr r3, [sp, #12] + __HAL_RCC_GPIOA_CLK_ENABLE(); + 8001aee: 6b63 ldr r3, [r4, #52] @ 0x34 + __HAL_RCC_GPIOB_CLK_ENABLE(); + 8001af0: 3a1e subs r2, #30 + __HAL_RCC_GPIOA_CLK_ENABLE(); + 8001af2: 4333 orrs r3, r6 + 8001af4: 6363 str r3, [r4, #52] @ 0x34 + 8001af6: 6b63 ldr r3, [r4, #52] @ 0x34 + 8001af8: 4033 ands r3, r6 + 8001afa: 9304 str r3, [sp, #16] + 8001afc: 9b04 ldr r3, [sp, #16] + __HAL_RCC_GPIOB_CLK_ENABLE(); + 8001afe: 6b63 ldr r3, [r4, #52] @ 0x34 + 8001b00: 4313 orrs r3, r2 + 8001b02: 6363 str r3, [r4, #52] @ 0x34 + 8001b04: 6b63 ldr r3, [r4, #52] @ 0x34 + 8001b06: 4013 ands r3, r2 + 8001b08: 9305 str r3, [sp, #20] + 8001b0a: 9b05 ldr r3, [sp, #20] __HAL_RCC_GPIOC_CLK_ENABLE(); - 8001aec: 9b06 ldr r3, [sp, #24] + 8001b0c: 6b63 ldr r3, [r4, #52] @ 0x34 + 8001b0e: 3202 adds r2, #2 + 8001b10: 4313 orrs r3, r2 + 8001b12: 6363 str r3, [r4, #52] @ 0x34 + 8001b14: 6b63 ldr r3, [r4, #52] @ 0x34 + 8001b16: 4013 ands r3, r2 + 8001b18: 9306 str r3, [sp, #24] HAL_GPIO_WritePin(GPIOA, USART2_NRE_Pin|ONEWIRE_Pin, GPIO_PIN_RESET); - 8001aee: f001 fc11 bl 8003314 + 8001b1a: 002a movs r2, r5 + __HAL_RCC_GPIOC_CLK_ENABLE(); + 8001b1c: 9b06 ldr r3, [sp, #24] + HAL_GPIO_WritePin(GPIOA, USART2_NRE_Pin|ONEWIRE_Pin, GPIO_PIN_RESET); + 8001b1e: f001 fc13 bl 8003348 HAL_GPIO_WritePin(GPIOB, LED_R_Pin|LED_B_Pin|LED_G_Pin, GPIO_PIN_RESET); - 8001af2: 002a movs r2, r5 - 8001af4: 2138 movs r1, #56 @ 0x38 - 8001af6: 48b7 ldr r0, [pc, #732] @ (8001dd4 ) - 8001af8: f001 fc0c bl 8003314 + 8001b22: 002a movs r2, r5 + 8001b24: 2138 movs r1, #56 @ 0x38 + 8001b26: 48b7 ldr r0, [pc, #732] @ (8001e04 ) + 8001b28: f001 fc0e bl 8003348 HAL_GPIO_Init(USART2_NRE_GPIO_Port, &GPIO_InitStruct); - 8001afc: 20a0 movs r0, #160 @ 0xa0 + 8001b2c: 20a0 movs r0, #160 @ 0xa0 GPIO_InitStruct.Pin = USART2_NRE_Pin; - 8001afe: 9615 str r6, [sp, #84] @ 0x54 + 8001b2e: 9615 str r6, [sp, #84] @ 0x54 HAL_GPIO_Init(USART2_NRE_GPIO_Port, &GPIO_InitStruct); - 8001b00: 0039 movs r1, r7 + 8001b30: 0039 movs r1, r7 GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; - 8001b02: 607e str r6, [r7, #4] + 8001b32: 607e str r6, [r7, #4] HAL_GPIO_Init(USART2_NRE_GPIO_Port, &GPIO_InitStruct); - 8001b04: 05c0 lsls r0, r0, #23 + 8001b34: 05c0 lsls r0, r0, #23 GPIO_InitStruct.Pull = GPIO_NOPULL; - 8001b06: 60bd str r5, [r7, #8] + 8001b36: 60bd str r5, [r7, #8] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 8001b08: 60fd str r5, [r7, #12] + 8001b38: 60fd str r5, [r7, #12] HAL_GPIO_Init(USART2_NRE_GPIO_Port, &GPIO_InitStruct); - 8001b0a: f001 fb43 bl 8003194 + 8001b3a: f001 fb45 bl 80031c8 GPIO_InitStruct.Pin = ONEWIRE_Pin; - 8001b0e: 2340 movs r3, #64 @ 0x40 + 8001b3e: 2340 movs r3, #64 @ 0x40 HAL_GPIO_Init(ONEWIRE_GPIO_Port, &GPIO_InitStruct); - 8001b10: 20a0 movs r0, #160 @ 0xa0 + 8001b40: 20a0 movs r0, #160 @ 0xa0 GPIO_InitStruct.Pin = ONEWIRE_Pin; - 8001b12: 9315 str r3, [sp, #84] @ 0x54 + 8001b42: 9315 str r3, [sp, #84] @ 0x54 GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_OD; - 8001b14: 3b2f subs r3, #47 @ 0x2f + 8001b44: 3b2f subs r3, #47 @ 0x2f HAL_GPIO_Init(ONEWIRE_GPIO_Port, &GPIO_InitStruct); - 8001b16: 0039 movs r1, r7 + 8001b46: 0039 movs r1, r7 GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_OD; - 8001b18: 607b str r3, [r7, #4] + 8001b48: 607b str r3, [r7, #4] HAL_GPIO_Init(ONEWIRE_GPIO_Port, &GPIO_InitStruct); - 8001b1a: 05c0 lsls r0, r0, #23 + 8001b4a: 05c0 lsls r0, r0, #23 GPIO_InitStruct.Pull = GPIO_NOPULL; - 8001b1c: 60bd str r5, [r7, #8] + 8001b4c: 60bd str r5, [r7, #8] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 8001b1e: 60fd str r5, [r7, #12] + 8001b4e: 60fd str r5, [r7, #12] HAL_GPIO_Init(ONEWIRE_GPIO_Port, &GPIO_InitStruct); - 8001b20: f001 fb38 bl 8003194 + 8001b50: f001 fb3a bl 80031c8 GPIO_InitStruct.Pin = LED_R_Pin|LED_B_Pin|LED_G_Pin; - 8001b24: 2338 movs r3, #56 @ 0x38 + 8001b54: 2338 movs r3, #56 @ 0x38 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 8001b26: 0039 movs r1, r7 + 8001b56: 0039 movs r1, r7 GPIO_InitStruct.Pin = LED_R_Pin|LED_B_Pin|LED_G_Pin; - 8001b28: 9315 str r3, [sp, #84] @ 0x54 + 8001b58: 9315 str r3, [sp, #84] @ 0x54 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 8001b2a: 48aa ldr r0, [pc, #680] @ (8001dd4 ) + 8001b5a: 48aa ldr r0, [pc, #680] @ (8001e04 ) GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; - 8001b2c: 607e str r6, [r7, #4] + 8001b5c: 607e str r6, [r7, #4] GPIO_InitStruct.Pull = GPIO_NOPULL; - 8001b2e: 60bd str r5, [r7, #8] + 8001b5e: 60bd str r5, [r7, #8] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 8001b30: 60fd str r5, [r7, #12] + 8001b60: 60fd str r5, [r7, #12] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 8001b32: f001 fb2f bl 8003194 + 8001b62: f001 fb31 bl 80031c8 GPIO_InitStruct.Pin = SW2_Pin|SW1_Pin; - 8001b36: 23c0 movs r3, #192 @ 0xc0 - 8001b38: 009b lsls r3, r3, #2 - 8001b3a: 9315 str r3, [sp, #84] @ 0x54 + 8001b66: 23c0 movs r3, #192 @ 0xc0 + 8001b68: 009b lsls r3, r3, #2 + 8001b6a: 9315 str r3, [sp, #84] @ 0x54 GPIO_InitStruct.Mode = GPIO_MODE_IT_FALLING; - 8001b3c: 4ba6 ldr r3, [pc, #664] @ (8001dd8 ) + 8001b6c: 4ba6 ldr r3, [pc, #664] @ (8001e08 ) HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 8001b3e: 0039 movs r1, r7 + 8001b6e: 0039 movs r1, r7 GPIO_InitStruct.Mode = GPIO_MODE_IT_FALLING; - 8001b40: 607b str r3, [r7, #4] + 8001b70: 607b str r3, [r7, #4] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 8001b42: 48a4 ldr r0, [pc, #656] @ (8001dd4 ) + 8001b72: 48a4 ldr r0, [pc, #656] @ (8001e04 ) GPIO_InitStruct.Pull = GPIO_NOPULL; - 8001b44: 60bd str r5, [r7, #8] + 8001b74: 60bd str r5, [r7, #8] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 8001b46: f001 fb25 bl 8003194 + 8001b76: f001 fb27 bl 80031c8 HAL_NVIC_SetPriority(EXTI4_15_IRQn, 0, 0); - 8001b4a: 002a movs r2, r5 - 8001b4c: 0029 movs r1, r5 - 8001b4e: 2007 movs r0, #7 - 8001b50: f001 f928 bl 8002da4 + 8001b7a: 002a movs r2, r5 + 8001b7c: 0029 movs r1, r5 + 8001b7e: 2007 movs r0, #7 + 8001b80: f001 f928 bl 8002dd4 HAL_NVIC_EnableIRQ(EXTI4_15_IRQn); - 8001b54: 2007 movs r0, #7 - 8001b56: f001 f94f bl 8002df8 + 8001b84: 2007 movs r0, #7 + 8001b86: f001 f94f bl 8002e28 __HAL_RCC_DMA1_CLK_ENABLE(); - 8001b5a: 6ba3 ldr r3, [r4, #56] @ 0x38 + 8001b8a: 6ba3 ldr r3, [r4, #56] @ 0x38 HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0); - 8001b5c: 002a movs r2, r5 + 8001b8c: 002a movs r2, r5 __HAL_RCC_DMA1_CLK_ENABLE(); - 8001b5e: 4333 orrs r3, r6 - 8001b60: 63a3 str r3, [r4, #56] @ 0x38 - 8001b62: 6ba3 ldr r3, [r4, #56] @ 0x38 + 8001b8e: 4333 orrs r3, r6 + 8001b90: 63a3 str r3, [r4, #56] @ 0x38 + 8001b92: 6ba3 ldr r3, [r4, #56] @ 0x38 HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0); - 8001b64: 0029 movs r1, r5 + 8001b94: 0029 movs r1, r5 __HAL_RCC_DMA1_CLK_ENABLE(); - 8001b66: 4033 ands r3, r6 + 8001b96: 4033 ands r3, r6 HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0); - 8001b68: 2009 movs r0, #9 + 8001b98: 2009 movs r0, #9 __HAL_RCC_DMA1_CLK_ENABLE(); - 8001b6a: 9302 str r3, [sp, #8] - 8001b6c: 9b02 ldr r3, [sp, #8] + 8001b9a: 9302 str r3, [sp, #8] + 8001b9c: 9b02 ldr r3, [sp, #8] HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0); - 8001b6e: f001 f919 bl 8002da4 + 8001b9e: f001 f919 bl 8002dd4 HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn); - 8001b72: 2009 movs r0, #9 - 8001b74: f001 f940 bl 8002df8 + 8001ba2: 2009 movs r0, #9 + 8001ba4: f001 f940 bl 8002e28 HAL_NVIC_SetPriority(DMA1_Channel2_3_IRQn, 0, 0); - 8001b78: 002a movs r2, r5 - 8001b7a: 0029 movs r1, r5 - 8001b7c: 200a movs r0, #10 - 8001b7e: f001 f911 bl 8002da4 + 8001ba8: 002a movs r2, r5 + 8001baa: 0029 movs r1, r5 + 8001bac: 200a movs r0, #10 + 8001bae: f001 f911 bl 8002dd4 HAL_NVIC_EnableIRQ(DMA1_Channel2_3_IRQn); - 8001b82: 200a movs r0, #10 - 8001b84: f001 f938 bl 8002df8 + 8001bb2: 200a movs r0, #10 + 8001bb4: f001 f938 bl 8002e28 TIM_ClockConfigTypeDef sClockSourceConfig = {0}; - 8001b88: 2210 movs r2, #16 - 8001b8a: 0029 movs r1, r5 - 8001b8c: a80a add r0, sp, #40 @ 0x28 - 8001b8e: f003 fafd bl 800518c + 8001bb8: 2210 movs r2, #16 + 8001bba: 0029 movs r1, r5 + 8001bbc: a80a add r0, sp, #40 @ 0x28 + 8001bbe: f003 fb5f bl 8005280 TIM_OC_InitTypeDef sConfigOC = {0}; - 8001b92: ae0e add r6, sp, #56 @ 0x38 + 8001bc2: ae0e add r6, sp, #56 @ 0x38 TIM_MasterConfigTypeDef sMasterConfig = {0}; - 8001b94: 220c movs r2, #12 - 8001b96: 0029 movs r1, r5 - 8001b98: a807 add r0, sp, #28 - 8001b9a: f003 faf7 bl 800518c + 8001bc4: 220c movs r2, #12 + 8001bc6: 0029 movs r1, r5 + 8001bc8: a807 add r0, sp, #28 + 8001bca: f003 fb59 bl 8005280 TIM_OC_InitTypeDef sConfigOC = {0}; - 8001b9e: 221c movs r2, #28 - 8001ba0: 0029 movs r1, r5 - 8001ba2: 0030 movs r0, r6 - 8001ba4: f003 faf2 bl 800518c + 8001bce: 221c movs r2, #28 + 8001bd0: 0029 movs r1, r5 + 8001bd2: 0030 movs r0, r6 + 8001bd4: f003 fb54 bl 8005280 TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig = {0}; - 8001ba8: 0029 movs r1, r5 - 8001baa: 2234 movs r2, #52 @ 0x34 - 8001bac: 0038 movs r0, r7 - 8001bae: f003 faed bl 800518c + 8001bd8: 0029 movs r1, r5 + 8001bda: 2234 movs r2, #52 @ 0x34 + 8001bdc: 0038 movs r0, r7 + 8001bde: f003 fb4f bl 8005280 htim1.Init.Period = 2400; - 8001bb2: 2196 movs r1, #150 @ 0x96 + 8001be2: 2196 movs r1, #150 @ 0x96 htim1.Instance = TIM1; - 8001bb4: 4c89 ldr r4, [pc, #548] @ (8001ddc ) - 8001bb6: 4b8a ldr r3, [pc, #552] @ (8001de0 ) + 8001be4: 4c89 ldr r4, [pc, #548] @ (8001e0c ) + 8001be6: 4b8a ldr r3, [pc, #552] @ (8001e10 ) htim1.Init.Period = 2400; - 8001bb8: 0109 lsls r1, r1, #4 + 8001be8: 0109 lsls r1, r1, #4 if (HAL_TIM_Base_Init(&htim1) != HAL_OK) - 8001bba: 0020 movs r0, r4 + 8001bea: 0020 movs r0, r4 htim1.Instance = TIM1; - 8001bbc: 6023 str r3, [r4, #0] + 8001bec: 6023 str r3, [r4, #0] htim1.Init.Prescaler = 0; - 8001bbe: 6065 str r5, [r4, #4] + 8001bee: 6065 str r5, [r4, #4] htim1.Init.CounterMode = TIM_COUNTERMODE_UP; - 8001bc0: 60a5 str r5, [r4, #8] + 8001bf0: 60a5 str r5, [r4, #8] htim1.Init.Period = 2400; - 8001bc2: 60e1 str r1, [r4, #12] + 8001bf2: 60e1 str r1, [r4, #12] htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - 8001bc4: 6125 str r5, [r4, #16] + 8001bf4: 6125 str r5, [r4, #16] htim1.Init.RepetitionCounter = 0; - 8001bc6: 6165 str r5, [r4, #20] + 8001bf6: 6165 str r5, [r4, #20] htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; - 8001bc8: 61a5 str r5, [r4, #24] + 8001bf8: 61a5 str r5, [r4, #24] if (HAL_TIM_Base_Init(&htim1) != HAL_OK) - 8001bca: f002 f92b bl 8003e24 - 8001bce: 42a8 cmp r0, r5 - 8001bd0: d001 beq.n 8001bd6 + 8001bfa: f002 f92d bl 8003e58 + 8001bfe: 42a8 cmp r0, r5 + 8001c00: d001 beq.n 8001c06 __ASM volatile ("cpsid i" : : : "memory"); - 8001bd2: b672 cpsid i + 8001c02: b672 cpsid i while (1) - 8001bd4: e7fe b.n 8001bd4 + 8001c04: e7fe b.n 8001c04 sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; - 8001bd6: 2380 movs r3, #128 @ 0x80 + 8001c06: 2380 movs r3, #128 @ 0x80 if (HAL_TIM_ConfigClockSource(&htim1, &sClockSourceConfig) != HAL_OK) - 8001bd8: 0020 movs r0, r4 + 8001c08: 0020 movs r0, r4 sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; - 8001bda: 015b lsls r3, r3, #5 + 8001c0a: 015b lsls r3, r3, #5 if (HAL_TIM_ConfigClockSource(&htim1, &sClockSourceConfig) != HAL_OK) - 8001bdc: a90a add r1, sp, #40 @ 0x28 + 8001c0c: a90a add r1, sp, #40 @ 0x28 sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; - 8001bde: 930a str r3, [sp, #40] @ 0x28 + 8001c0e: 930a str r3, [sp, #40] @ 0x28 if (HAL_TIM_ConfigClockSource(&htim1, &sClockSourceConfig) != HAL_OK) - 8001be0: f002 fa98 bl 8004114 - 8001be4: 2800 cmp r0, #0 - 8001be6: d001 beq.n 8001bec - 8001be8: b672 cpsid i + 8001c10: f002 fa9a bl 8004148 + 8001c14: 2800 cmp r0, #0 + 8001c16: d001 beq.n 8001c1c + 8001c18: b672 cpsid i while (1) - 8001bea: e7fe b.n 8001bea + 8001c1a: e7fe b.n 8001c1a if (HAL_TIM_PWM_Init(&htim1) != HAL_OK) - 8001bec: 0020 movs r0, r4 - 8001bee: f002 f943 bl 8003e78 - 8001bf2: 2800 cmp r0, #0 - 8001bf4: d001 beq.n 8001bfa - 8001bf6: b672 cpsid i + 8001c1c: 0020 movs r0, r4 + 8001c1e: f002 f945 bl 8003eac + 8001c22: 2800 cmp r0, #0 + 8001c24: d001 beq.n 8001c2a + 8001c26: b672 cpsid i while (1) - 8001bf8: e7fe b.n 8001bf8 + 8001c28: e7fe b.n 8001c28 sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; - 8001bfa: 9007 str r0, [sp, #28] + 8001c2a: 9007 str r0, [sp, #28] sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET; - 8001bfc: 9008 str r0, [sp, #32] + 8001c2c: 9008 str r0, [sp, #32] sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; - 8001bfe: 9009 str r0, [sp, #36] @ 0x24 + 8001c2e: 9009 str r0, [sp, #36] @ 0x24 if (HAL_TIMEx_MasterConfigSynchronization(&htim1, &sMasterConfig) != HAL_OK) - 8001c00: a907 add r1, sp, #28 - 8001c02: 0020 movs r0, r4 - 8001c04: f002 fbac bl 8004360 - 8001c08: 1e02 subs r2, r0, #0 - 8001c0a: d001 beq.n 8001c10 - 8001c0c: b672 cpsid i + 8001c30: a907 add r1, sp, #28 + 8001c32: 0020 movs r0, r4 + 8001c34: f002 fbae bl 8004394 + 8001c38: 1e02 subs r2, r0, #0 + 8001c3a: d001 beq.n 8001c40 + 8001c3c: b672 cpsid i while (1) - 8001c0e: e7fe b.n 8001c0e + 8001c3e: e7fe b.n 8001c3e sConfigOC.OCMode = TIM_OCMODE_PWM1; - 8001c10: 2360 movs r3, #96 @ 0x60 + 8001c40: 2360 movs r3, #96 @ 0x60 if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) - 8001c12: 0031 movs r1, r6 + 8001c42: 0031 movs r1, r6 sConfigOC.OCMode = TIM_OCMODE_PWM1; - 8001c14: 930e str r3, [sp, #56] @ 0x38 + 8001c44: 930e str r3, [sp, #56] @ 0x38 sConfigOC.Pulse = 0; - 8001c16: 6070 str r0, [r6, #4] + 8001c46: 6070 str r0, [r6, #4] sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; - 8001c18: 60b0 str r0, [r6, #8] + 8001c48: 60b0 str r0, [r6, #8] sConfigOC.OCNPolarity = TIM_OCNPOLARITY_HIGH; - 8001c1a: 60f0 str r0, [r6, #12] + 8001c4a: 60f0 str r0, [r6, #12] sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; - 8001c1c: 6130 str r0, [r6, #16] + 8001c4c: 6130 str r0, [r6, #16] sConfigOC.OCIdleState = TIM_OCIDLESTATE_RESET; - 8001c1e: 6170 str r0, [r6, #20] + 8001c4e: 6170 str r0, [r6, #20] sConfigOC.OCNIdleState = TIM_OCNIDLESTATE_RESET; - 8001c20: 61b0 str r0, [r6, #24] + 8001c50: 61b0 str r0, [r6, #24] if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) - 8001c22: 0020 movs r0, r4 - 8001c24: f002 f9e4 bl 8003ff0 - 8001c28: 2800 cmp r0, #0 - 8001c2a: d001 beq.n 8001c30 - 8001c2c: b672 cpsid i + 8001c52: 0020 movs r0, r4 + 8001c54: f002 f9e6 bl 8004024 + 8001c58: 2800 cmp r0, #0 + 8001c5a: d001 beq.n 8001c60 + 8001c5c: b672 cpsid i while (1) - 8001c2e: e7fe b.n 8001c2e + 8001c5e: e7fe b.n 8001c5e if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_2) != HAL_OK) - 8001c30: 2204 movs r2, #4 - 8001c32: 0031 movs r1, r6 - 8001c34: 0020 movs r0, r4 - 8001c36: f002 f9db bl 8003ff0 - 8001c3a: 2800 cmp r0, #0 - 8001c3c: d001 beq.n 8001c42 - 8001c3e: b672 cpsid i + 8001c60: 2204 movs r2, #4 + 8001c62: 0031 movs r1, r6 + 8001c64: 0020 movs r0, r4 + 8001c66: f002 f9dd bl 8004024 + 8001c6a: 2800 cmp r0, #0 + 8001c6c: d001 beq.n 8001c72 + 8001c6e: b672 cpsid i while (1) - 8001c40: e7fe b.n 8001c40 + 8001c70: e7fe b.n 8001c70 if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_3) != HAL_OK) - 8001c42: 2208 movs r2, #8 - 8001c44: 0031 movs r1, r6 - 8001c46: 0020 movs r0, r4 - 8001c48: f002 f9d2 bl 8003ff0 - 8001c4c: 2800 cmp r0, #0 - 8001c4e: d001 beq.n 8001c54 - 8001c50: b672 cpsid i + 8001c72: 2208 movs r2, #8 + 8001c74: 0031 movs r1, r6 + 8001c76: 0020 movs r0, r4 + 8001c78: f002 f9d4 bl 8004024 + 8001c7c: 2800 cmp r0, #0 + 8001c7e: d001 beq.n 8001c84 + 8001c80: b672 cpsid i while (1) - 8001c52: e7fe b.n 8001c52 + 8001c82: e7fe b.n 8001c82 if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_4) != HAL_OK) - 8001c54: 220c movs r2, #12 - 8001c56: 0031 movs r1, r6 - 8001c58: 0020 movs r0, r4 - 8001c5a: f002 f9c9 bl 8003ff0 - 8001c5e: 2800 cmp r0, #0 - 8001c60: d001 beq.n 8001c66 - 8001c62: b672 cpsid i - while (1) - 8001c64: e7fe b.n 8001c64 - sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_HIGH; - 8001c66: 2380 movs r3, #128 @ 0x80 - 8001c68: 019b lsls r3, r3, #6 - sBreakDeadTimeConfig.OffStateRunMode = TIM_OSSR_DISABLE; - 8001c6a: 9015 str r0, [sp, #84] @ 0x54 - sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_HIGH; - 8001c6c: 617b str r3, [r7, #20] - sBreakDeadTimeConfig.Break2Polarity = TIM_BREAK2POLARITY_HIGH; - 8001c6e: 2380 movs r3, #128 @ 0x80 - 8001c70: 049b lsls r3, r3, #18 - sBreakDeadTimeConfig.OffStateIDLEMode = TIM_OSSI_DISABLE; - 8001c72: 6078 str r0, [r7, #4] - sBreakDeadTimeConfig.LockLevel = TIM_LOCKLEVEL_OFF; - 8001c74: 60b8 str r0, [r7, #8] - sBreakDeadTimeConfig.DeadTime = 0; - 8001c76: 60f8 str r0, [r7, #12] - sBreakDeadTimeConfig.BreakState = TIM_BREAK_DISABLE; - 8001c78: 6138 str r0, [r7, #16] - sBreakDeadTimeConfig.BreakFilter = 0; - 8001c7a: 61b8 str r0, [r7, #24] - sBreakDeadTimeConfig.BreakAFMode = TIM_BREAK_AFMODE_INPUT; - 8001c7c: 61f8 str r0, [r7, #28] - sBreakDeadTimeConfig.Break2State = TIM_BREAK2_DISABLE; - 8001c7e: 6238 str r0, [r7, #32] - sBreakDeadTimeConfig.Break2Filter = 0; - 8001c80: 62b8 str r0, [r7, #40] @ 0x28 - sBreakDeadTimeConfig.Break2AFMode = TIM_BREAK_AFMODE_INPUT; - 8001c82: 62f8 str r0, [r7, #44] @ 0x2c - sBreakDeadTimeConfig.AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE; - 8001c84: 6338 str r0, [r7, #48] @ 0x30 - if (HAL_TIMEx_ConfigBreakDeadTime(&htim1, &sBreakDeadTimeConfig) != HAL_OK) - 8001c86: 0039 movs r1, r7 + 8001c84: 220c movs r2, #12 + 8001c86: 0031 movs r1, r6 8001c88: 0020 movs r0, r4 + 8001c8a: f002 f9cb bl 8004024 + 8001c8e: 2800 cmp r0, #0 + 8001c90: d001 beq.n 8001c96 + 8001c92: b672 cpsid i + while (1) + 8001c94: e7fe b.n 8001c94 + sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_HIGH; + 8001c96: 2380 movs r3, #128 @ 0x80 + 8001c98: 019b lsls r3, r3, #6 + sBreakDeadTimeConfig.OffStateRunMode = TIM_OSSR_DISABLE; + 8001c9a: 9015 str r0, [sp, #84] @ 0x54 + sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_HIGH; + 8001c9c: 617b str r3, [r7, #20] sBreakDeadTimeConfig.Break2Polarity = TIM_BREAK2POLARITY_HIGH; - 8001c8a: 627b str r3, [r7, #36] @ 0x24 + 8001c9e: 2380 movs r3, #128 @ 0x80 + 8001ca0: 049b lsls r3, r3, #18 + sBreakDeadTimeConfig.OffStateIDLEMode = TIM_OSSI_DISABLE; + 8001ca2: 6078 str r0, [r7, #4] + sBreakDeadTimeConfig.LockLevel = TIM_LOCKLEVEL_OFF; + 8001ca4: 60b8 str r0, [r7, #8] + sBreakDeadTimeConfig.DeadTime = 0; + 8001ca6: 60f8 str r0, [r7, #12] + sBreakDeadTimeConfig.BreakState = TIM_BREAK_DISABLE; + 8001ca8: 6138 str r0, [r7, #16] + sBreakDeadTimeConfig.BreakFilter = 0; + 8001caa: 61b8 str r0, [r7, #24] + sBreakDeadTimeConfig.BreakAFMode = TIM_BREAK_AFMODE_INPUT; + 8001cac: 61f8 str r0, [r7, #28] + sBreakDeadTimeConfig.Break2State = TIM_BREAK2_DISABLE; + 8001cae: 6238 str r0, [r7, #32] + sBreakDeadTimeConfig.Break2Filter = 0; + 8001cb0: 62b8 str r0, [r7, #40] @ 0x28 + sBreakDeadTimeConfig.Break2AFMode = TIM_BREAK_AFMODE_INPUT; + 8001cb2: 62f8 str r0, [r7, #44] @ 0x2c + sBreakDeadTimeConfig.AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE; + 8001cb4: 6338 str r0, [r7, #48] @ 0x30 if (HAL_TIMEx_ConfigBreakDeadTime(&htim1, &sBreakDeadTimeConfig) != HAL_OK) - 8001c8c: f002 fb9c bl 80043c8 - 8001c90: 1e05 subs r5, r0, #0 - 8001c92: d001 beq.n 8001c98 - 8001c94: b672 cpsid i + 8001cb6: 0039 movs r1, r7 + 8001cb8: 0020 movs r0, r4 + sBreakDeadTimeConfig.Break2Polarity = TIM_BREAK2POLARITY_HIGH; + 8001cba: 627b str r3, [r7, #36] @ 0x24 + if (HAL_TIMEx_ConfigBreakDeadTime(&htim1, &sBreakDeadTimeConfig) != HAL_OK) + 8001cbc: f002 fb9e bl 80043fc + 8001cc0: 1e05 subs r5, r0, #0 + 8001cc2: d001 beq.n 8001cc8 + 8001cc4: b672 cpsid i while (1) - 8001c96: e7fe b.n 8001c96 + 8001cc6: e7fe b.n 8001cc6 HAL_TIM_MspPostInit(&htim1); - 8001c98: 0020 movs r0, r4 - 8001c9a: f000 fc93 bl 80025c4 + 8001cc8: 0020 movs r0, r4 + 8001cca: f000 fc93 bl 80025f4 TIM_Encoder_InitTypeDef sConfig = {0}; - 8001c9e: 2220 movs r2, #32 - 8001ca0: 0029 movs r1, r5 - 8001ca2: a816 add r0, sp, #88 @ 0x58 - 8001ca4: f003 fa72 bl 800518c + 8001cce: 2220 movs r2, #32 + 8001cd0: 0029 movs r1, r5 + 8001cd2: a816 add r0, sp, #88 @ 0x58 + 8001cd4: f003 fad4 bl 8005280 TIM_MasterConfigTypeDef sMasterConfig = {0}; - 8001ca8: 220c movs r2, #12 - 8001caa: 0029 movs r1, r5 - 8001cac: 0030 movs r0, r6 - 8001cae: f003 fa6d bl 800518c + 8001cd8: 220c movs r2, #12 + 8001cda: 0029 movs r1, r5 + 8001cdc: 0030 movs r0, r6 + 8001cde: f003 facf bl 8005280 htim3.Instance = TIM3; - 8001cb2: 4b4c ldr r3, [pc, #304] @ (8001de4 ) + 8001ce2: 4b4c ldr r3, [pc, #304] @ (8001e14 ) htim3.Init.Period = 65535; - 8001cb4: 4c4c ldr r4, [pc, #304] @ (8001de8 ) + 8001ce4: 4c4c ldr r4, [pc, #304] @ (8001e18 ) htim3.Instance = TIM3; - 8001cb6: 9300 str r3, [sp, #0] - 8001cb8: 9a00 ldr r2, [sp, #0] - 8001cba: 4b4c ldr r3, [pc, #304] @ (8001dec ) + 8001ce6: 9300 str r3, [sp, #0] + 8001ce8: 9a00 ldr r2, [sp, #0] + 8001cea: 4b4c ldr r3, [pc, #304] @ (8001e1c ) if (HAL_TIM_Encoder_Init(&htim3, &sConfig) != HAL_OK) - 8001cbc: 0039 movs r1, r7 + 8001cec: 0039 movs r1, r7 htim3.Instance = TIM3; - 8001cbe: 6013 str r3, [r2, #0] + 8001cee: 6013 str r3, [r2, #0] sConfig.EncoderMode = TIM_ENCODERMODE_TI12; - 8001cc0: 2303 movs r3, #3 - 8001cc2: 9315 str r3, [sp, #84] @ 0x54 + 8001cf0: 2303 movs r3, #3 + 8001cf2: 9315 str r3, [sp, #84] @ 0x54 sConfig.IC1Selection = TIM_ICSELECTION_DIRECTTI; - 8001cc4: 3b02 subs r3, #2 + 8001cf4: 3b02 subs r3, #2 if (HAL_TIM_Encoder_Init(&htim3, &sConfig) != HAL_OK) - 8001cc6: 0010 movs r0, r2 + 8001cf6: 0010 movs r0, r2 sConfig.IC1Selection = TIM_ICSELECTION_DIRECTTI; - 8001cc8: 60bb str r3, [r7, #8] + 8001cf8: 60bb str r3, [r7, #8] sConfig.IC2Selection = TIM_ICSELECTION_DIRECTTI; - 8001cca: 61bb str r3, [r7, #24] + 8001cfa: 61bb str r3, [r7, #24] htim3.Init.Prescaler = 0; - 8001ccc: 6055 str r5, [r2, #4] + 8001cfc: 6055 str r5, [r2, #4] htim3.Init.CounterMode = TIM_COUNTERMODE_UP; - 8001cce: 6095 str r5, [r2, #8] + 8001cfe: 6095 str r5, [r2, #8] htim3.Init.Period = 65535; - 8001cd0: 60d4 str r4, [r2, #12] + 8001d00: 60d4 str r4, [r2, #12] htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - 8001cd2: 6115 str r5, [r2, #16] + 8001d02: 6115 str r5, [r2, #16] htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; - 8001cd4: 6195 str r5, [r2, #24] + 8001d04: 6195 str r5, [r2, #24] if (HAL_TIM_Encoder_Init(&htim3, &sConfig) != HAL_OK) - 8001cd6: f002 f8f9 bl 8003ecc - 8001cda: 2800 cmp r0, #0 - 8001cdc: d001 beq.n 8001ce2 - 8001cde: b672 cpsid i + 8001d06: f002 f8fb bl 8003f00 + 8001d0a: 2800 cmp r0, #0 + 8001d0c: d001 beq.n 8001d12 + 8001d0e: b672 cpsid i while (1) - 8001ce0: e7fe b.n 8001ce0 + 8001d10: e7fe b.n 8001d10 sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; - 8001ce2: 2300 movs r3, #0 + 8001d12: 2300 movs r3, #0 if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK) - 8001ce4: 0031 movs r1, r6 + 8001d14: 0031 movs r1, r6 sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; - 8001ce6: 930e str r3, [sp, #56] @ 0x38 + 8001d16: 930e str r3, [sp, #56] @ 0x38 if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK) - 8001ce8: 9800 ldr r0, [sp, #0] + 8001d18: 9800 ldr r0, [sp, #0] sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; - 8001cea: 60b3 str r3, [r6, #8] + 8001d1a: 60b3 str r3, [r6, #8] if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK) - 8001cec: f002 fb38 bl 8004360 - 8001cf0: 2800 cmp r0, #0 - 8001cf2: d001 beq.n 8001cf8 - 8001cf4: b672 cpsid i + 8001d1c: f002 fb3a bl 8004394 + 8001d20: 2800 cmp r0, #0 + 8001d22: d001 beq.n 8001d28 + 8001d24: b672 cpsid i while (1) - 8001cf6: e7fe b.n 8001cf6 + 8001d26: e7fe b.n 8001d26 huart1.Instance = USART1; - 8001cf8: 4d3d ldr r5, [pc, #244] @ (8001df0 ) - 8001cfa: 4b3e ldr r3, [pc, #248] @ (8001df4 ) + 8001d28: 4d3d ldr r5, [pc, #244] @ (8001e20 ) + 8001d2a: 4b3e ldr r3, [pc, #248] @ (8001e24 ) huart1.Init.Mode = UART_MODE_TX_RX; - 8001cfc: 260c movs r6, #12 + 8001d2c: 260c movs r6, #12 huart1.Instance = USART1; - 8001cfe: 602b str r3, [r5, #0] + 8001d2e: 602b str r3, [r5, #0] huart1.Init.BaudRate = 115200; - 8001d00: 23e1 movs r3, #225 @ 0xe1 + 8001d30: 23e1 movs r3, #225 @ 0xe1 huart1.Init.WordLength = UART_WORDLENGTH_8B; - 8001d02: 60a8 str r0, [r5, #8] + 8001d32: 60a8 str r0, [r5, #8] huart1.Init.BaudRate = 115200; - 8001d04: 025b lsls r3, r3, #9 + 8001d34: 025b lsls r3, r3, #9 huart1.Init.StopBits = UART_STOPBITS_1; - 8001d06: 60e8 str r0, [r5, #12] + 8001d36: 60e8 str r0, [r5, #12] huart1.Init.Parity = UART_PARITY_NONE; - 8001d08: 6128 str r0, [r5, #16] + 8001d38: 6128 str r0, [r5, #16] huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; - 8001d0a: 61a8 str r0, [r5, #24] + 8001d3a: 61a8 str r0, [r5, #24] huart1.Init.OverSampling = UART_OVERSAMPLING_16; - 8001d0c: 61e8 str r0, [r5, #28] + 8001d3c: 61e8 str r0, [r5, #28] huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; - 8001d0e: 6228 str r0, [r5, #32] + 8001d3e: 6228 str r0, [r5, #32] huart1.Init.ClockPrescaler = UART_PRESCALER_DIV1; - 8001d10: 6268 str r0, [r5, #36] @ 0x24 + 8001d40: 6268 str r0, [r5, #36] @ 0x24 huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; - 8001d12: 62a8 str r0, [r5, #40] @ 0x28 + 8001d42: 62a8 str r0, [r5, #40] @ 0x28 if (HAL_UART_Init(&huart1) != HAL_OK) - 8001d14: 0028 movs r0, r5 + 8001d44: 0028 movs r0, r5 huart1.Init.BaudRate = 115200; - 8001d16: 606b str r3, [r5, #4] + 8001d46: 606b str r3, [r5, #4] huart1.Init.Mode = UART_MODE_TX_RX; - 8001d18: 616e str r6, [r5, #20] + 8001d48: 616e str r6, [r5, #20] if (HAL_UART_Init(&huart1) != HAL_OK) - 8001d1a: f003 f89b bl 8004e54 - 8001d1e: 1e01 subs r1, r0, #0 - 8001d20: d001 beq.n 8001d26 - 8001d22: b672 cpsid i + 8001d4a: f003 f8fd bl 8004f48 + 8001d4e: 1e01 subs r1, r0, #0 + 8001d50: d001 beq.n 8001d56 + 8001d52: b672 cpsid i while (1) - 8001d24: e7fe b.n 8001d24 + 8001d54: e7fe b.n 8001d54 if (HAL_UARTEx_SetTxFifoThreshold(&huart1, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK) - 8001d26: 0028 movs r0, r5 - 8001d28: f003 f9ae bl 8005088 - 8001d2c: 1e01 subs r1, r0, #0 - 8001d2e: d001 beq.n 8001d34 - 8001d30: b672 cpsid i + 8001d56: 0028 movs r0, r5 + 8001d58: f003 fa10 bl 800517c + 8001d5c: 1e01 subs r1, r0, #0 + 8001d5e: d001 beq.n 8001d64 + 8001d60: b672 cpsid i while (1) - 8001d32: e7fe b.n 8001d32 + 8001d62: e7fe b.n 8001d62 if (HAL_UARTEx_SetRxFifoThreshold(&huart1, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK) - 8001d34: 0028 movs r0, r5 - 8001d36: f003 f9c7 bl 80050c8 - 8001d3a: 2800 cmp r0, #0 - 8001d3c: d001 beq.n 8001d42 - 8001d3e: b672 cpsid i + 8001d64: 0028 movs r0, r5 + 8001d66: f003 fa29 bl 80051bc + 8001d6a: 2800 cmp r0, #0 + 8001d6c: d001 beq.n 8001d72 + 8001d6e: b672 cpsid i while (1) - 8001d40: e7fe b.n 8001d40 + 8001d70: e7fe b.n 8001d70 if (HAL_UARTEx_DisableFifoMode(&huart1) != HAL_OK) - 8001d42: 0028 movs r0, r5 - 8001d44: f003 f982 bl 800504c - 8001d48: 1e01 subs r1, r0, #0 - 8001d4a: d001 beq.n 8001d50 - 8001d4c: b672 cpsid i - while (1) - 8001d4e: e7fe b.n 8001d4e - huart2.Instance = USART2; - 8001d50: 4d29 ldr r5, [pc, #164] @ (8001df8 ) - 8001d52: 4b2a ldr r3, [pc, #168] @ (8001dfc ) - huart2.Init.WordLength = UART_WORDLENGTH_8B; - 8001d54: 60a8 str r0, [r5, #8] - huart2.Instance = USART2; - 8001d56: 602b str r3, [r5, #0] - huart2.Init.BaudRate = 57600; - 8001d58: 23e1 movs r3, #225 @ 0xe1 - 8001d5a: 021b lsls r3, r3, #8 - 8001d5c: 606b str r3, [r5, #4] - if (HAL_RS485Ex_Init(&huart2, UART_DE_POLARITY_HIGH, 31, 31) != HAL_OK) - 8001d5e: 231f movs r3, #31 - huart2.Init.StopBits = UART_STOPBITS_1; - 8001d60: 60e8 str r0, [r5, #12] - huart2.Init.Parity = UART_PARITY_NONE; - 8001d62: 6128 str r0, [r5, #16] - huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE; - 8001d64: 61a8 str r0, [r5, #24] - huart2.Init.OverSampling = UART_OVERSAMPLING_16; - 8001d66: 61e8 str r0, [r5, #28] - huart2.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; - 8001d68: 6228 str r0, [r5, #32] - huart2.Init.ClockPrescaler = UART_PRESCALER_DIV1; - 8001d6a: 6268 str r0, [r5, #36] @ 0x24 - huart2.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; - 8001d6c: 62a8 str r0, [r5, #40] @ 0x28 - if (HAL_RS485Ex_Init(&huart2, UART_DE_POLARITY_HIGH, 31, 31) != HAL_OK) - 8001d6e: 001a movs r2, r3 - 8001d70: 0028 movs r0, r5 - huart2.Init.Mode = UART_MODE_TX_RX; - 8001d72: 616e str r6, [r5, #20] - if (HAL_RS485Ex_Init(&huart2, UART_DE_POLARITY_HIGH, 31, 31) != HAL_OK) - 8001d74: f003 f920 bl 8004fb8 - 8001d78: 2800 cmp r0, #0 - 8001d7a: d001 beq.n 8001d80 + 8001d72: 0028 movs r0, r5 + 8001d74: f003 f9e4 bl 8005140 + 8001d78: 1e01 subs r1, r0, #0 + 8001d7a: d001 beq.n 8001d80 8001d7c: b672 cpsid i while (1) - 8001d7e: e7fe b.n 8001d7e + 8001d7e: e7fe b.n 8001d7e + huart2.Instance = USART2; + 8001d80: 4d29 ldr r5, [pc, #164] @ (8001e28 ) + 8001d82: 4b2a ldr r3, [pc, #168] @ (8001e2c ) + huart2.Init.WordLength = UART_WORDLENGTH_8B; + 8001d84: 60a8 str r0, [r5, #8] + huart2.Instance = USART2; + 8001d86: 602b str r3, [r5, #0] + huart2.Init.BaudRate = 57600; + 8001d88: 23e1 movs r3, #225 @ 0xe1 + 8001d8a: 021b lsls r3, r3, #8 + 8001d8c: 606b str r3, [r5, #4] + if (HAL_RS485Ex_Init(&huart2, UART_DE_POLARITY_HIGH, 31, 31) != HAL_OK) + 8001d8e: 231f movs r3, #31 + huart2.Init.StopBits = UART_STOPBITS_1; + 8001d90: 60e8 str r0, [r5, #12] + huart2.Init.Parity = UART_PARITY_NONE; + 8001d92: 6128 str r0, [r5, #16] + huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE; + 8001d94: 61a8 str r0, [r5, #24] + huart2.Init.OverSampling = UART_OVERSAMPLING_16; + 8001d96: 61e8 str r0, [r5, #28] + huart2.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; + 8001d98: 6228 str r0, [r5, #32] + huart2.Init.ClockPrescaler = UART_PRESCALER_DIV1; + 8001d9a: 6268 str r0, [r5, #36] @ 0x24 + huart2.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; + 8001d9c: 62a8 str r0, [r5, #40] @ 0x28 + if (HAL_RS485Ex_Init(&huart2, UART_DE_POLARITY_HIGH, 31, 31) != HAL_OK) + 8001d9e: 001a movs r2, r3 + 8001da0: 0028 movs r0, r5 + huart2.Init.Mode = UART_MODE_TX_RX; + 8001da2: 616e str r6, [r5, #20] + if (HAL_RS485Ex_Init(&huart2, UART_DE_POLARITY_HIGH, 31, 31) != HAL_OK) + 8001da4: f003 f982 bl 80050ac + 8001da8: 2800 cmp r0, #0 + 8001daa: d001 beq.n 8001db0 + 8001dac: b672 cpsid i + while (1) + 8001dae: e7fe b.n 8001dae if (HAL_UARTEx_SetTxFifoThreshold(&huart2, UART_TXFIFO_THRESHOLD_1_2) != HAL_OK) - 8001d80: 2180 movs r1, #128 @ 0x80 - 8001d82: 0028 movs r0, r5 - 8001d84: 05c9 lsls r1, r1, #23 - 8001d86: f003 f97f bl 8005088 - 8001d8a: 2800 cmp r0, #0 - 8001d8c: d001 beq.n 8001d92 - 8001d8e: b672 cpsid i + 8001db0: 2180 movs r1, #128 @ 0x80 + 8001db2: 0028 movs r0, r5 + 8001db4: 05c9 lsls r1, r1, #23 + 8001db6: f003 f9e1 bl 800517c + 8001dba: 2800 cmp r0, #0 + 8001dbc: d001 beq.n 8001dc2 + 8001dbe: b672 cpsid i while (1) - 8001d90: e7fe b.n 8001d90 + 8001dc0: e7fe b.n 8001dc0 if (HAL_UARTEx_SetRxFifoThreshold(&huart2, UART_RXFIFO_THRESHOLD_1_2) != HAL_OK) - 8001d92: 2180 movs r1, #128 @ 0x80 - 8001d94: 0028 movs r0, r5 - 8001d96: 04c9 lsls r1, r1, #19 - 8001d98: f003 f996 bl 80050c8 - 8001d9c: 2800 cmp r0, #0 - 8001d9e: d001 beq.n 8001da4 - 8001da0: b672 cpsid i + 8001dc2: 2180 movs r1, #128 @ 0x80 + 8001dc4: 0028 movs r0, r5 + 8001dc6: 04c9 lsls r1, r1, #19 + 8001dc8: f003 f9f8 bl 80051bc + 8001dcc: 2800 cmp r0, #0 + 8001dce: d001 beq.n 8001dd4 + 8001dd0: b672 cpsid i while (1) - 8001da2: e7fe b.n 8001da2 + 8001dd2: e7fe b.n 8001dd2 if (HAL_UARTEx_DisableFifoMode(&huart2) != HAL_OK) - 8001da4: 0028 movs r0, r5 - 8001da6: f003 f951 bl 800504c - 8001daa: 1e03 subs r3, r0, #0 - 8001dac: d028 beq.n 8001e00 - 8001dae: b672 cpsid i + 8001dd4: 0028 movs r0, r5 + 8001dd6: f003 f9b3 bl 8005140 + 8001dda: 1e03 subs r3, r0, #0 + 8001ddc: d028 beq.n 8001e30 + 8001dde: b672 cpsid i while (1) - 8001db0: e7fe b.n 8001db0 - 8001db2: 46c0 nop @ (mov r8, r8) - 8001db4: 20000018 .word 0x20000018 - 8001db8: 2000001c .word 0x2000001c - 8001dbc: 20000014 .word 0x20000014 - 8001dc0: 20000010 .word 0x20000010 - 8001dc4: 2000000c .word 0x2000000c - 8001dc8: 20000008 .word 0x20000008 - 8001dcc: 20000128 .word 0x20000128 - 8001dd0: 40021000 .word 0x40021000 - 8001dd4: 50000400 .word 0x50000400 - 8001dd8: 10210000 .word 0x10210000 - 8001ddc: 200012b0 .word 0x200012b0 - 8001de0: 40012c00 .word 0x40012c00 - 8001de4: 20001264 .word 0x20001264 - 8001de8: 0000ffff .word 0x0000ffff - 8001dec: 40000400 .word 0x40000400 - 8001df0: 200010ec .word 0x200010ec - 8001df4: 40013800 .word 0x40013800 - 8001df8: 20001058 .word 0x20001058 - 8001dfc: 40004400 .word 0x40004400 + 8001de0: e7fe b.n 8001de0 + 8001de2: 46c0 nop @ (mov r8, r8) + 8001de4: 2000001c .word 0x2000001c + 8001de8: 20000020 .word 0x20000020 + 8001dec: 20000018 .word 0x20000018 + 8001df0: 20000014 .word 0x20000014 + 8001df4: 20000010 .word 0x20000010 + 8001df8: 2000000c .word 0x2000000c + 8001dfc: 2000012c .word 0x2000012c + 8001e00: 40021000 .word 0x40021000 + 8001e04: 50000400 .word 0x50000400 + 8001e08: 10210000 .word 0x10210000 + 8001e0c: 200012b4 .word 0x200012b4 + 8001e10: 40012c00 .word 0x40012c00 + 8001e14: 20001268 .word 0x20001268 + 8001e18: 0000ffff .word 0x0000ffff + 8001e1c: 40000400 .word 0x40000400 + 8001e20: 200010f0 .word 0x200010f0 + 8001e24: 40013800 .word 0x40013800 + 8001e28: 2000105c .word 0x2000105c + 8001e2c: 40004400 .word 0x40004400 htim16.Instance = TIM16; - 8001e00: 48d3 ldr r0, [pc, #844] @ (8002150 ) - 8001e02: 4ad4 ldr r2, [pc, #848] @ (8002154 ) + 8001e30: 48d3 ldr r0, [pc, #844] @ (8002180 ) + 8001e32: 4ad4 ldr r2, [pc, #848] @ (8002184 ) htim16.Init.Prescaler = 48000-1; - 8001e04: 4ed4 ldr r6, [pc, #848] @ (8002158 ) + 8001e34: 4ed4 ldr r6, [pc, #848] @ (8002188 ) htim16.Instance = TIM16; - 8001e06: 6002 str r2, [r0, #0] + 8001e36: 6002 str r2, [r0, #0] htim16.Init.Prescaler = 48000-1; - 8001e08: 6046 str r6, [r0, #4] + 8001e38: 6046 str r6, [r0, #4] htim16.Init.CounterMode = TIM_COUNTERMODE_UP; - 8001e0a: 6083 str r3, [r0, #8] + 8001e3a: 6083 str r3, [r0, #8] htim16.Init.Period = 65535; - 8001e0c: 60c4 str r4, [r0, #12] + 8001e3c: 60c4 str r4, [r0, #12] htim16.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - 8001e0e: 6103 str r3, [r0, #16] + 8001e3e: 6103 str r3, [r0, #16] htim16.Init.RepetitionCounter = 0; - 8001e10: 6143 str r3, [r0, #20] + 8001e40: 6143 str r3, [r0, #20] htim16.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; - 8001e12: 6183 str r3, [r0, #24] + 8001e42: 6183 str r3, [r0, #24] if (HAL_TIM_Base_Init(&htim16) != HAL_OK) - 8001e14: f002 f806 bl 8003e24 - 8001e18: 2800 cmp r0, #0 - 8001e1a: d001 beq.n 8001e20 - 8001e1c: b672 cpsid i + 8001e44: f002 f808 bl 8003e58 + 8001e48: 2800 cmp r0, #0 + 8001e4a: d001 beq.n 8001e50 + 8001e4c: b672 cpsid i while (1) - 8001e1e: e7fe b.n 8001e1e + 8001e4e: e7fe b.n 8001e4e htim17.Instance = TIM17; - 8001e20: 48ce ldr r0, [pc, #824] @ (800215c ) - 8001e22: 4bcf ldr r3, [pc, #828] @ (8002160 ) + 8001e50: 48ce ldr r0, [pc, #824] @ (800218c ) + 8001e52: 4bcf ldr r3, [pc, #828] @ (8002190 ) htim17.Init.Prescaler = 48000-1; - 8001e24: 6046 str r6, [r0, #4] + 8001e54: 6046 str r6, [r0, #4] htim17.Instance = TIM17; - 8001e26: 6003 str r3, [r0, #0] + 8001e56: 6003 str r3, [r0, #0] htim17.Init.CounterMode = TIM_COUNTERMODE_UP; - 8001e28: 2300 movs r3, #0 + 8001e58: 2300 movs r3, #0 htim17.Init.Period = 65535; - 8001e2a: 60c4 str r4, [r0, #12] + 8001e5a: 60c4 str r4, [r0, #12] htim17.Init.CounterMode = TIM_COUNTERMODE_UP; - 8001e2c: 6083 str r3, [r0, #8] + 8001e5c: 6083 str r3, [r0, #8] htim17.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - 8001e2e: 6103 str r3, [r0, #16] + 8001e5e: 6103 str r3, [r0, #16] htim17.Init.RepetitionCounter = 0; - 8001e30: 6143 str r3, [r0, #20] + 8001e60: 6143 str r3, [r0, #20] htim17.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; - 8001e32: 6183 str r3, [r0, #24] + 8001e62: 6183 str r3, [r0, #24] if (HAL_TIM_Base_Init(&htim17) != HAL_OK) - 8001e34: f001 fff6 bl 8003e24 - 8001e38: 2800 cmp r0, #0 - 8001e3a: d001 beq.n 8001e40 - 8001e3c: b672 cpsid i + 8001e64: f001 fff8 bl 8003e58 + 8001e68: 2800 cmp r0, #0 + 8001e6a: d001 beq.n 8001e70 + 8001e6c: b672 cpsid i while (1) - 8001e3e: e7fe b.n 8001e3e + 8001e6e: e7fe b.n 8001e6e htim14.Instance = TIM14; - 8001e40: 4bc8 ldr r3, [pc, #800] @ (8002164 ) - 8001e42: 9301 str r3, [sp, #4] - 8001e44: 9a01 ldr r2, [sp, #4] - 8001e46: 4bc8 ldr r3, [pc, #800] @ (8002168 ) + 8001e70: 4bc8 ldr r3, [pc, #800] @ (8002194 ) + 8001e72: 9301 str r3, [sp, #4] + 8001e74: 9a01 ldr r2, [sp, #4] + 8001e76: 4bc8 ldr r3, [pc, #800] @ (8002198 ) htim14.Init.CounterMode = TIM_COUNTERMODE_UP; - 8001e48: 6090 str r0, [r2, #8] + 8001e78: 6090 str r0, [r2, #8] htim14.Instance = TIM14; - 8001e4a: 6013 str r3, [r2, #0] + 8001e7a: 6013 str r3, [r2, #0] htim14.Init.Prescaler = 480-1; - 8001e4c: 23e0 movs r3, #224 @ 0xe0 - 8001e4e: 33ff adds r3, #255 @ 0xff - 8001e50: 6053 str r3, [r2, #4] + 8001e7c: 23e0 movs r3, #224 @ 0xe0 + 8001e7e: 33ff adds r3, #255 @ 0xff + 8001e80: 6053 str r3, [r2, #4] htim14.Init.Period = 50; - 8001e52: 2332 movs r3, #50 @ 0x32 + 8001e82: 2332 movs r3, #50 @ 0x32 htim14.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - 8001e54: 6110 str r0, [r2, #16] + 8001e84: 6110 str r0, [r2, #16] htim14.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; - 8001e56: 6190 str r0, [r2, #24] + 8001e86: 6190 str r0, [r2, #24] if (HAL_TIM_Base_Init(&htim14) != HAL_OK) - 8001e58: 0010 movs r0, r2 + 8001e88: 0010 movs r0, r2 htim14.Init.Period = 50; - 8001e5a: 60d3 str r3, [r2, #12] + 8001e8a: 60d3 str r3, [r2, #12] if (HAL_TIM_Base_Init(&htim14) != HAL_OK) - 8001e5c: f001 ffe2 bl 8003e24 - 8001e60: 1e06 subs r6, r0, #0 - 8001e62: d001 beq.n 8001e68 - 8001e64: b672 cpsid i + 8001e8c: f001 ffe4 bl 8003e58 + 8001e90: 1e06 subs r6, r0, #0 + 8001e92: d001 beq.n 8001e98 + 8001e94: b672 cpsid i while (1) - 8001e66: e7fe b.n 8001e66 + 8001e96: e7fe b.n 8001e96 ADC_ChannelConfTypeDef sConfig = {0}; - 8001e68: 0001 movs r1, r0 - 8001e6a: 220c movs r2, #12 - 8001e6c: 0038 movs r0, r7 - 8001e6e: f003 f98d bl 800518c + 8001e98: 0001 movs r1, r0 + 8001e9a: 220c movs r2, #12 + 8001e9c: 0038 movs r0, r7 + 8001e9e: f003 f9ef bl 8005280 hadc1.Instance = ADC1; - 8001e72: 4cbe ldr r4, [pc, #760] @ (800216c ) - 8001e74: 4bbe ldr r3, [pc, #760] @ (8002170 ) + 8001ea2: 4cbe ldr r4, [pc, #760] @ (800219c ) + 8001ea4: 4bbe ldr r3, [pc, #760] @ (80021a0 ) if (HAL_ADC_Init(&hadc1) != HAL_OK) - 8001e76: 0020 movs r0, r4 + 8001ea6: 0020 movs r0, r4 hadc1.Instance = ADC1; - 8001e78: 6023 str r3, [r4, #0] + 8001ea8: 6023 str r3, [r4, #0] hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV2; - 8001e7a: 2380 movs r3, #128 @ 0x80 - 8001e7c: 05db lsls r3, r3, #23 - 8001e7e: 6063 str r3, [r4, #4] + 8001eaa: 2380 movs r3, #128 @ 0x80 + 8001eac: 05db lsls r3, r3, #23 + 8001eae: 6063 str r3, [r4, #4] hadc1.Init.ScanConvMode = ADC_SCAN_SEQ_FIXED; - 8001e80: 2380 movs r3, #128 @ 0x80 - 8001e82: 061b lsls r3, r3, #24 - 8001e84: 6123 str r3, [r4, #16] + 8001eb0: 2380 movs r3, #128 @ 0x80 + 8001eb2: 061b lsls r3, r3, #24 + 8001eb4: 6123 str r3, [r4, #16] hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV; - 8001e86: 2304 movs r3, #4 - 8001e88: 6163 str r3, [r4, #20] + 8001eb6: 2304 movs r3, #4 + 8001eb8: 6163 str r3, [r4, #20] hadc1.Init.NbrOfConversion = 1; - 8001e8a: 3b03 subs r3, #3 - 8001e8c: 61e3 str r3, [r4, #28] + 8001eba: 3b03 subs r3, #3 + 8001ebc: 61e3 str r3, [r4, #28] hadc1.Init.DiscontinuousConvMode = DISABLE; - 8001e8e: 18e3 adds r3, r4, r3 - 8001e90: 77de strb r6, [r3, #31] + 8001ebe: 18e3 adds r3, r4, r3 + 8001ec0: 77de strb r6, [r3, #31] hadc1.Init.DMAContinuousRequests = DISABLE; - 8001e92: 0023 movs r3, r4 - 8001e94: 332c adds r3, #44 @ 0x2c - 8001e96: 701e strb r6, [r3, #0] + 8001ec2: 0023 movs r3, r4 + 8001ec4: 332c adds r3, #44 @ 0x2c + 8001ec6: 701e strb r6, [r3, #0] hadc1.Init.OversamplingMode = DISABLE; - 8001e98: 0023 movs r3, r4 - 8001e9a: 333c adds r3, #60 @ 0x3c + 8001ec8: 0023 movs r3, r4 + 8001eca: 333c adds r3, #60 @ 0x3c hadc1.Init.Resolution = ADC_RESOLUTION_12B; - 8001e9c: 60a6 str r6, [r4, #8] + 8001ecc: 60a6 str r6, [r4, #8] hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; - 8001e9e: 60e6 str r6, [r4, #12] + 8001ece: 60e6 str r6, [r4, #12] hadc1.Init.LowPowerAutoWait = DISABLE; - 8001ea0: 8326 strh r6, [r4, #24] + 8001ed0: 8326 strh r6, [r4, #24] hadc1.Init.ContinuousConvMode = DISABLE; - 8001ea2: 76a6 strb r6, [r4, #26] + 8001ed2: 76a6 strb r6, [r4, #26] hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; - 8001ea4: 6266 str r6, [r4, #36] @ 0x24 + 8001ed4: 6266 str r6, [r4, #36] @ 0x24 hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; - 8001ea6: 62a6 str r6, [r4, #40] @ 0x28 + 8001ed6: 62a6 str r6, [r4, #40] @ 0x28 hadc1.Init.Overrun = ADC_OVR_DATA_PRESERVED; - 8001ea8: 6326 str r6, [r4, #48] @ 0x30 + 8001ed8: 6326 str r6, [r4, #48] @ 0x30 hadc1.Init.SamplingTimeCommon1 = ADC_SAMPLETIME_1CYCLE_5; - 8001eaa: 6366 str r6, [r4, #52] @ 0x34 + 8001eda: 6366 str r6, [r4, #52] @ 0x34 hadc1.Init.OversamplingMode = DISABLE; - 8001eac: 701e strb r6, [r3, #0] + 8001edc: 701e strb r6, [r3, #0] hadc1.Init.TriggerFrequencyMode = ADC_TRIGGER_FREQ_HIGH; - 8001eae: 64e6 str r6, [r4, #76] @ 0x4c + 8001ede: 64e6 str r6, [r4, #76] @ 0x4c if (HAL_ADC_Init(&hadc1) != HAL_OK) - 8001eb0: f000 fd44 bl 800293c - 8001eb4: 2800 cmp r0, #0 - 8001eb6: d001 beq.n 8001ebc - 8001eb8: b672 cpsid i + 8001ee0: f000 fd44 bl 800296c + 8001ee4: 2800 cmp r0, #0 + 8001ee6: d001 beq.n 8001eec + 8001ee8: b672 cpsid i while (1) - 8001eba: e7fe b.n 8001eba + 8001eea: e7fe b.n 8001eea sConfig.Channel = ADC_CHANNEL_7; - 8001ebc: 4bad ldr r3, [pc, #692] @ (8002174 ) + 8001eec: 4bad ldr r3, [pc, #692] @ (80021a4 ) if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 8001ebe: 0039 movs r1, r7 + 8001eee: 0039 movs r1, r7 sConfig.Channel = ADC_CHANNEL_7; - 8001ec0: 9315 str r3, [sp, #84] @ 0x54 + 8001ef0: 9315 str r3, [sp, #84] @ 0x54 sConfig.Rank = ADC_RANK_CHANNEL_NUMBER; - 8001ec2: 2301 movs r3, #1 + 8001ef2: 2301 movs r3, #1 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 8001ec4: 0020 movs r0, r4 + 8001ef4: 0020 movs r0, r4 sConfig.Rank = ADC_RANK_CHANNEL_NUMBER; - 8001ec6: 607b str r3, [r7, #4] + 8001ef6: 607b str r3, [r7, #4] if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 8001ec8: f000 fe48 bl 8002b5c - 8001ecc: 2800 cmp r0, #0 - 8001ece: d001 beq.n 8001ed4 - 8001ed0: b672 cpsid i + 8001ef8: f000 fe48 bl 8002b8c + 8001efc: 2800 cmp r0, #0 + 8001efe: d001 beq.n 8001f04 + 8001f00: b672 cpsid i while (1) - 8001ed2: e7fe b.n 8001ed2 + 8001f02: e7fe b.n 8001f02 sConfig.Channel = ADC_CHANNEL_22; - 8001ed4: 4ba8 ldr r3, [pc, #672] @ (8002178 ) + 8001f04: 4ba8 ldr r3, [pc, #672] @ (80021a8 ) if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 8001ed6: 0020 movs r0, r4 - 8001ed8: 0039 movs r1, r7 + 8001f06: 0020 movs r0, r4 + 8001f08: 0039 movs r1, r7 sConfig.Channel = ADC_CHANNEL_22; - 8001eda: 9315 str r3, [sp, #84] @ 0x54 + 8001f0a: 9315 str r3, [sp, #84] @ 0x54 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 8001edc: f000 fe3e bl 8002b5c - 8001ee0: 1e04 subs r4, r0, #0 - 8001ee2: d001 beq.n 8001ee8 - 8001ee4: b672 cpsid i + 8001f0c: f000 fe3e bl 8002b8c + 8001f10: 1e04 subs r4, r0, #0 + 8001f12: d001 beq.n 8001f18 + 8001f14: b672 cpsid i while (1) - 8001ee6: e7fe b.n 8001ee6 + 8001f16: e7fe b.n 8001f16 *puuid = HAL_GetUIDw0(); - 8001ee8: f000 fd12 bl 8002910 - 8001eec: 4ea3 ldr r6, [pc, #652] @ (800217c ) - 8001eee: 0a03 lsrs r3, r0, #8 - 8001ef0: 7030 strb r0, [r6, #0] - 8001ef2: 7073 strb r3, [r6, #1] - 8001ef4: 0c03 lsrs r3, r0, #16 - 8001ef6: 0e00 lsrs r0, r0, #24 - 8001ef8: 70b3 strb r3, [r6, #2] - 8001efa: 70f0 strb r0, [r6, #3] + 8001f18: f000 fd12 bl 8002940 + 8001f1c: 4ea3 ldr r6, [pc, #652] @ (80021ac ) + 8001f1e: 0a03 lsrs r3, r0, #8 + 8001f20: 7030 strb r0, [r6, #0] + 8001f22: 7073 strb r3, [r6, #1] + 8001f24: 0c03 lsrs r3, r0, #16 + 8001f26: 0e00 lsrs r0, r0, #24 + 8001f28: 70b3 strb r3, [r6, #2] + 8001f2a: 70f0 strb r0, [r6, #3] *(puuid+1) = HAL_GetUIDw1(); - 8001efc: f000 fd0e bl 800291c - 8001f00: 0a03 lsrs r3, r0, #8 - 8001f02: 7130 strb r0, [r6, #4] - 8001f04: 7173 strb r3, [r6, #5] - 8001f06: 0c03 lsrs r3, r0, #16 - 8001f08: 0e00 lsrs r0, r0, #24 - 8001f0a: 71b3 strb r3, [r6, #6] - 8001f0c: 71f0 strb r0, [r6, #7] + 8001f2c: f000 fd0e bl 800294c + 8001f30: 0a03 lsrs r3, r0, #8 + 8001f32: 7130 strb r0, [r6, #4] + 8001f34: 7173 strb r3, [r6, #5] + 8001f36: 0c03 lsrs r3, r0, #16 + 8001f38: 0e00 lsrs r0, r0, #24 + 8001f3a: 71b3 strb r3, [r6, #6] + 8001f3c: 71f0 strb r0, [r6, #7] *(puuid+2) = HAL_GetUIDw2(); - 8001f0e: f000 fd0b bl 8002928 - 8001f12: 0a03 lsrs r3, r0, #8 - 8001f14: 7230 strb r0, [r6, #8] - 8001f16: 7273 strb r3, [r6, #9] - 8001f18: 0c03 lsrs r3, r0, #16 - 8001f1a: 0e00 lsrs r0, r0, #24 - 8001f1c: 72f0 strb r0, [r6, #11] + 8001f3e: f000 fd0b bl 8002958 + 8001f42: 0a03 lsrs r3, r0, #8 + 8001f44: 7230 strb r0, [r6, #8] + 8001f46: 7273 strb r3, [r6, #9] + 8001f48: 0c03 lsrs r3, r0, #16 + 8001f4a: 0e00 lsrs r0, r0, #24 + 8001f4c: 72f0 strb r0, [r6, #11] HAL_TIM_Encoder_Start(&htim3, TIM_CHANNEL_ALL); - 8001f1e: 213c movs r1, #60 @ 0x3c - 8001f20: 9800 ldr r0, [sp, #0] + 8001f4e: 213c movs r1, #60 @ 0x3c + 8001f50: 9800 ldr r0, [sp, #0] *(puuid+2) = HAL_GetUIDw2(); - 8001f22: 72b3 strb r3, [r6, #10] + 8001f52: 72b3 strb r3, [r6, #10] HAL_TIM_Encoder_Start(&htim3, TIM_CHANNEL_ALL); - 8001f24: f001 fe31 bl 8003b8a + 8001f54: f001 fe33 bl 8003bbe HAL_TIM_PWM_Start(&htim1, TIM_CHANNEL_1); // Feed motor - 8001f28: 4e95 ldr r6, [pc, #596] @ (8002180 ) - 8001f2a: 0021 movs r1, r4 - 8001f2c: 0030 movs r0, r6 - 8001f2e: f002 fa13 bl 8004358 + 8001f58: 4e95 ldr r6, [pc, #596] @ (80021b0 ) + 8001f5a: 0021 movs r1, r4 + 8001f5c: 0030 movs r0, r6 + 8001f5e: f002 fa15 bl 800438c HAL_TIM_PWM_Start(&htim1, TIM_CHANNEL_2); // Feed motor - 8001f32: 2104 movs r1, #4 - 8001f34: 0030 movs r0, r6 - 8001f36: f002 fa0f bl 8004358 + 8001f62: 2104 movs r1, #4 + 8001f64: 0030 movs r0, r6 + 8001f66: f002 fa11 bl 800438c HAL_TIM_PWM_Start(&htim1, TIM_CHANNEL_3); // Peel motor - 8001f3a: 2108 movs r1, #8 - 8001f3c: 0030 movs r0, r6 - 8001f3e: f002 fa0b bl 8004358 + 8001f6a: 2108 movs r1, #8 + 8001f6c: 0030 movs r0, r6 + 8001f6e: f002 fa0d bl 800438c HAL_TIM_PWM_Start(&htim1, TIM_CHANNEL_4); // Peel motor - 8001f42: 210c movs r1, #12 - 8001f44: 0030 movs r0, r6 - 8001f46: f002 fa07 bl 8004358 + 8001f72: 210c movs r1, #12 + 8001f74: 0030 movs r0, r6 + 8001f76: f002 fa09 bl 800438c HAL_TIM_Base_Start_IT(&htim14); - 8001f4a: 9801 ldr r0, [sp, #4] - 8001f4c: f001 fdec bl 8003b28 + 8001f7a: 9801 ldr r0, [sp, #4] + 8001f7c: f001 fdee bl 8003b5c floor_address = read_floor_address(); - 8001f50: f7ff f938 bl 80011c4 - 8001f54: 4b8b ldr r3, [pc, #556] @ (8002184 ) - 8001f56: 7018 strb r0, [r3, #0] + 8001f80: f7ff f938 bl 80011f4 + 8001f84: 4b8b ldr r3, [pc, #556] @ (80021b4 ) + 8001f86: 7018 strb r0, [r3, #0] if (floor_address == FLOOR_ADDRESS_NOT_DETECTED) - 8001f58: 4b8b ldr r3, [pc, #556] @ (8002188 ) - 8001f5a: 28ff cmp r0, #255 @ 0xff - 8001f5c: d16c bne.n 8002038 + 8001f88: 4b8b ldr r3, [pc, #556] @ (80021b8 ) + 8001f8a: 28ff cmp r0, #255 @ 0xff + 8001f8c: d16c bne.n 8002068 set_LED(1, 0, 0); // Red = EEPROM not detected - 8001f5e: 0022 movs r2, r4 - 8001f60: 0021 movs r1, r4 + 8001f8e: 0022 movs r2, r4 + 8001f90: 0021 movs r1, r4 floor_address_status = 0; - 8001f62: 701c strb r4, [r3, #0] + 8001f92: 701c strb r4, [r3, #0] set_LED(1, 0, 0); // Red = EEPROM not detected - 8001f64: 38fe subs r0, #254 @ 0xfe + 8001f94: 38fe subs r0, #254 @ 0xfe set_LED(0, 0, 1); // Blue = not programmed - 8001f66: f7fe fd99 bl 8000a9c + 8001f96: f7fe fd81 bl 8000a9c for (uint8_t i = 0; i < MSG_BUF_COUNT; i++) msg_buf_empty[i] = 1; - 8001f6a: 2401 movs r4, #1 + 8001f9a: 2401 movs r4, #1 { - 8001f6c: 2300 movs r3, #0 + 8001f9c: 2300 movs r3, #0 for (uint8_t i = 0; i < MSG_BUF_COUNT; i++) msg_buf_empty[i] = 1; - 8001f6e: 4a87 ldr r2, [pc, #540] @ (800218c ) - 8001f70: 9200 str r2, [sp, #0] - 8001f72: 9a00 ldr r2, [sp, #0] - 8001f74: 54d4 strb r4, [r2, r3] - 8001f76: 3301 adds r3, #1 - 8001f78: 2b36 cmp r3, #54 @ 0x36 - 8001f7a: d1fa bne.n 8001f72 + 8001f9e: 4a87 ldr r2, [pc, #540] @ (80021bc ) + 8001fa0: 9200 str r2, [sp, #0] + 8001fa2: 9a00 ldr r2, [sp, #0] + 8001fa4: 54d4 strb r4, [r2, r3] + 8001fa6: 3301 adds r3, #1 + 8001fa8: 2b36 cmp r3, #54 @ 0x36 + 8001faa: d1fa bne.n 8001fa2 HAL_UARTEx_ReceiveToIdle_DMA (&huart2,DMA_buffer,64); - 8001f7c: 2240 movs r2, #64 @ 0x40 - 8001f7e: 4984 ldr r1, [pc, #528] @ (8002190 ) - 8001f80: 0028 movs r0, r5 - 8001f82: f003 f8c3 bl 800510c + 8001fac: 2240 movs r2, #64 @ 0x40 + 8001fae: 4984 ldr r1, [pc, #528] @ (80021c0 ) + 8001fb0: 0028 movs r0, r5 + 8001fb2: f003 f925 bl 8005200 __HAL_DMA_DISABLE_IT(huart2.hdmarx, DMA_IT_HT); // Disable half-transfer interrupt - 8001f86: 2104 movs r1, #4 - 8001f88: 1d2b adds r3, r5, #4 - 8001f8a: 6fdb ldr r3, [r3, #124] @ 0x7c - 8001f8c: 681a ldr r2, [r3, #0] - 8001f8e: 6813 ldr r3, [r2, #0] - 8001f90: 438b bics r3, r1 - 8001f92: 6013 str r3, [r2, #0] + 8001fb6: 2104 movs r1, #4 + 8001fb8: 1d2b adds r3, r5, #4 + 8001fba: 6fdb ldr r3, [r3, #124] @ 0x7c + 8001fbc: 681a ldr r2, [r3, #0] + 8001fbe: 6813 ldr r3, [r2, #0] + 8001fc0: 438b bics r3, r1 + 8001fc2: 6013 str r3, [r2, #0] __HAL_UART_ENABLE_IT(&huart2, UART_IT_ERR); // Enable error interrupt for overrun recovery - 8001f94: 682b ldr r3, [r5, #0] - 8001f96: 689a ldr r2, [r3, #8] - 8001f98: 4314 orrs r4, r2 - 8001f9a: 609c str r4, [r3, #8] + 8001fc4: 682b ldr r3, [r5, #0] + 8001fc6: 689a ldr r2, [r3, #8] + 8001fc8: 4314 orrs r4, r2 + 8001fca: 609c str r4, [r3, #8] uint8_t sw1_state = HAL_GPIO_ReadPin(SW1_GPIO_Port, SW1_Pin); // 1 = released, 0 = pressed - 8001f9c: 2180 movs r1, #128 @ 0x80 - 8001f9e: 487d ldr r0, [pc, #500] @ (8002194 ) - 8001fa0: 0089 lsls r1, r1, #2 - 8001fa2: f001 f9b1 bl 8003308 + 8001fcc: 2180 movs r1, #128 @ 0x80 + 8001fce: 487d ldr r0, [pc, #500] @ (80021c4 ) + 8001fd0: 0089 lsls r1, r1, #2 + 8001fd2: f001 f9b3 bl 800333c uint8_t sw2_state = HAL_GPIO_ReadPin(SW2_GPIO_Port, SW2_Pin); - 8001fa6: 2180 movs r1, #128 @ 0x80 + 8001fd6: 2180 movs r1, #128 @ 0x80 uint8_t sw1_state = HAL_GPIO_ReadPin(SW1_GPIO_Port, SW1_Pin); // 1 = released, 0 = pressed - 8001fa8: 0006 movs r6, r0 + 8001fd8: 0006 movs r6, r0 uint8_t sw2_state = HAL_GPIO_ReadPin(SW2_GPIO_Port, SW2_Pin); - 8001faa: 0049 lsls r1, r1, #1 - 8001fac: 4879 ldr r0, [pc, #484] @ (8002194 ) - 8001fae: f001 f9ab bl 8003308 + 8001fda: 0049 lsls r1, r1, #1 + 8001fdc: 4879 ldr r0, [pc, #484] @ (80021c4 ) + 8001fde: f001 f9ad bl 800333c if (driving) - 8001fb2: 4f79 ldr r7, [pc, #484] @ (8002198 ) - 8001fb4: 783c ldrb r4, [r7, #0] - 8001fb6: 2c00 cmp r4, #0 - 8001fb8: d06e beq.n 8002098 + 8001fe2: 4f79 ldr r7, [pc, #484] @ (80021c8 ) + 8001fe4: 783c ldrb r4, [r7, #0] + 8001fe6: 2c00 cmp r4, #0 + 8001fe8: d06e beq.n 80020c8 if ((driving_direction && sw2_state) || (!driving_direction && sw1_state)) - 8001fba: 4b78 ldr r3, [pc, #480] @ (800219c ) - 8001fbc: 7819 ldrb r1, [r3, #0] - 8001fbe: 2900 cmp r1, #0 - 8001fc0: d050 beq.n 8002064 - 8001fc2: 2800 cmp r0, #0 - 8001fc4: d150 bne.n 8002068 + 8001fea: 4b78 ldr r3, [pc, #480] @ (80021cc ) + 8001fec: 7819 ldrb r1, [r3, #0] + 8001fee: 2900 cmp r1, #0 + 8001ff0: d050 beq.n 8002094 + 8001ff2: 2800 cmp r0, #0 + 8001ff4: d150 bne.n 8002098 else if (!drive_mode) - 8001fc6: 4b76 ldr r3, [pc, #472] @ (80021a0 ) - 8001fc8: 781b ldrb r3, [r3, #0] - 8001fca: 2b00 cmp r3, #0 - 8001fcc: d107 bne.n 8001fde + 8001ff6: 4b76 ldr r3, [pc, #472] @ (80021d0 ) + 8001ff8: 781b ldrb r3, [r3, #0] + 8001ffa: 2b00 cmp r3, #0 + 8001ffc: d107 bne.n 800200e target_count = total_count + 10000; - 8001fce: 4b75 ldr r3, [pc, #468] @ (80021a4 ) - 8001fd0: 4a75 ldr r2, [pc, #468] @ (80021a8 ) - 8001fd2: 681b ldr r3, [r3, #0] + 8001ffe: 4b75 ldr r3, [pc, #468] @ (80021d4 ) + 8002000: 4a75 ldr r2, [pc, #468] @ (80021d8 ) + 8002002: 681b ldr r3, [r3, #0] if (driving_direction) - 8001fd4: 2900 cmp r1, #0 - 8001fd6: d05d beq.n 8002094 + 8002004: 2900 cmp r1, #0 + 8002006: d05d beq.n 80020c4 target_count = total_count + 10000; - 8001fd8: 4974 ldr r1, [pc, #464] @ (80021ac ) + 8002008: 4974 ldr r1, [pc, #464] @ (80021dc ) target_count = total_count - 10000; - 8001fda: 185b adds r3, r3, r1 - 8001fdc: 6013 str r3, [r2, #0] + 800200a: 185b adds r3, r3, r1 + 800200c: 6013 str r3, [r2, #0] feed_state_machine_update(); - 8001fde: f7fe fed1 bl 8000d84 + 800200e: f7fe fec5 bl 8000d9c peel_ramp_update(); - 8001fe2: f7fe fdb5 bl 8000b50 + 8002012: f7fe fda1 bl 8000b58 debug_output(); - 8001fe6: f7ff fbf7 bl 80017d8 + 8002016: f7ff fbf7 bl 8001808 if (feed_just_completed) - 8001fea: 4b71 ldr r3, [pc, #452] @ (80021b0 ) - 8001fec: 781a ldrb r2, [r3, #0] - 8001fee: 2a00 cmp r2, #0 - 8001ff0: d00c beq.n 800200c + 800201a: 4b71 ldr r3, [pc, #452] @ (80021e0 ) + 800201c: 781a ldrb r2, [r3, #0] + 800201e: 2a00 cmp r2, #0 + 8002020: d00c beq.n 800203c feed_just_completed = 0; - 8001ff2: 2100 movs r1, #0 - 8001ff4: 7019 strb r1, [r3, #0] + 8002022: 2100 movs r1, #0 + 8002024: 7019 strb r1, [r3, #0] if (last_feed_status == STATUS_OK) - 8001ff6: 4b6f ldr r3, [pc, #444] @ (80021b4 ) - 8001ff8: 7818 ldrb r0, [r3, #0] - 8001ffa: 4288 cmp r0, r1 - 8001ffc: d000 beq.n 8002000 - 8001ffe: e1cc b.n 800239a + 8002026: 4b6f ldr r3, [pc, #444] @ (80021e4 ) + 8002028: 7818 ldrb r0, [r3, #0] + 800202a: 4288 cmp r0, r1 + 800202c: d000 beq.n 8002030 + 800202e: e1cc b.n 80023ca set_LED(0, 0, 0); // Success - LED off - 8002000: 0002 movs r2, r0 - 8002002: 0001 movs r1, r0 - 8002004: f7fe fd4a bl 8000a9c + 8002030: 0002 movs r2, r0 + 8002032: 0001 movs r1, r0 + 8002034: f7fe fd32 bl 8000a9c reset_position_if_needed(); - 8002008: f7ff fcea bl 80019e0 + 8002038: f7ff fcea bl 8001a10 uint16_t time2 = sw2_pressed ? htim17.Instance->CNT : 0; - 800200c: 2400 movs r4, #0 + 800203c: 2400 movs r4, #0 msg_buf_empty[bi] = 1; - 800200e: 2601 movs r6, #1 + 800203e: 2601 movs r6, #1 if (!msg_buf_empty[bi]) - 8002010: 9b00 ldr r3, [sp, #0] - 8002012: 5d1b ldrb r3, [r3, r4] - 8002014: b2df uxtb r7, r3 - 8002016: 2b00 cmp r3, #0 - 8002018: d10a bne.n 8002030 + 8002040: 9b00 ldr r3, [sp, #0] + 8002042: 5d1b ldrb r3, [r3, r4] + 8002044: b2df uxtb r7, r3 + 8002046: 2b00 cmp r3, #0 + 8002048: d10a bne.n 8002060 handleRS485Message(msg_buf[bi], msg_buf_size[bi]); - 800201a: 4d67 ldr r5, [pc, #412] @ (80021b8 ) - 800201c: 4b67 ldr r3, [pc, #412] @ (80021bc ) - 800201e: 5d29 ldrb r1, [r5, r4] - 8002020: 01a0 lsls r0, r4, #6 - 8002022: 18c0 adds r0, r0, r3 - 8002024: b2c9 uxtb r1, r1 - 8002026: f7ff f94d bl 80012c4 + 800204a: 4d67 ldr r5, [pc, #412] @ (80021e8 ) + 800204c: 4b67 ldr r3, [pc, #412] @ (80021ec ) + 800204e: 5d29 ldrb r1, [r5, r4] + 8002050: 01a0 lsls r0, r4, #6 + 8002052: 18c0 adds r0, r0, r3 + 8002054: b2c9 uxtb r1, r1 + 8002056: f7ff f94d bl 80012f4 msg_buf_empty[bi] = 1; - 800202a: 9b00 ldr r3, [sp, #0] + 800205a: 9b00 ldr r3, [sp, #0] msg_buf_size[bi] = 0; - 800202c: 552f strb r7, [r5, r4] + 800205c: 552f strb r7, [r5, r4] msg_buf_empty[bi] = 1; - 800202e: 551e strb r6, [r3, r4] + 800205e: 551e strb r6, [r3, r4] for (uint8_t bi = 0; bi < MSG_BUF_COUNT; bi++) - 8002030: 3401 adds r4, #1 - 8002032: 2c36 cmp r4, #54 @ 0x36 - 8002034: d1ec bne.n 8002010 - 8002036: e7b1 b.n 8001f9c + 8002060: 3401 adds r4, #1 + 8002062: 2c36 cmp r4, #54 @ 0x36 + 8002064: d1ec bne.n 8002040 + 8002066: e7b1 b.n 8001fcc else if (floor_address == FLOOR_ADDRESS_NOT_PROGRAMMED) - 8002038: 2800 cmp r0, #0 - 800203a: d103 bne.n 8002044 + 8002068: 2800 cmp r0, #0 + 800206a: d103 bne.n 8002074 floor_address_status = 1; - 800203c: 2201 movs r2, #1 + 800206c: 2201 movs r2, #1 set_LED(0, 0, 1); // Blue = not programmed - 800203e: 0001 movs r1, r0 + 800206e: 0001 movs r1, r0 floor_address_status = 1; - 8002040: 701a strb r2, [r3, #0] + 8002070: 701a strb r2, [r3, #0] set_LED(0, 0, 1); // Blue = not programmed - 8002042: e790 b.n 8001f66 + 8002072: e790 b.n 8001f96 floor_address_status = 2; - 8002044: 2202 movs r2, #2 - 8002046: 701a strb r2, [r3, #0] + 8002074: 2202 movs r2, #2 + 8002076: 701a strb r2, [r3, #0] my_address = floor_address; - 8002048: 4b5d ldr r3, [pc, #372] @ (80021c0 ) + 8002078: 4b5d ldr r3, [pc, #372] @ (80021f0 ) set_LED(0, 1, 0); // Green briefly = valid address - 800204a: 0022 movs r2, r4 - 800204c: 2101 movs r1, #1 + 800207a: 0022 movs r2, r4 + 800207c: 2101 movs r1, #1 my_address = floor_address; - 800204e: 7018 strb r0, [r3, #0] + 800207e: 7018 strb r0, [r3, #0] set_LED(0, 1, 0); // Green briefly = valid address - 8002050: 0020 movs r0, r4 - 8002052: f7fe fd23 bl 8000a9c + 8002080: 0020 movs r0, r4 + 8002082: f7fe fd0b bl 8000a9c HAL_Delay(200); - 8002056: 20c8 movs r0, #200 @ 0xc8 - 8002058: f000 fc48 bl 80028ec + 8002086: 20c8 movs r0, #200 @ 0xc8 + 8002088: f000 fc48 bl 800291c set_LED(0, 0, 0); - 800205c: 0022 movs r2, r4 - 800205e: 0021 movs r1, r4 - 8002060: 0020 movs r0, r4 - 8002062: e780 b.n 8001f66 - if ((driving_direction && sw2_state) || (!driving_direction && sw1_state)) - 8002064: 2e00 cmp r6, #0 - 8002066: d0ae beq.n 8001fc6 - driving = 0; - 8002068: 2400 movs r4, #0 - halt_all(); - 800206a: f7fe fdcb bl 8000c04 - HAL_TIM_Base_Stop(&htim16); - 800206e: 4838 ldr r0, [pc, #224] @ (8002150 ) - driving = 0; - 8002070: 703c strb r4, [r7, #0] - HAL_TIM_Base_Stop(&htim16); - 8002072: f001 fd43 bl 8003afc - HAL_TIM_Base_Stop(&htim17); - 8002076: 4839 ldr r0, [pc, #228] @ (800215c ) - 8002078: f001 fd40 bl 8003afc - sw1_pressed = 0; - 800207c: 4b51 ldr r3, [pc, #324] @ (80021c4 ) - 800207e: 701c strb r4, [r3, #0] - sw2_pressed = 0; - 8002080: 4b51 ldr r3, [pc, #324] @ (80021c8 ) - 8002082: 701c strb r4, [r3, #0] - sw1_long_handled = 0; - 8002084: 4b51 ldr r3, [pc, #324] @ (80021cc ) - 8002086: 701c strb r4, [r3, #0] - sw2_long_handled = 0; - 8002088: 4b51 ldr r3, [pc, #324] @ (80021d0 ) - 800208a: 701c strb r4, [r3, #0] - set_LED(0, 0, 0); 800208c: 0022 movs r2, r4 - set_LED(0, 0, 1); // Blue = tape mode 800208e: 0021 movs r1, r4 8002090: 0020 movs r0, r4 - 8002092: e038 b.n 8002106 - target_count = total_count - 10000; - 8002094: 494f ldr r1, [pc, #316] @ (80021d4 ) - 8002096: e7a0 b.n 8001fda - else if (both_pressed_handled) - 8002098: 4b4f ldr r3, [pc, #316] @ (80021d8 ) - 800209a: 469c mov ip, r3 - 800209c: 781b ldrb r3, [r3, #0] - 800209e: 2b00 cmp r3, #0 - 80020a0: d049 beq.n 8002136 - if (sw1_state && sw2_state) - 80020a2: 2e00 cmp r6, #0 - 80020a4: d016 beq.n 80020d4 - 80020a6: 2800 cmp r0, #0 - 80020a8: d014 beq.n 80020d4 - both_pressed_handled = 0; - 80020aa: 4663 mov r3, ip + 8002092: e780 b.n 8001f96 + if ((driving_direction && sw2_state) || (!driving_direction && sw1_state)) + 8002094: 2e00 cmp r6, #0 + 8002096: d0ae beq.n 8001ff6 + driving = 0; + 8002098: 2400 movs r4, #0 + halt_all(); + 800209a: f7fe fdb7 bl 8000c0c HAL_TIM_Base_Stop(&htim16); - 80020ac: 4828 ldr r0, [pc, #160] @ (8002150 ) - both_pressed_handled = 0; - 80020ae: 701c strb r4, [r3, #0] + 800209e: 4838 ldr r0, [pc, #224] @ (8002180 ) + driving = 0; + 80020a0: 703c strb r4, [r7, #0] HAL_TIM_Base_Stop(&htim16); - 80020b0: f001 fd24 bl 8003afc + 80020a2: f001 fd45 bl 8003b30 HAL_TIM_Base_Stop(&htim17); - 80020b4: 4829 ldr r0, [pc, #164] @ (800215c ) - 80020b6: f001 fd21 bl 8003afc - HAL_Delay(400); - 80020ba: 20c8 movs r0, #200 @ 0xc8 + 80020a6: 4839 ldr r0, [pc, #228] @ (800218c ) + 80020a8: f001 fd42 bl 8003b30 sw1_pressed = 0; - 80020bc: 4b41 ldr r3, [pc, #260] @ (80021c4 ) - HAL_Delay(400); - 80020be: 0040 lsls r0, r0, #1 - sw1_pressed = 0; - 80020c0: 701c strb r4, [r3, #0] + 80020ac: 4b51 ldr r3, [pc, #324] @ (80021f4 ) + 80020ae: 701c strb r4, [r3, #0] sw2_pressed = 0; - 80020c2: 4b41 ldr r3, [pc, #260] @ (80021c8 ) - 80020c4: 701c strb r4, [r3, #0] + 80020b0: 4b51 ldr r3, [pc, #324] @ (80021f8 ) + 80020b2: 701c strb r4, [r3, #0] sw1_long_handled = 0; - 80020c6: 4b41 ldr r3, [pc, #260] @ (80021cc ) - 80020c8: 701c strb r4, [r3, #0] + 80020b4: 4b51 ldr r3, [pc, #324] @ (80021fc ) + 80020b6: 701c strb r4, [r3, #0] sw2_long_handled = 0; - 80020ca: 4b41 ldr r3, [pc, #260] @ (80021d0 ) - 80020cc: 701c strb r4, [r3, #0] + 80020b8: 4b51 ldr r3, [pc, #324] @ (8002200 ) + 80020ba: 701c strb r4, [r3, #0] + set_LED(0, 0, 0); + 80020bc: 0022 movs r2, r4 + set_LED(0, 0, 1); // Blue = tape mode + 80020be: 0021 movs r1, r4 + 80020c0: 0020 movs r0, r4 + 80020c2: e038 b.n 8002136 + target_count = total_count - 10000; + 80020c4: 494f ldr r1, [pc, #316] @ (8002204 ) + 80020c6: e7a0 b.n 800200a + else if (both_pressed_handled) + 80020c8: 4b4f ldr r3, [pc, #316] @ (8002208 ) + 80020ca: 469c mov ip, r3 + 80020cc: 781b ldrb r3, [r3, #0] + 80020ce: 2b00 cmp r3, #0 + 80020d0: d049 beq.n 8002166 + if (sw1_state && sw2_state) + 80020d2: 2e00 cmp r6, #0 + 80020d4: d016 beq.n 8002104 + 80020d6: 2800 cmp r0, #0 + 80020d8: d014 beq.n 8002104 + both_pressed_handled = 0; + 80020da: 4663 mov r3, ip + HAL_TIM_Base_Stop(&htim16); + 80020dc: 4828 ldr r0, [pc, #160] @ (8002180 ) + both_pressed_handled = 0; + 80020de: 701c strb r4, [r3, #0] + HAL_TIM_Base_Stop(&htim16); + 80020e0: f001 fd26 bl 8003b30 + HAL_TIM_Base_Stop(&htim17); + 80020e4: 4829 ldr r0, [pc, #164] @ (800218c ) + 80020e6: f001 fd23 bl 8003b30 HAL_Delay(400); - 80020ce: f000 fc0d bl 80028ec - 80020d2: e7db b.n 800208c + 80020ea: 20c8 movs r0, #200 @ 0xc8 + sw1_pressed = 0; + 80020ec: 4b41 ldr r3, [pc, #260] @ (80021f4 ) + HAL_Delay(400); + 80020ee: 0040 lsls r0, r0, #1 + sw1_pressed = 0; + 80020f0: 701c strb r4, [r3, #0] + sw2_pressed = 0; + 80020f2: 4b41 ldr r3, [pc, #260] @ (80021f8 ) + 80020f4: 701c strb r4, [r3, #0] + sw1_long_handled = 0; + 80020f6: 4b41 ldr r3, [pc, #260] @ (80021fc ) + 80020f8: 701c strb r4, [r3, #0] + sw2_long_handled = 0; + 80020fa: 4b41 ldr r3, [pc, #260] @ (8002200 ) + 80020fc: 701c strb r4, [r3, #0] + HAL_Delay(400); + 80020fe: f000 fc0d bl 800291c + 8002102: e7db b.n 80020bc uint32_t hold_time = HAL_GetTick() - both_pressed_start; - 80020d4: f000 fc04 bl 80028e0 - 80020d8: 4b40 ldr r3, [pc, #256] @ (80021dc ) - 80020da: 681b ldr r3, [r3, #0] - 80020dc: 1ac0 subs r0, r0, r3 + 8002104: f000 fc04 bl 8002910 + 8002108: 4b40 ldr r3, [pc, #256] @ (800220c ) + 800210a: 681b ldr r3, [r3, #0] + 800210c: 1ac0 subs r0, r0, r3 if (hold_time > 2000 && hold_time < 2100) - 80020de: 4b40 ldr r3, [pc, #256] @ (80021e0 ) - 80020e0: 18c3 adds r3, r0, r3 - 80020e2: 2b62 cmp r3, #98 @ 0x62 - 80020e4: d802 bhi.n 80020ec + 800210e: 4b40 ldr r3, [pc, #256] @ (8002210 ) + 8002110: 18c3 adds r3, r0, r3 + 8002112: 2b62 cmp r3, #98 @ 0x62 + 8002114: d802 bhi.n 800211c show_version(); - 80020e6: f7fe fdc5 bl 8000c74 - 80020ea: e778 b.n 8001fde + 8002116: f7fe fdb1 bl 8000c7c + 800211a: e778 b.n 800200e else if (hold_time > 4000 && hold_time < 6000) - 80020ec: 4b3d ldr r3, [pc, #244] @ (80021e4 ) - 80020ee: 4a3e ldr r2, [pc, #248] @ (80021e8 ) - 80020f0: 18c3 adds r3, r0, r3 - 80020f2: 4293 cmp r3, r2 - 80020f4: d80a bhi.n 800210c + 800211c: 4b3d ldr r3, [pc, #244] @ (8002214 ) + 800211e: 4a3e ldr r2, [pc, #248] @ (8002218 ) + 8002120: 18c3 adds r3, r0, r3 + 8002122: 4293 cmp r3, r2 + 8002124: d80a bhi.n 800213c set_LED((hold_time / 100) % 2, 0, !((hold_time / 100) % 2)); - 80020f6: 2164 movs r1, #100 @ 0x64 - 80020f8: f7fe f81a bl 8000130 <__udivsi3> - 80020fc: 2301 movs r3, #1 - 80020fe: 001a movs r2, r3 - 8002100: 2100 movs r1, #0 - 8002102: 4382 bics r2, r0 - 8002104: 4018 ands r0, r3 + 8002126: 2164 movs r1, #100 @ 0x64 + 8002128: f7fe f802 bl 8000130 <__udivsi3> + 800212c: 2301 movs r3, #1 + 800212e: 001a movs r2, r3 + 8002130: 2100 movs r1, #0 + 8002132: 4382 bics r2, r0 + 8002134: 4018 ands r0, r3 if (!driving) set_LED(0, 0, 0); - 8002106: f7fe fcc9 bl 8000a9c - 800210a: e768 b.n 8001fde + 8002136: f7fe fcb1 bl 8000a9c + 800213a: e768 b.n 800200e else if (hold_time >= 6000) - 800210c: 4b37 ldr r3, [pc, #220] @ (80021ec ) - 800210e: 4298 cmp r0, r3 - 8002110: d800 bhi.n 8002114 - 8002112: e764 b.n 8001fde + 800213c: 4b37 ldr r3, [pc, #220] @ (800221c ) + 800213e: 4298 cmp r0, r3 + 8002140: d800 bhi.n 8002144 + 8002142: e764 b.n 800200e set_LED(1, 0, 1); - 8002114: 2201 movs r2, #1 - 8002116: 2100 movs r1, #0 - 8002118: 0010 movs r0, r2 - 800211a: f7fe fcbf bl 8000a9c + 8002144: 2201 movs r2, #1 + 8002146: 2100 movs r1, #0 + 8002148: 0010 movs r0, r2 + 800214a: f7fe fca7 bl 8000a9c HAL_Delay(100); - 800211e: 2064 movs r0, #100 @ 0x64 - 8002120: f000 fbe4 bl 80028ec + 800214e: 2064 movs r0, #100 @ 0x64 + 8002150: f000 fbe4 bl 800291c __ASM volatile ("dsb 0xF":::"memory"); - 8002124: f3bf 8f4f dsb sy + 8002154: f3bf 8f4f dsb sy */ __NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void) { __DSB(); /* Ensure all outstanding memory accesses included buffered write are completed before reset */ SCB->AIRCR = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - 8002128: 4b31 ldr r3, [pc, #196] @ (80021f0 ) - 800212a: 4a32 ldr r2, [pc, #200] @ (80021f4 ) - 800212c: 60da str r2, [r3, #12] - 800212e: f3bf 8f4f dsb sy + 8002158: 4b31 ldr r3, [pc, #196] @ (8002220 ) + 800215a: 4a32 ldr r2, [pc, #200] @ (8002224 ) + 800215c: 60da str r2, [r3, #12] + 800215e: f3bf 8f4f dsb sy SCB_AIRCR_SYSRESETREQ_Msk); __DSB(); /* Ensure completion of memory access */ for(;;) /* wait until reset */ { __NOP(); - 8002132: 46c0 nop @ (mov r8, r8) + 8002162: 46c0 nop @ (mov r8, r8) for(;;) /* wait until reset */ - 8002134: e7fd b.n 8002132 + 8002164: e7fd b.n 8002162 else if (sw1_pressed || sw2_pressed) - 8002136: 4a23 ldr r2, [pc, #140] @ (80021c4 ) - 8002138: 7814 ldrb r4, [r2, #0] - 800213a: 9201 str r2, [sp, #4] - 800213c: 4a22 ldr r2, [pc, #136] @ (80021c8 ) - 800213e: 7815 ldrb r5, [r2, #0] - 8002140: 2c00 cmp r4, #0 - 8002142: d159 bne.n 80021f8 - 8002144: 2d00 cmp r5, #0 - 8002146: d100 bne.n 800214a - 8002148: e749 b.n 8001fde + 8002166: 4a23 ldr r2, [pc, #140] @ (80021f4 ) + 8002168: 7814 ldrb r4, [r2, #0] + 800216a: 9201 str r2, [sp, #4] + 800216c: 4a22 ldr r2, [pc, #136] @ (80021f8 ) + 800216e: 7815 ldrb r5, [r2, #0] + 8002170: 2c00 cmp r4, #0 + 8002172: d159 bne.n 8002228 + 8002174: 2d00 cmp r5, #0 + 8002176: d100 bne.n 800217a + 8002178: e749 b.n 800200e uint16_t time1 = sw1_pressed ? htim16.Instance->CNT : 0; - 800214a: 0022 movs r2, r4 - 800214c: e05a b.n 8002204 - 800214e: 46c0 nop @ (mov r8, r8) - 8002150: 200011cc .word 0x200011cc - 8002154: 40014400 .word 0x40014400 - 8002158: 0000bb7f .word 0x0000bb7f - 800215c: 20001180 .word 0x20001180 - 8002160: 40014800 .word 0x40014800 - 8002164: 20001218 .word 0x20001218 - 8002168: 40002000 .word 0x40002000 - 800216c: 200012fc .word 0x200012fc - 8002170: 40012400 .word 0x40012400 - 8002174: 1c000080 .word 0x1c000080 - 8002178: 58400000 .word 0x58400000 - 800217c: 20000f87 .word 0x20000f87 - 8002180: 200012b0 .word 0x200012b0 - 8002184: 20000001 .word 0x20000001 - 8002188: 200000e8 .word 0x200000e8 - 800218c: 20000f50 .word 0x20000f50 - 8002190: 2000015a .word 0x2000015a - 8002194: 50000400 .word 0x50000400 - 8002198: 200000f4 .word 0x200000f4 - 800219c: 200000f3 .word 0x200000f3 - 80021a0: 200000f5 .word 0x200000f5 - 80021a4: 20000154 .word 0x20000154 - 80021a8: 20000150 .word 0x20000150 - 80021ac: 00002710 .word 0x00002710 - 80021b0: 20000120 .word 0x20000120 - 80021b4: 20000122 .word 0x20000122 - 80021b8: 20000f1a .word 0x20000f1a - 80021bc: 2000019a .word 0x2000019a - 80021c0: 20000020 .word 0x20000020 - 80021c4: 20000f9d .word 0x20000f9d - 80021c8: 20000f9c .word 0x20000f9c - 80021cc: 200000f2 .word 0x200000f2 - 80021d0: 200000f1 .word 0x200000f1 - 80021d4: ffffd8f0 .word 0xffffd8f0 - 80021d8: 200000f0 .word 0x200000f0 - 80021dc: 200000ec .word 0x200000ec - 80021e0: fffff82f .word 0xfffff82f - 80021e4: fffff05f .word 0xfffff05f - 80021e8: 000007ce .word 0x000007ce - 80021ec: 0000176f .word 0x0000176f - 80021f0: e000ed00 .word 0xe000ed00 - 80021f4: 05fa0004 .word 0x05fa0004 - 80021f8: 4a6a ldr r2, [pc, #424] @ (80023a4 ) - 80021fa: 6812 ldr r2, [r2, #0] - 80021fc: 6a52 ldr r2, [r2, #36] @ 0x24 - 80021fe: b292 uxth r2, r2 + 800217a: 0022 movs r2, r4 + 800217c: e05a b.n 8002234 + 800217e: 46c0 nop @ (mov r8, r8) + 8002180: 200011d0 .word 0x200011d0 + 8002184: 40014400 .word 0x40014400 + 8002188: 0000bb7f .word 0x0000bb7f + 800218c: 20001184 .word 0x20001184 + 8002190: 40014800 .word 0x40014800 + 8002194: 2000121c .word 0x2000121c + 8002198: 40002000 .word 0x40002000 + 800219c: 20001300 .word 0x20001300 + 80021a0: 40012400 .word 0x40012400 + 80021a4: 1c000080 .word 0x1c000080 + 80021a8: 58400000 .word 0x58400000 + 80021ac: 20000f8b .word 0x20000f8b + 80021b0: 200012b4 .word 0x200012b4 + 80021b4: 20000001 .word 0x20000001 + 80021b8: 200000ec .word 0x200000ec + 80021bc: 20000f54 .word 0x20000f54 + 80021c0: 2000015e .word 0x2000015e + 80021c4: 50000400 .word 0x50000400 + 80021c8: 200000f8 .word 0x200000f8 + 80021cc: 200000f7 .word 0x200000f7 + 80021d0: 200000f9 .word 0x200000f9 + 80021d4: 20000158 .word 0x20000158 + 80021d8: 20000154 .word 0x20000154 + 80021dc: 00002710 .word 0x00002710 + 80021e0: 20000124 .word 0x20000124 + 80021e4: 20000126 .word 0x20000126 + 80021e8: 20000f1e .word 0x20000f1e + 80021ec: 2000019e .word 0x2000019e + 80021f0: 20000024 .word 0x20000024 + 80021f4: 20000fa1 .word 0x20000fa1 + 80021f8: 20000fa0 .word 0x20000fa0 + 80021fc: 200000f6 .word 0x200000f6 + 8002200: 200000f5 .word 0x200000f5 + 8002204: ffffd8f0 .word 0xffffd8f0 + 8002208: 200000f4 .word 0x200000f4 + 800220c: 200000f0 .word 0x200000f0 + 8002210: fffff82f .word 0xfffff82f + 8002214: fffff05f .word 0xfffff05f + 8002218: 000007ce .word 0x000007ce + 800221c: 0000176f .word 0x0000176f + 8002220: e000ed00 .word 0xe000ed00 + 8002224: 05fa0004 .word 0x05fa0004 + 8002228: 4a6a ldr r2, [pc, #424] @ (80023d4 ) + 800222a: 6812 ldr r2, [r2, #0] + 800222c: 6a52 ldr r2, [r2, #36] @ 0x24 + 800222e: b292 uxth r2, r2 uint16_t time2 = sw2_pressed ? htim17.Instance->CNT : 0; - 8002200: 2d00 cmp r5, #0 - 8002202: d003 beq.n 800220c - 8002204: 4b68 ldr r3, [pc, #416] @ (80023a8 ) - 8002206: 681b ldr r3, [r3, #0] - 8002208: 6a5b ldr r3, [r3, #36] @ 0x24 - 800220a: b29b uxth r3, r3 + 8002230: 2d00 cmp r5, #0 + 8002232: d003 beq.n 800223c + 8002234: 4b68 ldr r3, [pc, #416] @ (80023d8 ) + 8002236: 681b ldr r3, [r3, #0] + 8002238: 6a5b ldr r3, [r3, #36] @ 0x24 + 800223a: b29b uxth r3, r3 uint16_t max_time = (time1 > time2) ? time1 : time2; - 800220c: 1c11 adds r1, r2, #0 - 800220e: 429a cmp r2, r3 - 8002210: d200 bcs.n 8002214 - 8002212: 1c19 adds r1, r3, #0 + 800223c: 1c11 adds r1, r2, #0 + 800223e: 429a cmp r2, r3 + 8002240: d200 bcs.n 8002244 + 8002242: 1c19 adds r1, r3, #0 if (max_time < 100) - 8002214: b289 uxth r1, r1 - 8002216: 2963 cmp r1, #99 @ 0x63 - 8002218: d800 bhi.n 800221c - 800221a: e6e0 b.n 8001fde + 8002244: b289 uxth r1, r1 + 8002246: 2963 cmp r1, #99 @ 0x63 + 8002248: d800 bhi.n 800224c + 800224a: e6e0 b.n 800200e else if (sw1_pressed && sw2_pressed && !sw1_state && !sw2_state) - 800221c: 2c00 cmp r4, #0 - 800221e: d061 beq.n 80022e4 - 8002220: 2d00 cmp r5, #0 - 8002222: d017 beq.n 8002254 - 8002224: 0034 movs r4, r6 - 8002226: 4304 orrs r4, r0 - 8002228: b2e4 uxtb r4, r4 - 800222a: 2c00 cmp r4, #0 - 800222c: d000 beq.n 8002230 - 800222e: e09f b.n 8002370 + 800224c: 2c00 cmp r4, #0 + 800224e: d061 beq.n 8002314 + 8002250: 2d00 cmp r5, #0 + 8002252: d017 beq.n 8002284 + 8002254: 0034 movs r4, r6 + 8002256: 4304 orrs r4, r0 + 8002258: b2e4 uxtb r4, r4 + 800225a: 2c00 cmp r4, #0 + 800225c: d000 beq.n 8002260 + 800225e: e09f b.n 80023a0 both_pressed_handled = 1; - 8002230: 4663 mov r3, ip - 8002232: 2501 movs r5, #1 - 8002234: 701d strb r5, [r3, #0] + 8002260: 4663 mov r3, ip + 8002262: 2501 movs r5, #1 + 8002264: 701d strb r5, [r3, #0] both_pressed_start = HAL_GetTick(); - 8002236: f000 fb53 bl 80028e0 - 800223a: 4b5c ldr r3, [pc, #368] @ (80023ac ) - 800223c: 6018 str r0, [r3, #0] + 8002266: f000 fb53 bl 8002910 + 800226a: 4b5c ldr r3, [pc, #368] @ (80023dc ) + 800226c: 6018 str r0, [r3, #0] if (drive_mode) - 800223e: 4b5c ldr r3, [pc, #368] @ (80023b0 ) - 8002240: 781a ldrb r2, [r3, #0] - 8002242: 2a00 cmp r2, #0 - 8002244: d002 beq.n 800224c + 800226e: 4b5c ldr r3, [pc, #368] @ (80023e0 ) + 8002270: 781a ldrb r2, [r3, #0] + 8002272: 2a00 cmp r2, #0 + 8002274: d002 beq.n 800227c set_LED(0, 0, 1); // Blue = tape mode - 8002246: 002a movs r2, r5 + 8002276: 002a movs r2, r5 drive_mode = 0; - 8002248: 701c strb r4, [r3, #0] + 8002278: 701c strb r4, [r3, #0] set_LED(0, 0, 1); // Blue = tape mode - 800224a: e720 b.n 800208e + 800227a: e720 b.n 80020be set_LED(1, 1, 0); // Yellow = peel mode - 800224c: 0029 movs r1, r5 - 800224e: 0028 movs r0, r5 + 800227c: 0029 movs r1, r5 + 800227e: 0028 movs r0, r5 drive_mode = 1; - 8002250: 701d strb r5, [r3, #0] + 8002280: 701d strb r5, [r3, #0] set_LED(1, 1, 0); // Yellow = peel mode - 8002252: e758 b.n 8002106 + 8002282: e758 b.n 8002136 if (!sw1_state && time1 > 2000 && !sw1_long_handled) - 8002254: 2e00 cmp r6, #0 - 8002256: d120 bne.n 800229a - 8002258: 23fa movs r3, #250 @ 0xfa - 800225a: 00db lsls r3, r3, #3 - 800225c: 429a cmp r2, r3 - 800225e: d800 bhi.n 8002262 - 8002260: e6bd b.n 8001fde - 8002262: 4b54 ldr r3, [pc, #336] @ (80023b4 ) - 8002264: 781a ldrb r2, [r3, #0] - 8002266: 2a00 cmp r2, #0 - 8002268: d000 beq.n 800226c - 800226a: e6b8 b.n 8001fde + 8002284: 2e00 cmp r6, #0 + 8002286: d120 bne.n 80022ca + 8002288: 23fa movs r3, #250 @ 0xfa + 800228a: 00db lsls r3, r3, #3 + 800228c: 429a cmp r2, r3 + 800228e: d800 bhi.n 8002292 + 8002290: e6bd b.n 800200e + 8002292: 4b54 ldr r3, [pc, #336] @ (80023e4 ) + 8002294: 781a ldrb r2, [r3, #0] + 8002296: 2a00 cmp r2, #0 + 8002298: d000 beq.n 800229c + 800229a: e6b8 b.n 800200e sw1_long_handled = 1; - 800226c: 2001 movs r0, #1 + 800229c: 2001 movs r0, #1 set_LED(1, 1, 1); - 800226e: 0002 movs r2, r0 - 8002270: 0001 movs r1, r0 + 800229e: 0002 movs r2, r0 + 80022a0: 0001 movs r1, r0 sw1_long_handled = 1; - 8002272: 7018 strb r0, [r3, #0] + 80022a2: 7018 strb r0, [r3, #0] set_LED(1, 1, 1); - 8002274: f7fe fc12 bl 8000a9c + 80022a4: f7fe fbfa bl 8000a9c if (drive_mode) - 8002278: 4b4d ldr r3, [pc, #308] @ (80023b0 ) - 800227a: 781b ldrb r3, [r3, #0] - 800227c: 2b00 cmp r3, #0 - 800227e: d008 beq.n 8002292 + 80022a8: 4b4d ldr r3, [pc, #308] @ (80023e0 ) + 80022aa: 781b ldrb r3, [r3, #0] + 80022ac: 2b00 cmp r3, #0 + 80022ae: d008 beq.n 80022c2 peel_target_pwm = forward ? PWM_MAX : -PWM_MAX; - 8002280: 4b4d ldr r3, [pc, #308] @ (80023b8 ) - 8002282: 4a4e ldr r2, [pc, #312] @ (80023bc ) - 8002284: 801a strh r2, [r3, #0] + 80022b0: 4b4d ldr r3, [pc, #308] @ (80023e8 ) + 80022b2: 4a4e ldr r2, [pc, #312] @ (80023ec ) + 80022b4: 801a strh r2, [r3, #0] driving = 1; - 8002286: 2301 movs r3, #1 + 80022b6: 2301 movs r3, #1 driving_direction = 0; - 8002288: 2200 movs r2, #0 + 80022b8: 2200 movs r2, #0 driving = 1; - 800228a: 703b strb r3, [r7, #0] + 80022ba: 703b strb r3, [r7, #0] driving_direction = 0; - 800228c: 4b4c ldr r3, [pc, #304] @ (80023c0 ) - 800228e: 701a strb r2, [r3, #0] - 8002290: e6a5 b.n 8001fde + 80022bc: 4b4c ldr r3, [pc, #304] @ (80023f0 ) + 80022be: 701a strb r2, [r3, #0] + 80022c0: e6a5 b.n 800200e drive_continuous(0); - 8002292: 0028 movs r0, r5 - 8002294: f7fe fca2 bl 8000bdc - 8002298: e7f5 b.n 8002286 + 80022c2: 0028 movs r0, r5 + 80022c4: f7fe fc8e bl 8000be4 + 80022c8: e7f5 b.n 80022b6 else if (sw1_state && time1 <= 2000 && time1 > 100) - 800229a: 3a65 subs r2, #101 @ 0x65 - 800229c: 4b49 ldr r3, [pc, #292] @ (80023c4 ) - 800229e: b292 uxth r2, r2 - 80022a0: 4e40 ldr r6, [pc, #256] @ (80023a4 ) - 80022a2: 4c44 ldr r4, [pc, #272] @ (80023b4 ) - 80022a4: 429a cmp r2, r3 - 80022a6: d80f bhi.n 80022c8 + 80022ca: 3a65 subs r2, #101 @ 0x65 + 80022cc: 4b49 ldr r3, [pc, #292] @ (80023f4 ) + 80022ce: b292 uxth r2, r2 + 80022d0: 4e40 ldr r6, [pc, #256] @ (80023d4 ) + 80022d2: 4c44 ldr r4, [pc, #272] @ (80023e4 ) + 80022d4: 429a cmp r2, r3 + 80022d6: d80f bhi.n 80022f8 set_LED(1, 1, 1); - 80022a8: 2201 movs r2, #1 - 80022aa: 0011 movs r1, r2 - 80022ac: 0010 movs r0, r2 - 80022ae: f7fe fbf5 bl 8000a9c + 80022d8: 2201 movs r2, #1 + 80022da: 0011 movs r1, r2 + 80022dc: 0010 movs r0, r2 + 80022de: f7fe fbdd bl 8000a9c start_feed(20, 0); - 80022b2: 0029 movs r1, r5 - 80022b4: 2014 movs r0, #20 - 80022b6: f7fe fcef bl 8000c98 + 80022e2: 0029 movs r1, r5 + 80022e4: 2014 movs r0, #20 + 80022e6: f7fe fcdb bl 8000ca0 HAL_TIM_Base_Stop(&htim16); - 80022ba: 0030 movs r0, r6 - 80022bc: f001 fc1e bl 8003afc + 80022ea: 0030 movs r0, r6 + 80022ec: f001 fc20 bl 8003b30 sw1_pressed = 0; - 80022c0: 4b41 ldr r3, [pc, #260] @ (80023c8 ) + 80022f0: 4b41 ldr r3, [pc, #260] @ (80023f8 ) sw1_long_handled = 0; - 80022c2: 7025 strb r5, [r4, #0] + 80022f2: 7025 strb r5, [r4, #0] sw1_pressed = 0; - 80022c4: 701d strb r5, [r3, #0] + 80022f4: 701d strb r5, [r3, #0] sw1_long_handled = 0; - 80022c6: e68a b.n 8001fde + 80022f6: e68a b.n 800200e HAL_TIM_Base_Stop(&htim16); - 80022c8: 0030 movs r0, r6 - 80022ca: f001 fc17 bl 8003afc + 80022f8: 0030 movs r0, r6 + 80022fa: f001 fc19 bl 8003b30 sw1_pressed = 0; - 80022ce: 9b01 ldr r3, [sp, #4] + 80022fe: 9b01 ldr r3, [sp, #4] sw1_long_handled = 0; - 80022d0: 7025 strb r5, [r4, #0] + 8002300: 7025 strb r5, [r4, #0] sw1_pressed = 0; - 80022d2: 701d strb r5, [r3, #0] + 8002302: 701d strb r5, [r3, #0] if (!driving) set_LED(0, 0, 0); - 80022d4: 783b ldrb r3, [r7, #0] - 80022d6: 2b00 cmp r3, #0 - 80022d8: d000 beq.n 80022dc - 80022da: e680 b.n 8001fde - 80022dc: 2200 movs r2, #0 - 80022de: 0011 movs r1, r2 - 80022e0: 0010 movs r0, r2 - 80022e2: e710 b.n 8002106 + 8002304: 783b ldrb r3, [r7, #0] + 8002306: 2b00 cmp r3, #0 + 8002308: d000 beq.n 800230c + 800230a: e680 b.n 800200e + 800230c: 2200 movs r2, #0 + 800230e: 0011 movs r1, r2 + 8002310: 0010 movs r0, r2 + 8002312: e710 b.n 8002136 else if (sw2_pressed && !sw1_pressed) - 80022e4: 2d00 cmp r5, #0 - 80022e6: d043 beq.n 8002370 + 8002314: 2d00 cmp r5, #0 + 8002316: d043 beq.n 80023a0 if (!sw2_state && time2 > 2000 && !sw2_long_handled) - 80022e8: 2800 cmp r0, #0 - 80022ea: d123 bne.n 8002334 - 80022ec: 22fa movs r2, #250 @ 0xfa - 80022ee: 00d2 lsls r2, r2, #3 - 80022f0: 4293 cmp r3, r2 - 80022f2: d800 bhi.n 80022f6 - 80022f4: e673 b.n 8001fde - 80022f6: 4b35 ldr r3, [pc, #212] @ (80023cc ) - 80022f8: 781a ldrb r2, [r3, #0] - 80022fa: 2a00 cmp r2, #0 - 80022fc: d000 beq.n 8002300 - 80022fe: e66e b.n 8001fde + 8002318: 2800 cmp r0, #0 + 800231a: d123 bne.n 8002364 + 800231c: 22fa movs r2, #250 @ 0xfa + 800231e: 00d2 lsls r2, r2, #3 + 8002320: 4293 cmp r3, r2 + 8002322: d800 bhi.n 8002326 + 8002324: e673 b.n 800200e + 8002326: 4b35 ldr r3, [pc, #212] @ (80023fc ) + 8002328: 781a ldrb r2, [r3, #0] + 800232a: 2a00 cmp r2, #0 + 800232c: d000 beq.n 8002330 + 800232e: e66e b.n 800200e sw2_long_handled = 1; - 8002300: 3001 adds r0, #1 + 8002330: 3001 adds r0, #1 set_LED(1, 1, 1); - 8002302: 0002 movs r2, r0 - 8002304: 0001 movs r1, r0 + 8002332: 0002 movs r2, r0 + 8002334: 0001 movs r1, r0 sw2_long_handled = 1; - 8002306: 7018 strb r0, [r3, #0] + 8002336: 7018 strb r0, [r3, #0] set_LED(1, 1, 1); - 8002308: f7fe fbc8 bl 8000a9c + 8002338: f7fe fbb0 bl 8000a9c if (drive_mode) - 800230c: 4b28 ldr r3, [pc, #160] @ (80023b0 ) - 800230e: 781b ldrb r3, [r3, #0] - 8002310: 2b00 cmp r3, #0 - 8002312: d008 beq.n 8002326 + 800233c: 4b28 ldr r3, [pc, #160] @ (80023e0 ) + 800233e: 781b ldrb r3, [r3, #0] + 8002340: 2b00 cmp r3, #0 + 8002342: d008 beq.n 8002356 peel_target_pwm = forward ? PWM_MAX : -PWM_MAX; - 8002314: 2296 movs r2, #150 @ 0x96 - 8002316: 4b28 ldr r3, [pc, #160] @ (80023b8 ) - 8002318: 0112 lsls r2, r2, #4 - 800231a: 801a strh r2, [r3, #0] + 8002344: 2296 movs r2, #150 @ 0x96 + 8002346: 4b28 ldr r3, [pc, #160] @ (80023e8 ) + 8002348: 0112 lsls r2, r2, #4 + 800234a: 801a strh r2, [r3, #0] driving = 1; - 800231c: 2301 movs r3, #1 + 800234c: 2301 movs r3, #1 driving_direction = 1; - 800231e: 4a28 ldr r2, [pc, #160] @ (80023c0 ) + 800234e: 4a28 ldr r2, [pc, #160] @ (80023f0 ) driving = 1; - 8002320: 703b strb r3, [r7, #0] + 8002350: 703b strb r3, [r7, #0] sw2_long_handled = 0; - 8002322: 7013 strb r3, [r2, #0] - 8002324: e65b b.n 8001fde + 8002352: 7013 strb r3, [r2, #0] + 8002354: e65b b.n 800200e target_count = total_count + 10000; - 8002326: 4b2a ldr r3, [pc, #168] @ (80023d0 ) - 8002328: 492a ldr r1, [pc, #168] @ (80023d4 ) - 800232a: 681b ldr r3, [r3, #0] - 800232c: 4a2a ldr r2, [pc, #168] @ (80023d8 ) - 800232e: 185b adds r3, r3, r1 - 8002330: 6013 str r3, [r2, #0] + 8002356: 4b2a ldr r3, [pc, #168] @ (8002400 ) + 8002358: 492a ldr r1, [pc, #168] @ (8002404 ) + 800235a: 681b ldr r3, [r3, #0] + 800235c: 4a2a ldr r2, [pc, #168] @ (8002408 ) + 800235e: 185b adds r3, r3, r1 + 8002360: 6013 str r3, [r2, #0] } - 8002332: e7f3 b.n 800231c - 8002334: 491c ldr r1, [pc, #112] @ (80023a8 ) + 8002362: e7f3 b.n 800234c + 8002364: 491c ldr r1, [pc, #112] @ (80023d8 ) else if (sw2_state && time2 <= 2000 && time2 > 100) - 8002336: 3b65 subs r3, #101 @ 0x65 - 8002338: 4a22 ldr r2, [pc, #136] @ (80023c4 ) - 800233a: b29b uxth r3, r3 - 800233c: 4e27 ldr r6, [pc, #156] @ (80023dc ) - 800233e: 4d23 ldr r5, [pc, #140] @ (80023cc ) - 8002340: 9101 str r1, [sp, #4] - 8002342: 4293 cmp r3, r2 - 8002344: d80e bhi.n 8002364 + 8002366: 3b65 subs r3, #101 @ 0x65 + 8002368: 4a22 ldr r2, [pc, #136] @ (80023f4 ) + 800236a: b29b uxth r3, r3 + 800236c: 4e27 ldr r6, [pc, #156] @ (800240c ) + 800236e: 4d23 ldr r5, [pc, #140] @ (80023fc ) + 8002370: 9101 str r1, [sp, #4] + 8002372: 4293 cmp r3, r2 + 8002374: d80e bhi.n 8002394 set_LED(1, 1, 1); - 8002346: 2201 movs r2, #1 - 8002348: 0011 movs r1, r2 - 800234a: 0010 movs r0, r2 - 800234c: f7fe fba6 bl 8000a9c + 8002376: 2201 movs r2, #1 + 8002378: 0011 movs r1, r2 + 800237a: 0010 movs r0, r2 + 800237c: f7fe fb8e bl 8000a9c start_feed(20, 1); - 8002350: 2101 movs r1, #1 - 8002352: 2014 movs r0, #20 - 8002354: f7fe fca0 bl 8000c98 + 8002380: 2101 movs r1, #1 + 8002382: 2014 movs r0, #20 + 8002384: f7fe fc8c bl 8000ca0 HAL_TIM_Base_Stop(&htim17); - 8002358: 9801 ldr r0, [sp, #4] - 800235a: f001 fbcf bl 8003afc + 8002388: 9801 ldr r0, [sp, #4] + 800238a: f001 fbd1 bl 8003b30 sw2_pressed = 0; - 800235e: 7034 strb r4, [r6, #0] + 800238e: 7034 strb r4, [r6, #0] sw2_long_handled = 0; - 8002360: 702c strb r4, [r5, #0] - 8002362: e63c b.n 8001fde + 8002390: 702c strb r4, [r5, #0] + 8002392: e63c b.n 800200e HAL_TIM_Base_Stop(&htim17); - 8002364: 9801 ldr r0, [sp, #4] - 8002366: f001 fbc9 bl 8003afc + 8002394: 9801 ldr r0, [sp, #4] + 8002396: f001 fbcb bl 8003b30 sw2_pressed = 0; - 800236a: 7034 strb r4, [r6, #0] + 800239a: 7034 strb r4, [r6, #0] sw2_long_handled = 0; - 800236c: 702c strb r4, [r5, #0] + 800239c: 702c strb r4, [r5, #0] if (!driving) set_LED(0, 0, 0); - 800236e: e7b1 b.n 80022d4 + 800239e: e7b1 b.n 8002304 else if (sw1_state && sw2_state) - 8002370: 2e00 cmp r6, #0 - 8002372: d100 bne.n 8002376 - 8002374: e633 b.n 8001fde - 8002376: 2800 cmp r0, #0 - 8002378: d100 bne.n 800237c - 800237a: e630 b.n 8001fde + 80023a0: 2e00 cmp r6, #0 + 80023a2: d100 bne.n 80023a6 + 80023a4: e633 b.n 800200e + 80023a6: 2800 cmp r0, #0 + 80023a8: d100 bne.n 80023ac + 80023aa: e630 b.n 800200e HAL_TIM_Base_Stop(&htim16); - 800237c: 4809 ldr r0, [pc, #36] @ (80023a4 ) - 800237e: f001 fbbd bl 8003afc + 80023ac: 4809 ldr r0, [pc, #36] @ (80023d4 ) + 80023ae: f001 fbbf bl 8003b30 HAL_TIM_Base_Stop(&htim17); - 8002382: 4809 ldr r0, [pc, #36] @ (80023a8 ) - 8002384: f001 fbba bl 8003afc + 80023b2: 4809 ldr r0, [pc, #36] @ (80023d8 ) + 80023b4: f001 fbbc bl 8003b30 sw1_pressed = 0; - 8002388: 2300 movs r3, #0 - 800238a: 9a01 ldr r2, [sp, #4] - 800238c: 7013 strb r3, [r2, #0] + 80023b8: 2300 movs r3, #0 + 80023ba: 9a01 ldr r2, [sp, #4] + 80023bc: 7013 strb r3, [r2, #0] sw2_pressed = 0; - 800238e: 4a13 ldr r2, [pc, #76] @ (80023dc ) - 8002390: 7013 strb r3, [r2, #0] + 80023be: 4a13 ldr r2, [pc, #76] @ (800240c ) + 80023c0: 7013 strb r3, [r2, #0] sw1_long_handled = 0; - 8002392: 4a08 ldr r2, [pc, #32] @ (80023b4 ) - 8002394: 7013 strb r3, [r2, #0] + 80023c2: 4a08 ldr r2, [pc, #32] @ (80023e4 ) + 80023c4: 7013 strb r3, [r2, #0] sw2_long_handled = 0; - 8002396: 4a0d ldr r2, [pc, #52] @ (80023cc ) - 8002398: e7c3 b.n 8002322 + 80023c6: 4a0d ldr r2, [pc, #52] @ (80023fc ) + 80023c8: e7c3 b.n 8002352 set_LED(1, 0, 0); // Error - LED red - 800239a: 000a movs r2, r1 - 800239c: 2001 movs r0, #1 - 800239e: f7fe fb7d bl 8000a9c - 80023a2: e633 b.n 800200c - 80023a4: 200011cc .word 0x200011cc - 80023a8: 20001180 .word 0x20001180 - 80023ac: 200000ec .word 0x200000ec - 80023b0: 200000f5 .word 0x200000f5 - 80023b4: 200000f2 .word 0x200000f2 - 80023b8: 200000fe .word 0x200000fe - 80023bc: fffff6a0 .word 0xfffff6a0 - 80023c0: 200000f3 .word 0x200000f3 - 80023c4: 0000076b .word 0x0000076b - 80023c8: 20000f9d .word 0x20000f9d - 80023cc: 200000f1 .word 0x200000f1 - 80023d0: 20000154 .word 0x20000154 - 80023d4: 00002710 .word 0x00002710 - 80023d8: 20000150 .word 0x20000150 - 80023dc: 20000f9c .word 0x20000f9c + 80023ca: 000a movs r2, r1 + 80023cc: 2001 movs r0, #1 + 80023ce: f7fe fb65 bl 8000a9c + 80023d2: e633 b.n 800203c + 80023d4: 200011d0 .word 0x200011d0 + 80023d8: 20001184 .word 0x20001184 + 80023dc: 200000f0 .word 0x200000f0 + 80023e0: 200000f9 .word 0x200000f9 + 80023e4: 200000f6 .word 0x200000f6 + 80023e8: 20000102 .word 0x20000102 + 80023ec: fffff6a0 .word 0xfffff6a0 + 80023f0: 200000f7 .word 0x200000f7 + 80023f4: 0000076b .word 0x0000076b + 80023f8: 20000fa1 .word 0x20000fa1 + 80023fc: 200000f5 .word 0x200000f5 + 8002400: 20000158 .word 0x20000158 + 8002404: 00002710 .word 0x00002710 + 8002408: 20000154 .word 0x20000154 + 800240c: 20000fa0 .word 0x20000fa0 -080023e0 : +08002410 : __ASM volatile ("cpsid i" : : : "memory"); - 80023e0: b672 cpsid i + 8002410: b672 cpsid i while (1) - 80023e2: e7fe b.n 80023e2 + 8002412: e7fe b.n 8002412 -080023e4 : +08002414 : /* USER CODE BEGIN MspInit 0 */ /* USER CODE END MspInit 0 */ __HAL_RCC_SYSCFG_CLK_ENABLE(); - 80023e4: 2101 movs r1, #1 - 80023e6: 4b0a ldr r3, [pc, #40] @ (8002410 ) + 8002414: 2101 movs r1, #1 + 8002416: 4b0a ldr r3, [pc, #40] @ (8002440 ) { - 80023e8: b082 sub sp, #8 + 8002418: b082 sub sp, #8 __HAL_RCC_SYSCFG_CLK_ENABLE(); - 80023ea: 6c1a ldr r2, [r3, #64] @ 0x40 - 80023ec: 430a orrs r2, r1 - 80023ee: 641a str r2, [r3, #64] @ 0x40 - 80023f0: 6c1a ldr r2, [r3, #64] @ 0x40 - 80023f2: 400a ands r2, r1 + 800241a: 6c1a ldr r2, [r3, #64] @ 0x40 + 800241c: 430a orrs r2, r1 + 800241e: 641a str r2, [r3, #64] @ 0x40 + 8002420: 6c1a ldr r2, [r3, #64] @ 0x40 + 8002422: 400a ands r2, r1 __HAL_RCC_PWR_CLK_ENABLE(); - 80023f4: 2180 movs r1, #128 @ 0x80 + 8002424: 2180 movs r1, #128 @ 0x80 __HAL_RCC_SYSCFG_CLK_ENABLE(); - 80023f6: 9200 str r2, [sp, #0] - 80023f8: 9a00 ldr r2, [sp, #0] + 8002426: 9200 str r2, [sp, #0] + 8002428: 9a00 ldr r2, [sp, #0] __HAL_RCC_PWR_CLK_ENABLE(); - 80023fa: 6bda ldr r2, [r3, #60] @ 0x3c - 80023fc: 0549 lsls r1, r1, #21 - 80023fe: 430a orrs r2, r1 - 8002400: 63da str r2, [r3, #60] @ 0x3c - 8002402: 6bdb ldr r3, [r3, #60] @ 0x3c - 8002404: 400b ands r3, r1 - 8002406: 9301 str r3, [sp, #4] - 8002408: 9b01 ldr r3, [sp, #4] + 800242a: 6bda ldr r2, [r3, #60] @ 0x3c + 800242c: 0549 lsls r1, r1, #21 + 800242e: 430a orrs r2, r1 + 8002430: 63da str r2, [r3, #60] @ 0x3c + 8002432: 6bdb ldr r3, [r3, #60] @ 0x3c + 8002434: 400b ands r3, r1 + 8002436: 9301 str r3, [sp, #4] + 8002438: 9b01 ldr r3, [sp, #4] /* System interrupt init*/ /* USER CODE BEGIN MspInit 1 */ /* USER CODE END MspInit 1 */ } - 800240a: b002 add sp, #8 - 800240c: 4770 bx lr - 800240e: 46c0 nop @ (mov r8, r8) - 8002410: 40021000 .word 0x40021000 + 800243a: b002 add sp, #8 + 800243c: 4770 bx lr + 800243e: 46c0 nop @ (mov r8, r8) + 8002440: 40021000 .word 0x40021000 -08002414 : +08002444 : * This function configures the hardware resources used in this example * @param hadc: ADC handle pointer * @retval None */ void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc) { - 8002414: b530 push {r4, r5, lr} - 8002416: 0004 movs r4, r0 - 8002418: b091 sub sp, #68 @ 0x44 + 8002444: b530 push {r4, r5, lr} + 8002446: 0004 movs r4, r0 + 8002448: b091 sub sp, #68 @ 0x44 GPIO_InitTypeDef GPIO_InitStruct = {0}; - 800241a: 2214 movs r2, #20 - 800241c: 2100 movs r1, #0 - 800241e: a804 add r0, sp, #16 - 8002420: f002 feb4 bl 800518c + 800244a: 2214 movs r2, #20 + 800244c: 2100 movs r1, #0 + 800244e: a804 add r0, sp, #16 + 8002450: f002 ff16 bl 8005280 RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; - 8002424: 221c movs r2, #28 - 8002426: 2100 movs r1, #0 - 8002428: a809 add r0, sp, #36 @ 0x24 - 800242a: f002 feaf bl 800518c + 8002454: 221c movs r2, #28 + 8002456: 2100 movs r1, #0 + 8002458: a809 add r0, sp, #36 @ 0x24 + 800245a: f002 ff11 bl 8005280 if(hadc->Instance==ADC1) - 800242e: 4b1e ldr r3, [pc, #120] @ (80024a8 ) - 8002430: 6822 ldr r2, [r4, #0] - 8002432: 429a cmp r2, r3 - 8002434: d136 bne.n 80024a4 + 800245e: 4b1e ldr r3, [pc, #120] @ (80024d8 ) + 8002460: 6822 ldr r2, [r4, #0] + 8002462: 429a cmp r2, r3 + 8002464: d136 bne.n 80024d4 /* USER CODE END ADC1_MspInit 0 */ /** Initializes the peripherals clocks */ PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC; - 8002436: 2320 movs r3, #32 + 8002466: 2320 movs r3, #32 PeriphClkInit.AdcClockSelection = RCC_ADCCLKSOURCE_SYSCLK; if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) - 8002438: a809 add r0, sp, #36 @ 0x24 + 8002468: a809 add r0, sp, #36 @ 0x24 PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC; - 800243a: 9309 str r3, [sp, #36] @ 0x24 + 800246a: 9309 str r3, [sp, #36] @ 0x24 if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) - 800243c: f001 f9c4 bl 80037c8 - 8002440: 2800 cmp r0, #0 - 8002442: d001 beq.n 8002448 + 800246c: f001 f9c6 bl 80037fc + 8002470: 2800 cmp r0, #0 + 8002472: d001 beq.n 8002478 { Error_Handler(); - 8002444: f7ff ffcc bl 80023e0 + 8002474: f7ff ffcc bl 8002410 } /* Peripheral clock enable */ __HAL_RCC_ADC_CLK_ENABLE(); - 8002448: 2180 movs r1, #128 @ 0x80 - 800244a: 4b18 ldr r3, [pc, #96] @ (80024ac ) - 800244c: 0349 lsls r1, r1, #13 - 800244e: 6c1a ldr r2, [r3, #64] @ 0x40 + 8002478: 2180 movs r1, #128 @ 0x80 + 800247a: 4b18 ldr r3, [pc, #96] @ (80024dc ) + 800247c: 0349 lsls r1, r1, #13 + 800247e: 6c1a ldr r2, [r3, #64] @ 0x40 PB12 ------> ADC1_IN22 */ GPIO_InitStruct.Pin = IPROP_PEEL_Pin; GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; GPIO_InitStruct.Pull = GPIO_NOPULL; HAL_GPIO_Init(IPROP_PEEL_GPIO_Port, &GPIO_InitStruct); - 8002450: 20a0 movs r0, #160 @ 0xa0 + 8002480: 20a0 movs r0, #160 @ 0xa0 __HAL_RCC_ADC_CLK_ENABLE(); - 8002452: 430a orrs r2, r1 - 8002454: 641a str r2, [r3, #64] @ 0x40 - 8002456: 6c1a ldr r2, [r3, #64] @ 0x40 + 8002482: 430a orrs r2, r1 + 8002484: 641a str r2, [r3, #64] @ 0x40 + 8002486: 6c1a ldr r2, [r3, #64] @ 0x40 GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; - 8002458: 2503 movs r5, #3 + 8002488: 2503 movs r5, #3 __HAL_RCC_ADC_CLK_ENABLE(); - 800245a: 400a ands r2, r1 + 800248a: 400a ands r2, r1 __HAL_RCC_GPIOA_CLK_ENABLE(); - 800245c: 2101 movs r1, #1 + 800248c: 2101 movs r1, #1 __HAL_RCC_ADC_CLK_ENABLE(); - 800245e: 9201 str r2, [sp, #4] - 8002460: 9a01 ldr r2, [sp, #4] + 800248e: 9201 str r2, [sp, #4] + 8002490: 9a01 ldr r2, [sp, #4] __HAL_RCC_GPIOA_CLK_ENABLE(); - 8002462: 6b5a ldr r2, [r3, #52] @ 0x34 + 8002492: 6b5a ldr r2, [r3, #52] @ 0x34 GPIO_InitStruct.Pull = GPIO_NOPULL; - 8002464: 2400 movs r4, #0 + 8002494: 2400 movs r4, #0 __HAL_RCC_GPIOA_CLK_ENABLE(); - 8002466: 430a orrs r2, r1 - 8002468: 635a str r2, [r3, #52] @ 0x34 - 800246a: 6b5a ldr r2, [r3, #52] @ 0x34 + 8002496: 430a orrs r2, r1 + 8002498: 635a str r2, [r3, #52] @ 0x34 + 800249a: 6b5a ldr r2, [r3, #52] @ 0x34 HAL_GPIO_Init(IPROP_PEEL_GPIO_Port, &GPIO_InitStruct); - 800246c: 05c0 lsls r0, r0, #23 + 800249c: 05c0 lsls r0, r0, #23 __HAL_RCC_GPIOA_CLK_ENABLE(); - 800246e: 400a ands r2, r1 - 8002470: 9202 str r2, [sp, #8] - 8002472: 9a02 ldr r2, [sp, #8] + 800249e: 400a ands r2, r1 + 80024a0: 9202 str r2, [sp, #8] + 80024a2: 9a02 ldr r2, [sp, #8] __HAL_RCC_GPIOB_CLK_ENABLE(); - 8002474: 6b5a ldr r2, [r3, #52] @ 0x34 - 8002476: 1849 adds r1, r1, r1 - 8002478: 430a orrs r2, r1 - 800247a: 635a str r2, [r3, #52] @ 0x34 - 800247c: 6b5b ldr r3, [r3, #52] @ 0x34 + 80024a4: 6b5a ldr r2, [r3, #52] @ 0x34 + 80024a6: 1849 adds r1, r1, r1 + 80024a8: 430a orrs r2, r1 + 80024aa: 635a str r2, [r3, #52] @ 0x34 + 80024ac: 6b5b ldr r3, [r3, #52] @ 0x34 GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; - 800247e: 9505 str r5, [sp, #20] + 80024ae: 9505 str r5, [sp, #20] __HAL_RCC_GPIOB_CLK_ENABLE(); - 8002480: 400b ands r3, r1 - 8002482: 9303 str r3, [sp, #12] - 8002484: 9b03 ldr r3, [sp, #12] + 80024b0: 400b ands r3, r1 + 80024b2: 9303 str r3, [sp, #12] + 80024b4: 9b03 ldr r3, [sp, #12] GPIO_InitStruct.Pin = IPROP_PEEL_Pin; - 8002486: 2380 movs r3, #128 @ 0x80 + 80024b6: 2380 movs r3, #128 @ 0x80 HAL_GPIO_Init(IPROP_PEEL_GPIO_Port, &GPIO_InitStruct); - 8002488: a904 add r1, sp, #16 + 80024b8: a904 add r1, sp, #16 GPIO_InitStruct.Pin = IPROP_PEEL_Pin; - 800248a: 9304 str r3, [sp, #16] + 80024ba: 9304 str r3, [sp, #16] GPIO_InitStruct.Pull = GPIO_NOPULL; - 800248c: 9406 str r4, [sp, #24] + 80024bc: 9406 str r4, [sp, #24] HAL_GPIO_Init(IPROP_PEEL_GPIO_Port, &GPIO_InitStruct); - 800248e: f000 fe81 bl 8003194 + 80024be: f000 fe83 bl 80031c8 GPIO_InitStruct.Pin = IPROP_DRIVE_Pin; - 8002492: 2380 movs r3, #128 @ 0x80 + 80024c2: 2380 movs r3, #128 @ 0x80 GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; GPIO_InitStruct.Pull = GPIO_NOPULL; HAL_GPIO_Init(IPROP_DRIVE_GPIO_Port, &GPIO_InitStruct); - 8002494: 4806 ldr r0, [pc, #24] @ (80024b0 ) + 80024c4: 4806 ldr r0, [pc, #24] @ (80024e0 ) GPIO_InitStruct.Pin = IPROP_DRIVE_Pin; - 8002496: 015b lsls r3, r3, #5 + 80024c6: 015b lsls r3, r3, #5 HAL_GPIO_Init(IPROP_DRIVE_GPIO_Port, &GPIO_InitStruct); - 8002498: a904 add r1, sp, #16 + 80024c8: a904 add r1, sp, #16 GPIO_InitStruct.Pin = IPROP_DRIVE_Pin; - 800249a: 9304 str r3, [sp, #16] + 80024ca: 9304 str r3, [sp, #16] GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; - 800249c: 9505 str r5, [sp, #20] + 80024cc: 9505 str r5, [sp, #20] GPIO_InitStruct.Pull = GPIO_NOPULL; - 800249e: 9406 str r4, [sp, #24] + 80024ce: 9406 str r4, [sp, #24] HAL_GPIO_Init(IPROP_DRIVE_GPIO_Port, &GPIO_InitStruct); - 80024a0: f000 fe78 bl 8003194 + 80024d0: f000 fe7a bl 80031c8 /* USER CODE END ADC1_MspInit 1 */ } } - 80024a4: b011 add sp, #68 @ 0x44 - 80024a6: bd30 pop {r4, r5, pc} - 80024a8: 40012400 .word 0x40012400 - 80024ac: 40021000 .word 0x40021000 - 80024b0: 50000400 .word 0x50000400 + 80024d4: b011 add sp, #68 @ 0x44 + 80024d6: bd30 pop {r4, r5, pc} + 80024d8: 40012400 .word 0x40012400 + 80024dc: 40021000 .word 0x40021000 + 80024e0: 50000400 .word 0x50000400 -080024b4 : +080024e4 : * This function configures the hardware resources used in this example * @param htim_base: TIM_Base handle pointer * @retval None */ void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base) { - 80024b4: b51f push {r0, r1, r2, r3, r4, lr} + 80024e4: b51f push {r0, r1, r2, r3, r4, lr} if(htim_base->Instance==TIM1) - 80024b6: 6803 ldr r3, [r0, #0] - 80024b8: 4a26 ldr r2, [pc, #152] @ (8002554 ) - 80024ba: 4293 cmp r3, r2 - 80024bc: d10b bne.n 80024d6 + 80024e6: 6803 ldr r3, [r0, #0] + 80024e8: 4a26 ldr r2, [pc, #152] @ (8002584 ) + 80024ea: 4293 cmp r3, r2 + 80024ec: d10b bne.n 8002506 { /* USER CODE BEGIN TIM1_MspInit 0 */ /* USER CODE END TIM1_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_TIM1_CLK_ENABLE(); - 80024be: 2180 movs r1, #128 @ 0x80 - 80024c0: 4b25 ldr r3, [pc, #148] @ (8002558 ) - 80024c2: 0109 lsls r1, r1, #4 - 80024c4: 6c1a ldr r2, [r3, #64] @ 0x40 - 80024c6: 430a orrs r2, r1 - 80024c8: 641a str r2, [r3, #64] @ 0x40 - 80024ca: 6c1b ldr r3, [r3, #64] @ 0x40 - 80024cc: 400b ands r3, r1 - 80024ce: 9300 str r3, [sp, #0] - 80024d0: 9b00 ldr r3, [sp, #0] + 80024ee: 2180 movs r1, #128 @ 0x80 + 80024f0: 4b25 ldr r3, [pc, #148] @ (8002588 ) + 80024f2: 0109 lsls r1, r1, #4 + 80024f4: 6c1a ldr r2, [r3, #64] @ 0x40 + 80024f6: 430a orrs r2, r1 + 80024f8: 641a str r2, [r3, #64] @ 0x40 + 80024fa: 6c1b ldr r3, [r3, #64] @ 0x40 + 80024fc: 400b ands r3, r1 + 80024fe: 9300 str r3, [sp, #0] + 8002500: 9b00 ldr r3, [sp, #0] /* USER CODE BEGIN TIM17_MspInit 1 */ /* USER CODE END TIM17_MspInit 1 */ } } - 80024d2: b005 add sp, #20 - 80024d4: bd00 pop {pc} + 8002502: b005 add sp, #20 + 8002504: bd00 pop {pc} else if(htim_base->Instance==TIM14) - 80024d6: 4a21 ldr r2, [pc, #132] @ (800255c ) - 80024d8: 4293 cmp r3, r2 - 80024da: d112 bne.n 8002502 + 8002506: 4a21 ldr r2, [pc, #132] @ (800258c ) + 8002508: 4293 cmp r3, r2 + 800250a: d112 bne.n 8002532 __HAL_RCC_TIM14_CLK_ENABLE(); - 80024dc: 2180 movs r1, #128 @ 0x80 - 80024de: 4b1e ldr r3, [pc, #120] @ (8002558 ) - 80024e0: 0209 lsls r1, r1, #8 - 80024e2: 6c1a ldr r2, [r3, #64] @ 0x40 + 800250c: 2180 movs r1, #128 @ 0x80 + 800250e: 4b1e ldr r3, [pc, #120] @ (8002588 ) + 8002510: 0209 lsls r1, r1, #8 + 8002512: 6c1a ldr r2, [r3, #64] @ 0x40 HAL_NVIC_SetPriority(TIM14_IRQn, 0, 0); - 80024e4: 2013 movs r0, #19 + 8002514: 2013 movs r0, #19 __HAL_RCC_TIM14_CLK_ENABLE(); - 80024e6: 430a orrs r2, r1 - 80024e8: 641a str r2, [r3, #64] @ 0x40 + 8002516: 430a orrs r2, r1 + 8002518: 641a str r2, [r3, #64] @ 0x40 HAL_NVIC_SetPriority(TIM14_IRQn, 0, 0); - 80024ea: 2200 movs r2, #0 + 800251a: 2200 movs r2, #0 __HAL_RCC_TIM14_CLK_ENABLE(); - 80024ec: 6c1b ldr r3, [r3, #64] @ 0x40 - 80024ee: 400b ands r3, r1 - 80024f0: 9301 str r3, [sp, #4] + 800251c: 6c1b ldr r3, [r3, #64] @ 0x40 + 800251e: 400b ands r3, r1 + 8002520: 9301 str r3, [sp, #4] HAL_NVIC_SetPriority(TIM14_IRQn, 0, 0); - 80024f2: 0011 movs r1, r2 + 8002522: 0011 movs r1, r2 __HAL_RCC_TIM14_CLK_ENABLE(); - 80024f4: 9b01 ldr r3, [sp, #4] + 8002524: 9b01 ldr r3, [sp, #4] HAL_NVIC_SetPriority(TIM14_IRQn, 0, 0); - 80024f6: f000 fc55 bl 8002da4 + 8002526: f000 fc55 bl 8002dd4 HAL_NVIC_EnableIRQ(TIM14_IRQn); - 80024fa: 2013 movs r0, #19 + 800252a: 2013 movs r0, #19 HAL_NVIC_EnableIRQ(TIM17_IRQn); - 80024fc: f000 fc7c bl 8002df8 + 800252c: f000 fc7c bl 8002e28 } - 8002500: e7e7 b.n 80024d2 + 8002530: e7e7 b.n 8002502 else if(htim_base->Instance==TIM16) - 8002502: 4a17 ldr r2, [pc, #92] @ (8002560 ) - 8002504: 4293 cmp r3, r2 - 8002506: d110 bne.n 800252a + 8002532: 4a17 ldr r2, [pc, #92] @ (8002590 ) + 8002534: 4293 cmp r3, r2 + 8002536: d110 bne.n 800255a __HAL_RCC_TIM16_CLK_ENABLE(); - 8002508: 2180 movs r1, #128 @ 0x80 - 800250a: 4b13 ldr r3, [pc, #76] @ (8002558 ) - 800250c: 0289 lsls r1, r1, #10 - 800250e: 6c1a ldr r2, [r3, #64] @ 0x40 + 8002538: 2180 movs r1, #128 @ 0x80 + 800253a: 4b13 ldr r3, [pc, #76] @ (8002588 ) + 800253c: 0289 lsls r1, r1, #10 + 800253e: 6c1a ldr r2, [r3, #64] @ 0x40 HAL_NVIC_SetPriority(TIM16_IRQn, 0, 0); - 8002510: 2015 movs r0, #21 + 8002540: 2015 movs r0, #21 __HAL_RCC_TIM16_CLK_ENABLE(); - 8002512: 430a orrs r2, r1 - 8002514: 641a str r2, [r3, #64] @ 0x40 + 8002542: 430a orrs r2, r1 + 8002544: 641a str r2, [r3, #64] @ 0x40 HAL_NVIC_SetPriority(TIM16_IRQn, 0, 0); - 8002516: 2200 movs r2, #0 + 8002546: 2200 movs r2, #0 __HAL_RCC_TIM16_CLK_ENABLE(); - 8002518: 6c1b ldr r3, [r3, #64] @ 0x40 - 800251a: 400b ands r3, r1 - 800251c: 9302 str r3, [sp, #8] + 8002548: 6c1b ldr r3, [r3, #64] @ 0x40 + 800254a: 400b ands r3, r1 + 800254c: 9302 str r3, [sp, #8] HAL_NVIC_SetPriority(TIM16_IRQn, 0, 0); - 800251e: 0011 movs r1, r2 + 800254e: 0011 movs r1, r2 __HAL_RCC_TIM16_CLK_ENABLE(); - 8002520: 9b02 ldr r3, [sp, #8] + 8002550: 9b02 ldr r3, [sp, #8] HAL_NVIC_SetPriority(TIM16_IRQn, 0, 0); - 8002522: f000 fc3f bl 8002da4 + 8002552: f000 fc3f bl 8002dd4 HAL_NVIC_EnableIRQ(TIM16_IRQn); - 8002526: 2015 movs r0, #21 - 8002528: e7e8 b.n 80024fc + 8002556: 2015 movs r0, #21 + 8002558: e7e8 b.n 800252c else if(htim_base->Instance==TIM17) - 800252a: 4a0e ldr r2, [pc, #56] @ (8002564 ) - 800252c: 4293 cmp r3, r2 - 800252e: d1d0 bne.n 80024d2 + 800255a: 4a0e ldr r2, [pc, #56] @ (8002594 ) + 800255c: 4293 cmp r3, r2 + 800255e: d1d0 bne.n 8002502 __HAL_RCC_TIM17_CLK_ENABLE(); - 8002530: 2180 movs r1, #128 @ 0x80 - 8002532: 4b09 ldr r3, [pc, #36] @ (8002558 ) - 8002534: 02c9 lsls r1, r1, #11 - 8002536: 6c1a ldr r2, [r3, #64] @ 0x40 + 8002560: 2180 movs r1, #128 @ 0x80 + 8002562: 4b09 ldr r3, [pc, #36] @ (8002588 ) + 8002564: 02c9 lsls r1, r1, #11 + 8002566: 6c1a ldr r2, [r3, #64] @ 0x40 HAL_NVIC_SetPriority(TIM17_IRQn, 0, 0); - 8002538: 2016 movs r0, #22 + 8002568: 2016 movs r0, #22 __HAL_RCC_TIM17_CLK_ENABLE(); - 800253a: 430a orrs r2, r1 - 800253c: 641a str r2, [r3, #64] @ 0x40 + 800256a: 430a orrs r2, r1 + 800256c: 641a str r2, [r3, #64] @ 0x40 HAL_NVIC_SetPriority(TIM17_IRQn, 0, 0); - 800253e: 2200 movs r2, #0 + 800256e: 2200 movs r2, #0 __HAL_RCC_TIM17_CLK_ENABLE(); - 8002540: 6c1b ldr r3, [r3, #64] @ 0x40 - 8002542: 400b ands r3, r1 - 8002544: 9303 str r3, [sp, #12] + 8002570: 6c1b ldr r3, [r3, #64] @ 0x40 + 8002572: 400b ands r3, r1 + 8002574: 9303 str r3, [sp, #12] HAL_NVIC_SetPriority(TIM17_IRQn, 0, 0); - 8002546: 0011 movs r1, r2 + 8002576: 0011 movs r1, r2 __HAL_RCC_TIM17_CLK_ENABLE(); - 8002548: 9b03 ldr r3, [sp, #12] + 8002578: 9b03 ldr r3, [sp, #12] HAL_NVIC_SetPriority(TIM17_IRQn, 0, 0); - 800254a: f000 fc2b bl 8002da4 + 800257a: f000 fc2b bl 8002dd4 HAL_NVIC_EnableIRQ(TIM17_IRQn); - 800254e: 2016 movs r0, #22 - 8002550: e7d4 b.n 80024fc - 8002552: 46c0 nop @ (mov r8, r8) - 8002554: 40012c00 .word 0x40012c00 - 8002558: 40021000 .word 0x40021000 - 800255c: 40002000 .word 0x40002000 - 8002560: 40014400 .word 0x40014400 - 8002564: 40014800 .word 0x40014800 + 800257e: 2016 movs r0, #22 + 8002580: e7d4 b.n 800252c + 8002582: 46c0 nop @ (mov r8, r8) + 8002584: 40012c00 .word 0x40012c00 + 8002588: 40021000 .word 0x40021000 + 800258c: 40002000 .word 0x40002000 + 8002590: 40014400 .word 0x40014400 + 8002594: 40014800 .word 0x40014800 -08002568 : +08002598 : * This function configures the hardware resources used in this example * @param htim_encoder: TIM_Encoder handle pointer * @retval None */ void HAL_TIM_Encoder_MspInit(TIM_HandleTypeDef* htim_encoder) { - 8002568: b510 push {r4, lr} - 800256a: 0004 movs r4, r0 - 800256c: b088 sub sp, #32 + 8002598: b510 push {r4, lr} + 800259a: 0004 movs r4, r0 + 800259c: b088 sub sp, #32 GPIO_InitTypeDef GPIO_InitStruct = {0}; - 800256e: 2214 movs r2, #20 - 8002570: 2100 movs r1, #0 - 8002572: a803 add r0, sp, #12 - 8002574: f002 fe0a bl 800518c + 800259e: 2214 movs r2, #20 + 80025a0: 2100 movs r1, #0 + 80025a2: a803 add r0, sp, #12 + 80025a4: f002 fe6c bl 8005280 if(htim_encoder->Instance==TIM3) - 8002578: 4b0f ldr r3, [pc, #60] @ (80025b8 ) - 800257a: 6822 ldr r2, [r4, #0] - 800257c: 429a cmp r2, r3 - 800257e: d119 bne.n 80025b4 + 80025a8: 4b0f ldr r3, [pc, #60] @ (80025e8 ) + 80025aa: 6822 ldr r2, [r4, #0] + 80025ac: 429a cmp r2, r3 + 80025ae: d119 bne.n 80025e4 { /* USER CODE BEGIN TIM3_MspInit 0 */ /* USER CODE END TIM3_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_TIM3_CLK_ENABLE(); - 8002580: 2202 movs r2, #2 + 80025b0: 2202 movs r2, #2 __HAL_RCC_GPIOC_CLK_ENABLE(); - 8002582: 2004 movs r0, #4 + 80025b2: 2004 movs r0, #4 __HAL_RCC_TIM3_CLK_ENABLE(); - 8002584: 4b0d ldr r3, [pc, #52] @ (80025bc ) - 8002586: 6bd9 ldr r1, [r3, #60] @ 0x3c - 8002588: 4311 orrs r1, r2 - 800258a: 63d9 str r1, [r3, #60] @ 0x3c - 800258c: 6bd9 ldr r1, [r3, #60] @ 0x3c - 800258e: 4011 ands r1, r2 - 8002590: 9101 str r1, [sp, #4] - 8002592: 9901 ldr r1, [sp, #4] + 80025b4: 4b0d ldr r3, [pc, #52] @ (80025ec ) + 80025b6: 6bd9 ldr r1, [r3, #60] @ 0x3c + 80025b8: 4311 orrs r1, r2 + 80025ba: 63d9 str r1, [r3, #60] @ 0x3c + 80025bc: 6bd9 ldr r1, [r3, #60] @ 0x3c + 80025be: 4011 ands r1, r2 + 80025c0: 9101 str r1, [sp, #4] + 80025c2: 9901 ldr r1, [sp, #4] __HAL_RCC_GPIOC_CLK_ENABLE(); - 8002594: 6b59 ldr r1, [r3, #52] @ 0x34 - 8002596: 4301 orrs r1, r0 - 8002598: 6359 str r1, [r3, #52] @ 0x34 - 800259a: 6b5b ldr r3, [r3, #52] @ 0x34 + 80025c4: 6b59 ldr r1, [r3, #52] @ 0x34 + 80025c6: 4301 orrs r1, r0 + 80025c8: 6359 str r1, [r3, #52] @ 0x34 + 80025ca: 6b5b ldr r3, [r3, #52] @ 0x34 GPIO_InitStruct.Pin = QUAD_A_Pin|QUAD_B_Pin; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; GPIO_InitStruct.Alternate = GPIO_AF1_TIM3; HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); - 800259c: a903 add r1, sp, #12 + 80025cc: a903 add r1, sp, #12 __HAL_RCC_GPIOC_CLK_ENABLE(); - 800259e: 4003 ands r3, r0 - 80025a0: 9302 str r3, [sp, #8] - 80025a2: 9b02 ldr r3, [sp, #8] + 80025ce: 4003 ands r3, r0 + 80025d0: 9302 str r3, [sp, #8] + 80025d2: 9b02 ldr r3, [sp, #8] GPIO_InitStruct.Pin = QUAD_A_Pin|QUAD_B_Pin; - 80025a4: 23c0 movs r3, #192 @ 0xc0 + 80025d4: 23c0 movs r3, #192 @ 0xc0 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); - 80025a6: 4806 ldr r0, [pc, #24] @ (80025c0 ) + 80025d6: 4806 ldr r0, [pc, #24] @ (80025f0 ) GPIO_InitStruct.Pin = QUAD_A_Pin|QUAD_B_Pin; - 80025a8: 9303 str r3, [sp, #12] + 80025d8: 9303 str r3, [sp, #12] GPIO_InitStruct.Alternate = GPIO_AF1_TIM3; - 80025aa: 3bbf subs r3, #191 @ 0xbf + 80025da: 3bbf subs r3, #191 @ 0xbf GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 80025ac: 9204 str r2, [sp, #16] + 80025dc: 9204 str r2, [sp, #16] GPIO_InitStruct.Alternate = GPIO_AF1_TIM3; - 80025ae: 9307 str r3, [sp, #28] + 80025de: 9307 str r3, [sp, #28] HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); - 80025b0: f000 fdf0 bl 8003194 + 80025e0: f000 fdf2 bl 80031c8 /* USER CODE END TIM3_MspInit 1 */ } } - 80025b4: b008 add sp, #32 - 80025b6: bd10 pop {r4, pc} - 80025b8: 40000400 .word 0x40000400 - 80025bc: 40021000 .word 0x40021000 - 80025c0: 50000800 .word 0x50000800 + 80025e4: b008 add sp, #32 + 80025e6: bd10 pop {r4, pc} + 80025e8: 40000400 .word 0x40000400 + 80025ec: 40021000 .word 0x40021000 + 80025f0: 50000800 .word 0x50000800 -080025c4 : +080025f4 : void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim) { - 80025c4: b510 push {r4, lr} - 80025c6: 0004 movs r4, r0 - 80025c8: b086 sub sp, #24 + 80025f4: b510 push {r4, lr} + 80025f6: 0004 movs r4, r0 + 80025f8: b086 sub sp, #24 GPIO_InitTypeDef GPIO_InitStruct = {0}; - 80025ca: 2214 movs r2, #20 - 80025cc: 2100 movs r1, #0 - 80025ce: a801 add r0, sp, #4 - 80025d0: f002 fddc bl 800518c + 80025fa: 2214 movs r2, #20 + 80025fc: 2100 movs r1, #0 + 80025fe: a801 add r0, sp, #4 + 8002600: f002 fe3e bl 8005280 if(htim->Instance==TIM1) - 80025d4: 4b13 ldr r3, [pc, #76] @ (8002624 ) - 80025d6: 6822 ldr r2, [r4, #0] - 80025d8: 429a cmp r2, r3 - 80025da: d120 bne.n 800261e + 8002604: 4b13 ldr r3, [pc, #76] @ (8002654 ) + 8002606: 6822 ldr r2, [r4, #0] + 8002608: 429a cmp r2, r3 + 800260a: d120 bne.n 800264e { /* USER CODE BEGIN TIM1_MspPostInit 0 */ /* USER CODE END TIM1_MspPostInit 0 */ __HAL_RCC_GPIOA_CLK_ENABLE(); - 80025dc: 2101 movs r1, #1 - 80025de: 4b12 ldr r3, [pc, #72] @ (8002628 ) + 800260c: 2101 movs r1, #1 + 800260e: 4b12 ldr r3, [pc, #72] @ (8002658 ) GPIO_InitStruct.Pin = PEEL1_Pin|PEEL2_Pin; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; GPIO_InitStruct.Alternate = GPIO_AF5_TIM1; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 80025e0: 20a0 movs r0, #160 @ 0xa0 + 8002610: 20a0 movs r0, #160 @ 0xa0 __HAL_RCC_GPIOA_CLK_ENABLE(); - 80025e2: 6b5a ldr r2, [r3, #52] @ 0x34 + 8002612: 6b5a ldr r2, [r3, #52] @ 0x34 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 80025e4: 2402 movs r4, #2 + 8002614: 2402 movs r4, #2 __HAL_RCC_GPIOA_CLK_ENABLE(); - 80025e6: 430a orrs r2, r1 - 80025e8: 635a str r2, [r3, #52] @ 0x34 - 80025ea: 6b5b ldr r3, [r3, #52] @ 0x34 + 8002616: 430a orrs r2, r1 + 8002618: 635a str r2, [r3, #52] @ 0x34 + 800261a: 6b5b ldr r3, [r3, #52] @ 0x34 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 80025ec: 05c0 lsls r0, r0, #23 + 800261c: 05c0 lsls r0, r0, #23 __HAL_RCC_GPIOA_CLK_ENABLE(); - 80025ee: 400b ands r3, r1 - 80025f0: 9300 str r3, [sp, #0] - 80025f2: 9b00 ldr r3, [sp, #0] + 800261e: 400b ands r3, r1 + 8002620: 9300 str r3, [sp, #0] + 8002622: 9b00 ldr r3, [sp, #0] GPIO_InitStruct.Pin = PEEL1_Pin|PEEL2_Pin; - 80025f4: 230c movs r3, #12 + 8002624: 230c movs r3, #12 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 80025f6: a901 add r1, sp, #4 + 8002626: a901 add r1, sp, #4 GPIO_InitStruct.Pin = PEEL1_Pin|PEEL2_Pin; - 80025f8: 9301 str r3, [sp, #4] + 8002628: 9301 str r3, [sp, #4] GPIO_InitStruct.Alternate = GPIO_AF5_TIM1; - 80025fa: 3b07 subs r3, #7 - 80025fc: 9305 str r3, [sp, #20] + 800262a: 3b07 subs r3, #7 + 800262c: 9305 str r3, [sp, #20] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 80025fe: 9402 str r4, [sp, #8] + 800262e: 9402 str r4, [sp, #8] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 8002600: f000 fdc8 bl 8003194 + 8002630: f000 fdca bl 80031c8 GPIO_InitStruct.Pin = DRIVE1_Pin|DRIVE2_Pin; - 8002604: 23c0 movs r3, #192 @ 0xc0 + 8002634: 23c0 movs r3, #192 @ 0xc0 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; GPIO_InitStruct.Alternate = GPIO_AF2_TIM1; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 8002606: 20a0 movs r0, #160 @ 0xa0 + 8002636: 20a0 movs r0, #160 @ 0xa0 GPIO_InitStruct.Pin = DRIVE1_Pin|DRIVE2_Pin; - 8002608: 009b lsls r3, r3, #2 - 800260a: 9301 str r3, [sp, #4] + 8002638: 009b lsls r3, r3, #2 + 800263a: 9301 str r3, [sp, #4] GPIO_InitStruct.Pull = GPIO_NOPULL; - 800260c: 2300 movs r3, #0 + 800263c: 2300 movs r3, #0 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 800260e: a901 add r1, sp, #4 - 8002610: 05c0 lsls r0, r0, #23 + 800263e: a901 add r1, sp, #4 + 8002640: 05c0 lsls r0, r0, #23 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 8002612: 9402 str r4, [sp, #8] + 8002642: 9402 str r4, [sp, #8] GPIO_InitStruct.Pull = GPIO_NOPULL; - 8002614: 9303 str r3, [sp, #12] + 8002644: 9303 str r3, [sp, #12] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 8002616: 9304 str r3, [sp, #16] + 8002646: 9304 str r3, [sp, #16] GPIO_InitStruct.Alternate = GPIO_AF2_TIM1; - 8002618: 9405 str r4, [sp, #20] + 8002648: 9405 str r4, [sp, #20] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 800261a: f000 fdbb bl 8003194 + 800264a: f000 fdbd bl 80031c8 /* USER CODE BEGIN TIM1_MspPostInit 1 */ /* USER CODE END TIM1_MspPostInit 1 */ } } - 800261e: b006 add sp, #24 - 8002620: bd10 pop {r4, pc} - 8002622: 46c0 nop @ (mov r8, r8) - 8002624: 40012c00 .word 0x40012c00 - 8002628: 40021000 .word 0x40021000 + 800264e: b006 add sp, #24 + 8002650: bd10 pop {r4, pc} + 8002652: 46c0 nop @ (mov r8, r8) + 8002654: 40012c00 .word 0x40012c00 + 8002658: 40021000 .word 0x40021000 -0800262c : +0800265c : * This function configures the hardware resources used in this example * @param huart: UART handle pointer * @retval None */ void HAL_UART_MspInit(UART_HandleTypeDef* huart) { - 800262c: b530 push {r4, r5, lr} - 800262e: 0005 movs r5, r0 - 8002630: b091 sub sp, #68 @ 0x44 + 800265c: b530 push {r4, r5, lr} + 800265e: 0005 movs r5, r0 + 8002660: b091 sub sp, #68 @ 0x44 GPIO_InitTypeDef GPIO_InitStruct = {0}; - 8002632: 2214 movs r2, #20 - 8002634: 2100 movs r1, #0 - 8002636: a804 add r0, sp, #16 - 8002638: f002 fda8 bl 800518c + 8002662: 2214 movs r2, #20 + 8002664: 2100 movs r1, #0 + 8002666: a804 add r0, sp, #16 + 8002668: f002 fe0a bl 8005280 RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; - 800263c: 221c movs r2, #28 - 800263e: 2100 movs r1, #0 - 8002640: a809 add r0, sp, #36 @ 0x24 - 8002642: f002 fda3 bl 800518c + 800266c: 221c movs r2, #28 + 800266e: 2100 movs r1, #0 + 8002670: a809 add r0, sp, #36 @ 0x24 + 8002672: f002 fe05 bl 8005280 if(huart->Instance==USART1) - 8002646: 682b ldr r3, [r5, #0] - 8002648: 4a43 ldr r2, [pc, #268] @ (8002758 ) - 800264a: 4293 cmp r3, r2 - 800264c: d127 bne.n 800269e + 8002676: 682b ldr r3, [r5, #0] + 8002678: 4a43 ldr r2, [pc, #268] @ (8002788 ) + 800267a: 4293 cmp r3, r2 + 800267c: d127 bne.n 80026ce /* USER CODE END USART1_MspInit 0 */ /** Initializes the peripherals clocks */ PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART1; - 800264e: 2301 movs r3, #1 + 800267e: 2301 movs r3, #1 PeriphClkInit.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK1; if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) - 8002650: a809 add r0, sp, #36 @ 0x24 + 8002680: a809 add r0, sp, #36 @ 0x24 PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART1; - 8002652: 9309 str r3, [sp, #36] @ 0x24 + 8002682: 9309 str r3, [sp, #36] @ 0x24 if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) - 8002654: f001 f8b8 bl 80037c8 - 8002658: 2800 cmp r0, #0 - 800265a: d001 beq.n 8002660 + 8002684: f001 f8ba bl 80037fc + 8002688: 2800 cmp r0, #0 + 800268a: d001 beq.n 8002690 { Error_Handler(); - 800265c: f7ff fec0 bl 80023e0 + 800268c: f7ff fec0 bl 8002410 } /* Peripheral clock enable */ __HAL_RCC_USART1_CLK_ENABLE(); - 8002660: 2180 movs r1, #128 @ 0x80 - 8002662: 4b3e ldr r3, [pc, #248] @ (800275c ) - 8002664: 01c9 lsls r1, r1, #7 - 8002666: 6c1a ldr r2, [r3, #64] @ 0x40 + 8002690: 2180 movs r1, #128 @ 0x80 + 8002692: 4b3e ldr r3, [pc, #248] @ (800278c ) + 8002694: 01c9 lsls r1, r1, #7 + 8002696: 6c1a ldr r2, [r3, #64] @ 0x40 GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; GPIO_InitStruct.Alternate = GPIO_AF0_USART1; HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 8002668: 483d ldr r0, [pc, #244] @ (8002760 ) + 8002698: 483d ldr r0, [pc, #244] @ (8002790 ) __HAL_RCC_USART1_CLK_ENABLE(); - 800266a: 430a orrs r2, r1 - 800266c: 641a str r2, [r3, #64] @ 0x40 - 800266e: 6c1a ldr r2, [r3, #64] @ 0x40 - 8002670: 400a ands r2, r1 - 8002672: 9200 str r2, [sp, #0] - 8002674: 9a00 ldr r2, [sp, #0] + 800269a: 430a orrs r2, r1 + 800269c: 641a str r2, [r3, #64] @ 0x40 + 800269e: 6c1a ldr r2, [r3, #64] @ 0x40 + 80026a0: 400a ands r2, r1 + 80026a2: 9200 str r2, [sp, #0] + 80026a4: 9a00 ldr r2, [sp, #0] __HAL_RCC_GPIOB_CLK_ENABLE(); - 8002676: 2202 movs r2, #2 - 8002678: 6b59 ldr r1, [r3, #52] @ 0x34 - 800267a: 4311 orrs r1, r2 - 800267c: 6359 str r1, [r3, #52] @ 0x34 - 800267e: 6b5b ldr r3, [r3, #52] @ 0x34 + 80026a6: 2202 movs r2, #2 + 80026a8: 6b59 ldr r1, [r3, #52] @ 0x34 + 80026aa: 4311 orrs r1, r2 + 80026ac: 6359 str r1, [r3, #52] @ 0x34 + 80026ae: 6b5b ldr r3, [r3, #52] @ 0x34 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 8002680: a904 add r1, sp, #16 + 80026b0: a904 add r1, sp, #16 __HAL_RCC_GPIOB_CLK_ENABLE(); - 8002682: 4013 ands r3, r2 - 8002684: 9301 str r3, [sp, #4] - 8002686: 9b01 ldr r3, [sp, #4] + 80026b2: 4013 ands r3, r2 + 80026b4: 9301 str r3, [sp, #4] + 80026b6: 9b01 ldr r3, [sp, #4] GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7; - 8002688: 23c0 movs r3, #192 @ 0xc0 - 800268a: 9304 str r3, [sp, #16] + 80026b8: 23c0 movs r3, #192 @ 0xc0 + 80026ba: 9304 str r3, [sp, #16] GPIO_InitStruct.Pull = GPIO_NOPULL; - 800268c: 2300 movs r3, #0 + 80026bc: 2300 movs r3, #0 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 800268e: 9205 str r2, [sp, #20] + 80026be: 9205 str r2, [sp, #20] GPIO_InitStruct.Pull = GPIO_NOPULL; - 8002690: 9306 str r3, [sp, #24] + 80026c0: 9306 str r3, [sp, #24] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 8002692: 9307 str r3, [sp, #28] + 80026c2: 9307 str r3, [sp, #28] GPIO_InitStruct.Alternate = GPIO_AF0_USART1; - 8002694: 9308 str r3, [sp, #32] + 80026c4: 9308 str r3, [sp, #32] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 8002696: f000 fd7d bl 8003194 + 80026c6: f000 fd7f bl 80031c8 /* USER CODE BEGIN USART2_MspInit 1 */ /* USER CODE END USART2_MspInit 1 */ } } - 800269a: b011 add sp, #68 @ 0x44 - 800269c: bd30 pop {r4, r5, pc} + 80026ca: b011 add sp, #68 @ 0x44 + 80026cc: bd30 pop {r4, r5, pc} else if(huart->Instance==USART2) - 800269e: 4a31 ldr r2, [pc, #196] @ (8002764 ) - 80026a0: 4293 cmp r3, r2 - 80026a2: d1fa bne.n 800269a + 80026ce: 4a31 ldr r2, [pc, #196] @ (8002794 ) + 80026d0: 4293 cmp r3, r2 + 80026d2: d1fa bne.n 80026ca __HAL_RCC_USART2_CLK_ENABLE(); - 80026a4: 2180 movs r1, #128 @ 0x80 - 80026a6: 4b2d ldr r3, [pc, #180] @ (800275c ) - 80026a8: 0289 lsls r1, r1, #10 - 80026aa: 6bda ldr r2, [r3, #60] @ 0x3c + 80026d4: 2180 movs r1, #128 @ 0x80 + 80026d6: 4b2d ldr r3, [pc, #180] @ (800278c ) + 80026d8: 0289 lsls r1, r1, #10 + 80026da: 6bda ldr r2, [r3, #60] @ 0x3c HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 80026ac: 20a0 movs r0, #160 @ 0xa0 + 80026dc: 20a0 movs r0, #160 @ 0xa0 __HAL_RCC_USART2_CLK_ENABLE(); - 80026ae: 430a orrs r2, r1 - 80026b0: 63da str r2, [r3, #60] @ 0x3c - 80026b2: 6bda ldr r2, [r3, #60] @ 0x3c + 80026de: 430a orrs r2, r1 + 80026e0: 63da str r2, [r3, #60] @ 0x3c + 80026e2: 6bda ldr r2, [r3, #60] @ 0x3c HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 80026b4: 05c0 lsls r0, r0, #23 + 80026e4: 05c0 lsls r0, r0, #23 __HAL_RCC_USART2_CLK_ENABLE(); - 80026b6: 400a ands r2, r1 - 80026b8: 9202 str r2, [sp, #8] - 80026ba: 9a02 ldr r2, [sp, #8] + 80026e6: 400a ands r2, r1 + 80026e8: 9202 str r2, [sp, #8] + 80026ea: 9a02 ldr r2, [sp, #8] __HAL_RCC_GPIOA_CLK_ENABLE(); - 80026bc: 2201 movs r2, #1 - 80026be: 6b59 ldr r1, [r3, #52] @ 0x34 - 80026c0: 4311 orrs r1, r2 - 80026c2: 6359 str r1, [r3, #52] @ 0x34 - 80026c4: 6b5b ldr r3, [r3, #52] @ 0x34 + 80026ec: 2201 movs r2, #1 + 80026ee: 6b59 ldr r1, [r3, #52] @ 0x34 + 80026f0: 4311 orrs r1, r2 + 80026f2: 6359 str r1, [r3, #52] @ 0x34 + 80026f4: 6b5b ldr r3, [r3, #52] @ 0x34 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 80026c6: a904 add r1, sp, #16 + 80026f6: a904 add r1, sp, #16 __HAL_RCC_GPIOA_CLK_ENABLE(); - 80026c8: 4013 ands r3, r2 - 80026ca: 9303 str r3, [sp, #12] - 80026cc: 9b03 ldr r3, [sp, #12] + 80026f8: 4013 ands r3, r2 + 80026fa: 9303 str r3, [sp, #12] + 80026fc: 9b03 ldr r3, [sp, #12] GPIO_InitStruct.Pin = GPIO_PIN_1|GPIO_PIN_4|GPIO_PIN_5; - 80026ce: 2332 movs r3, #50 @ 0x32 - 80026d0: 9304 str r3, [sp, #16] + 80026fe: 2332 movs r3, #50 @ 0x32 + 8002700: 9304 str r3, [sp, #16] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 80026d2: 3b30 subs r3, #48 @ 0x30 - 80026d4: 9305 str r3, [sp, #20] + 8002702: 3b30 subs r3, #48 @ 0x30 + 8002704: 9305 str r3, [sp, #20] GPIO_InitStruct.Alternate = GPIO_AF1_USART2; - 80026d6: 9208 str r2, [sp, #32] + 8002706: 9208 str r2, [sp, #32] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 80026d8: f000 fd5c bl 8003194 + 8002708: f000 fd5e bl 80031c8 hdma_usart2_rx.Instance = DMA1_Channel2; - 80026dc: 4c22 ldr r4, [pc, #136] @ (8002768 ) - 80026de: 4b23 ldr r3, [pc, #140] @ (800276c ) + 800270c: 4c22 ldr r4, [pc, #136] @ (8002798 ) + 800270e: 4b23 ldr r3, [pc, #140] @ (800279c ) hdma_usart2_rx.Init.MemInc = DMA_MINC_ENABLE; - 80026e0: 2280 movs r2, #128 @ 0x80 + 8002710: 2280 movs r2, #128 @ 0x80 hdma_usart2_rx.Instance = DMA1_Channel2; - 80026e2: 6023 str r3, [r4, #0] + 8002712: 6023 str r3, [r4, #0] hdma_usart2_rx.Init.Request = DMA_REQUEST_USART2_RX; - 80026e4: 2334 movs r3, #52 @ 0x34 - 80026e6: 6063 str r3, [r4, #4] + 8002714: 2334 movs r3, #52 @ 0x34 + 8002716: 6063 str r3, [r4, #4] hdma_usart2_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; - 80026e8: 2300 movs r3, #0 - 80026ea: 60a3 str r3, [r4, #8] + 8002718: 2300 movs r3, #0 + 800271a: 60a3 str r3, [r4, #8] hdma_usart2_rx.Init.PeriphInc = DMA_PINC_DISABLE; - 80026ec: 60e3 str r3, [r4, #12] + 800271c: 60e3 str r3, [r4, #12] hdma_usart2_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; - 80026ee: 6163 str r3, [r4, #20] + 800271e: 6163 str r3, [r4, #20] hdma_usart2_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; - 80026f0: 61a3 str r3, [r4, #24] + 8002720: 61a3 str r3, [r4, #24] hdma_usart2_rx.Init.Mode = DMA_NORMAL; - 80026f2: 61e3 str r3, [r4, #28] + 8002722: 61e3 str r3, [r4, #28] hdma_usart2_rx.Init.Priority = DMA_PRIORITY_MEDIUM; - 80026f4: 2380 movs r3, #128 @ 0x80 + 8002724: 2380 movs r3, #128 @ 0x80 if (HAL_DMA_Init(&hdma_usart2_rx) != HAL_OK) - 80026f6: 0020 movs r0, r4 + 8002726: 0020 movs r0, r4 hdma_usart2_rx.Init.Priority = DMA_PRIORITY_MEDIUM; - 80026f8: 015b lsls r3, r3, #5 + 8002728: 015b lsls r3, r3, #5 hdma_usart2_rx.Init.MemInc = DMA_MINC_ENABLE; - 80026fa: 6122 str r2, [r4, #16] + 800272a: 6122 str r2, [r4, #16] hdma_usart2_rx.Init.Priority = DMA_PRIORITY_MEDIUM; - 80026fc: 6223 str r3, [r4, #32] + 800272c: 6223 str r3, [r4, #32] if (HAL_DMA_Init(&hdma_usart2_rx) != HAL_OK) - 80026fe: f000 fbdb bl 8002eb8 - 8002702: 2800 cmp r0, #0 - 8002704: d001 beq.n 800270a + 800272e: f000 fbdb bl 8002ee8 + 8002732: 2800 cmp r0, #0 + 8002734: d001 beq.n 800273a Error_Handler(); - 8002706: f7ff fe6b bl 80023e0 + 8002736: f7ff fe6b bl 8002410 __HAL_LINKDMA(huart,hdmarx,hdma_usart2_rx); - 800270a: 1d2b adds r3, r5, #4 - 800270c: 67dc str r4, [r3, #124] @ 0x7c - 800270e: 62a5 str r5, [r4, #40] @ 0x28 + 800273a: 1d2b adds r3, r5, #4 + 800273c: 67dc str r4, [r3, #124] @ 0x7c + 800273e: 62a5 str r5, [r4, #40] @ 0x28 hdma_usart2_tx.Instance = DMA1_Channel1; - 8002710: 4b17 ldr r3, [pc, #92] @ (8002770 ) - 8002712: 4c18 ldr r4, [pc, #96] @ (8002774 ) + 8002740: 4b17 ldr r3, [pc, #92] @ (80027a0 ) + 8002742: 4c18 ldr r4, [pc, #96] @ (80027a4 ) hdma_usart2_tx.Init.MemInc = DMA_MINC_ENABLE; - 8002714: 2280 movs r2, #128 @ 0x80 + 8002744: 2280 movs r2, #128 @ 0x80 hdma_usart2_tx.Instance = DMA1_Channel1; - 8002716: 6023 str r3, [r4, #0] + 8002746: 6023 str r3, [r4, #0] hdma_usart2_tx.Init.Request = DMA_REQUEST_USART2_TX; - 8002718: 2335 movs r3, #53 @ 0x35 - 800271a: 6063 str r3, [r4, #4] + 8002748: 2335 movs r3, #53 @ 0x35 + 800274a: 6063 str r3, [r4, #4] hdma_usart2_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; - 800271c: 3b25 subs r3, #37 @ 0x25 - 800271e: 60a3 str r3, [r4, #8] + 800274c: 3b25 subs r3, #37 @ 0x25 + 800274e: 60a3 str r3, [r4, #8] hdma_usart2_tx.Init.PeriphInc = DMA_PINC_DISABLE; - 8002720: 2300 movs r3, #0 - 8002722: 60e3 str r3, [r4, #12] + 8002750: 2300 movs r3, #0 + 8002752: 60e3 str r3, [r4, #12] hdma_usart2_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; - 8002724: 6163 str r3, [r4, #20] + 8002754: 6163 str r3, [r4, #20] hdma_usart2_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; - 8002726: 61a3 str r3, [r4, #24] + 8002756: 61a3 str r3, [r4, #24] hdma_usart2_tx.Init.Mode = DMA_NORMAL; - 8002728: 61e3 str r3, [r4, #28] + 8002758: 61e3 str r3, [r4, #28] hdma_usart2_tx.Init.Priority = DMA_PRIORITY_HIGH; - 800272a: 2380 movs r3, #128 @ 0x80 + 800275a: 2380 movs r3, #128 @ 0x80 if (HAL_DMA_Init(&hdma_usart2_tx) != HAL_OK) - 800272c: 0020 movs r0, r4 + 800275c: 0020 movs r0, r4 hdma_usart2_tx.Init.Priority = DMA_PRIORITY_HIGH; - 800272e: 019b lsls r3, r3, #6 + 800275e: 019b lsls r3, r3, #6 hdma_usart2_tx.Init.MemInc = DMA_MINC_ENABLE; - 8002730: 6122 str r2, [r4, #16] + 8002760: 6122 str r2, [r4, #16] hdma_usart2_tx.Init.Priority = DMA_PRIORITY_HIGH; - 8002732: 6223 str r3, [r4, #32] + 8002762: 6223 str r3, [r4, #32] if (HAL_DMA_Init(&hdma_usart2_tx) != HAL_OK) - 8002734: f000 fbc0 bl 8002eb8 - 8002738: 2800 cmp r0, #0 - 800273a: d001 beq.n 8002740 + 8002764: f000 fbc0 bl 8002ee8 + 8002768: 2800 cmp r0, #0 + 800276a: d001 beq.n 8002770 Error_Handler(); - 800273c: f7ff fe50 bl 80023e0 + 800276c: f7ff fe50 bl 8002410 HAL_NVIC_SetPriority(USART2_IRQn, 0, 0); - 8002740: 2200 movs r2, #0 - 8002742: 201c movs r0, #28 - 8002744: 0011 movs r1, r2 + 8002770: 2200 movs r2, #0 + 8002772: 201c movs r0, #28 + 8002774: 0011 movs r1, r2 __HAL_LINKDMA(huart,hdmatx,hdma_usart2_tx); - 8002746: 67ec str r4, [r5, #124] @ 0x7c - 8002748: 62a5 str r5, [r4, #40] @ 0x28 + 8002776: 67ec str r4, [r5, #124] @ 0x7c + 8002778: 62a5 str r5, [r4, #40] @ 0x28 HAL_NVIC_SetPriority(USART2_IRQn, 0, 0); - 800274a: f000 fb2b bl 8002da4 + 800277a: f000 fb2b bl 8002dd4 HAL_NVIC_EnableIRQ(USART2_IRQn); - 800274e: 201c movs r0, #28 - 8002750: f000 fb52 bl 8002df8 + 800277e: 201c movs r0, #28 + 8002780: f000 fb52 bl 8002e28 } - 8002754: e7a1 b.n 800269a - 8002756: 46c0 nop @ (mov r8, r8) - 8002758: 40013800 .word 0x40013800 - 800275c: 40021000 .word 0x40021000 - 8002760: 50000400 .word 0x50000400 - 8002764: 40004400 .word 0x40004400 - 8002768: 20000ffc .word 0x20000ffc - 800276c: 4002001c .word 0x4002001c - 8002770: 40020008 .word 0x40020008 - 8002774: 20000fa0 .word 0x20000fa0 + 8002784: e7a1 b.n 80026ca + 8002786: 46c0 nop @ (mov r8, r8) + 8002788: 40013800 .word 0x40013800 + 800278c: 40021000 .word 0x40021000 + 8002790: 50000400 .word 0x50000400 + 8002794: 40004400 .word 0x40004400 + 8002798: 20001000 .word 0x20001000 + 800279c: 4002001c .word 0x4002001c + 80027a0: 40020008 .word 0x40020008 + 80027a4: 20000fa4 .word 0x20000fa4 -08002778 : +080027a8 : { /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ /* USER CODE END NonMaskableInt_IRQn 0 */ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ while (1) - 8002778: e7fe b.n 8002778 + 80027a8: e7fe b.n 80027a8 -0800277a : +080027aa : void HardFault_Handler(void) { /* USER CODE BEGIN HardFault_IRQn 0 */ /* USER CODE END HardFault_IRQn 0 */ while (1) - 800277a: e7fe b.n 800277a + 80027aa: e7fe b.n 80027aa -0800277c : +080027ac : /* USER CODE END SVCall_IRQn 0 */ /* USER CODE BEGIN SVCall_IRQn 1 */ /* USER CODE END SVCall_IRQn 1 */ } - 800277c: 4770 bx lr + 80027ac: 4770 bx lr -0800277e : +080027ae : /** * @brief This function handles Pendable request for system service. */ void PendSV_Handler(void) - 800277e: 4770 bx lr + 80027ae: 4770 bx lr -08002780 : +080027b0 : /** * @brief This function handles System tick timer. */ void SysTick_Handler(void) { - 8002780: b510 push {r4, lr} + 80027b0: b510 push {r4, lr} /* USER CODE BEGIN SysTick_IRQn 0 */ /* USER CODE END SysTick_IRQn 0 */ HAL_IncTick(); - 8002782: f000 f8a1 bl 80028c8 + 80027b2: f000 f8a1 bl 80028f8 /* USER CODE BEGIN SysTick_IRQn 1 */ /* USER CODE END SysTick_IRQn 1 */ } - 8002786: bd10 pop {r4, pc} + 80027b6: bd10 pop {r4, pc} -08002788 : +080027b8 : void EXTI4_15_IRQHandler(void) { /* USER CODE BEGIN EXTI4_15_IRQn 0 */ /* USER CODE END EXTI4_15_IRQn 0 */ HAL_GPIO_EXTI_IRQHandler(SW2_Pin); - 8002788: 2080 movs r0, #128 @ 0x80 + 80027b8: 2080 movs r0, #128 @ 0x80 { - 800278a: b510 push {r4, lr} + 80027ba: b510 push {r4, lr} HAL_GPIO_EXTI_IRQHandler(SW2_Pin); - 800278c: 0040 lsls r0, r0, #1 - 800278e: f000 fdc9 bl 8003324 + 80027bc: 0040 lsls r0, r0, #1 + 80027be: f000 fdcb bl 8003358 HAL_GPIO_EXTI_IRQHandler(SW1_Pin); - 8002792: 2080 movs r0, #128 @ 0x80 - 8002794: 0080 lsls r0, r0, #2 - 8002796: f000 fdc5 bl 8003324 + 80027c2: 2080 movs r0, #128 @ 0x80 + 80027c4: 0080 lsls r0, r0, #2 + 80027c6: f000 fdc7 bl 8003358 /* USER CODE BEGIN EXTI4_15_IRQn 1 */ /* USER CODE END EXTI4_15_IRQn 1 */ } - 800279a: bd10 pop {r4, pc} + 80027ca: bd10 pop {r4, pc} -0800279c : +080027cc : /** * @brief This function handles DMA1 channel 1 interrupt. */ void DMA1_Channel1_IRQHandler(void) { - 800279c: b510 push {r4, lr} + 80027cc: b510 push {r4, lr} /* USER CODE BEGIN DMA1_Channel1_IRQn 0 */ /* USER CODE END DMA1_Channel1_IRQn 0 */ HAL_DMA_IRQHandler(&hdma_usart2_tx); - 800279e: 4802 ldr r0, [pc, #8] @ (80027a8 ) - 80027a0: f000 fca4 bl 80030ec + 80027ce: 4802 ldr r0, [pc, #8] @ (80027d8 ) + 80027d0: f000 fca4 bl 800311c /* USER CODE BEGIN DMA1_Channel1_IRQn 1 */ /* USER CODE END DMA1_Channel1_IRQn 1 */ } - 80027a4: bd10 pop {r4, pc} - 80027a6: 46c0 nop @ (mov r8, r8) - 80027a8: 20000fa0 .word 0x20000fa0 + 80027d4: bd10 pop {r4, pc} + 80027d6: 46c0 nop @ (mov r8, r8) + 80027d8: 20000fa4 .word 0x20000fa4 -080027ac : +080027dc : /** * @brief This function handles DMA1 channel 2 and channel 3 interrupts. */ void DMA1_Channel2_3_IRQHandler(void) { - 80027ac: b510 push {r4, lr} + 80027dc: b510 push {r4, lr} /* USER CODE BEGIN DMA1_Channel2_3_IRQn 0 */ /* USER CODE END DMA1_Channel2_3_IRQn 0 */ HAL_DMA_IRQHandler(&hdma_usart2_rx); - 80027ae: 4802 ldr r0, [pc, #8] @ (80027b8 ) - 80027b0: f000 fc9c bl 80030ec + 80027de: 4802 ldr r0, [pc, #8] @ (80027e8 ) + 80027e0: f000 fc9c bl 800311c /* USER CODE BEGIN DMA1_Channel2_3_IRQn 1 */ /* USER CODE END DMA1_Channel2_3_IRQn 1 */ } - 80027b4: bd10 pop {r4, pc} - 80027b6: 46c0 nop @ (mov r8, r8) - 80027b8: 20000ffc .word 0x20000ffc + 80027e4: bd10 pop {r4, pc} + 80027e6: 46c0 nop @ (mov r8, r8) + 80027e8: 20001000 .word 0x20001000 -080027bc : +080027ec : /** * @brief This function handles TIM14 global interrupt. */ void TIM14_IRQHandler(void) { - 80027bc: b510 push {r4, lr} + 80027ec: b510 push {r4, lr} /* USER CODE BEGIN TIM14_IRQn 0 */ /* USER CODE END TIM14_IRQn 0 */ HAL_TIM_IRQHandler(&htim14); - 80027be: 4802 ldr r0, [pc, #8] @ (80027c8 ) - 80027c0: f001 fa40 bl 8003c44 + 80027ee: 4802 ldr r0, [pc, #8] @ (80027f8 ) + 80027f0: f001 fa42 bl 8003c78 /* USER CODE BEGIN TIM14_IRQn 1 */ /* USER CODE END TIM14_IRQn 1 */ } - 80027c4: bd10 pop {r4, pc} - 80027c6: 46c0 nop @ (mov r8, r8) - 80027c8: 20001218 .word 0x20001218 + 80027f4: bd10 pop {r4, pc} + 80027f6: 46c0 nop @ (mov r8, r8) + 80027f8: 2000121c .word 0x2000121c -080027cc : +080027fc : /** * @brief This function handles TIM16 global interrupt. */ void TIM16_IRQHandler(void) { - 80027cc: b510 push {r4, lr} + 80027fc: b510 push {r4, lr} /* USER CODE BEGIN TIM16_IRQn 0 */ /* USER CODE END TIM16_IRQn 0 */ HAL_TIM_IRQHandler(&htim16); - 80027ce: 4802 ldr r0, [pc, #8] @ (80027d8 ) - 80027d0: f001 fa38 bl 8003c44 + 80027fe: 4802 ldr r0, [pc, #8] @ (8002808 ) + 8002800: f001 fa3a bl 8003c78 /* USER CODE BEGIN TIM16_IRQn 1 */ /* USER CODE END TIM16_IRQn 1 */ } - 80027d4: bd10 pop {r4, pc} - 80027d6: 46c0 nop @ (mov r8, r8) - 80027d8: 200011cc .word 0x200011cc + 8002804: bd10 pop {r4, pc} + 8002806: 46c0 nop @ (mov r8, r8) + 8002808: 200011d0 .word 0x200011d0 -080027dc : +0800280c : /** * @brief This function handles TIM17 global interrupt. */ void TIM17_IRQHandler(void) { - 80027dc: b510 push {r4, lr} + 800280c: b510 push {r4, lr} /* USER CODE BEGIN TIM17_IRQn 0 */ /* USER CODE END TIM17_IRQn 0 */ HAL_TIM_IRQHandler(&htim17); - 80027de: 4802 ldr r0, [pc, #8] @ (80027e8 ) - 80027e0: f001 fa30 bl 8003c44 + 800280e: 4802 ldr r0, [pc, #8] @ (8002818 ) + 8002810: f001 fa32 bl 8003c78 /* USER CODE BEGIN TIM17_IRQn 1 */ /* USER CODE END TIM17_IRQn 1 */ } - 80027e4: bd10 pop {r4, pc} - 80027e6: 46c0 nop @ (mov r8, r8) - 80027e8: 20001180 .word 0x20001180 + 8002814: bd10 pop {r4, pc} + 8002816: 46c0 nop @ (mov r8, r8) + 8002818: 20001184 .word 0x20001184 -080027ec : +0800281c : /** * @brief This function handles USART2 interrupt. */ void USART2_IRQHandler(void) { - 80027ec: b510 push {r4, lr} + 800281c: b510 push {r4, lr} /* USER CODE BEGIN USART2_IRQn 0 */ /* USER CODE END USART2_IRQn 0 */ HAL_UART_IRQHandler(&huart2); - 80027ee: 4802 ldr r0, [pc, #8] @ (80027f8 ) - 80027f0: f001 fed2 bl 8004598 + 800281e: 4802 ldr r0, [pc, #8] @ (8002828 ) + 8002820: f001 ff34 bl 800468c /* USER CODE BEGIN USART2_IRQn 1 */ /* USER CODE END USART2_IRQn 1 */ } - 80027f4: bd10 pop {r4, pc} - 80027f6: 46c0 nop @ (mov r8, r8) - 80027f8: 20001058 .word 0x20001058 + 8002824: bd10 pop {r4, pc} + 8002826: 46c0 nop @ (mov r8, r8) + 8002828: 2000105c .word 0x2000105c -080027fc : +0800282c : /* Configure the Vector Table location add offset address ------------------*/ #ifdef VECT_TAB_SRAM SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ #else SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */ - 80027fc: 2280 movs r2, #128 @ 0x80 - 80027fe: 4b02 ldr r3, [pc, #8] @ (8002808 ) - 8002800: 0512 lsls r2, r2, #20 - 8002802: 609a str r2, [r3, #8] + 800282c: 2280 movs r2, #128 @ 0x80 + 800282e: 4b02 ldr r3, [pc, #8] @ (8002838 ) + 8002830: 0512 lsls r2, r2, #20 + 8002832: 609a str r2, [r3, #8] #endif } - 8002804: 4770 bx lr - 8002806: 46c0 nop @ (mov r8, r8) - 8002808: e000ed00 .word 0xe000ed00 + 8002834: 4770 bx lr + 8002836: 46c0 nop @ (mov r8, r8) + 8002838: e000ed00 .word 0xe000ed00 -0800280c : +0800283c : .section .text.Reset_Handler .weak Reset_Handler .type Reset_Handler, %function Reset_Handler: ldr r0, =_estack - 800280c: 480d ldr r0, [pc, #52] @ (8002844 ) + 800283c: 480d ldr r0, [pc, #52] @ (8002874 ) mov sp, r0 /* set stack pointer */ - 800280e: 4685 mov sp, r0 + 800283e: 4685 mov sp, r0 /* Call the clock system initialization function.*/ bl SystemInit - 8002810: f7ff fff4 bl 80027fc + 8002840: f7ff fff4 bl 800282c /* Copy the data segment initializers from flash to SRAM */ movs r1, #0 - 8002814: 2100 movs r1, #0 + 8002844: 2100 movs r1, #0 b LoopCopyDataInit - 8002816: e003 b.n 8002820 + 8002846: e003 b.n 8002850 -08002818 : +08002848 : CopyDataInit: ldr r3, =_sidata - 8002818: 4b0b ldr r3, [pc, #44] @ (8002848 ) + 8002848: 4b0b ldr r3, [pc, #44] @ (8002878 ) ldr r3, [r3, r1] - 800281a: 585b ldr r3, [r3, r1] + 800284a: 585b ldr r3, [r3, r1] str r3, [r0, r1] - 800281c: 5043 str r3, [r0, r1] + 800284c: 5043 str r3, [r0, r1] adds r1, r1, #4 - 800281e: 3104 adds r1, #4 + 800284e: 3104 adds r1, #4 -08002820 : +08002850 : LoopCopyDataInit: ldr r0, =_sdata - 8002820: 480a ldr r0, [pc, #40] @ (800284c ) + 8002850: 480a ldr r0, [pc, #40] @ (800287c ) ldr r3, =_edata - 8002822: 4b0b ldr r3, [pc, #44] @ (8002850 ) + 8002852: 4b0b ldr r3, [pc, #44] @ (8002880 ) adds r2, r0, r1 - 8002824: 1842 adds r2, r0, r1 + 8002854: 1842 adds r2, r0, r1 cmp r2, r3 - 8002826: 429a cmp r2, r3 + 8002856: 429a cmp r2, r3 bcc CopyDataInit - 8002828: d3f6 bcc.n 8002818 + 8002858: d3f6 bcc.n 8002848 ldr r2, =_sbss - 800282a: 4a0a ldr r2, [pc, #40] @ (8002854 ) + 800285a: 4a0a ldr r2, [pc, #40] @ (8002884 ) b LoopFillZerobss - 800282c: e002 b.n 8002834 + 800285c: e002 b.n 8002864 -0800282e : +0800285e : /* Zero fill the bss segment. */ FillZerobss: movs r3, #0 - 800282e: 2300 movs r3, #0 + 800285e: 2300 movs r3, #0 str r3, [r2] - 8002830: 6013 str r3, [r2, #0] + 8002860: 6013 str r3, [r2, #0] adds r2, r2, #4 - 8002832: 3204 adds r2, #4 + 8002862: 3204 adds r2, #4 -08002834 : +08002864 : LoopFillZerobss: ldr r3, = _ebss - 8002834: 4b08 ldr r3, [pc, #32] @ (8002858 ) + 8002864: 4b08 ldr r3, [pc, #32] @ (8002888 ) cmp r2, r3 - 8002836: 429a cmp r2, r3 + 8002866: 429a cmp r2, r3 bcc FillZerobss - 8002838: d3f9 bcc.n 800282e + 8002868: d3f9 bcc.n 800285e /* Call static constructors */ bl __libc_init_array - 800283a: f002 fcaf bl 800519c <__libc_init_array> + 800286a: f002 fd11 bl 8005290 <__libc_init_array> /* Call the application's entry point.*/ bl main - 800283e: f7ff f90b bl 8001a58
+ 800286e: f7ff f90b bl 8001a88
-08002842 : +08002872 : LoopForever: b LoopForever - 8002842: e7fe b.n 8002842 + 8002872: e7fe b.n 8002872 ldr r0, =_estack - 8002844: 20003000 .word 0x20003000 + 8002874: 20003000 .word 0x20003000 ldr r3, =_sidata - 8002848: 080052c8 .word 0x080052c8 + 8002878: 080053bc .word 0x080053bc ldr r0, =_sdata - 800284c: 20000000 .word 0x20000000 + 800287c: 20000000 .word 0x20000000 ldr r3, =_edata - 8002850: 20000030 .word 0x20000030 + 8002880: 20000034 .word 0x20000034 ldr r2, =_sbss - 8002854: 20000030 .word 0x20000030 + 8002884: 20000034 .word 0x20000034 ldr r3, = _ebss - 8002858: 20001364 .word 0x20001364 + 8002888: 20001368 .word 0x20001368 -0800285c : +0800288c : * @retval : None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: Infinite_Loop: b Infinite_Loop - 800285c: e7fe b.n 800285c + 800288c: e7fe b.n 800288c ... -08002860 : +08002890 : * implementation in user file. * @param TickPriority Tick interrupt priority. * @retval HAL status */ __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) { - 8002860: b570 push {r4, r5, r6, lr} + 8002890: b570 push {r4, r5, r6, lr} HAL_StatusTypeDef status = HAL_OK; if ((uint32_t)uwTickFreq != 0UL) - 8002862: 4b10 ldr r3, [pc, #64] @ (80028a4 ) + 8002892: 4b10 ldr r3, [pc, #64] @ (80028d4 ) { - 8002864: 0005 movs r5, r0 + 8002894: 0005 movs r5, r0 if ((uint32_t)uwTickFreq != 0UL) - 8002866: 7819 ldrb r1, [r3, #0] - 8002868: 2900 cmp r1, #0 - 800286a: d101 bne.n 8002870 + 8002896: 7819 ldrb r1, [r3, #0] + 8002898: 2900 cmp r1, #0 + 800289a: d101 bne.n 80028a0 status = HAL_ERROR; } } else { status = HAL_ERROR; - 800286c: 2001 movs r0, #1 + 800289c: 2001 movs r0, #1 status = HAL_ERROR; } /* Return function status */ return status; } - 800286e: bd70 pop {r4, r5, r6, pc} + 800289e: bd70 pop {r4, r5, r6, pc} if (HAL_SYSTICK_Config(SystemCoreClock / (1000UL / (uint32_t)uwTickFreq)) == 0U) - 8002870: 20fa movs r0, #250 @ 0xfa - 8002872: 0080 lsls r0, r0, #2 - 8002874: f7fd fc5c bl 8000130 <__udivsi3> - 8002878: 4c0b ldr r4, [pc, #44] @ (80028a8 ) - 800287a: 0001 movs r1, r0 - 800287c: 6820 ldr r0, [r4, #0] - 800287e: f7fd fc57 bl 8000130 <__udivsi3> - 8002882: f000 fac5 bl 8002e10 - 8002886: 1e04 subs r4, r0, #0 - 8002888: d1f0 bne.n 800286c + 80028a0: 20fa movs r0, #250 @ 0xfa + 80028a2: 0080 lsls r0, r0, #2 + 80028a4: f7fd fc44 bl 8000130 <__udivsi3> + 80028a8: 4c0b ldr r4, [pc, #44] @ (80028d8 ) + 80028aa: 0001 movs r1, r0 + 80028ac: 6820 ldr r0, [r4, #0] + 80028ae: f7fd fc3f bl 8000130 <__udivsi3> + 80028b2: f000 fac5 bl 8002e40 + 80028b6: 1e04 subs r4, r0, #0 + 80028b8: d1f0 bne.n 800289c if (TickPriority < (1UL << __NVIC_PRIO_BITS)) - 800288a: 2d03 cmp r5, #3 - 800288c: d8ee bhi.n 800286c + 80028ba: 2d03 cmp r5, #3 + 80028bc: d8ee bhi.n 800289c HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U); - 800288e: 0002 movs r2, r0 - 8002890: 2001 movs r0, #1 - 8002892: 0029 movs r1, r5 - 8002894: 4240 negs r0, r0 - 8002896: f000 fa85 bl 8002da4 + 80028be: 0002 movs r2, r0 + 80028c0: 2001 movs r0, #1 + 80028c2: 0029 movs r1, r5 + 80028c4: 4240 negs r0, r0 + 80028c6: f000 fa85 bl 8002dd4 uwTickPrio = TickPriority; - 800289a: 4b04 ldr r3, [pc, #16] @ (80028ac ) - 800289c: 0020 movs r0, r4 - 800289e: 601d str r5, [r3, #0] + 80028ca: 4b04 ldr r3, [pc, #16] @ (80028dc ) + 80028cc: 0020 movs r0, r4 + 80028ce: 601d str r5, [r3, #0] return status; - 80028a0: e7e5 b.n 800286e - 80028a2: 46c0 nop @ (mov r8, r8) - 80028a4: 20000028 .word 0x20000028 - 80028a8: 20000024 .word 0x20000024 - 80028ac: 2000002c .word 0x2000002c + 80028d0: e7e5 b.n 800289e + 80028d2: 46c0 nop @ (mov r8, r8) + 80028d4: 2000002c .word 0x2000002c + 80028d8: 20000028 .word 0x20000028 + 80028dc: 20000030 .word 0x20000030 -080028b0 : +080028e0 : { - 80028b0: b510 push {r4, lr} + 80028e0: b510 push {r4, lr} if (HAL_InitTick(TICK_INT_PRIORITY) != HAL_OK) - 80028b2: 2003 movs r0, #3 - 80028b4: f7ff ffd4 bl 8002860 - 80028b8: 1e04 subs r4, r0, #0 - 80028ba: d103 bne.n 80028c4 + 80028e2: 2003 movs r0, #3 + 80028e4: f7ff ffd4 bl 8002890 + 80028e8: 1e04 subs r4, r0, #0 + 80028ea: d103 bne.n 80028f4 HAL_MspInit(); - 80028bc: f7ff fd92 bl 80023e4 + 80028ec: f7ff fd92 bl 8002414 } - 80028c0: 0020 movs r0, r4 - 80028c2: bd10 pop {r4, pc} + 80028f0: 0020 movs r0, r4 + 80028f2: bd10 pop {r4, pc} status = HAL_ERROR; - 80028c4: 2401 movs r4, #1 - 80028c6: e7fb b.n 80028c0 + 80028f4: 2401 movs r4, #1 + 80028f6: e7fb b.n 80028f0 -080028c8 : +080028f8 : * implementations in user file. * @retval None */ __weak void HAL_IncTick(void) { uwTick += (uint32_t)uwTickFreq; - 80028c8: 4a03 ldr r2, [pc, #12] @ (80028d8 ) - 80028ca: 4b04 ldr r3, [pc, #16] @ (80028dc ) - 80028cc: 6811 ldr r1, [r2, #0] - 80028ce: 781b ldrb r3, [r3, #0] - 80028d0: 185b adds r3, r3, r1 - 80028d2: 6013 str r3, [r2, #0] + 80028f8: 4a03 ldr r2, [pc, #12] @ (8002908 ) + 80028fa: 4b04 ldr r3, [pc, #16] @ (800290c ) + 80028fc: 6811 ldr r1, [r2, #0] + 80028fe: 781b ldrb r3, [r3, #0] + 8002900: 185b adds r3, r3, r1 + 8002902: 6013 str r3, [r2, #0] } - 80028d4: 4770 bx lr - 80028d6: 46c0 nop @ (mov r8, r8) - 80028d8: 20001360 .word 0x20001360 - 80028dc: 20000028 .word 0x20000028 + 8002904: 4770 bx lr + 8002906: 46c0 nop @ (mov r8, r8) + 8002908: 20001364 .word 0x20001364 + 800290c: 2000002c .word 0x2000002c -080028e0 : +08002910 : * implementations in user file. * @retval tick value */ __weak uint32_t HAL_GetTick(void) { return uwTick; - 80028e0: 4b01 ldr r3, [pc, #4] @ (80028e8 ) - 80028e2: 6818 ldr r0, [r3, #0] + 8002910: 4b01 ldr r3, [pc, #4] @ (8002918 ) + 8002912: 6818 ldr r0, [r3, #0] } - 80028e4: 4770 bx lr - 80028e6: 46c0 nop @ (mov r8, r8) - 80028e8: 20001360 .word 0x20001360 + 8002914: 4770 bx lr + 8002916: 46c0 nop @ (mov r8, r8) + 8002918: 20001364 .word 0x20001364 -080028ec : +0800291c : * implementations in user file. * @param Delay specifies the delay time length, in milliseconds. * @retval None */ __weak void HAL_Delay(uint32_t Delay) { - 80028ec: b570 push {r4, r5, r6, lr} - 80028ee: 0004 movs r4, r0 + 800291c: b570 push {r4, r5, r6, lr} + 800291e: 0004 movs r4, r0 uint32_t tickstart = HAL_GetTick(); - 80028f0: f7ff fff6 bl 80028e0 - 80028f4: 0005 movs r5, r0 + 8002920: f7ff fff6 bl 8002910 + 8002924: 0005 movs r5, r0 uint32_t wait = Delay; /* Add a freq to guarantee minimum wait */ if (wait < HAL_MAX_DELAY) - 80028f6: 1c63 adds r3, r4, #1 - 80028f8: d002 beq.n 8002900 + 8002926: 1c63 adds r3, r4, #1 + 8002928: d002 beq.n 8002930 { wait += (uint32_t)(uwTickFreq); - 80028fa: 4b04 ldr r3, [pc, #16] @ (800290c ) - 80028fc: 781b ldrb r3, [r3, #0] - 80028fe: 18e4 adds r4, r4, r3 + 800292a: 4b04 ldr r3, [pc, #16] @ (800293c ) + 800292c: 781b ldrb r3, [r3, #0] + 800292e: 18e4 adds r4, r4, r3 } while ((HAL_GetTick() - tickstart) < wait) - 8002900: f7ff ffee bl 80028e0 - 8002904: 1b40 subs r0, r0, r5 - 8002906: 42a0 cmp r0, r4 - 8002908: d3fa bcc.n 8002900 + 8002930: f7ff ffee bl 8002910 + 8002934: 1b40 subs r0, r0, r5 + 8002936: 42a0 cmp r0, r4 + 8002938: d3fa bcc.n 8002930 { } } - 800290a: bd70 pop {r4, r5, r6, pc} - 800290c: 20000028 .word 0x20000028 + 800293a: bd70 pop {r4, r5, r6, pc} + 800293c: 2000002c .word 0x2000002c -08002910 : +08002940 : * @brief Returns first word of the unique device identifier (UID based on 96 bits) * @retval Device identifier */ uint32_t HAL_GetUIDw0(void) { return (READ_REG(*((uint32_t *)UID_BASE))); - 8002910: 4b01 ldr r3, [pc, #4] @ (8002918 ) - 8002912: 6818 ldr r0, [r3, #0] + 8002940: 4b01 ldr r3, [pc, #4] @ (8002948 ) + 8002942: 6818 ldr r0, [r3, #0] } - 8002914: 4770 bx lr - 8002916: 46c0 nop @ (mov r8, r8) - 8002918: 1fff7550 .word 0x1fff7550 + 8002944: 4770 bx lr + 8002946: 46c0 nop @ (mov r8, r8) + 8002948: 1fff7550 .word 0x1fff7550 -0800291c : +0800294c : * @brief Returns second word of the unique device identifier (UID based on 96 bits) * @retval Device identifier */ uint32_t HAL_GetUIDw1(void) { return (READ_REG(*((uint32_t *)(UID_BASE + 4U)))); - 800291c: 4b01 ldr r3, [pc, #4] @ (8002924 ) - 800291e: 6818 ldr r0, [r3, #0] + 800294c: 4b01 ldr r3, [pc, #4] @ (8002954 ) + 800294e: 6818 ldr r0, [r3, #0] } - 8002920: 4770 bx lr - 8002922: 46c0 nop @ (mov r8, r8) - 8002924: 1fff7554 .word 0x1fff7554 + 8002950: 4770 bx lr + 8002952: 46c0 nop @ (mov r8, r8) + 8002954: 1fff7554 .word 0x1fff7554 -08002928 : +08002958 : * @brief Returns third word of the unique device identifier (UID based on 96 bits) * @retval Device identifier */ uint32_t HAL_GetUIDw2(void) { return (READ_REG(*((uint32_t *)(UID_BASE + 8U)))); - 8002928: 4b01 ldr r3, [pc, #4] @ (8002930 ) - 800292a: 6818 ldr r0, [r3, #0] + 8002958: 4b01 ldr r3, [pc, #4] @ (8002960 ) + 800295a: 6818 ldr r0, [r3, #0] } - 800292c: 4770 bx lr - 800292e: 46c0 nop @ (mov r8, r8) - 8002930: 1fff7558 .word 0x1fff7558 + 800295c: 4770 bx lr + 800295e: 46c0 nop @ (mov r8, r8) + 8002960: 1fff7558 .word 0x1fff7558 -08002934 : +08002964 : * @param ADCx ADC instance * @retval 0: no conversion is on going on ADC group regular. */ __STATIC_INLINE uint32_t LL_ADC_REG_IsConversionOngoing(const ADC_TypeDef *ADCx) { return ((READ_BIT(ADCx->CR, ADC_CR_ADSTART) == (ADC_CR_ADSTART)) ? 1UL : 0UL); - 8002934: 6880 ldr r0, [r0, #8] - 8002936: 0740 lsls r0, r0, #29 - 8002938: 0fc0 lsrs r0, r0, #31 + 8002964: 6880 ldr r0, [r0, #8] + 8002966: 0740 lsls r0, r0, #29 + 8002968: 0fc0 lsrs r0, r0, #31 } - 800293a: 4770 bx lr + 800296a: 4770 bx lr -0800293c : +0800296c : { HAL_StatusTypeDef tmp_hal_status = HAL_OK; uint32_t tmpCFGR1 = 0UL; uint32_t tmpCFGR2 = 0UL; uint32_t tmp_adc_reg_is_conversion_on_going; __IO uint32_t wait_loop_index = 0UL; - 800293c: 2300 movs r3, #0 + 800296c: 2300 movs r3, #0 { - 800293e: b5f0 push {r4, r5, r6, r7, lr} - 8002940: b085 sub sp, #20 - 8002942: 0004 movs r4, r0 + 800296e: b5f0 push {r4, r5, r6, r7, lr} + 8002970: b085 sub sp, #20 + 8002972: 0004 movs r4, r0 __IO uint32_t wait_loop_index = 0UL; - 8002944: 9303 str r3, [sp, #12] + 8002974: 9303 str r3, [sp, #12] /* Check ADC handle */ if (hadc == NULL) - 8002946: 4298 cmp r0, r3 - 8002948: d100 bne.n 800294c - 800294a: e0ef b.n 8002b2c + 8002976: 4298 cmp r0, r3 + 8002978: d100 bne.n 800297c + 800297a: e0ef b.n 8002b5c /* continuous mode is disabled. */ assert_param(!((hadc->Init.DiscontinuousConvMode == ENABLE) && (hadc->Init.ContinuousConvMode == ENABLE))); /* Actions performed only if ADC is coming from state reset: */ /* - Initialization of ADC MSP */ if (hadc->State == HAL_ADC_STATE_RESET) - 800294c: 6d85 ldr r5, [r0, #88] @ 0x58 - 800294e: 429d cmp r5, r3 - 8002950: d105 bne.n 800295e + 800297c: 6d85 ldr r5, [r0, #88] @ 0x58 + 800297e: 429d cmp r5, r3 + 8002980: d105 bne.n 800298e /* Init the low level hardware */ hadc->MspInitCallback(hadc); #else /* Init the low level hardware */ HAL_ADC_MspInit(hadc); - 8002952: f7ff fd5f bl 8002414 + 8002982: f7ff fd5f bl 8002444 /* Set ADC error code to none */ ADC_CLEAR_ERRORCODE(hadc); /* Initialize Lock */ hadc->Lock = HAL_UNLOCKED; - 8002956: 0023 movs r3, r4 - 8002958: 3354 adds r3, #84 @ 0x54 + 8002986: 0023 movs r3, r4 + 8002988: 3354 adds r3, #84 @ 0x54 ADC_CLEAR_ERRORCODE(hadc); - 800295a: 65e5 str r5, [r4, #92] @ 0x5c + 800298a: 65e5 str r5, [r4, #92] @ 0x5c hadc->Lock = HAL_UNLOCKED; - 800295c: 701d strb r5, [r3, #0] + 800298c: 701d strb r5, [r3, #0] return ((READ_BIT(ADCx->CR, ADC_CR_ADVREGEN) == (ADC_CR_ADVREGEN)) ? 1UL : 0UL); - 800295e: 2380 movs r3, #128 @ 0x80 + 800298e: 2380 movs r3, #128 @ 0x80 } if (LL_ADC_IsInternalRegulatorEnabled(hadc->Instance) == 0UL) - 8002960: 6825 ldr r5, [r4, #0] - 8002962: 055b lsls r3, r3, #21 - 8002964: 68aa ldr r2, [r5, #8] - 8002966: 421a tst r2, r3 - 8002968: d100 bne.n 800296c - 800296a: e0a7 b.n 8002abc + 8002990: 6825 ldr r5, [r4, #0] + 8002992: 055b lsls r3, r3, #21 + 8002994: 68aa ldr r2, [r5, #8] + 8002996: 421a tst r2, r3 + 8002998: d100 bne.n 800299c + 800299a: e0a7 b.n 8002aec HAL_StatusTypeDef tmp_hal_status = HAL_OK; - 800296c: 2200 movs r2, #0 - 800296e: 68ab ldr r3, [r5, #8] - 8002970: 9201 str r2, [sp, #4] - 8002972: 00db lsls r3, r3, #3 - 8002974: d408 bmi.n 8002988 + 800299c: 2200 movs r2, #0 + 800299e: 68ab ldr r3, [r5, #8] + 80029a0: 9201 str r2, [sp, #4] + 80029a2: 00db lsls r3, r3, #3 + 80029a4: d408 bmi.n 80029b8 /* or not ADC is coming from state reset (if any potential problem of */ /* clocking, voltage regulator would not be enabled). */ if (LL_ADC_IsInternalRegulatorEnabled(hadc->Instance) == 0UL) { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); - 8002976: 2310 movs r3, #16 + 80029a6: 2310 movs r3, #16 /* Set ADC error code to ADC peripheral internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); - 8002978: 2601 movs r6, #1 + 80029a8: 2601 movs r6, #1 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); - 800297a: 6da2 ldr r2, [r4, #88] @ 0x58 + 80029aa: 6da2 ldr r2, [r4, #88] @ 0x58 tmp_hal_status = HAL_ERROR; - 800297c: 9601 str r6, [sp, #4] + 80029ac: 9601 str r6, [sp, #4] SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); - 800297e: 4313 orrs r3, r2 - 8002980: 65a3 str r3, [r4, #88] @ 0x58 + 80029ae: 4313 orrs r3, r2 + 80029b0: 65a3 str r3, [r4, #88] @ 0x58 SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); - 8002982: 6de3 ldr r3, [r4, #92] @ 0x5c - 8002984: 4333 orrs r3, r6 - 8002986: 65e3 str r3, [r4, #92] @ 0x5c + 80029b2: 6de3 ldr r3, [r4, #92] @ 0x5c + 80029b4: 4333 orrs r3, r6 + 80029b6: 65e3 str r3, [r4, #92] @ 0x5c /* Configuration of ADC parameters if previous preliminary actions are */ /* correctly completed and if there is no conversion on going on regular */ /* group (ADC may already be enabled at this point if HAL_ADC_Init() is */ /* called to update a parameter on the fly). */ tmp_adc_reg_is_conversion_on_going = LL_ADC_REG_IsConversionOngoing(hadc->Instance); - 8002988: 0028 movs r0, r5 - 800298a: f7ff ffd3 bl 8002934 + 80029b8: 0028 movs r0, r5 + 80029ba: f7ff ffd3 bl 8002964 if (((hadc->State & HAL_ADC_STATE_ERROR_INTERNAL) == 0UL) - 800298e: 2210 movs r2, #16 - 8002990: 6da3 ldr r3, [r4, #88] @ 0x58 - 8002992: 4013 ands r3, r2 - 8002994: 4303 orrs r3, r0 - 8002996: d000 beq.n 800299a - 8002998: e0cb b.n 8002b32 + 80029be: 2210 movs r2, #16 + 80029c0: 6da3 ldr r3, [r4, #88] @ 0x58 + 80029c2: 4013 ands r3, r2 + 80029c4: 4303 orrs r3, r0 + 80029c6: d000 beq.n 80029ca + 80029c8: e0cb b.n 8002b62 && (tmp_adc_reg_is_conversion_on_going == 0UL) ) { /* Set ADC state */ ADC_STATE_CLR_SET(hadc->State, - 800299a: 6da2 ldr r2, [r4, #88] @ 0x58 - 800299c: 4b67 ldr r3, [pc, #412] @ (8002b3c ) + 80029ca: 6da2 ldr r2, [r4, #88] @ 0x58 + 80029cc: 4b67 ldr r3, [pc, #412] @ (8002b6c ) ADC_CFGR1_AUTOWAIT((uint32_t)hadc->Init.LowPowerAutoWait) | ADC_CFGR1_AUTOOFF((uint32_t)hadc->Init.LowPowerAutoPowerOff) | ADC_CFGR1_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) | ADC_CFGR1_OVERRUN(hadc->Init.Overrun) | hadc->Init.DataAlign | ADC_SCAN_SEQ_MODE(hadc->Init.ScanConvMode) | - 800299e: 6920 ldr r0, [r4, #16] + 80029ce: 6920 ldr r0, [r4, #16] ADC_STATE_CLR_SET(hadc->State, - 80029a0: 401a ands r2, r3 - 80029a2: 3306 adds r3, #6 - 80029a4: 33ff adds r3, #255 @ 0xff - 80029a6: 4313 orrs r3, r2 - 80029a8: 65a3 str r3, [r4, #88] @ 0x58 + 80029d0: 401a ands r2, r3 + 80029d2: 3306 adds r3, #6 + 80029d4: 33ff adds r3, #255 @ 0xff + 80029d6: 4313 orrs r3, r2 + 80029d8: 65a3 str r3, [r4, #88] @ 0x58 return ((READ_BIT(ADCx->CR, ADC_CR_ADEN) == (ADC_CR_ADEN)) ? 1UL : 0UL); - 80029aa: 68ab ldr r3, [r5, #8] - 80029ac: 07db lsls r3, r3, #31 - 80029ae: d461 bmi.n 8002a74 + 80029da: 68ab ldr r3, [r5, #8] + 80029dc: 07db lsls r3, r3, #31 + 80029de: d461 bmi.n 8002aa4 ADC_CFGR1_OVERRUN(hadc->Init.Overrun) | - 80029b0: 6b27 ldr r7, [r4, #48] @ 0x30 - 80029b2: 68e1 ldr r1, [r4, #12] - 80029b4: 1e7b subs r3, r7, #1 - 80029b6: 419f sbcs r7, r3 - 80029b8: 68a3 ldr r3, [r4, #8] + 80029e0: 6b27 ldr r7, [r4, #48] @ 0x30 + 80029e2: 68e1 ldr r1, [r4, #12] + 80029e4: 1e7b subs r3, r7, #1 + 80029e6: 419f sbcs r7, r3 + 80029e8: 68a3 ldr r3, [r4, #8] ADC_CFGR1_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) | - 80029ba: 7ea2 ldrb r2, [r4, #26] - 80029bc: 430b orrs r3, r1 + 80029ea: 7ea2 ldrb r2, [r4, #26] + 80029ec: 430b orrs r3, r1 ADC_CFGR1_AUTOWAIT((uint32_t)hadc->Init.LowPowerAutoWait) | - 80029be: 7e21 ldrb r1, [r4, #24] + 80029ee: 7e21 ldrb r1, [r4, #24] ADC_CFGR1_OVERRUN(hadc->Init.Overrun) | - 80029c0: 033f lsls r7, r7, #12 + 80029f0: 033f lsls r7, r7, #12 ADC_CFGR1_AUTOWAIT((uint32_t)hadc->Init.LowPowerAutoWait) | - 80029c2: 0389 lsls r1, r1, #14 - 80029c4: 430b orrs r3, r1 + 80029f2: 0389 lsls r1, r1, #14 + 80029f4: 430b orrs r3, r1 ADC_CFGR1_AUTOOFF((uint32_t)hadc->Init.LowPowerAutoPowerOff) | - 80029c6: 7e61 ldrb r1, [r4, #25] - 80029c8: 03c9 lsls r1, r1, #15 - 80029ca: 430b orrs r3, r1 + 80029f6: 7e61 ldrb r1, [r4, #25] + 80029f8: 03c9 lsls r1, r1, #15 + 80029fa: 430b orrs r3, r1 ADC_CFGR1_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) | - 80029cc: 0351 lsls r1, r2, #13 - 80029ce: 430b orrs r3, r1 - 80029d0: 469c mov ip, r3 + 80029fc: 0351 lsls r1, r2, #13 + 80029fe: 430b orrs r3, r1 + 8002a00: 469c mov ip, r3 ADC_SCAN_SEQ_MODE(hadc->Init.ScanConvMode) | - 80029d2: 2800 cmp r0, #0 - 80029d4: db00 blt.n 80029d8 - 80029d6: e085 b.n 8002ae4 - 80029d8: 0041 lsls r1, r0, #1 - 80029da: 0849 lsrs r1, r1, #1 + 8002a02: 2800 cmp r0, #0 + 8002a04: db00 blt.n 8002a08 + 8002a06: e085 b.n 8002b14 + 8002a08: 0041 lsls r1, r0, #1 + 8002a0a: 0849 lsrs r1, r1, #1 ADC_CFGR1_DMACONTREQ((uint32_t)hadc->Init.DMAContinuousRequests)); - 80029dc: 0023 movs r3, r4 + 8002a0c: 0023 movs r3, r4 ADC_SCAN_SEQ_MODE(hadc->Init.ScanConvMode) | - 80029de: 4666 mov r6, ip + 8002a0e: 4666 mov r6, ip ADC_CFGR1_DMACONTREQ((uint32_t)hadc->Init.DMAContinuousRequests)); - 80029e0: 332c adds r3, #44 @ 0x2c - 80029e2: 781b ldrb r3, [r3, #0] - 80029e4: 005b lsls r3, r3, #1 + 8002a10: 332c adds r3, #44 @ 0x2c + 8002a12: 781b ldrb r3, [r3, #0] + 8002a14: 005b lsls r3, r3, #1 ADC_SCAN_SEQ_MODE(hadc->Init.ScanConvMode) | - 80029e6: 4333 orrs r3, r6 - 80029e8: 433b orrs r3, r7 - 80029ea: 430b orrs r3, r1 + 8002a16: 4333 orrs r3, r6 + 8002a18: 433b orrs r3, r7 + 8002a1a: 430b orrs r3, r1 /* Update setting of discontinuous mode only if continuous mode is disabled */ if (hadc->Init.DiscontinuousConvMode == ENABLE) - 80029ec: 1c61 adds r1, r4, #1 - 80029ee: 7fc9 ldrb r1, [r1, #31] - 80029f0: 2901 cmp r1, #1 - 80029f2: d105 bne.n 8002a00 + 8002a1c: 1c61 adds r1, r4, #1 + 8002a1e: 7fc9 ldrb r1, [r1, #31] + 8002a20: 2901 cmp r1, #1 + 8002a22: d105 bne.n 8002a30 { if (hadc->Init.ContinuousConvMode == DISABLE) - 80029f4: 2a00 cmp r2, #0 - 80029f6: d000 beq.n 80029fa - 80029f8: e077 b.n 8002aea + 8002a24: 2a00 cmp r2, #0 + 8002a26: d000 beq.n 8002a2a + 8002a28: e077 b.n 8002b1a { /* Enable the selected ADC group regular discontinuous mode */ tmpCFGR1 |= ADC_CFGR1_DISCEN; - 80029fa: 2280 movs r2, #128 @ 0x80 - 80029fc: 0252 lsls r2, r2, #9 - 80029fe: 4313 orrs r3, r2 + 8002a2a: 2280 movs r2, #128 @ 0x80 + 8002a2c: 0252 lsls r2, r2, #9 + 8002a2e: 4313 orrs r3, r2 /* Enable external trigger if trigger selection is different of software */ /* start. */ /* Note: This configuration keeps the hardware feature of parameter */ /* ExternalTrigConvEdge "trigger edge none" equivalent to */ /* software start. */ if (hadc->Init.ExternalTrigConv != ADC_SOFTWARE_START) - 8002a00: 6a62 ldr r2, [r4, #36] @ 0x24 - 8002a02: 2a00 cmp r2, #0 - 8002a04: d005 beq.n 8002a12 + 8002a30: 6a62 ldr r2, [r4, #36] @ 0x24 + 8002a32: 2a00 cmp r2, #0 + 8002a34: d005 beq.n 8002a42 { tmpCFGR1 |= ((hadc->Init.ExternalTrigConv & ADC_CFGR1_EXTSEL) | - 8002a06: 21e0 movs r1, #224 @ 0xe0 - 8002a08: 0049 lsls r1, r1, #1 - 8002a0a: 400a ands r2, r1 - 8002a0c: 6aa1 ldr r1, [r4, #40] @ 0x28 - 8002a0e: 430a orrs r2, r1 - 8002a10: 4313 orrs r3, r2 + 8002a36: 21e0 movs r1, #224 @ 0xe0 + 8002a38: 0049 lsls r1, r1, #1 + 8002a3a: 400a ands r2, r1 + 8002a3c: 6aa1 ldr r1, [r4, #40] @ 0x28 + 8002a3e: 430a orrs r2, r1 + 8002a40: 4313 orrs r3, r2 hadc->Init.ExternalTrigConvEdge); } /* Update ADC configuration register with previous settings */ MODIFY_REG(hadc->Instance->CFGR1, - 8002a12: 68ea ldr r2, [r5, #12] - 8002a14: 494a ldr r1, [pc, #296] @ (8002b40 ) - 8002a16: 400a ands r2, r1 - 8002a18: 4313 orrs r3, r2 - 8002a1a: 60eb str r3, [r5, #12] + 8002a42: 68ea ldr r2, [r5, #12] + 8002a44: 494a ldr r1, [pc, #296] @ (8002b70 ) + 8002a46: 400a ands r2, r1 + 8002a48: 4313 orrs r3, r2 + 8002a4a: 60eb str r3, [r5, #12] tmpCFGR2 |= ((hadc->Init.ClockPrescaler & ADC_CFGR2_CKMODE) | hadc->Init.TriggerFrequencyMode ); if (hadc->Init.OversamplingMode == ENABLE) - 8002a1c: 0023 movs r3, r4 + 8002a4c: 0023 movs r3, r4 tmpCFGR2 |= ((hadc->Init.ClockPrescaler & ADC_CFGR2_CKMODE) | - 8002a1e: 6862 ldr r2, [r4, #4] + 8002a4e: 6862 ldr r2, [r4, #4] if (hadc->Init.OversamplingMode == ENABLE) - 8002a20: 333c adds r3, #60 @ 0x3c + 8002a50: 333c adds r3, #60 @ 0x3c tmpCFGR2 |= ((hadc->Init.ClockPrescaler & ADC_CFGR2_CKMODE) | - 8002a22: 6ce1 ldr r1, [r4, #76] @ 0x4c + 8002a52: 6ce1 ldr r1, [r4, #76] @ 0x4c if (hadc->Init.OversamplingMode == ENABLE) - 8002a24: 781b ldrb r3, [r3, #0] + 8002a54: 781b ldrb r3, [r3, #0] tmpCFGR2 |= ((hadc->Init.ClockPrescaler & ADC_CFGR2_CKMODE) | - 8002a26: 0f97 lsrs r7, r2, #30 - 8002a28: 07bf lsls r7, r7, #30 + 8002a56: 0f97 lsrs r7, r2, #30 + 8002a58: 07bf lsls r7, r7, #30 if (hadc->Init.OversamplingMode == ENABLE) - 8002a2a: 469c mov ip, r3 + 8002a5a: 469c mov ip, r3 tmpCFGR2 |= ((hadc->Init.ClockPrescaler & ADC_CFGR2_CKMODE) | - 8002a2c: 4339 orrs r1, r7 + 8002a5c: 4339 orrs r1, r7 if (hadc->Init.OversamplingMode == ENABLE) - 8002a2e: 2b01 cmp r3, #1 - 8002a30: d108 bne.n 8002a44 + 8002a5e: 2b01 cmp r3, #1 + 8002a60: d108 bne.n 8002a74 { tmpCFGR2 |= (ADC_CFGR2_OVSE | - 8002a32: 6c23 ldr r3, [r4, #64] @ 0x40 - 8002a34: 6c66 ldr r6, [r4, #68] @ 0x44 - 8002a36: 4333 orrs r3, r6 - 8002a38: 430b orrs r3, r1 - 8002a3a: 6ca1 ldr r1, [r4, #72] @ 0x48 - 8002a3c: 430b orrs r3, r1 - 8002a3e: 4661 mov r1, ip - 8002a40: 433b orrs r3, r7 - 8002a42: 4319 orrs r1, r3 + 8002a62: 6c23 ldr r3, [r4, #64] @ 0x40 + 8002a64: 6c66 ldr r6, [r4, #68] @ 0x44 + 8002a66: 4333 orrs r3, r6 + 8002a68: 430b orrs r3, r1 + 8002a6a: 6ca1 ldr r1, [r4, #72] @ 0x48 + 8002a6c: 430b orrs r3, r1 + 8002a6e: 4661 mov r1, ip + 8002a70: 433b orrs r3, r7 + 8002a72: 4319 orrs r1, r3 hadc->Init.Oversampling.RightBitShift | hadc->Init.Oversampling.TriggeredMode ); } MODIFY_REG(hadc->Instance->CFGR2, - 8002a44: 692b ldr r3, [r5, #16] - 8002a46: 4f3f ldr r7, [pc, #252] @ (8002b44 ) - 8002a48: 403b ands r3, r7 - 8002a4a: 430b orrs r3, r1 + 8002a74: 692b ldr r3, [r5, #16] + 8002a76: 4f3f ldr r7, [pc, #252] @ (8002b74 ) + 8002a78: 403b ands r3, r7 + 8002a7a: 430b orrs r3, r1 ADC_CFGR2_TOVS, tmpCFGR2); /* Configuration of ADC clock mode: asynchronous clock source */ /* with selectable prescaler. */ if (((hadc->Init.ClockPrescaler) != ADC_CLOCK_SYNC_PCLK_DIV1) && - 8002a4c: 2180 movs r1, #128 @ 0x80 + 8002a7c: 2180 movs r1, #128 @ 0x80 MODIFY_REG(hadc->Instance->CFGR2, - 8002a4e: 612b str r3, [r5, #16] + 8002a7e: 612b str r3, [r5, #16] if (((hadc->Init.ClockPrescaler) != ADC_CLOCK_SYNC_PCLK_DIV1) && - 8002a50: 0053 lsls r3, r2, #1 - 8002a52: 085b lsrs r3, r3, #1 - 8002a54: 05c9 lsls r1, r1, #23 - 8002a56: 428b cmp r3, r1 - 8002a58: d00c beq.n 8002a74 + 8002a80: 0053 lsls r3, r2, #1 + 8002a82: 085b lsrs r3, r3, #1 + 8002a84: 05c9 lsls r1, r1, #23 + 8002a86: 428b cmp r3, r1 + 8002a88: d00c beq.n 8002aa4 ((hadc->Init.ClockPrescaler) != ADC_CLOCK_SYNC_PCLK_DIV2) && - 8002a5a: 2380 movs r3, #128 @ 0x80 - 8002a5c: 061b lsls r3, r3, #24 - 8002a5e: 429a cmp r2, r3 - 8002a60: d008 beq.n 8002a74 + 8002a8a: 2380 movs r3, #128 @ 0x80 + 8002a8c: 061b lsls r3, r3, #24 + 8002a8e: 429a cmp r2, r3 + 8002a90: d008 beq.n 8002aa4 ((hadc->Init.ClockPrescaler) != ADC_CLOCK_SYNC_PCLK_DIV4)) { MODIFY_REG(ADC1_COMMON->CCR, - 8002a62: 4939 ldr r1, [pc, #228] @ (8002b48 ) - 8002a64: 4f39 ldr r7, [pc, #228] @ (8002b4c ) - 8002a66: 680b ldr r3, [r1, #0] - 8002a68: 403b ands r3, r7 - 8002a6a: 27f0 movs r7, #240 @ 0xf0 - 8002a6c: 03bf lsls r7, r7, #14 - 8002a6e: 403a ands r2, r7 - 8002a70: 4313 orrs r3, r2 - 8002a72: 600b str r3, [r1, #0] + 8002a92: 4939 ldr r1, [pc, #228] @ (8002b78 ) + 8002a94: 4f39 ldr r7, [pc, #228] @ (8002b7c ) + 8002a96: 680b ldr r3, [r1, #0] + 8002a98: 403b ands r3, r7 + 8002a9a: 27f0 movs r7, #240 @ 0xf0 + 8002a9c: 03bf lsls r7, r7, #14 + 8002a9e: 403a ands r2, r7 + 8002aa0: 4313 orrs r3, r2 + 8002aa2: 600b str r3, [r1, #0] MODIFY_REG(ADCx->SMPR, - 8002a74: 2107 movs r1, #7 - 8002a76: 2770 movs r7, #112 @ 0x70 - 8002a78: 696b ldr r3, [r5, #20] + 8002aa4: 2107 movs r1, #7 + 8002aa6: 2770 movs r7, #112 @ 0x70 + 8002aa8: 696b ldr r3, [r5, #20] hadc->Init.ClockPrescaler & ADC_CCR_PRESC); } } /* Channel sampling time configuration */ LL_ADC_SetSamplingTimeCommonChannels(hadc->Instance, LL_ADC_SAMPLINGTIME_COMMON_1, hadc->Init.SamplingTimeCommon1); - 8002a7a: 6b62 ldr r2, [r4, #52] @ 0x34 - 8002a7c: 438b bics r3, r1 - 8002a7e: 4313 orrs r3, r2 - 8002a80: 616b str r3, [r5, #20] - 8002a82: 6969 ldr r1, [r5, #20] - 8002a84: 6ba3 ldr r3, [r4, #56] @ 0x38 - 8002a86: 43b9 bics r1, r7 - 8002a88: 011b lsls r3, r3, #4 - 8002a8a: 430b orrs r3, r1 - 8002a8c: 616b str r3, [r5, #20] + 8002aaa: 6b62 ldr r2, [r4, #52] @ 0x34 + 8002aac: 438b bics r3, r1 + 8002aae: 4313 orrs r3, r2 + 8002ab0: 616b str r3, [r5, #20] + 8002ab2: 6969 ldr r1, [r5, #20] + 8002ab4: 6ba3 ldr r3, [r4, #56] @ 0x38 + 8002ab6: 43b9 bics r1, r7 + 8002ab8: 011b lsls r3, r3, #4 + 8002aba: 430b orrs r3, r1 + 8002abc: 616b str r3, [r5, #20] /* emulated by software for alignment over all STM32 devices. */ /* - if scan mode is enabled, regular channels sequence length is set to */ /* parameter "NbrOfConversion". */ /* Channels must be configured into each rank using function */ /* "HAL_ADC_ConfigChannel()". */ if (hadc->Init.ScanConvMode == ADC_SCAN_DISABLE) - 8002a8e: 2800 cmp r0, #0 - 8002a90: d133 bne.n 8002afa + 8002abe: 2800 cmp r0, #0 + 8002ac0: d133 bne.n 8002b2a { /* Set sequencer scan length by clearing ranks above rank 1 */ /* and do not modify rank 1 value. */ SET_BIT(hadc->Instance->CHSELR, - 8002a92: 2310 movs r3, #16 - 8002a94: 6aa9 ldr r1, [r5, #40] @ 0x28 - 8002a96: 425b negs r3, r3 + 8002ac2: 2310 movs r3, #16 + 8002ac4: 6aa9 ldr r1, [r5, #40] @ 0x28 + 8002ac6: 425b negs r3, r3 /* therefore after the first call of "HAL_ADC_Init()", */ /* each rank corresponding to parameter "NbrOfConversion" */ /* must be set using "HAL_ADC_ConfigChannel()". */ /* - Set sequencer scan length by clearing ranks above maximum rank */ /* and do not modify other ranks value. */ MODIFY_REG(hadc->Instance->CHSELR, - 8002a98: 430b orrs r3, r1 - 8002a9a: 62ab str r3, [r5, #40] @ 0x28 + 8002ac8: 430b orrs r3, r1 + 8002aca: 62ab str r3, [r5, #40] @ 0x28 return (uint32_t)((READ_BIT(ADCx->SMPR, ADC_SMPR_SMP1 << (SamplingTimeY & ADC_SAMPLING_TIME_SMP_SHIFT_MASK))) - 8002a9c: 2107 movs r1, #7 - 8002a9e: 696b ldr r3, [r5, #20] - 8002aa0: 400b ands r3, r1 + 8002acc: 2107 movs r1, #7 + 8002ace: 696b ldr r3, [r5, #20] + 8002ad0: 400b ands r3, r1 { /* Nothing to do */ } /* Check back that ADC registers have effectively been configured to */ /* ensure of no potential problem of ADC core peripheral clocking. */ if (LL_ADC_GetSamplingTimeCommonChannels(hadc->Instance, LL_ADC_SAMPLINGTIME_COMMON_1) - 8002aa2: 429a cmp r2, r3 - 8002aa4: d138 bne.n 8002b18 + 8002ad2: 429a cmp r2, r3 + 8002ad4: d138 bne.n 8002b48 == hadc->Init.SamplingTimeCommon1) { /* Set ADC error code to none */ ADC_CLEAR_ERRORCODE(hadc); - 8002aa6: 2300 movs r3, #0 - 8002aa8: 65e3 str r3, [r4, #92] @ 0x5c + 8002ad6: 2300 movs r3, #0 + 8002ad8: 65e3 str r3, [r4, #92] @ 0x5c /* Set the ADC state */ ADC_STATE_CLR_SET(hadc->State, - 8002aaa: 6da2 ldr r2, [r4, #88] @ 0x58 - 8002aac: 3303 adds r3, #3 - 8002aae: 439a bics r2, r3 - 8002ab0: 3b02 subs r3, #2 - 8002ab2: 4313 orrs r3, r2 - 8002ab4: 65a3 str r3, [r4, #88] @ 0x58 + 8002ada: 6da2 ldr r2, [r4, #88] @ 0x58 + 8002adc: 3303 adds r3, #3 + 8002ade: 439a bics r2, r3 + 8002ae0: 3b02 subs r3, #2 + 8002ae2: 4313 orrs r3, r2 + 8002ae4: 65a3 str r3, [r4, #88] @ 0x58 tmp_hal_status = HAL_ERROR; } /* Return function status */ return tmp_hal_status; } - 8002ab6: 9801 ldr r0, [sp, #4] - 8002ab8: b005 add sp, #20 - 8002aba: bdf0 pop {r4, r5, r6, r7, pc} + 8002ae6: 9801 ldr r0, [sp, #4] + 8002ae8: b005 add sp, #20 + 8002aea: bdf0 pop {r4, r5, r6, r7, pc} MODIFY_REG(ADCx->CR, - 8002abc: 68aa ldr r2, [r5, #8] - 8002abe: 4924 ldr r1, [pc, #144] @ (8002b50 ) - 8002ac0: 400a ands r2, r1 - 8002ac2: 4313 orrs r3, r2 - 8002ac4: 60ab str r3, [r5, #8] + 8002aec: 68aa ldr r2, [r5, #8] + 8002aee: 4924 ldr r1, [pc, #144] @ (8002b80 ) + 8002af0: 400a ands r2, r1 + 8002af2: 4313 orrs r3, r2 + 8002af4: 60ab str r3, [r5, #8] wait_loop_index = ((LL_ADC_DELAY_INTERNAL_REGUL_STAB_US / 10UL) * (SystemCoreClock / (100000UL * 2UL))); - 8002ac6: 4b23 ldr r3, [pc, #140] @ (8002b54 ) - 8002ac8: 4923 ldr r1, [pc, #140] @ (8002b58 ) - 8002aca: 6818 ldr r0, [r3, #0] - 8002acc: f7fd fb30 bl 8000130 <__udivsi3> - 8002ad0: 0040 lsls r0, r0, #1 - 8002ad2: 9003 str r0, [sp, #12] + 8002af6: 4b23 ldr r3, [pc, #140] @ (8002b84 ) + 8002af8: 4923 ldr r1, [pc, #140] @ (8002b88 ) + 8002afa: 6818 ldr r0, [r3, #0] + 8002afc: f7fd fb18 bl 8000130 <__udivsi3> + 8002b00: 0040 lsls r0, r0, #1 + 8002b02: 9003 str r0, [sp, #12] while (wait_loop_index != 0UL) - 8002ad4: 9b03 ldr r3, [sp, #12] - 8002ad6: 2b00 cmp r3, #0 - 8002ad8: d100 bne.n 8002adc - 8002ada: e747 b.n 800296c + 8002b04: 9b03 ldr r3, [sp, #12] + 8002b06: 2b00 cmp r3, #0 + 8002b08: d100 bne.n 8002b0c + 8002b0a: e747 b.n 800299c wait_loop_index--; - 8002adc: 9b03 ldr r3, [sp, #12] - 8002ade: 3b01 subs r3, #1 - 8002ae0: 9303 str r3, [sp, #12] - 8002ae2: e7f7 b.n 8002ad4 + 8002b0c: 9b03 ldr r3, [sp, #12] + 8002b0e: 3b01 subs r3, #1 + 8002b10: 9303 str r3, [sp, #12] + 8002b12: e7f7 b.n 8002b04 ADC_SCAN_SEQ_MODE(hadc->Init.ScanConvMode) | - 8002ae4: 2180 movs r1, #128 @ 0x80 - 8002ae6: 0389 lsls r1, r1, #14 - 8002ae8: e778 b.n 80029dc + 8002b14: 2180 movs r1, #128 @ 0x80 + 8002b16: 0389 lsls r1, r1, #14 + 8002b18: e778 b.n 8002a0c SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); - 8002aea: 2220 movs r2, #32 - 8002aec: 6da7 ldr r7, [r4, #88] @ 0x58 - 8002aee: 433a orrs r2, r7 - 8002af0: 65a2 str r2, [r4, #88] @ 0x58 + 8002b1a: 2220 movs r2, #32 + 8002b1c: 6da7 ldr r7, [r4, #88] @ 0x58 + 8002b1e: 433a orrs r2, r7 + 8002b20: 65a2 str r2, [r4, #88] @ 0x58 SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); - 8002af2: 6de2 ldr r2, [r4, #92] @ 0x5c - 8002af4: 4311 orrs r1, r2 - 8002af6: 65e1 str r1, [r4, #92] @ 0x5c - 8002af8: e782 b.n 8002a00 + 8002b22: 6de2 ldr r2, [r4, #92] @ 0x5c + 8002b24: 4311 orrs r1, r2 + 8002b26: 65e1 str r1, [r4, #92] @ 0x5c + 8002b28: e782 b.n 8002a30 else if (hadc->Init.ScanConvMode == ADC_SCAN_ENABLE) - 8002afa: 2380 movs r3, #128 @ 0x80 - 8002afc: 039b lsls r3, r3, #14 - 8002afe: 4298 cmp r0, r3 - 8002b00: d1cc bne.n 8002a9c + 8002b2a: 2380 movs r3, #128 @ 0x80 + 8002b2c: 039b lsls r3, r3, #14 + 8002b2e: 4298 cmp r0, r3 + 8002b30: d1cc bne.n 8002acc MODIFY_REG(hadc->Instance->CHSELR, - 8002b02: 211c movs r1, #28 - 8002b04: 6aab ldr r3, [r5, #40] @ 0x28 - 8002b06: 69e3 ldr r3, [r4, #28] - 8002b08: 3b01 subs r3, #1 - 8002b0a: 009b lsls r3, r3, #2 - 8002b0c: 400b ands r3, r1 - 8002b0e: 392c subs r1, #44 @ 0x2c - 8002b10: 4099 lsls r1, r3 - 8002b12: 000b movs r3, r1 - 8002b14: 6e21 ldr r1, [r4, #96] @ 0x60 - 8002b16: e7bf b.n 8002a98 + 8002b32: 211c movs r1, #28 + 8002b34: 6aab ldr r3, [r5, #40] @ 0x28 + 8002b36: 69e3 ldr r3, [r4, #28] + 8002b38: 3b01 subs r3, #1 + 8002b3a: 009b lsls r3, r3, #2 + 8002b3c: 400b ands r3, r1 + 8002b3e: 392c subs r1, #44 @ 0x2c + 8002b40: 4099 lsls r1, r3 + 8002b42: 000b movs r3, r1 + 8002b44: 6e21 ldr r1, [r4, #96] @ 0x60 + 8002b46: e7bf b.n 8002ac8 ADC_STATE_CLR_SET(hadc->State, - 8002b18: 2312 movs r3, #18 - 8002b1a: 6da2 ldr r2, [r4, #88] @ 0x58 - 8002b1c: 439a bics r2, r3 - 8002b1e: 3b02 subs r3, #2 - 8002b20: 4313 orrs r3, r2 - 8002b22: 65a3 str r3, [r4, #88] @ 0x58 + 8002b48: 2312 movs r3, #18 + 8002b4a: 6da2 ldr r2, [r4, #88] @ 0x58 + 8002b4c: 439a bics r2, r3 + 8002b4e: 3b02 subs r3, #2 + 8002b50: 4313 orrs r3, r2 + 8002b52: 65a3 str r3, [r4, #88] @ 0x58 SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); - 8002b24: 2301 movs r3, #1 - 8002b26: 6de2 ldr r2, [r4, #92] @ 0x5c - 8002b28: 4313 orrs r3, r2 - 8002b2a: 65e3 str r3, [r4, #92] @ 0x5c + 8002b54: 2301 movs r3, #1 + 8002b56: 6de2 ldr r2, [r4, #92] @ 0x5c + 8002b58: 4313 orrs r3, r2 + 8002b5a: 65e3 str r3, [r4, #92] @ 0x5c return HAL_ERROR; - 8002b2c: 2301 movs r3, #1 - 8002b2e: 9301 str r3, [sp, #4] - 8002b30: e7c1 b.n 8002ab6 + 8002b5c: 2301 movs r3, #1 + 8002b5e: 9301 str r3, [sp, #4] + 8002b60: e7c1 b.n 8002ae6 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); - 8002b32: 6da3 ldr r3, [r4, #88] @ 0x58 - 8002b34: 431a orrs r2, r3 - 8002b36: 65a2 str r2, [r4, #88] @ 0x58 + 8002b62: 6da3 ldr r3, [r4, #88] @ 0x58 + 8002b64: 431a orrs r2, r3 + 8002b66: 65a2 str r2, [r4, #88] @ 0x58 tmp_hal_status = HAL_ERROR; - 8002b38: e7f8 b.n 8002b2c - 8002b3a: 46c0 nop @ (mov r8, r8) - 8002b3c: fffffefd .word 0xfffffefd - 8002b40: ffde0201 .word 0xffde0201 - 8002b44: 1ffffc02 .word 0x1ffffc02 - 8002b48: 40012708 .word 0x40012708 - 8002b4c: ffc3ffff .word 0xffc3ffff - 8002b50: 6fffffe8 .word 0x6fffffe8 - 8002b54: 20000024 .word 0x20000024 - 8002b58: 00030d40 .word 0x00030d40 + 8002b68: e7f8 b.n 8002b5c + 8002b6a: 46c0 nop @ (mov r8, r8) + 8002b6c: fffffefd .word 0xfffffefd + 8002b70: ffde0201 .word 0xffde0201 + 8002b74: 1ffffc02 .word 0x1ffffc02 + 8002b78: 40012708 .word 0x40012708 + 8002b7c: ffc3ffff .word 0xffc3ffff + 8002b80: 6fffffe8 .word 0x6fffffe8 + 8002b84: 20000028 .word 0x20000028 + 8002b88: 00030d40 .word 0x00030d40 -08002b5c : +08002b8c : */ HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef *hadc, const ADC_ChannelConfTypeDef *sConfig) { HAL_StatusTypeDef tmp_hal_status = HAL_OK; uint32_t tmp_config_internal_channel; __IO uint32_t wait_loop_index = 0UL; - 8002b5c: 2300 movs r3, #0 + 8002b8c: 2300 movs r3, #0 { - 8002b5e: b5f0 push {r4, r5, r6, r7, lr} - 8002b60: b085 sub sp, #20 + 8002b8e: b5f0 push {r4, r5, r6, r7, lr} + 8002b90: b085 sub sp, #20 __IO uint32_t wait_loop_index = 0UL; - 8002b62: 9303 str r3, [sp, #12] + 8002b92: 9303 str r3, [sp, #12] assert_param(IS_ADC_REGULAR_RANK(sConfig->Rank)); } /* Process locked */ __HAL_LOCK(hadc); - 8002b64: 0003 movs r3, r0 + 8002b94: 0003 movs r3, r0 { - 8002b66: 9100 str r1, [sp, #0] + 8002b96: 9100 str r1, [sp, #0] __HAL_LOCK(hadc); - 8002b68: 3354 adds r3, #84 @ 0x54 - 8002b6a: 781a ldrb r2, [r3, #0] + 8002b98: 3354 adds r3, #84 @ 0x54 + 8002b9a: 781a ldrb r2, [r3, #0] { - 8002b6c: 0004 movs r4, r0 + 8002b9c: 0004 movs r4, r0 __HAL_LOCK(hadc); - 8002b6e: 2002 movs r0, #2 - 8002b70: 2a01 cmp r2, #1 - 8002b72: d04d beq.n 8002c10 - 8002b74: 2201 movs r2, #1 + 8002b9e: 2002 movs r0, #2 + 8002ba0: 2a01 cmp r2, #1 + 8002ba2: d04d beq.n 8002c40 + 8002ba4: 2201 movs r2, #1 if ((hadc->Init.ScanConvMode == ADC_SCAN_SEQ_FIXED) || - 8002b76: 6927 ldr r7, [r4, #16] + 8002ba6: 6927 ldr r7, [r4, #16] __HAL_LOCK(hadc); - 8002b78: 701a strb r2, [r3, #0] + 8002ba8: 701a strb r2, [r3, #0] /* Parameters that can be updated when ADC is disabled or enabled without */ /* conversion on going on regular group: */ /* - Channel number */ /* - Channel sampling time */ /* - Management of internal measurement channels: VrefInt/TempSensor */ if (LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 0UL) - 8002b7a: 6825 ldr r5, [r4, #0] - 8002b7c: 0028 movs r0, r5 - 8002b7e: f7ff fed9 bl 8002934 - 8002b82: 2800 cmp r0, #0 - 8002b84: d000 beq.n 8002b88 - 8002b86: e0f9 b.n 8002d7c + 8002baa: 6825 ldr r5, [r4, #0] + 8002bac: 0028 movs r0, r5 + 8002bae: f7ff fed9 bl 8002964 + 8002bb2: 2800 cmp r0, #0 + 8002bb4: d000 beq.n 8002bb8 + 8002bb6: e0f9 b.n 8002dac /* If sequencer set to not fully configurable with channel rank set to */ /* none, remove the channel from the sequencer. */ /* Otherwise (sequencer set to fully configurable or to to not fully */ /* configurable with channel rank to be set), configure the selected */ /* channel. */ if (sConfig->Rank != ADC_RANK_NONE) - 8002b88: 9b00 ldr r3, [sp, #0] + 8002bb8: 9b00 ldr r3, [sp, #0] /* Note: ADC channel configuration requires few ADC clock cycles */ /* to be ready. Processing of ADC settings in this function */ /* induce that a specific wait time is not necessary. */ /* For more details on ADC channel configuration ready, */ /* refer to function "LL_ADC_IsActiveFlag_CCRDY()". */ if ((hadc->Init.ScanConvMode == ADC_SCAN_SEQ_FIXED) || - 8002b8a: 2204 movs r2, #4 + 8002bba: 2204 movs r2, #4 if (sConfig->Rank != ADC_RANK_NONE) - 8002b8c: 685b ldr r3, [r3, #4] - 8002b8e: 2180 movs r1, #128 @ 0x80 - 8002b90: 469c mov ip, r3 + 8002bbc: 685b ldr r3, [r3, #4] + 8002bbe: 2180 movs r1, #128 @ 0x80 + 8002bc0: 469c mov ip, r3 if ((hadc->Init.ScanConvMode == ADC_SCAN_SEQ_FIXED) || - 8002b92: 4397 bics r7, r2 + 8002bc2: 4397 bics r7, r2 if (sConfig->Rank != ADC_RANK_NONE) - 8002b94: 4662 mov r2, ip + 8002bc4: 4662 mov r2, ip (hadc->Init.ScanConvMode == ADC_SCAN_SEQ_FIXED_BACKWARD)) { /* Sequencer set to not fully configurable: */ /* Set the channel by enabling the corresponding bitfield. */ LL_ADC_REG_SetSequencerChAdd(hadc->Instance, sConfig->Channel); - 8002b96: 9b00 ldr r3, [sp, #0] - 8002b98: 0609 lsls r1, r1, #24 - 8002b9a: 681b ldr r3, [r3, #0] + 8002bc6: 9b00 ldr r3, [sp, #0] + 8002bc8: 0609 lsls r1, r1, #24 + 8002bca: 681b ldr r3, [r3, #0] if (sConfig->Rank != ADC_RANK_NONE) - 8002b9c: 2a02 cmp r2, #2 - 8002b9e: d100 bne.n 8002ba2 - 8002ba0: e0c7 b.n 8002d32 + 8002bcc: 2a02 cmp r2, #2 + 8002bce: d100 bne.n 8002bd2 + 8002bd0: e0c7 b.n 8002d62 SET_BIT(ADCx->CHSELR, (Channel & ADC_CHANNEL_ID_BITFIELD_MASK)); - 8002ba2: 025a lsls r2, r3, #9 - 8002ba4: 0a52 lsrs r2, r2, #9 + 8002bd2: 025a lsls r2, r3, #9 + 8002bd4: 0a52 lsrs r2, r2, #9 if ((hadc->Init.ScanConvMode == ADC_SCAN_SEQ_FIXED) || - 8002ba6: 428f cmp r7, r1 - 8002ba8: d134 bne.n 8002c14 - 8002baa: 6aa9 ldr r1, [r5, #40] @ 0x28 + 8002bd6: 428f cmp r7, r1 + 8002bd8: d134 bne.n 8002c44 + 8002bda: 6aa9 ldr r1, [r5, #40] @ 0x28 MODIFY_REG(ADCx->CHSELR, - 8002bac: 430a orrs r2, r1 - 8002bae: 62aa str r2, [r5, #40] @ 0x28 + 8002bdc: 430a orrs r2, r1 + 8002bde: 62aa str r2, [r5, #40] @ 0x28 MODIFY_REG(ADCx->SMPR, - 8002bb0: 9a00 ldr r2, [sp, #0] - 8002bb2: 6968 ldr r0, [r5, #20] - 8002bb4: 6892 ldr r2, [r2, #8] - 8002bb6: 0219 lsls r1, r3, #8 - 8002bb8: 4e73 ldr r6, [pc, #460] @ (8002d88 ) - 8002bba: 400a ands r2, r1 - 8002bbc: 4032 ands r2, r6 - 8002bbe: 4388 bics r0, r1 - 8002bc0: 4302 orrs r2, r0 - 8002bc2: 616a str r2, [r5, #20] + 8002be0: 9a00 ldr r2, [sp, #0] + 8002be2: 6968 ldr r0, [r5, #20] + 8002be4: 6892 ldr r2, [r2, #8] + 8002be6: 0219 lsls r1, r3, #8 + 8002be8: 4e73 ldr r6, [pc, #460] @ (8002db8 ) + 8002bea: 400a ands r2, r1 + 8002bec: 4032 ands r2, r6 + 8002bee: 4388 bics r0, r1 + 8002bf0: 4302 orrs r2, r0 + 8002bf2: 616a str r2, [r5, #20] /* internal measurement paths enable: If internal channel selected, */ /* enable dedicated internal buffers and path. */ /* Note: these internal measurement paths can be disabled using */ /* HAL_ADC_DeInit() or removing the channel from sequencer with */ /* channel configuration parameter "Rank". */ if (__LL_ADC_IS_CHANNEL_INTERNAL(sConfig->Channel)) - 8002bc4: 2b00 cmp r3, #0 - 8002bc6: da1f bge.n 8002c08 + 8002bf4: 2b00 cmp r3, #0 + 8002bf6: da1f bge.n 8002c38 return (uint32_t)(READ_BIT(ADCxy_COMMON->CCR, ADC_CCR_VREFEN | ADC_CCR_TSEN)); - 8002bc8: 20c0 movs r0, #192 @ 0xc0 - 8002bca: 4a70 ldr r2, [pc, #448] @ (8002d8c ) + 8002bf8: 20c0 movs r0, #192 @ 0xc0 + 8002bfa: 4a70 ldr r2, [pc, #448] @ (8002dbc ) { tmp_config_internal_channel = LL_ADC_GetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Instance)); /* If the requested internal measurement path has already been enabled, */ /* bypass the configuration processing. */ if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) && - 8002bcc: 4970 ldr r1, [pc, #448] @ (8002d90 ) - 8002bce: 6815 ldr r5, [r2, #0] - 8002bd0: 0400 lsls r0, r0, #16 - 8002bd2: 4028 ands r0, r5 - 8002bd4: 428b cmp r3, r1 - 8002bd6: d000 beq.n 8002bda - 8002bd8: e09b b.n 8002d12 + 8002bfc: 4970 ldr r1, [pc, #448] @ (8002dc0 ) + 8002bfe: 6815 ldr r5, [r2, #0] + 8002c00: 0400 lsls r0, r0, #16 + 8002c02: 4028 ands r0, r5 + 8002c04: 428b cmp r3, r1 + 8002c06: d000 beq.n 8002c0a + 8002c08: e09b b.n 8002d42 ((tmp_config_internal_channel & LL_ADC_PATH_INTERNAL_TEMPSENSOR) == 0UL)) - 8002bda: 2180 movs r1, #128 @ 0x80 - 8002bdc: 0409 lsls r1, r1, #16 + 8002c0a: 2180 movs r1, #128 @ 0x80 + 8002c0c: 0409 lsls r1, r1, #16 if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) && - 8002bde: 420d tst r5, r1 - 8002be0: d112 bne.n 8002c08 + 8002c0e: 420d tst r5, r1 + 8002c10: d112 bne.n 8002c38 MODIFY_REG(ADCxy_COMMON->CCR, ADC_CCR_VREFEN | ADC_CCR_TSEN, PathInternal); - 8002be2: 6813 ldr r3, [r2, #0] - 8002be4: 4d6b ldr r5, [pc, #428] @ (8002d94 ) - 8002be6: 402b ands r3, r5 - 8002be8: 4303 orrs r3, r0 - 8002bea: 4319 orrs r1, r3 + 8002c12: 6813 ldr r3, [r2, #0] + 8002c14: 4d6b ldr r5, [pc, #428] @ (8002dc4 ) + 8002c16: 402b ands r3, r5 + 8002c18: 4303 orrs r3, r0 + 8002c1a: 4319 orrs r1, r3 /* Delay for temperature sensor stabilization time */ /* Wait loop initialization and execution */ /* Note: Variable divided by 2 to compensate partially */ /* CPU processing cycles, scaling in us split to not */ /* exceed 32 bits register capacity and handle low frequency. */ wait_loop_index = (((LL_ADC_DELAY_TEMPSENSOR_STAB_US / 10UL) * (SystemCoreClock / (100000UL * 2UL))) + 1UL); - 8002bec: 4b6a ldr r3, [pc, #424] @ (8002d98 ) - 8002bee: 6011 str r1, [r2, #0] - 8002bf0: 6818 ldr r0, [r3, #0] - 8002bf2: 496a ldr r1, [pc, #424] @ (8002d9c ) - 8002bf4: f7fd fa9c bl 8000130 <__udivsi3> - 8002bf8: 230c movs r3, #12 - 8002bfa: 4343 muls r3, r0 - 8002bfc: 3301 adds r3, #1 + 8002c1c: 4b6a ldr r3, [pc, #424] @ (8002dc8 ) + 8002c1e: 6011 str r1, [r2, #0] + 8002c20: 6818 ldr r0, [r3, #0] + 8002c22: 496a ldr r1, [pc, #424] @ (8002dcc ) + 8002c24: f7fd fa84 bl 8000130 <__udivsi3> + 8002c28: 230c movs r3, #12 + 8002c2a: 4343 muls r3, r0 + 8002c2c: 3301 adds r3, #1 while (wait_loop_index != 0UL) { wait_loop_index--; - 8002bfe: 9303 str r3, [sp, #12] + 8002c2e: 9303 str r3, [sp, #12] while (wait_loop_index != 0UL) - 8002c00: 9b03 ldr r3, [sp, #12] - 8002c02: 2b00 cmp r3, #0 - 8002c04: d000 beq.n 8002c08 - 8002c06: e081 b.n 8002d0c + 8002c30: 9b03 ldr r3, [sp, #12] + 8002c32: 2b00 cmp r3, #0 + 8002c34: d000 beq.n 8002c38 + 8002c36: e081 b.n 8002d3c HAL_StatusTypeDef tmp_hal_status = HAL_OK; - 8002c08: 2000 movs r0, #0 + 8002c38: 2000 movs r0, #0 tmp_hal_status = HAL_ERROR; } /* Process unlocked */ __HAL_UNLOCK(hadc); - 8002c0a: 2300 movs r3, #0 - 8002c0c: 3454 adds r4, #84 @ 0x54 - 8002c0e: 7023 strb r3, [r4, #0] + 8002c3a: 2300 movs r3, #0 + 8002c3c: 3454 adds r4, #84 @ 0x54 + 8002c3e: 7023 strb r3, [r4, #0] /* Return function status */ return tmp_hal_status; } - 8002c10: b005 add sp, #20 - 8002c12: bdf0 pop {r4, r5, r6, r7, pc} + 8002c40: b005 add sp, #20 + 8002c42: bdf0 pop {r4, r5, r6, r7, pc} MODIFY_REG(hadc->ADCGroupRegularSequencerRanks, - 8002c14: 211f movs r1, #31 - 8002c16: 4667 mov r7, ip - 8002c18: 400f ands r7, r1 - 8002c1a: 3910 subs r1, #16 - 8002c1c: 40b9 lsls r1, r7 - 8002c1e: 43ce mvns r6, r1 - 8002c20: 9601 str r6, [sp, #4] - 8002c22: 6e26 ldr r6, [r4, #96] @ 0x60 - 8002c24: 438e bics r6, r1 - 8002c26: 0031 movs r1, r6 - 8002c28: 2a00 cmp r2, #0 - 8002c2a: d112 bne.n 8002c52 - 8002c2c: 0e98 lsrs r0, r3, #26 - 8002c2e: 321f adds r2, #31 - 8002c30: 4010 ands r0, r2 - 8002c32: 40b8 lsls r0, r7 + 8002c44: 211f movs r1, #31 + 8002c46: 4667 mov r7, ip + 8002c48: 400f ands r7, r1 + 8002c4a: 3910 subs r1, #16 + 8002c4c: 40b9 lsls r1, r7 + 8002c4e: 43ce mvns r6, r1 + 8002c50: 9601 str r6, [sp, #4] + 8002c52: 6e26 ldr r6, [r4, #96] @ 0x60 + 8002c54: 438e bics r6, r1 + 8002c56: 0031 movs r1, r6 + 8002c58: 2a00 cmp r2, #0 + 8002c5a: d112 bne.n 8002c82 + 8002c5c: 0e98 lsrs r0, r3, #26 + 8002c5e: 321f adds r2, #31 + 8002c60: 4010 ands r0, r2 + 8002c62: 40b8 lsls r0, r7 if (((sConfig->Rank >> 2UL) + 1UL) <= hadc->Init.NbrOfConversion) - 8002c34: 4662 mov r2, ip + 8002c64: 4662 mov r2, ip MODIFY_REG(hadc->ADCGroupRegularSequencerRanks, - 8002c36: 4308 orrs r0, r1 + 8002c66: 4308 orrs r0, r1 if (((sConfig->Rank >> 2UL) + 1UL) <= hadc->Init.NbrOfConversion) - 8002c38: 0892 lsrs r2, r2, #2 - 8002c3a: 69e1 ldr r1, [r4, #28] - 8002c3c: 3201 adds r2, #1 + 8002c68: 0892 lsrs r2, r2, #2 + 8002c6a: 69e1 ldr r1, [r4, #28] + 8002c6c: 3201 adds r2, #1 MODIFY_REG(hadc->ADCGroupRegularSequencerRanks, - 8002c3e: 6620 str r0, [r4, #96] @ 0x60 + 8002c6e: 6620 str r0, [r4, #96] @ 0x60 if (((sConfig->Rank >> 2UL) + 1UL) <= hadc->Init.NbrOfConversion) - 8002c40: 428a cmp r2, r1 - 8002c42: d8b5 bhi.n 8002bb0 + 8002c70: 428a cmp r2, r1 + 8002c72: d8b5 bhi.n 8002be0 MODIFY_REG(ADCx->CHSELR, - 8002c44: 6aa9 ldr r1, [r5, #40] @ 0x28 - 8002c46: 9801 ldr r0, [sp, #4] - 8002c48: 009a lsls r2, r3, #2 - 8002c4a: 0f12 lsrs r2, r2, #28 - 8002c4c: 40ba lsls r2, r7 - 8002c4e: 4001 ands r1, r0 - 8002c50: e7ac b.n 8002bac + 8002c74: 6aa9 ldr r1, [r5, #40] @ 0x28 + 8002c76: 9801 ldr r0, [sp, #4] + 8002c78: 009a lsls r2, r3, #2 + 8002c7a: 0f12 lsrs r2, r2, #28 + 8002c7c: 40ba lsls r2, r7 + 8002c7e: 4001 ands r1, r0 + 8002c80: e7ac b.n 8002bdc MODIFY_REG(hadc->ADCGroupRegularSequencerRanks, - 8002c52: 2201 movs r2, #1 - 8002c54: 4213 tst r3, r2 - 8002c56: d1ec bne.n 8002c32 - 8002c58: 1892 adds r2, r2, r2 - 8002c5a: 4213 tst r3, r2 - 8002c5c: d12c bne.n 8002cb8 - 8002c5e: 2604 movs r6, #4 - 8002c60: 4233 tst r3, r6 - 8002c62: d12b bne.n 8002cbc - 8002c64: 071a lsls r2, r3, #28 - 8002c66: d42b bmi.n 8002cc0 - 8002c68: 06da lsls r2, r3, #27 - 8002c6a: d42b bmi.n 8002cc4 - 8002c6c: 069a lsls r2, r3, #26 - 8002c6e: d42b bmi.n 8002cc8 - 8002c70: 065a lsls r2, r3, #25 - 8002c72: d42b bmi.n 8002ccc - 8002c74: 061a lsls r2, r3, #24 - 8002c76: d42b bmi.n 8002cd0 - 8002c78: 05da lsls r2, r3, #23 - 8002c7a: d42b bmi.n 8002cd4 - 8002c7c: 059a lsls r2, r3, #22 - 8002c7e: d42b bmi.n 8002cd8 - 8002c80: 055a lsls r2, r3, #21 - 8002c82: d42b bmi.n 8002cdc - 8002c84: 051a lsls r2, r3, #20 - 8002c86: d42b bmi.n 8002ce0 - 8002c88: 04da lsls r2, r3, #19 - 8002c8a: d42b bmi.n 8002ce4 - 8002c8c: 049a lsls r2, r3, #18 - 8002c8e: d42b bmi.n 8002ce8 - 8002c90: 045a lsls r2, r3, #17 - 8002c92: d42b bmi.n 8002cec - 8002c94: 041a lsls r2, r3, #16 - 8002c96: d42b bmi.n 8002cf0 - 8002c98: 03da lsls r2, r3, #15 - 8002c9a: d42b bmi.n 8002cf4 - 8002c9c: 039a lsls r2, r3, #14 - 8002c9e: d42b bmi.n 8002cf8 - 8002ca0: 035a lsls r2, r3, #13 - 8002ca2: d42b bmi.n 8002cfc - 8002ca4: 031a lsls r2, r3, #12 - 8002ca6: d42b bmi.n 8002d00 - 8002ca8: 02da lsls r2, r3, #11 - 8002caa: d42b bmi.n 8002d04 - 8002cac: 029a lsls r2, r3, #10 - 8002cae: d42b bmi.n 8002d08 - 8002cb0: 025a lsls r2, r3, #9 - 8002cb2: d5be bpl.n 8002c32 - 8002cb4: 2016 movs r0, #22 - 8002cb6: e7bc b.n 8002c32 - 8002cb8: 2001 movs r0, #1 - 8002cba: e7ba b.n 8002c32 - 8002cbc: 0010 movs r0, r2 - 8002cbe: e7b8 b.n 8002c32 - 8002cc0: 2003 movs r0, #3 - 8002cc2: e7b6 b.n 8002c32 - 8002cc4: 2004 movs r0, #4 - 8002cc6: e7b4 b.n 8002c32 - 8002cc8: 2005 movs r0, #5 - 8002cca: e7b2 b.n 8002c32 - 8002ccc: 2006 movs r0, #6 - 8002cce: e7b0 b.n 8002c32 - 8002cd0: 2007 movs r0, #7 - 8002cd2: e7ae b.n 8002c32 - 8002cd4: 2008 movs r0, #8 - 8002cd6: e7ac b.n 8002c32 - 8002cd8: 2009 movs r0, #9 - 8002cda: e7aa b.n 8002c32 - 8002cdc: 200a movs r0, #10 - 8002cde: e7a8 b.n 8002c32 - 8002ce0: 200b movs r0, #11 - 8002ce2: e7a6 b.n 8002c32 - 8002ce4: 200c movs r0, #12 - 8002ce6: e7a4 b.n 8002c32 - 8002ce8: 200d movs r0, #13 - 8002cea: e7a2 b.n 8002c32 - 8002cec: 200e movs r0, #14 - 8002cee: e7a0 b.n 8002c32 - 8002cf0: 200f movs r0, #15 - 8002cf2: e79e b.n 8002c32 - 8002cf4: 2010 movs r0, #16 - 8002cf6: e79c b.n 8002c32 - 8002cf8: 2011 movs r0, #17 - 8002cfa: e79a b.n 8002c32 - 8002cfc: 2012 movs r0, #18 - 8002cfe: e798 b.n 8002c32 - 8002d00: 2013 movs r0, #19 - 8002d02: e796 b.n 8002c32 - 8002d04: 2014 movs r0, #20 - 8002d06: e794 b.n 8002c32 - 8002d08: 2015 movs r0, #21 - 8002d0a: e792 b.n 8002c32 + 8002c82: 2201 movs r2, #1 + 8002c84: 4213 tst r3, r2 + 8002c86: d1ec bne.n 8002c62 + 8002c88: 1892 adds r2, r2, r2 + 8002c8a: 4213 tst r3, r2 + 8002c8c: d12c bne.n 8002ce8 + 8002c8e: 2604 movs r6, #4 + 8002c90: 4233 tst r3, r6 + 8002c92: d12b bne.n 8002cec + 8002c94: 071a lsls r2, r3, #28 + 8002c96: d42b bmi.n 8002cf0 + 8002c98: 06da lsls r2, r3, #27 + 8002c9a: d42b bmi.n 8002cf4 + 8002c9c: 069a lsls r2, r3, #26 + 8002c9e: d42b bmi.n 8002cf8 + 8002ca0: 065a lsls r2, r3, #25 + 8002ca2: d42b bmi.n 8002cfc + 8002ca4: 061a lsls r2, r3, #24 + 8002ca6: d42b bmi.n 8002d00 + 8002ca8: 05da lsls r2, r3, #23 + 8002caa: d42b bmi.n 8002d04 + 8002cac: 059a lsls r2, r3, #22 + 8002cae: d42b bmi.n 8002d08 + 8002cb0: 055a lsls r2, r3, #21 + 8002cb2: d42b bmi.n 8002d0c + 8002cb4: 051a lsls r2, r3, #20 + 8002cb6: d42b bmi.n 8002d10 + 8002cb8: 04da lsls r2, r3, #19 + 8002cba: d42b bmi.n 8002d14 + 8002cbc: 049a lsls r2, r3, #18 + 8002cbe: d42b bmi.n 8002d18 + 8002cc0: 045a lsls r2, r3, #17 + 8002cc2: d42b bmi.n 8002d1c + 8002cc4: 041a lsls r2, r3, #16 + 8002cc6: d42b bmi.n 8002d20 + 8002cc8: 03da lsls r2, r3, #15 + 8002cca: d42b bmi.n 8002d24 + 8002ccc: 039a lsls r2, r3, #14 + 8002cce: d42b bmi.n 8002d28 + 8002cd0: 035a lsls r2, r3, #13 + 8002cd2: d42b bmi.n 8002d2c + 8002cd4: 031a lsls r2, r3, #12 + 8002cd6: d42b bmi.n 8002d30 + 8002cd8: 02da lsls r2, r3, #11 + 8002cda: d42b bmi.n 8002d34 + 8002cdc: 029a lsls r2, r3, #10 + 8002cde: d42b bmi.n 8002d38 + 8002ce0: 025a lsls r2, r3, #9 + 8002ce2: d5be bpl.n 8002c62 + 8002ce4: 2016 movs r0, #22 + 8002ce6: e7bc b.n 8002c62 + 8002ce8: 2001 movs r0, #1 + 8002cea: e7ba b.n 8002c62 + 8002cec: 0010 movs r0, r2 + 8002cee: e7b8 b.n 8002c62 + 8002cf0: 2003 movs r0, #3 + 8002cf2: e7b6 b.n 8002c62 + 8002cf4: 2004 movs r0, #4 + 8002cf6: e7b4 b.n 8002c62 + 8002cf8: 2005 movs r0, #5 + 8002cfa: e7b2 b.n 8002c62 + 8002cfc: 2006 movs r0, #6 + 8002cfe: e7b0 b.n 8002c62 + 8002d00: 2007 movs r0, #7 + 8002d02: e7ae b.n 8002c62 + 8002d04: 2008 movs r0, #8 + 8002d06: e7ac b.n 8002c62 + 8002d08: 2009 movs r0, #9 + 8002d0a: e7aa b.n 8002c62 + 8002d0c: 200a movs r0, #10 + 8002d0e: e7a8 b.n 8002c62 + 8002d10: 200b movs r0, #11 + 8002d12: e7a6 b.n 8002c62 + 8002d14: 200c movs r0, #12 + 8002d16: e7a4 b.n 8002c62 + 8002d18: 200d movs r0, #13 + 8002d1a: e7a2 b.n 8002c62 + 8002d1c: 200e movs r0, #14 + 8002d1e: e7a0 b.n 8002c62 + 8002d20: 200f movs r0, #15 + 8002d22: e79e b.n 8002c62 + 8002d24: 2010 movs r0, #16 + 8002d26: e79c b.n 8002c62 + 8002d28: 2011 movs r0, #17 + 8002d2a: e79a b.n 8002c62 + 8002d2c: 2012 movs r0, #18 + 8002d2e: e798 b.n 8002c62 + 8002d30: 2013 movs r0, #19 + 8002d32: e796 b.n 8002c62 + 8002d34: 2014 movs r0, #20 + 8002d36: e794 b.n 8002c62 + 8002d38: 2015 movs r0, #21 + 8002d3a: e792 b.n 8002c62 wait_loop_index--; - 8002d0c: 9b03 ldr r3, [sp, #12] - 8002d0e: 3b01 subs r3, #1 - 8002d10: e775 b.n 8002bfe + 8002d3c: 9b03 ldr r3, [sp, #12] + 8002d3e: 3b01 subs r3, #1 + 8002d40: e775 b.n 8002c2e else if ((sConfig->Channel == ADC_CHANNEL_VREFINT) && - 8002d12: 4923 ldr r1, [pc, #140] @ (8002da0 ) - 8002d14: 428b cmp r3, r1 - 8002d16: d000 beq.n 8002d1a - 8002d18: e776 b.n 8002c08 + 8002d42: 4923 ldr r1, [pc, #140] @ (8002dd0 ) + 8002d44: 428b cmp r3, r1 + 8002d46: d000 beq.n 8002d4a + 8002d48: e776 b.n 8002c38 ((tmp_config_internal_channel & LL_ADC_PATH_INTERNAL_VREFINT) == 0UL)) - 8002d1a: 2180 movs r1, #128 @ 0x80 - 8002d1c: 03c9 lsls r1, r1, #15 + 8002d4a: 2180 movs r1, #128 @ 0x80 + 8002d4c: 03c9 lsls r1, r1, #15 else if ((sConfig->Channel == ADC_CHANNEL_VREFINT) && - 8002d1e: 420d tst r5, r1 - 8002d20: d000 beq.n 8002d24 - 8002d22: e771 b.n 8002c08 + 8002d4e: 420d tst r5, r1 + 8002d50: d000 beq.n 8002d54 + 8002d52: e771 b.n 8002c38 MODIFY_REG(ADCxy_COMMON->CCR, ADC_CCR_VREFEN | ADC_CCR_TSEN, PathInternal); - 8002d24: 6813 ldr r3, [r2, #0] - 8002d26: 4d1b ldr r5, [pc, #108] @ (8002d94 ) - 8002d28: 402b ands r3, r5 - 8002d2a: 4303 orrs r3, r0 - 8002d2c: 4319 orrs r1, r3 - 8002d2e: 6011 str r1, [r2, #0] + 8002d54: 6813 ldr r3, [r2, #0] + 8002d56: 4d1b ldr r5, [pc, #108] @ (8002dc4 ) + 8002d58: 402b ands r3, r5 + 8002d5a: 4303 orrs r3, r0 + 8002d5c: 4319 orrs r1, r3 + 8002d5e: 6011 str r1, [r2, #0] } - 8002d30: e76a b.n 8002c08 + 8002d60: e76a b.n 8002c38 if ((hadc->Init.ScanConvMode == ADC_SCAN_SEQ_FIXED) || - 8002d32: 428f cmp r7, r1 - 8002d34: d104 bne.n 8002d40 + 8002d62: 428f cmp r7, r1 + 8002d64: d104 bne.n 8002d70 CLEAR_BIT(ADCx->CHSELR, (Channel & ADC_CHANNEL_ID_BITFIELD_MASK)); - 8002d36: 6aaa ldr r2, [r5, #40] @ 0x28 - 8002d38: 0259 lsls r1, r3, #9 - 8002d3a: 0a49 lsrs r1, r1, #9 - 8002d3c: 438a bics r2, r1 - 8002d3e: 62aa str r2, [r5, #40] @ 0x28 + 8002d66: 6aaa ldr r2, [r5, #40] @ 0x28 + 8002d68: 0259 lsls r1, r3, #9 + 8002d6a: 0a49 lsrs r1, r1, #9 + 8002d6c: 438a bics r2, r1 + 8002d6e: 62aa str r2, [r5, #40] @ 0x28 if (__LL_ADC_IS_CHANNEL_INTERNAL(sConfig->Channel)) - 8002d40: 2b00 cmp r3, #0 - 8002d42: db00 blt.n 8002d46 - 8002d44: e760 b.n 8002c08 + 8002d70: 2b00 cmp r3, #0 + 8002d72: db00 blt.n 8002d76 + 8002d74: e760 b.n 8002c38 return (uint32_t)(READ_BIT(ADCxy_COMMON->CCR, ADC_CCR_VREFEN | ADC_CCR_TSEN)); - 8002d46: 4911 ldr r1, [pc, #68] @ (8002d8c ) + 8002d76: 4911 ldr r1, [pc, #68] @ (8002dbc ) if (sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) - 8002d48: 4811 ldr r0, [pc, #68] @ (8002d90 ) - 8002d4a: 680a ldr r2, [r1, #0] - 8002d4c: 4283 cmp r3, r0 - 8002d4e: d108 bne.n 8002d62 + 8002d78: 4811 ldr r0, [pc, #68] @ (8002dc0 ) + 8002d7a: 680a ldr r2, [r1, #0] + 8002d7c: 4283 cmp r3, r0 + 8002d7e: d108 bne.n 8002d92 LL_ADC_SetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Instance), - 8002d50: 2380 movs r3, #128 @ 0x80 - 8002d52: 03db lsls r3, r3, #15 + 8002d80: 2380 movs r3, #128 @ 0x80 + 8002d82: 03db lsls r3, r3, #15 MODIFY_REG(ADCxy_COMMON->CCR, ADC_CCR_VREFEN | ADC_CCR_TSEN, PathInternal); - 8002d54: 6808 ldr r0, [r1, #0] - 8002d56: 4013 ands r3, r2 - 8002d58: 4a0e ldr r2, [pc, #56] @ (8002d94 ) - 8002d5a: 4002 ands r2, r0 - 8002d5c: 4313 orrs r3, r2 - 8002d5e: 600b str r3, [r1, #0] + 8002d84: 6808 ldr r0, [r1, #0] + 8002d86: 4013 ands r3, r2 + 8002d88: 4a0e ldr r2, [pc, #56] @ (8002dc4 ) + 8002d8a: 4002 ands r2, r0 + 8002d8c: 4313 orrs r3, r2 + 8002d8e: 600b str r3, [r1, #0] } - 8002d60: e752 b.n 8002c08 + 8002d90: e752 b.n 8002c38 else if (sConfig->Channel == ADC_CHANNEL_VREFINT) - 8002d62: 480f ldr r0, [pc, #60] @ (8002da0 ) - 8002d64: 4283 cmp r3, r0 - 8002d66: d000 beq.n 8002d6a - 8002d68: e74e b.n 8002c08 + 8002d92: 480f ldr r0, [pc, #60] @ (8002dd0 ) + 8002d94: 4283 cmp r3, r0 + 8002d96: d000 beq.n 8002d9a + 8002d98: e74e b.n 8002c38 LL_ADC_SetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Instance), - 8002d6a: 2080 movs r0, #128 @ 0x80 - 8002d6c: 0400 lsls r0, r0, #16 + 8002d9a: 2080 movs r0, #128 @ 0x80 + 8002d9c: 0400 lsls r0, r0, #16 MODIFY_REG(ADCxy_COMMON->CCR, ADC_CCR_VREFEN | ADC_CCR_TSEN, PathInternal); - 8002d6e: 680b ldr r3, [r1, #0] - 8002d70: 4002 ands r2, r0 - 8002d72: 4808 ldr r0, [pc, #32] @ (8002d94 ) - 8002d74: 4003 ands r3, r0 - 8002d76: 431a orrs r2, r3 - 8002d78: 600a str r2, [r1, #0] + 8002d9e: 680b ldr r3, [r1, #0] + 8002da0: 4002 ands r2, r0 + 8002da2: 4808 ldr r0, [pc, #32] @ (8002dc4 ) + 8002da4: 4003 ands r3, r0 + 8002da6: 431a orrs r2, r3 + 8002da8: 600a str r2, [r1, #0] } - 8002d7a: e745 b.n 8002c08 + 8002daa: e745 b.n 8002c38 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); - 8002d7c: 2320 movs r3, #32 - 8002d7e: 6da2 ldr r2, [r4, #88] @ 0x58 + 8002dac: 2320 movs r3, #32 + 8002dae: 6da2 ldr r2, [r4, #88] @ 0x58 tmp_hal_status = HAL_ERROR; - 8002d80: 2001 movs r0, #1 + 8002db0: 2001 movs r0, #1 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); - 8002d82: 4313 orrs r3, r2 - 8002d84: 65a3 str r3, [r4, #88] @ 0x58 + 8002db2: 4313 orrs r3, r2 + 8002db4: 65a3 str r3, [r4, #88] @ 0x58 tmp_hal_status = HAL_ERROR; - 8002d86: e740 b.n 8002c0a - 8002d88: 7fffff00 .word 0x7fffff00 - 8002d8c: 40012708 .word 0x40012708 - 8002d90: a4000200 .word 0xa4000200 - 8002d94: ff3fffff .word 0xff3fffff - 8002d98: 20000024 .word 0x20000024 - 8002d9c: 00030d40 .word 0x00030d40 - 8002da0: a8000400 .word 0xa8000400 + 8002db6: e740 b.n 8002c3a + 8002db8: 7fffff00 .word 0x7fffff00 + 8002dbc: 40012708 .word 0x40012708 + 8002dc0: a4000200 .word 0xa4000200 + 8002dc4: ff3fffff .word 0xff3fffff + 8002dc8: 20000028 .word 0x20000028 + 8002dcc: 00030d40 .word 0x00030d40 + 8002dd0: a8000400 .word 0xa8000400 -08002da4 : +08002dd4 : * with stm32c0xx devices, this parameter is a dummy value and it is ignored, because * no subpriority supported in Cortex M0+ based products. * @retval None */ void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) { - 8002da4: b510 push {r4, lr} + 8002dd4: b510 push {r4, lr} NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | - 8002da6: 24ff movs r4, #255 @ 0xff - 8002da8: 2203 movs r2, #3 - 8002daa: 000b movs r3, r1 - 8002dac: 0021 movs r1, r4 - 8002dae: 4002 ands r2, r0 - 8002db0: 00d2 lsls r2, r2, #3 - 8002db2: 4091 lsls r1, r2 + 8002dd6: 24ff movs r4, #255 @ 0xff + 8002dd8: 2203 movs r2, #3 + 8002dda: 000b movs r3, r1 + 8002ddc: 0021 movs r1, r4 + 8002dde: 4002 ands r2, r0 + 8002de0: 00d2 lsls r2, r2, #3 + 8002de2: 4091 lsls r1, r2 (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); - 8002db4: 019b lsls r3, r3, #6 - 8002db6: 4023 ands r3, r4 + 8002de4: 019b lsls r3, r3, #6 + 8002de6: 4023 ands r3, r4 NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | - 8002db8: 43c9 mvns r1, r1 + 8002de8: 43c9 mvns r1, r1 (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); - 8002dba: 4093 lsls r3, r2 + 8002dea: 4093 lsls r3, r2 if ((int32_t)(IRQn) >= 0) - 8002dbc: 2800 cmp r0, #0 - 8002dbe: db0a blt.n 8002dd6 + 8002dec: 2800 cmp r0, #0 + 8002dee: db0a blt.n 8002e06 NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | - 8002dc0: 24c0 movs r4, #192 @ 0xc0 - 8002dc2: 4a0b ldr r2, [pc, #44] @ (8002df0 ) - 8002dc4: 0880 lsrs r0, r0, #2 - 8002dc6: 0080 lsls r0, r0, #2 - 8002dc8: 1880 adds r0, r0, r2 - 8002dca: 00a4 lsls r4, r4, #2 - 8002dcc: 5902 ldr r2, [r0, r4] - 8002dce: 400a ands r2, r1 - 8002dd0: 4313 orrs r3, r2 - 8002dd2: 5103 str r3, [r0, r4] + 8002df0: 24c0 movs r4, #192 @ 0xc0 + 8002df2: 4a0b ldr r2, [pc, #44] @ (8002e20 ) + 8002df4: 0880 lsrs r0, r0, #2 + 8002df6: 0080 lsls r0, r0, #2 + 8002df8: 1880 adds r0, r0, r2 + 8002dfa: 00a4 lsls r4, r4, #2 + 8002dfc: 5902 ldr r2, [r0, r4] + 8002dfe: 400a ands r2, r1 + 8002e00: 4313 orrs r3, r2 + 8002e02: 5103 str r3, [r0, r4] /* Prevent unused argument(s) compilation warning */ UNUSED(SubPriority); /* Check the parameters */ assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority)); NVIC_SetPriority(IRQn, PreemptPriority); } - 8002dd4: bd10 pop {r4, pc} + 8002e04: bd10 pop {r4, pc} SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | - 8002dd6: 220f movs r2, #15 - 8002dd8: 4010 ands r0, r2 - 8002dda: 3808 subs r0, #8 - 8002ddc: 4a05 ldr r2, [pc, #20] @ (8002df4 ) - 8002dde: 0880 lsrs r0, r0, #2 - 8002de0: 0080 lsls r0, r0, #2 - 8002de2: 1880 adds r0, r0, r2 - 8002de4: 69c2 ldr r2, [r0, #28] - 8002de6: 4011 ands r1, r2 - 8002de8: 4319 orrs r1, r3 - 8002dea: 61c1 str r1, [r0, #28] - 8002dec: e7f2 b.n 8002dd4 - 8002dee: 46c0 nop @ (mov r8, r8) - 8002df0: e000e100 .word 0xe000e100 - 8002df4: e000ed00 .word 0xe000ed00 + 8002e06: 220f movs r2, #15 + 8002e08: 4010 ands r0, r2 + 8002e0a: 3808 subs r0, #8 + 8002e0c: 4a05 ldr r2, [pc, #20] @ (8002e24 ) + 8002e0e: 0880 lsrs r0, r0, #2 + 8002e10: 0080 lsls r0, r0, #2 + 8002e12: 1880 adds r0, r0, r2 + 8002e14: 69c2 ldr r2, [r0, #28] + 8002e16: 4011 ands r1, r2 + 8002e18: 4319 orrs r1, r3 + 8002e1a: 61c1 str r1, [r0, #28] + 8002e1c: e7f2 b.n 8002e04 + 8002e1e: 46c0 nop @ (mov r8, r8) + 8002e20: e000e100 .word 0xe000e100 + 8002e24: e000ed00 .word 0xe000ed00 -08002df8 : +08002e28 : if ((int32_t)(IRQn) >= 0) - 8002df8: 2800 cmp r0, #0 - 8002dfa: db05 blt.n 8002e08 + 8002e28: 2800 cmp r0, #0 + 8002e2a: db05 blt.n 8002e38 NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - 8002dfc: 231f movs r3, #31 - 8002dfe: 4018 ands r0, r3 - 8002e00: 3b1e subs r3, #30 - 8002e02: 4083 lsls r3, r0 - 8002e04: 4a01 ldr r2, [pc, #4] @ (8002e0c ) - 8002e06: 6013 str r3, [r2, #0] + 8002e2c: 231f movs r3, #31 + 8002e2e: 4018 ands r0, r3 + 8002e30: 3b1e subs r3, #30 + 8002e32: 4083 lsls r3, r0 + 8002e34: 4a01 ldr r2, [pc, #4] @ (8002e3c ) + 8002e36: 6013 str r3, [r2, #0] /* Check the parameters */ assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); /* Enable interrupt */ NVIC_EnableIRQ(IRQn); } - 8002e08: 4770 bx lr - 8002e0a: 46c0 nop @ (mov r8, r8) - 8002e0c: e000e100 .word 0xe000e100 + 8002e38: 4770 bx lr + 8002e3a: 46c0 nop @ (mov r8, r8) + 8002e3c: e000e100 .word 0xe000e100 -08002e10 : +08002e40 : function SysTick_Config is not included. In this case, the file device.h must contain a vendor-specific implementation of this function. */ __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) { if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) - 8002e10: 2280 movs r2, #128 @ 0x80 - 8002e12: 1e43 subs r3, r0, #1 - 8002e14: 0452 lsls r2, r2, #17 + 8002e40: 2280 movs r2, #128 @ 0x80 + 8002e42: 1e43 subs r3, r0, #1 + 8002e44: 0452 lsls r2, r2, #17 { return (1UL); /* Reload value impossible */ - 8002e16: 2001 movs r0, #1 + 8002e46: 2001 movs r0, #1 if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) - 8002e18: 4293 cmp r3, r2 - 8002e1a: d20d bcs.n 8002e38 + 8002e48: 4293 cmp r3, r2 + 8002e4a: d20d bcs.n 8002e68 SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | - 8002e1c: 21c0 movs r1, #192 @ 0xc0 + 8002e4c: 21c0 movs r1, #192 @ 0xc0 } SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ - 8002e1e: 4a07 ldr r2, [pc, #28] @ (8002e3c ) + 8002e4e: 4a07 ldr r2, [pc, #28] @ (8002e6c ) SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | - 8002e20: 4807 ldr r0, [pc, #28] @ (8002e40 ) + 8002e50: 4807 ldr r0, [pc, #28] @ (8002e70 ) SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ - 8002e22: 6053 str r3, [r2, #4] + 8002e52: 6053 str r3, [r2, #4] SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | - 8002e24: 6a03 ldr r3, [r0, #32] - 8002e26: 0609 lsls r1, r1, #24 - 8002e28: 021b lsls r3, r3, #8 - 8002e2a: 0a1b lsrs r3, r3, #8 - 8002e2c: 430b orrs r3, r1 - 8002e2e: 6203 str r3, [r0, #32] + 8002e54: 6a03 ldr r3, [r0, #32] + 8002e56: 0609 lsls r1, r1, #24 + 8002e58: 021b lsls r3, r3, #8 + 8002e5a: 0a1b lsrs r3, r3, #8 + 8002e5c: 430b orrs r3, r1 + 8002e5e: 6203 str r3, [r0, #32] NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ - 8002e30: 2000 movs r0, #0 + 8002e60: 2000 movs r0, #0 SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | - 8002e32: 2307 movs r3, #7 + 8002e62: 2307 movs r3, #7 SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ - 8002e34: 6090 str r0, [r2, #8] + 8002e64: 6090 str r0, [r2, #8] SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | - 8002e36: 6013 str r3, [r2, #0] + 8002e66: 6013 str r3, [r2, #0] * - 1 Function failed. */ uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) { return SysTick_Config(TicksNumb); } - 8002e38: 4770 bx lr - 8002e3a: 46c0 nop @ (mov r8, r8) - 8002e3c: e000e010 .word 0xe000e010 - 8002e40: e000ed00 .word 0xe000ed00 + 8002e68: 4770 bx lr + 8002e6a: 46c0 nop @ (mov r8, r8) + 8002e6c: e000e010 .word 0xe000e010 + 8002e70: e000ed00 .word 0xe000ed00 -08002e44 : +08002e74 : * @param DstAddress The destination memory Buffer address * @param DataLength The length of data to be transferred from source to destination * @retval HAL status */ static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength) { - 8002e44: b5f0 push {r4, r5, r6, r7, lr} + 8002e74: b5f0 push {r4, r5, r6, r7, lr} /* Clear the DMAMUX synchro overrun flag */ hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask; - 8002e46: 6c84 ldr r4, [r0, #72] @ 0x48 - 8002e48: 6cc5 ldr r5, [r0, #76] @ 0x4c - 8002e4a: 6065 str r5, [r4, #4] + 8002e76: 6c84 ldr r4, [r0, #72] @ 0x48 + 8002e78: 6cc5 ldr r5, [r0, #76] @ 0x4c + 8002e7a: 6065 str r5, [r4, #4] if (hdma->DMAmuxRequestGen != 0U) - 8002e4c: 6d04 ldr r4, [r0, #80] @ 0x50 - 8002e4e: 2c00 cmp r4, #0 - 8002e50: d002 beq.n 8002e58 + 8002e7c: 6d04 ldr r4, [r0, #80] @ 0x50 + 8002e7e: 2c00 cmp r4, #0 + 8002e80: d002 beq.n 8002e88 { /* Clear the DMAMUX request generator overrun flag */ hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask; - 8002e52: 6d44 ldr r4, [r0, #84] @ 0x54 - 8002e54: 6d85 ldr r5, [r0, #88] @ 0x58 - 8002e56: 6065 str r5, [r4, #4] + 8002e82: 6d44 ldr r4, [r0, #84] @ 0x54 + 8002e84: 6d85 ldr r5, [r0, #88] @ 0x58 + 8002e86: 6065 str r5, [r4, #4] } /* Clear all flags */ __HAL_DMA_CLEAR_FLAG(hdma, (DMA_FLAG_GI1 << (hdma->ChannelIndex & 0x1cU))); - 8002e58: 241c movs r4, #28 - 8002e5a: 6c05 ldr r5, [r0, #64] @ 0x40 - 8002e5c: 4e08 ldr r6, [pc, #32] @ (8002e80 ) - 8002e5e: 4025 ands r5, r4 - 8002e60: 3c1b subs r4, #27 - 8002e62: 40ac lsls r4, r5 - 8002e64: 6877 ldr r7, [r6, #4] - 8002e66: 433c orrs r4, r7 - 8002e68: 6074 str r4, [r6, #4] + 8002e88: 241c movs r4, #28 + 8002e8a: 6c05 ldr r5, [r0, #64] @ 0x40 + 8002e8c: 4e08 ldr r6, [pc, #32] @ (8002eb0 ) + 8002e8e: 4025 ands r5, r4 + 8002e90: 3c1b subs r4, #27 + 8002e92: 40ac lsls r4, r5 + 8002e94: 6877 ldr r7, [r6, #4] + 8002e96: 433c orrs r4, r7 + 8002e98: 6074 str r4, [r6, #4] /* Configure DMA Channel data length */ hdma->Instance->CNDTR = DataLength; - 8002e6a: 6804 ldr r4, [r0, #0] - 8002e6c: 6063 str r3, [r4, #4] + 8002e9a: 6804 ldr r4, [r0, #0] + 8002e9c: 6063 str r3, [r4, #4] /* Peripheral to Memory */ if ((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH) - 8002e6e: 6883 ldr r3, [r0, #8] - 8002e70: 2b10 cmp r3, #16 - 8002e72: d102 bne.n 8002e7a + 8002e9e: 6883 ldr r3, [r0, #8] + 8002ea0: 2b10 cmp r3, #16 + 8002ea2: d102 bne.n 8002eaa { /* Configure DMA Channel destination address */ hdma->Instance->CPAR = DstAddress; - 8002e74: 60a2 str r2, [r4, #8] + 8002ea4: 60a2 str r2, [r4, #8] /* Configure DMA Channel source address */ hdma->Instance->CMAR = SrcAddress; - 8002e76: 60e1 str r1, [r4, #12] + 8002ea6: 60e1 str r1, [r4, #12] hdma->Instance->CPAR = SrcAddress; /* Configure DMA Channel destination address */ hdma->Instance->CMAR = DstAddress; } } - 8002e78: bdf0 pop {r4, r5, r6, r7, pc} + 8002ea8: bdf0 pop {r4, r5, r6, r7, pc} hdma->Instance->CPAR = SrcAddress; - 8002e7a: 60a1 str r1, [r4, #8] + 8002eaa: 60a1 str r1, [r4, #8] hdma->Instance->CMAR = DstAddress; - 8002e7c: 60e2 str r2, [r4, #12] + 8002eac: 60e2 str r2, [r4, #12] } - 8002e7e: e7fb b.n 8002e78 - 8002e80: 40020000 .word 0x40020000 + 8002eae: e7fb b.n 8002ea8 + 8002eb0: 40020000 .word 0x40020000 -08002e84 : +08002eb4 : * @param hdma Pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Stream. * @retval None */ static void DMA_CalcDMAMUXChannelBaseAndMask(DMA_HandleTypeDef *hdma) { - 8002e84: b510 push {r4, lr} - 8002e86: 0004 movs r4, r0 + 8002eb4: b510 push {r4, lr} + 8002eb6: 0004 movs r4, r0 uint32_t channel_number; channel_number = (((uint32_t)hdma->Instance & 0xFFU) - 8U) / 20U; - 8002e88: 6800 ldr r0, [r0, #0] - 8002e8a: 2114 movs r1, #20 - 8002e8c: b2c0 uxtb r0, r0 - 8002e8e: 3808 subs r0, #8 - 8002e90: f7fd f94e bl 8000130 <__udivsi3> + 8002eb8: 6800 ldr r0, [r0, #0] + 8002eba: 2114 movs r1, #20 + 8002ebc: b2c0 uxtb r0, r0 + 8002ebe: 3808 subs r0, #8 + 8002ec0: f7fd f936 bl 8000130 <__udivsi3> hdma->DMAmuxChannel = (DMAMUX_Channel_TypeDef *)(uint32_t)((uint32_t)DMAMUX1_Channel0 + \ ((hdma->ChannelIndex >> 2U) * \ - 8002e94: 6c23 ldr r3, [r4, #64] @ 0x40 + 8002ec4: 6c23 ldr r3, [r4, #64] @ 0x40 hdma->DMAmuxChannel = (DMAMUX_Channel_TypeDef *)(uint32_t)((uint32_t)DMAMUX1_Channel0 + \ - 8002e96: 4a06 ldr r2, [pc, #24] @ (8002eb0 ) + 8002ec6: 4a06 ldr r2, [pc, #24] @ (8002ee0 ) ((hdma->ChannelIndex >> 2U) * \ - 8002e98: 089b lsrs r3, r3, #2 + 8002ec8: 089b lsrs r3, r3, #2 hdma->DMAmuxChannel = (DMAMUX_Channel_TypeDef *)(uint32_t)((uint32_t)DMAMUX1_Channel0 + \ - 8002e9a: 189b adds r3, r3, r2 - 8002e9c: 009b lsls r3, r3, #2 - 8002e9e: 6463 str r3, [r4, #68] @ 0x44 + 8002eca: 189b adds r3, r3, r2 + 8002ecc: 009b lsls r3, r3, #2 + 8002ece: 6463 str r3, [r4, #68] @ 0x44 ((uint32_t)DMAMUX1_Channel1 - \ (uint32_t)DMAMUX1_Channel0))); hdma->DMAmuxChannelStatus = DMAMUX1_ChannelStatus; - 8002ea0: 4b04 ldr r3, [pc, #16] @ (8002eb4 ) - 8002ea2: 64a3 str r3, [r4, #72] @ 0x48 + 8002ed0: 4b04 ldr r3, [pc, #16] @ (8002ee4 ) + 8002ed2: 64a3 str r3, [r4, #72] @ 0x48 hdma->DMAmuxChannelStatusMask = 1UL << (channel_number & 0x1cU); - 8002ea4: 231c movs r3, #28 - 8002ea6: 4018 ands r0, r3 - 8002ea8: 3b1b subs r3, #27 - 8002eaa: 4083 lsls r3, r0 - 8002eac: 64e3 str r3, [r4, #76] @ 0x4c + 8002ed4: 231c movs r3, #28 + 8002ed6: 4018 ands r0, r3 + 8002ed8: 3b1b subs r3, #27 + 8002eda: 4083 lsls r3, r0 + 8002edc: 64e3 str r3, [r4, #76] @ 0x4c } - 8002eae: bd10 pop {r4, pc} - 8002eb0: 10008200 .word 0x10008200 - 8002eb4: 40020880 .word 0x40020880 + 8002ede: bd10 pop {r4, pc} + 8002ee0: 10008200 .word 0x10008200 + 8002ee4: 40020880 .word 0x40020880 -08002eb8 : +08002ee8 : { - 8002eb8: b5f8 push {r3, r4, r5, r6, r7, lr} - 8002eba: 0004 movs r4, r0 + 8002ee8: b5f8 push {r3, r4, r5, r6, r7, lr} + 8002eea: 0004 movs r4, r0 return HAL_ERROR; - 8002ebc: 2001 movs r0, #1 + 8002eec: 2001 movs r0, #1 if (hdma == NULL) - 8002ebe: 2c00 cmp r4, #0 - 8002ec0: d045 beq.n 8002f4e + 8002eee: 2c00 cmp r4, #0 + 8002ef0: d045 beq.n 8002f7e hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - \ - 8002ec2: 6825 ldr r5, [r4, #0] - 8002ec4: 4b25 ldr r3, [pc, #148] @ (8002f5c ) - 8002ec6: 2114 movs r1, #20 - 8002ec8: 18e8 adds r0, r5, r3 - 8002eca: f7fd f931 bl 8000130 <__udivsi3> + 8002ef2: 6825 ldr r5, [r4, #0] + 8002ef4: 4b25 ldr r3, [pc, #148] @ (8002f8c ) + 8002ef6: 2114 movs r1, #20 + 8002ef8: 18e8 adds r0, r5, r3 + 8002efa: f7fd f919 bl 8000130 <__udivsi3> hdma->State = HAL_DMA_STATE_BUSY; - 8002ece: 2302 movs r3, #2 + 8002efe: 2302 movs r3, #2 (uint32_t)DMA1_Channel1)) << 2U; - 8002ed0: 0080 lsls r0, r0, #2 + 8002f00: 0080 lsls r0, r0, #2 hdma->State = HAL_DMA_STATE_BUSY; - 8002ed2: 1da6 adds r6, r4, #6 + 8002f02: 1da6 adds r6, r4, #6 hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - \ - 8002ed4: 6420 str r0, [r4, #64] @ 0x40 + 8002f04: 6420 str r0, [r4, #64] @ 0x40 hdma->State = HAL_DMA_STATE_BUSY; - 8002ed6: 77f3 strb r3, [r6, #31] + 8002f06: 77f3 strb r3, [r6, #31] CLEAR_BIT(hdma->Instance->CCR, (DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE | \ - 8002ed8: 682b ldr r3, [r5, #0] - 8002eda: 4a21 ldr r2, [pc, #132] @ (8002f60 ) + 8002f08: 682b ldr r3, [r5, #0] + 8002f0a: 4a21 ldr r2, [pc, #132] @ (8002f90 ) SET_BIT(hdma->Instance->CCR, (hdma->Init.Direction | \ - 8002edc: 68a7 ldr r7, [r4, #8] + 8002f0c: 68a7 ldr r7, [r4, #8] CLEAR_BIT(hdma->Instance->CCR, (DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE | \ - 8002ede: 4013 ands r3, r2 - 8002ee0: 602b str r3, [r5, #0] + 8002f0e: 4013 ands r3, r2 + 8002f10: 602b str r3, [r5, #0] SET_BIT(hdma->Instance->CCR, (hdma->Init.Direction | \ - 8002ee2: 68e3 ldr r3, [r4, #12] - 8002ee4: 6921 ldr r1, [r4, #16] - 8002ee6: 433b orrs r3, r7 - 8002ee8: 430b orrs r3, r1 - 8002eea: 6961 ldr r1, [r4, #20] - 8002eec: 682a ldr r2, [r5, #0] - 8002eee: 430b orrs r3, r1 - 8002ef0: 69a1 ldr r1, [r4, #24] + 8002f12: 68e3 ldr r3, [r4, #12] + 8002f14: 6921 ldr r1, [r4, #16] + 8002f16: 433b orrs r3, r7 + 8002f18: 430b orrs r3, r1 + 8002f1a: 6961 ldr r1, [r4, #20] + 8002f1c: 682a ldr r2, [r5, #0] + 8002f1e: 430b orrs r3, r1 + 8002f20: 69a1 ldr r1, [r4, #24] DMA_CalcDMAMUXChannelBaseAndMask(hdma); - 8002ef2: 0020 movs r0, r4 + 8002f22: 0020 movs r0, r4 SET_BIT(hdma->Instance->CCR, (hdma->Init.Direction | \ - 8002ef4: 430b orrs r3, r1 - 8002ef6: 69e1 ldr r1, [r4, #28] - 8002ef8: 430b orrs r3, r1 - 8002efa: 6a21 ldr r1, [r4, #32] - 8002efc: 430b orrs r3, r1 - 8002efe: 4313 orrs r3, r2 - 8002f00: 602b str r3, [r5, #0] + 8002f24: 430b orrs r3, r1 + 8002f26: 69e1 ldr r1, [r4, #28] + 8002f28: 430b orrs r3, r1 + 8002f2a: 6a21 ldr r1, [r4, #32] + 8002f2c: 430b orrs r3, r1 + 8002f2e: 4313 orrs r3, r2 + 8002f30: 602b str r3, [r5, #0] DMA_CalcDMAMUXChannelBaseAndMask(hdma); - 8002f02: f7ff ffbf bl 8002e84 + 8002f32: f7ff ffbf bl 8002eb4 if (hdma->Init.Direction == DMA_MEMORY_TO_MEMORY) - 8002f06: 2380 movs r3, #128 @ 0x80 - 8002f08: 01db lsls r3, r3, #7 - 8002f0a: 429f cmp r7, r3 - 8002f0c: d101 bne.n 8002f12 + 8002f36: 2380 movs r3, #128 @ 0x80 + 8002f38: 01db lsls r3, r3, #7 + 8002f3a: 429f cmp r7, r3 + 8002f3c: d101 bne.n 8002f42 hdma->Init.Request = DMA_REQUEST_MEM2MEM; - 8002f0e: 2300 movs r3, #0 - 8002f10: 6063 str r3, [r4, #4] + 8002f3e: 2300 movs r3, #0 + 8002f40: 6063 str r3, [r4, #4] hdma->DMAmuxChannel->CCR = (hdma->Init.Request & DMAMUX_CxCR_DMAREQ_ID); - 8002f12: 6862 ldr r2, [r4, #4] - 8002f14: 6c61 ldr r1, [r4, #68] @ 0x44 - 8002f16: b2d3 uxtb r3, r2 - 8002f18: 600b str r3, [r1, #0] + 8002f42: 6862 ldr r2, [r4, #4] + 8002f44: 6c61 ldr r1, [r4, #68] @ 0x44 + 8002f46: b2d3 uxtb r3, r2 + 8002f48: 600b str r3, [r1, #0] hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask; - 8002f1a: 6ce0 ldr r0, [r4, #76] @ 0x4c - 8002f1c: 6ca1 ldr r1, [r4, #72] @ 0x48 + 8002f4a: 6ce0 ldr r0, [r4, #76] @ 0x4c + 8002f4c: 6ca1 ldr r1, [r4, #72] @ 0x48 if (((hdma->Init.Request > 0UL) && (hdma->Init.Request <= DMA_REQUEST_GENERATOR3))) - 8002f1e: 3a01 subs r2, #1 + 8002f4e: 3a01 subs r2, #1 hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask; - 8002f20: 6048 str r0, [r1, #4] + 8002f50: 6048 str r0, [r1, #4] if (((hdma->Init.Request > 0UL) && (hdma->Init.Request <= DMA_REQUEST_GENERATOR3))) - 8002f22: 2a03 cmp r2, #3 - 8002f24: d814 bhi.n 8002f50 + 8002f52: 2a03 cmp r2, #3 + 8002f54: d814 bhi.n 8002f80 static void DMA_CalcDMAMUXRequestGenBaseAndMask(DMA_HandleTypeDef *hdma) { uint32_t request = hdma->Init.Request & DMAMUX_CxCR_DMAREQ_ID; /* DMA Channels are connected to DMAMUX1 request generator blocks*/ hdma->DMAmuxRequestGen = (DMAMUX_RequestGen_TypeDef *)((uint32_t)(((uint32_t)DMAMUX1_RequestGenerator0) + \ - 8002f26: 4a0f ldr r2, [pc, #60] @ (8002f64 ) + 8002f56: 4a0f ldr r2, [pc, #60] @ (8002f94 ) ((request - 1U) * 4U))); hdma->DMAmuxRequestGenStatus = DMAMUX1_RequestGenStatus; - 8002f28: 480f ldr r0, [pc, #60] @ (8002f68 ) + 8002f58: 480f ldr r0, [pc, #60] @ (8002f98 ) hdma->DMAmuxRequestGen = (DMAMUX_RequestGen_TypeDef *)((uint32_t)(((uint32_t)DMAMUX1_RequestGenerator0) + \ - 8002f2a: 1899 adds r1, r3, r2 + 8002f5a: 1899 adds r1, r3, r2 /* here "Request" is either DMA_REQUEST_GENERATOR0 to 4, i.e. <= 4*/ hdma->DMAmuxRequestGenStatusMask = 1UL << ((request - 1U) & 0x3U); - 8002f2c: 2201 movs r2, #1 - 8002f2e: 3b01 subs r3, #1 - 8002f30: 409a lsls r2, r3 - 8002f32: 65a2 str r2, [r4, #88] @ 0x58 - 8002f34: 0013 movs r3, r2 + 8002f5c: 2201 movs r2, #1 + 8002f5e: 3b01 subs r3, #1 + 8002f60: 409a lsls r2, r3 + 8002f62: 65a2 str r2, [r4, #88] @ 0x58 + 8002f64: 0013 movs r3, r2 hdma->DMAmuxRequestGen->RGCR = 0U; - 8002f36: 2200 movs r2, #0 + 8002f66: 2200 movs r2, #0 hdma->DMAmuxRequestGen = (DMAMUX_RequestGen_TypeDef *)((uint32_t)(((uint32_t)DMAMUX1_RequestGenerator0) + \ - 8002f38: 0089 lsls r1, r1, #2 - 8002f3a: 6521 str r1, [r4, #80] @ 0x50 + 8002f68: 0089 lsls r1, r1, #2 + 8002f6a: 6521 str r1, [r4, #80] @ 0x50 hdma->DMAmuxRequestGenStatus = DMAMUX1_RequestGenStatus; - 8002f3c: 6560 str r0, [r4, #84] @ 0x54 + 8002f6c: 6560 str r0, [r4, #84] @ 0x54 hdma->DMAmuxRequestGen->RGCR = 0U; - 8002f3e: 600a str r2, [r1, #0] + 8002f6e: 600a str r2, [r1, #0] hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask; - 8002f40: 6043 str r3, [r0, #4] + 8002f70: 6043 str r3, [r0, #4] hdma->ErrorCode = HAL_DMA_ERROR_NONE; - 8002f42: 2000 movs r0, #0 + 8002f72: 2000 movs r0, #0 hdma->State = HAL_DMA_STATE_READY; - 8002f44: 2301 movs r3, #1 + 8002f74: 2301 movs r3, #1 hdma->ErrorCode = HAL_DMA_ERROR_NONE; - 8002f46: 63e0 str r0, [r4, #60] @ 0x3c + 8002f76: 63e0 str r0, [r4, #60] @ 0x3c __HAL_UNLOCK(hdma); - 8002f48: 3405 adds r4, #5 + 8002f78: 3405 adds r4, #5 hdma->State = HAL_DMA_STATE_READY; - 8002f4a: 77f3 strb r3, [r6, #31] + 8002f7a: 77f3 strb r3, [r6, #31] __HAL_UNLOCK(hdma); - 8002f4c: 77e0 strb r0, [r4, #31] + 8002f7c: 77e0 strb r0, [r4, #31] } - 8002f4e: bdf8 pop {r3, r4, r5, r6, r7, pc} + 8002f7e: bdf8 pop {r3, r4, r5, r6, r7, pc} hdma->DMAmuxRequestGen = 0U; - 8002f50: 2300 movs r3, #0 - 8002f52: 6523 str r3, [r4, #80] @ 0x50 + 8002f80: 2300 movs r3, #0 + 8002f82: 6523 str r3, [r4, #80] @ 0x50 hdma->DMAmuxRequestGenStatus = 0U; - 8002f54: 6563 str r3, [r4, #84] @ 0x54 + 8002f84: 6563 str r3, [r4, #84] @ 0x54 hdma->DMAmuxRequestGenStatusMask = 0U; - 8002f56: 65a3 str r3, [r4, #88] @ 0x58 - 8002f58: e7f3 b.n 8002f42 - 8002f5a: 46c0 nop @ (mov r8, r8) - 8002f5c: bffdfff8 .word 0xbffdfff8 - 8002f60: ffff800f .word 0xffff800f - 8002f64: 1000823f .word 0x1000823f - 8002f68: 40020940 .word 0x40020940 + 8002f86: 65a3 str r3, [r4, #88] @ 0x58 + 8002f88: e7f3 b.n 8002f72 + 8002f8a: 46c0 nop @ (mov r8, r8) + 8002f8c: bffdfff8 .word 0xbffdfff8 + 8002f90: ffff800f .word 0xffff800f + 8002f94: 1000823f .word 0x1000823f + 8002f98: 40020940 .word 0x40020940 -08002f6c : +08002f9c : { - 8002f6c: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr} + 8002f9c: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr} __HAL_LOCK(hdma); - 8002f6e: 1d46 adds r6, r0, #5 + 8002f9e: 1d46 adds r6, r0, #5 { - 8002f70: 9301 str r3, [sp, #4] + 8002fa0: 9301 str r3, [sp, #4] __HAL_LOCK(hdma); - 8002f72: 7ff4 ldrb r4, [r6, #31] + 8002fa2: 7ff4 ldrb r4, [r6, #31] { - 8002f74: 0005 movs r5, r0 + 8002fa4: 0005 movs r5, r0 __HAL_LOCK(hdma); - 8002f76: 2002 movs r0, #2 - 8002f78: 2c01 cmp r4, #1 - 8002f7a: d036 beq.n 8002fea - 8002f7c: 3801 subs r0, #1 - 8002f7e: 77f0 strb r0, [r6, #31] + 8002fa6: 2002 movs r0, #2 + 8002fa8: 2c01 cmp r4, #1 + 8002faa: d036 beq.n 800301a + 8002fac: 3801 subs r0, #1 + 8002fae: 77f0 strb r0, [r6, #31] if (HAL_DMA_STATE_READY == hdma->State) - 8002f80: 1dac adds r4, r5, #6 - 8002f82: 7fe0 ldrb r0, [r4, #31] - 8002f84: 2702 movs r7, #2 - 8002f86: 4684 mov ip, r0 - 8002f88: 4663 mov r3, ip - 8002f8a: b2c0 uxtb r0, r0 - 8002f8c: 9000 str r0, [sp, #0] + 8002fb0: 1dac adds r4, r5, #6 + 8002fb2: 7fe0 ldrb r0, [r4, #31] + 8002fb4: 2702 movs r7, #2 + 8002fb6: 4684 mov ip, r0 + 8002fb8: 4663 mov r3, ip + 8002fba: b2c0 uxtb r0, r0 + 8002fbc: 9000 str r0, [sp, #0] status = HAL_BUSY; - 8002f8e: 0038 movs r0, r7 + 8002fbe: 0038 movs r0, r7 if (HAL_DMA_STATE_READY == hdma->State) - 8002f90: 2b01 cmp r3, #1 - 8002f92: d128 bne.n 8002fe6 + 8002fc0: 2b01 cmp r3, #1 + 8002fc2: d128 bne.n 8003016 hdma->ErrorCode = HAL_DMA_ERROR_NONE; - 8002f94: 2000 movs r0, #0 + 8002fc4: 2000 movs r0, #0 hdma->State = HAL_DMA_STATE_BUSY; - 8002f96: 77e7 strb r7, [r4, #31] + 8002fc6: 77e7 strb r7, [r4, #31] __HAL_DMA_DISABLE(hdma); - 8002f98: 682c ldr r4, [r5, #0] + 8002fc8: 682c ldr r4, [r5, #0] hdma->ErrorCode = HAL_DMA_ERROR_NONE; - 8002f9a: 63e8 str r0, [r5, #60] @ 0x3c + 8002fca: 63e8 str r0, [r5, #60] @ 0x3c __HAL_DMA_DISABLE(hdma); - 8002f9c: 6820 ldr r0, [r4, #0] - 8002f9e: 9b00 ldr r3, [sp, #0] - 8002fa0: 4398 bics r0, r3 - 8002fa2: 6020 str r0, [r4, #0] + 8002fcc: 6820 ldr r0, [r4, #0] + 8002fce: 9b00 ldr r3, [sp, #0] + 8002fd0: 4398 bics r0, r3 + 8002fd2: 6020 str r0, [r4, #0] DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength); - 8002fa4: 9b01 ldr r3, [sp, #4] - 8002fa6: 0028 movs r0, r5 - 8002fa8: f7ff ff4c bl 8002e44 + 8002fd4: 9b01 ldr r3, [sp, #4] + 8002fd6: 0028 movs r0, r5 + 8002fd8: f7ff ff4c bl 8002e74 if (NULL != hdma->XferHalfCpltCallback) - 8002fac: 6b2b ldr r3, [r5, #48] @ 0x30 - 8002fae: 2b00 cmp r3, #0 - 8002fb0: d01c beq.n 8002fec + 8002fdc: 6b2b ldr r3, [r5, #48] @ 0x30 + 8002fde: 2b00 cmp r3, #0 + 8002fe0: d01c beq.n 800301c __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); - 8002fb2: 230e movs r3, #14 - 8002fb4: 6822 ldr r2, [r4, #0] + 8002fe2: 230e movs r3, #14 + 8002fe4: 6822 ldr r2, [r4, #0] __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_TE)); - 8002fb6: 4313 orrs r3, r2 - 8002fb8: 6023 str r3, [r4, #0] + 8002fe6: 4313 orrs r3, r2 + 8002fe8: 6023 str r3, [r4, #0] if ((hdma->DMAmuxChannel->CCR & DMAMUX_CxCR_SE) != 0U) - 8002fba: 6c6b ldr r3, [r5, #68] @ 0x44 - 8002fbc: 681a ldr r2, [r3, #0] - 8002fbe: 03d2 lsls r2, r2, #15 - 8002fc0: d504 bpl.n 8002fcc + 8002fea: 6c6b ldr r3, [r5, #68] @ 0x44 + 8002fec: 681a ldr r2, [r3, #0] + 8002fee: 03d2 lsls r2, r2, #15 + 8002ff0: d504 bpl.n 8002ffc hdma->DMAmuxChannel->CCR |= DMAMUX_CxCR_SOIE; - 8002fc2: 2280 movs r2, #128 @ 0x80 - 8002fc4: 6819 ldr r1, [r3, #0] - 8002fc6: 0052 lsls r2, r2, #1 - 8002fc8: 430a orrs r2, r1 - 8002fca: 601a str r2, [r3, #0] + 8002ff2: 2280 movs r2, #128 @ 0x80 + 8002ff4: 6819 ldr r1, [r3, #0] + 8002ff6: 0052 lsls r2, r2, #1 + 8002ff8: 430a orrs r2, r1 + 8002ffa: 601a str r2, [r3, #0] if (hdma->DMAmuxRequestGen != 0U) - 8002fcc: 6d2b ldr r3, [r5, #80] @ 0x50 - 8002fce: 2b00 cmp r3, #0 - 8002fd0: d004 beq.n 8002fdc + 8002ffc: 6d2b ldr r3, [r5, #80] @ 0x50 + 8002ffe: 2b00 cmp r3, #0 + 8003000: d004 beq.n 800300c hdma->DMAmuxRequestGen->RGCR |= DMAMUX_RGxCR_OIE; - 8002fd2: 2280 movs r2, #128 @ 0x80 - 8002fd4: 6819 ldr r1, [r3, #0] - 8002fd6: 0052 lsls r2, r2, #1 - 8002fd8: 430a orrs r2, r1 - 8002fda: 601a str r2, [r3, #0] + 8003002: 2280 movs r2, #128 @ 0x80 + 8003004: 6819 ldr r1, [r3, #0] + 8003006: 0052 lsls r2, r2, #1 + 8003008: 430a orrs r2, r1 + 800300a: 601a str r2, [r3, #0] __HAL_DMA_ENABLE(hdma); - 8002fdc: 2301 movs r3, #1 + 800300c: 2301 movs r3, #1 HAL_StatusTypeDef status = HAL_OK; - 8002fde: 2000 movs r0, #0 + 800300e: 2000 movs r0, #0 __HAL_DMA_ENABLE(hdma); - 8002fe0: 6822 ldr r2, [r4, #0] - 8002fe2: 4313 orrs r3, r2 - 8002fe4: 6023 str r3, [r4, #0] + 8003010: 6822 ldr r2, [r4, #0] + 8003012: 4313 orrs r3, r2 + 8003014: 6023 str r3, [r4, #0] __HAL_UNLOCK(hdma); - 8002fe6: 2300 movs r3, #0 - 8002fe8: 77f3 strb r3, [r6, #31] + 8003016: 2300 movs r3, #0 + 8003018: 77f3 strb r3, [r6, #31] } - 8002fea: bdfe pop {r1, r2, r3, r4, r5, r6, r7, pc} + 800301a: bdfe pop {r1, r2, r3, r4, r5, r6, r7, pc} __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT); - 8002fec: 2204 movs r2, #4 - 8002fee: 6823 ldr r3, [r4, #0] - 8002ff0: 4393 bics r3, r2 - 8002ff2: 6023 str r3, [r4, #0] + 800301c: 2204 movs r2, #4 + 800301e: 6823 ldr r3, [r4, #0] + 8003020: 4393 bics r3, r2 + 8003022: 6023 str r3, [r4, #0] __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_TE)); - 8002ff4: 6822 ldr r2, [r4, #0] - 8002ff6: 230a movs r3, #10 - 8002ff8: e7dd b.n 8002fb6 + 8003024: 6822 ldr r2, [r4, #0] + 8003026: 230a movs r3, #10 + 8003028: e7dd b.n 8002fe6 ... -08002ffc : +0800302c : { - 8002ffc: b5f0 push {r4, r5, r6, r7, lr} + 800302c: b5f0 push {r4, r5, r6, r7, lr} if (NULL == hdma) - 8002ffe: 2800 cmp r0, #0 - 8003000: d008 beq.n 8003014 + 800302e: 2800 cmp r0, #0 + 8003030: d008 beq.n 8003044 if (hdma->State != HAL_DMA_STATE_BUSY) - 8003002: 1d84 adds r4, r0, #6 - 8003004: 7fe3 ldrb r3, [r4, #31] - 8003006: 1d41 adds r1, r0, #5 - 8003008: 2b02 cmp r3, #2 - 800300a: d005 beq.n 8003018 + 8003032: 1d84 adds r4, r0, #6 + 8003034: 7fe3 ldrb r3, [r4, #31] + 8003036: 1d41 adds r1, r0, #5 + 8003038: 2b02 cmp r3, #2 + 800303a: d005 beq.n 8003048 hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; - 800300c: 2304 movs r3, #4 - 800300e: 63c3 str r3, [r0, #60] @ 0x3c + 800303c: 2304 movs r3, #4 + 800303e: 63c3 str r3, [r0, #60] @ 0x3c __HAL_UNLOCK(hdma); - 8003010: 2300 movs r3, #0 - 8003012: 77cb strb r3, [r1, #31] + 8003040: 2300 movs r3, #0 + 8003042: 77cb strb r3, [r1, #31] return HAL_ERROR; - 8003014: 2001 movs r0, #1 + 8003044: 2001 movs r0, #1 } - 8003016: bdf0 pop {r4, r5, r6, r7, pc} + 8003046: bdf0 pop {r4, r5, r6, r7, pc} __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); - 8003018: 250e movs r5, #14 - 800301a: 6802 ldr r2, [r0, #0] + 8003048: 250e movs r5, #14 + 800304a: 6802 ldr r2, [r0, #0] hdma->DMAmuxChannel->CCR &= ~DMAMUX_CxCR_SOIE; - 800301c: 6c46 ldr r6, [r0, #68] @ 0x44 + 800304c: 6c46 ldr r6, [r0, #68] @ 0x44 __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); - 800301e: 6813 ldr r3, [r2, #0] - 8003020: 43ab bics r3, r5 - 8003022: 6013 str r3, [r2, #0] + 800304e: 6813 ldr r3, [r2, #0] + 8003050: 43ab bics r3, r5 + 8003052: 6013 str r3, [r2, #0] hdma->DMAmuxChannel->CCR &= ~DMAMUX_CxCR_SOIE; - 8003024: 6833 ldr r3, [r6, #0] - 8003026: 4d10 ldr r5, [pc, #64] @ (8003068 ) - 8003028: 402b ands r3, r5 - 800302a: 6033 str r3, [r6, #0] + 8003054: 6833 ldr r3, [r6, #0] + 8003056: 4d10 ldr r5, [pc, #64] @ (8003098 ) + 8003058: 402b ands r3, r5 + 800305a: 6033 str r3, [r6, #0] __HAL_DMA_DISABLE(hdma); - 800302c: 2301 movs r3, #1 - 800302e: 6816 ldr r6, [r2, #0] - 8003030: 439e bics r6, r3 - 8003032: 6016 str r6, [r2, #0] + 800305c: 2301 movs r3, #1 + 800305e: 6816 ldr r6, [r2, #0] + 8003060: 439e bics r6, r3 + 8003062: 6016 str r6, [r2, #0] __HAL_DMA_CLEAR_FLAG(hdma, ((DMA_FLAG_GI1) << (hdma->ChannelIndex & 0x1cU))); - 8003034: 6c02 ldr r2, [r0, #64] @ 0x40 - 8003036: 331b adds r3, #27 - 8003038: 401a ands r2, r3 - 800303a: 3b1b subs r3, #27 - 800303c: 4093 lsls r3, r2 - 800303e: 4e0b ldr r6, [pc, #44] @ (800306c ) - 8003040: 6877 ldr r7, [r6, #4] - 8003042: 433b orrs r3, r7 - 8003044: 6073 str r3, [r6, #4] + 8003064: 6c02 ldr r2, [r0, #64] @ 0x40 + 8003066: 331b adds r3, #27 + 8003068: 401a ands r2, r3 + 800306a: 3b1b subs r3, #27 + 800306c: 4093 lsls r3, r2 + 800306e: 4e0b ldr r6, [pc, #44] @ (800309c ) + 8003070: 6877 ldr r7, [r6, #4] + 8003072: 433b orrs r3, r7 + 8003074: 6073 str r3, [r6, #4] hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask; - 8003046: 6cc2 ldr r2, [r0, #76] @ 0x4c - 8003048: 6c83 ldr r3, [r0, #72] @ 0x48 - 800304a: 605a str r2, [r3, #4] + 8003076: 6cc2 ldr r2, [r0, #76] @ 0x4c + 8003078: 6c83 ldr r3, [r0, #72] @ 0x48 + 800307a: 605a str r2, [r3, #4] if (hdma->DMAmuxRequestGen != 0U) - 800304c: 6d03 ldr r3, [r0, #80] @ 0x50 - 800304e: 2b00 cmp r3, #0 - 8003050: d005 beq.n 800305e + 800307c: 6d03 ldr r3, [r0, #80] @ 0x50 + 800307e: 2b00 cmp r3, #0 + 8003080: d005 beq.n 800308e hdma->DMAmuxRequestGen->RGCR &= ~DMAMUX_RGxCR_OIE; - 8003052: 681a ldr r2, [r3, #0] - 8003054: 402a ands r2, r5 - 8003056: 601a str r2, [r3, #0] + 8003082: 681a ldr r2, [r3, #0] + 8003084: 402a ands r2, r5 + 8003086: 601a str r2, [r3, #0] hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask; - 8003058: 6d43 ldr r3, [r0, #84] @ 0x54 - 800305a: 6d82 ldr r2, [r0, #88] @ 0x58 - 800305c: 605a str r2, [r3, #4] + 8003088: 6d43 ldr r3, [r0, #84] @ 0x54 + 800308a: 6d82 ldr r2, [r0, #88] @ 0x58 + 800308c: 605a str r2, [r3, #4] hdma->State = HAL_DMA_STATE_READY; - 800305e: 2301 movs r3, #1 + 800308e: 2301 movs r3, #1 __HAL_UNLOCK(hdma); - 8003060: 2000 movs r0, #0 + 8003090: 2000 movs r0, #0 hdma->State = HAL_DMA_STATE_READY; - 8003062: 77e3 strb r3, [r4, #31] + 8003092: 77e3 strb r3, [r4, #31] __HAL_UNLOCK(hdma); - 8003064: 77c8 strb r0, [r1, #31] + 8003094: 77c8 strb r0, [r1, #31] return HAL_OK; - 8003066: e7d6 b.n 8003016 - 8003068: fffffeff .word 0xfffffeff - 800306c: 40020000 .word 0x40020000 + 8003096: e7d6 b.n 8003046 + 8003098: fffffeff .word 0xfffffeff + 800309c: 40020000 .word 0x40020000 -08003070 : +080030a0 : { - 8003070: b5f8 push {r3, r4, r5, r6, r7, lr} + 80030a0: b5f8 push {r3, r4, r5, r6, r7, lr} __HAL_LOCK(hdma); - 8003072: 2301 movs r3, #1 - 8003074: 1d41 adds r1, r0, #5 - 8003076: 77cb strb r3, [r1, #31] + 80030a2: 2301 movs r3, #1 + 80030a4: 1d41 adds r1, r0, #5 + 80030a6: 77cb strb r3, [r1, #31] if (HAL_DMA_STATE_BUSY != hdma->State) - 8003078: 1d84 adds r4, r0, #6 - 800307a: 7fe2 ldrb r2, [r4, #31] - 800307c: 2a02 cmp r2, #2 - 800307e: d003 beq.n 8003088 + 80030a8: 1d84 adds r4, r0, #6 + 80030aa: 7fe2 ldrb r2, [r4, #31] + 80030ac: 2a02 cmp r2, #2 + 80030ae: d003 beq.n 80030b8 hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; - 8003080: 2204 movs r2, #4 - 8003082: 63c2 str r2, [r0, #60] @ 0x3c + 80030b0: 2204 movs r2, #4 + 80030b2: 63c2 str r2, [r0, #60] @ 0x3c status = HAL_ERROR; - 8003084: 0018 movs r0, r3 + 80030b4: 0018 movs r0, r3 } - 8003086: bdf8 pop {r3, r4, r5, r6, r7, pc} + 80030b6: bdf8 pop {r3, r4, r5, r6, r7, pc} __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); - 8003088: 260e movs r6, #14 - 800308a: 6802 ldr r2, [r0, #0] - 800308c: 6815 ldr r5, [r2, #0] - 800308e: 43b5 bics r5, r6 - 8003090: 6015 str r5, [r2, #0] + 80030b8: 260e movs r6, #14 + 80030ba: 6802 ldr r2, [r0, #0] + 80030bc: 6815 ldr r5, [r2, #0] + 80030be: 43b5 bics r5, r6 + 80030c0: 6015 str r5, [r2, #0] __HAL_DMA_DISABLE(hdma); - 8003092: 6815 ldr r5, [r2, #0] + 80030c2: 6815 ldr r5, [r2, #0] hdma->DMAmuxChannel->CCR &= ~DMAMUX_CxCR_SOIE; - 8003094: 6c46 ldr r6, [r0, #68] @ 0x44 + 80030c4: 6c46 ldr r6, [r0, #68] @ 0x44 __HAL_DMA_DISABLE(hdma); - 8003096: 439d bics r5, r3 - 8003098: 6015 str r5, [r2, #0] + 80030c6: 439d bics r5, r3 + 80030c8: 6015 str r5, [r2, #0] hdma->DMAmuxChannel->CCR &= ~DMAMUX_CxCR_SOIE; - 800309a: 6832 ldr r2, [r6, #0] - 800309c: 4d11 ldr r5, [pc, #68] @ (80030e4 ) - 800309e: 402a ands r2, r5 - 80030a0: 6032 str r2, [r6, #0] + 80030ca: 6832 ldr r2, [r6, #0] + 80030cc: 4d11 ldr r5, [pc, #68] @ (8003114 ) + 80030ce: 402a ands r2, r5 + 80030d0: 6032 str r2, [r6, #0] __HAL_DMA_CLEAR_FLAG(hdma, ((DMA_FLAG_GI1) << (hdma->ChannelIndex & 0x1cU))); - 80030a2: 6c02 ldr r2, [r0, #64] @ 0x40 - 80030a4: 4e10 ldr r6, [pc, #64] @ (80030e8 ) - 80030a6: 0015 movs r5, r2 - 80030a8: 221c movs r2, #28 - 80030aa: 4015 ands r5, r2 - 80030ac: 40ab lsls r3, r5 - 80030ae: 6877 ldr r7, [r6, #4] - 80030b0: 433b orrs r3, r7 - 80030b2: 6073 str r3, [r6, #4] + 80030d2: 6c02 ldr r2, [r0, #64] @ 0x40 + 80030d4: 4e10 ldr r6, [pc, #64] @ (8003118 ) + 80030d6: 0015 movs r5, r2 + 80030d8: 221c movs r2, #28 + 80030da: 4015 ands r5, r2 + 80030dc: 40ab lsls r3, r5 + 80030de: 6877 ldr r7, [r6, #4] + 80030e0: 433b orrs r3, r7 + 80030e2: 6073 str r3, [r6, #4] hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask; - 80030b4: 6cc2 ldr r2, [r0, #76] @ 0x4c - 80030b6: 6c83 ldr r3, [r0, #72] @ 0x48 - 80030b8: 605a str r2, [r3, #4] + 80030e4: 6cc2 ldr r2, [r0, #76] @ 0x4c + 80030e6: 6c83 ldr r3, [r0, #72] @ 0x48 + 80030e8: 605a str r2, [r3, #4] if (hdma->DMAmuxRequestGen != 0U) - 80030ba: 6d03 ldr r3, [r0, #80] @ 0x50 - 80030bc: 2b00 cmp r3, #0 - 80030be: d006 beq.n 80030ce + 80030ea: 6d03 ldr r3, [r0, #80] @ 0x50 + 80030ec: 2b00 cmp r3, #0 + 80030ee: d006 beq.n 80030fe hdma->DMAmuxRequestGen->RGCR &= ~DMAMUX_RGxCR_OIE; - 80030c0: 681a ldr r2, [r3, #0] - 80030c2: 4d08 ldr r5, [pc, #32] @ (80030e4 ) - 80030c4: 402a ands r2, r5 - 80030c6: 601a str r2, [r3, #0] + 80030f0: 681a ldr r2, [r3, #0] + 80030f2: 4d08 ldr r5, [pc, #32] @ (8003114 ) + 80030f4: 402a ands r2, r5 + 80030f6: 601a str r2, [r3, #0] hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask; - 80030c8: 6d43 ldr r3, [r0, #84] @ 0x54 - 80030ca: 6d82 ldr r2, [r0, #88] @ 0x58 - 80030cc: 605a str r2, [r3, #4] + 80030f8: 6d43 ldr r3, [r0, #84] @ 0x54 + 80030fa: 6d82 ldr r2, [r0, #88] @ 0x58 + 80030fc: 605a str r2, [r3, #4] hdma->State = HAL_DMA_STATE_READY; - 80030ce: 2301 movs r3, #1 - 80030d0: 77e3 strb r3, [r4, #31] + 80030fe: 2301 movs r3, #1 + 8003100: 77e3 strb r3, [r4, #31] __HAL_UNLOCK(hdma); - 80030d2: 2300 movs r3, #0 - 80030d4: 77cb strb r3, [r1, #31] + 8003102: 2300 movs r3, #0 + 8003104: 77cb strb r3, [r1, #31] if (hdma->XferAbortCallback != NULL) - 80030d6: 6b83 ldr r3, [r0, #56] @ 0x38 - 80030d8: 2b00 cmp r3, #0 - 80030da: d000 beq.n 80030de + 8003106: 6b83 ldr r3, [r0, #56] @ 0x38 + 8003108: 2b00 cmp r3, #0 + 800310a: d000 beq.n 800310e hdma->XferAbortCallback(hdma); - 80030dc: 4798 blx r3 + 800310c: 4798 blx r3 HAL_StatusTypeDef status = HAL_OK; - 80030de: 2000 movs r0, #0 - 80030e0: e7d1 b.n 8003086 - 80030e2: 46c0 nop @ (mov r8, r8) - 80030e4: fffffeff .word 0xfffffeff - 80030e8: 40020000 .word 0x40020000 + 800310e: 2000 movs r0, #0 + 8003110: e7d1 b.n 80030b6 + 8003112: 46c0 nop @ (mov r8, r8) + 8003114: fffffeff .word 0xfffffeff + 8003118: 40020000 .word 0x40020000 -080030ec : +0800311c : { - 80030ec: b5f8 push {r3, r4, r5, r6, r7, lr} + 800311c: b5f8 push {r3, r4, r5, r6, r7, lr} if (((flag_it & (DMA_FLAG_HT1 << (hdma->ChannelIndex & 0x1cU))) != 0U) && ((source_it & DMA_IT_HT) != 0U)) - 80030ee: 241c movs r4, #28 - 80030f0: 2704 movs r7, #4 - 80030f2: 6c01 ldr r1, [r0, #64] @ 0x40 + 800311e: 241c movs r4, #28 + 8003120: 2704 movs r7, #4 + 8003122: 6c01 ldr r1, [r0, #64] @ 0x40 uint32_t flag_it = DMA1->ISR; - 80030f4: 4a26 ldr r2, [pc, #152] @ (8003190 ) + 8003124: 4a26 ldr r2, [pc, #152] @ (80031c0 ) if (((flag_it & (DMA_FLAG_HT1 << (hdma->ChannelIndex & 0x1cU))) != 0U) && ((source_it & DMA_IT_HT) != 0U)) - 80030f6: 4021 ands r1, r4 - 80030f8: 003c movs r4, r7 - 80030fa: 408c lsls r4, r1 - uint32_t flag_it = DMA1->ISR; - 80030fc: 6816 ldr r6, [r2, #0] - uint32_t source_it = hdma->Instance->CCR; - 80030fe: 6803 ldr r3, [r0, #0] - 8003100: 681d ldr r5, [r3, #0] - if (((flag_it & (DMA_FLAG_HT1 << (hdma->ChannelIndex & 0x1cU))) != 0U) && ((source_it & DMA_IT_HT) != 0U)) - 8003102: 4226 tst r6, r4 - 8003104: d00f beq.n 8003126 - 8003106: 423d tst r5, r7 - 8003108: d00d beq.n 8003126 - if ((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) - 800310a: 6819 ldr r1, [r3, #0] - 800310c: 0689 lsls r1, r1, #26 - 800310e: d402 bmi.n 8003116 - __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT); - 8003110: 6819 ldr r1, [r3, #0] - 8003112: 43b9 bics r1, r7 - 8003114: 6019 str r1, [r3, #0] - __HAL_DMA_CLEAR_FLAG(hdma, (DMA_FLAG_HT1 << (hdma->ChannelIndex & 0x1cU))); - 8003116: 6853 ldr r3, [r2, #4] - 8003118: 431c orrs r4, r3 - if (hdma->XferHalfCpltCallback != NULL) - 800311a: 6b03 ldr r3, [r0, #48] @ 0x30 - __HAL_DMA_CLEAR_FLAG(hdma, (DMA_FLAG_HT1 << (hdma->ChannelIndex & 0x1cU))); - 800311c: 6054 str r4, [r2, #4] - if (hdma->XferHalfCpltCallback != NULL) - 800311e: 2b00 cmp r3, #0 - 8003120: d01b beq.n 800315a - hdma->XferErrorCallback(hdma); - 8003122: 4798 blx r3 - return; - 8003124: e019 b.n 800315a - else if ((0U != (flag_it & (DMA_FLAG_TC1 << (hdma->ChannelIndex & 0x1cU)))) && (0U != (source_it & DMA_IT_TC))) - 8003126: 2702 movs r7, #2 + 8003126: 4021 ands r1, r4 8003128: 003c movs r4, r7 800312a: 408c lsls r4, r1 - 800312c: 4226 tst r6, r4 - 800312e: d015 beq.n 800315c - 8003130: 423d tst r5, r7 - 8003132: d013 beq.n 800315c + uint32_t flag_it = DMA1->ISR; + 800312c: 6816 ldr r6, [r2, #0] + uint32_t source_it = hdma->Instance->CCR; + 800312e: 6803 ldr r3, [r0, #0] + 8003130: 681d ldr r5, [r3, #0] + if (((flag_it & (DMA_FLAG_HT1 << (hdma->ChannelIndex & 0x1cU))) != 0U) && ((source_it & DMA_IT_HT) != 0U)) + 8003132: 4226 tst r6, r4 + 8003134: d00f beq.n 8003156 + 8003136: 423d tst r5, r7 + 8003138: d00d beq.n 8003156 if ((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) - 8003134: 6819 ldr r1, [r3, #0] - 8003136: 0689 lsls r1, r1, #26 - 8003138: d406 bmi.n 8003148 - __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TE | DMA_IT_TC); - 800313a: 250a movs r5, #10 - 800313c: 6819 ldr r1, [r3, #0] - 800313e: 43a9 bics r1, r5 - 8003140: 6019 str r1, [r3, #0] - hdma->State = HAL_DMA_STATE_READY; - 8003142: 2101 movs r1, #1 - 8003144: 1d83 adds r3, r0, #6 - 8003146: 77d9 strb r1, [r3, #31] - __HAL_DMA_CLEAR_FLAG(hdma, (DMA_FLAG_TC1 << (hdma->ChannelIndex & 0x1cU))); - 8003148: 6853 ldr r3, [r2, #4] - 800314a: 431c orrs r4, r3 + 800313a: 6819 ldr r1, [r3, #0] + 800313c: 0689 lsls r1, r1, #26 + 800313e: d402 bmi.n 8003146 + __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT); + 8003140: 6819 ldr r1, [r3, #0] + 8003142: 43b9 bics r1, r7 + 8003144: 6019 str r1, [r3, #0] + __HAL_DMA_CLEAR_FLAG(hdma, (DMA_FLAG_HT1 << (hdma->ChannelIndex & 0x1cU))); + 8003146: 6853 ldr r3, [r2, #4] + 8003148: 431c orrs r4, r3 + if (hdma->XferHalfCpltCallback != NULL) + 800314a: 6b03 ldr r3, [r0, #48] @ 0x30 + __HAL_DMA_CLEAR_FLAG(hdma, (DMA_FLAG_HT1 << (hdma->ChannelIndex & 0x1cU))); 800314c: 6054 str r4, [r2, #4] + if (hdma->XferHalfCpltCallback != NULL) + 800314e: 2b00 cmp r3, #0 + 8003150: d01b beq.n 800318a + hdma->XferErrorCallback(hdma); + 8003152: 4798 blx r3 + return; + 8003154: e019 b.n 800318a + else if ((0U != (flag_it & (DMA_FLAG_TC1 << (hdma->ChannelIndex & 0x1cU)))) && (0U != (source_it & DMA_IT_TC))) + 8003156: 2702 movs r7, #2 + 8003158: 003c movs r4, r7 + 800315a: 408c lsls r4, r1 + 800315c: 4226 tst r6, r4 + 800315e: d015 beq.n 800318c + 8003160: 423d tst r5, r7 + 8003162: d013 beq.n 800318c + if ((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) + 8003164: 6819 ldr r1, [r3, #0] + 8003166: 0689 lsls r1, r1, #26 + 8003168: d406 bmi.n 8003178 + __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TE | DMA_IT_TC); + 800316a: 250a movs r5, #10 + 800316c: 6819 ldr r1, [r3, #0] + 800316e: 43a9 bics r1, r5 + 8003170: 6019 str r1, [r3, #0] + hdma->State = HAL_DMA_STATE_READY; + 8003172: 2101 movs r1, #1 + 8003174: 1d83 adds r3, r0, #6 + 8003176: 77d9 strb r1, [r3, #31] + __HAL_DMA_CLEAR_FLAG(hdma, (DMA_FLAG_TC1 << (hdma->ChannelIndex & 0x1cU))); + 8003178: 6853 ldr r3, [r2, #4] + 800317a: 431c orrs r4, r3 + 800317c: 6054 str r4, [r2, #4] __HAL_UNLOCK(hdma); - 800314e: 2200 movs r2, #0 - 8003150: 1d43 adds r3, r0, #5 - 8003152: 77da strb r2, [r3, #31] + 800317e: 2200 movs r2, #0 + 8003180: 1d43 adds r3, r0, #5 + 8003182: 77da strb r2, [r3, #31] if (hdma->XferCpltCallback != NULL) - 8003154: 6ac3 ldr r3, [r0, #44] @ 0x2c + 8003184: 6ac3 ldr r3, [r0, #44] @ 0x2c if (hdma->XferErrorCallback != NULL) - 8003156: 4293 cmp r3, r2 - 8003158: d1e3 bne.n 8003122 + 8003186: 4293 cmp r3, r2 + 8003188: d1e3 bne.n 8003152 } - 800315a: bdf8 pop {r3, r4, r5, r6, r7, pc} + 800318a: bdf8 pop {r3, r4, r5, r6, r7, pc} else if (((flag_it & (DMA_FLAG_TE1 << (hdma->ChannelIndex & 0x1cU))) != 0U) && ((source_it & DMA_IT_TE) != 0U)) - 800315c: 2408 movs r4, #8 - 800315e: 0027 movs r7, r4 - 8003160: 408f lsls r7, r1 - 8003162: 423e tst r6, r7 - 8003164: d0f9 beq.n 800315a - 8003166: 4225 tst r5, r4 - 8003168: d0f7 beq.n 800315a + 800318c: 2408 movs r4, #8 + 800318e: 0027 movs r7, r4 + 8003190: 408f lsls r7, r1 + 8003192: 423e tst r6, r7 + 8003194: d0f9 beq.n 800318a + 8003196: 4225 tst r5, r4 + 8003198: d0f7 beq.n 800318a __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); - 800316a: 250e movs r5, #14 - 800316c: 681c ldr r4, [r3, #0] - 800316e: 43ac bics r4, r5 - 8003170: 601c str r4, [r3, #0] + 800319a: 250e movs r5, #14 + 800319c: 681c ldr r4, [r3, #0] + 800319e: 43ac bics r4, r5 + 80031a0: 601c str r4, [r3, #0] __HAL_DMA_CLEAR_FLAG(hdma, (DMA_FLAG_GI1 << (hdma->ChannelIndex & 0x1cU))); - 8003172: 2301 movs r3, #1 - 8003174: 001d movs r5, r3 - 8003176: 408d lsls r5, r1 - 8003178: 0029 movs r1, r5 - 800317a: 6854 ldr r4, [r2, #4] - 800317c: 4321 orrs r1, r4 - 800317e: 6051 str r1, [r2, #4] + 80031a2: 2301 movs r3, #1 + 80031a4: 001d movs r5, r3 + 80031a6: 408d lsls r5, r1 + 80031a8: 0029 movs r1, r5 + 80031aa: 6854 ldr r4, [r2, #4] + 80031ac: 4321 orrs r1, r4 + 80031ae: 6051 str r1, [r2, #4] hdma->State = HAL_DMA_STATE_READY; - 8003180: 1d82 adds r2, r0, #6 + 80031b0: 1d82 adds r2, r0, #6 hdma->ErrorCode = HAL_DMA_ERROR_TE; - 8003182: 63c3 str r3, [r0, #60] @ 0x3c + 80031b2: 63c3 str r3, [r0, #60] @ 0x3c hdma->State = HAL_DMA_STATE_READY; - 8003184: 77d3 strb r3, [r2, #31] + 80031b4: 77d3 strb r3, [r2, #31] __HAL_UNLOCK(hdma); - 8003186: 2200 movs r2, #0 - 8003188: 1d43 adds r3, r0, #5 - 800318a: 77da strb r2, [r3, #31] + 80031b6: 2200 movs r2, #0 + 80031b8: 1d43 adds r3, r0, #5 + 80031ba: 77da strb r2, [r3, #31] if (hdma->XferErrorCallback != NULL) - 800318c: 6b43 ldr r3, [r0, #52] @ 0x34 - 800318e: e7e2 b.n 8003156 - 8003190: 40020000 .word 0x40020000 + 80031bc: 6b43 ldr r3, [r0, #52] @ 0x34 + 80031be: e7e2 b.n 8003186 + 80031c0: 40020000 .word 0x40020000 -08003194 : +080031c4 : + return hdma->ErrorCode; + 80031c4: 6bc0 ldr r0, [r0, #60] @ 0x3c +} + 80031c6: 4770 bx lr + +080031c8 : */ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, const GPIO_InitTypeDef *pGPIO_Init) { uint32_t tmp; uint32_t iocurrent; uint32_t position = 0U; - 8003194: 2300 movs r3, #0 - 8003196: 469c mov ip, r3 + 80031c8: 2300 movs r3, #0 + 80031ca: 469c mov ip, r3 { - 8003198: b5f0 push {r4, r5, r6, r7, lr} - 800319a: b085 sub sp, #20 + 80031cc: b5f0 push {r4, r5, r6, r7, lr} + 80031ce: b085 sub sp, #20 assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); assert_param(IS_GPIO_PIN(pGPIO_Init->Pin)); assert_param(IS_GPIO_MODE(pGPIO_Init->Mode)); /* Configure the port pins */ while (((pGPIO_Init->Pin) >> position) != 0U) - 800319c: 680b ldr r3, [r1, #0] - 800319e: 4664 mov r4, ip - 80031a0: 001a movs r2, r3 - 80031a2: 40e2 lsrs r2, r4 - 80031a4: d101 bne.n 80031aa + 80031d0: 680b ldr r3, [r1, #0] + 80031d2: 4664 mov r4, ip + 80031d4: 001a movs r2, r3 + 80031d6: 40e2 lsrs r2, r4 + 80031d8: d101 bne.n 80031de } } position++; } } - 80031a6: b005 add sp, #20 - 80031a8: bdf0 pop {r4, r5, r6, r7, pc} + 80031da: b005 add sp, #20 + 80031dc: bdf0 pop {r4, r5, r6, r7, pc} iocurrent = (pGPIO_Init->Pin) & (1UL << position); - 80031aa: 4662 mov r2, ip - 80031ac: 2601 movs r6, #1 - 80031ae: 4096 lsls r6, r2 - 80031b0: 001a movs r2, r3 - 80031b2: 4032 ands r2, r6 - 80031b4: 9201 str r2, [sp, #4] + 80031de: 4662 mov r2, ip + 80031e0: 2601 movs r6, #1 + 80031e2: 4096 lsls r6, r2 + 80031e4: 001a movs r2, r3 + 80031e6: 4032 ands r2, r6 + 80031e8: 9201 str r2, [sp, #4] if (iocurrent != 0U) - 80031b6: 4233 tst r3, r6 - 80031b8: d100 bne.n 80031bc - 80031ba: e084 b.n 80032c6 + 80031ea: 4233 tst r3, r6 + 80031ec: d100 bne.n 80031f0 + 80031ee: e084 b.n 80032fa if ((pGPIO_Init->Mode == GPIO_MODE_AF_PP) || (pGPIO_Init->Mode == GPIO_MODE_AF_OD)) - 80031bc: 684f ldr r7, [r1, #4] - 80031be: 2310 movs r3, #16 - 80031c0: 003d movs r5, r7 - 80031c2: 439d bics r5, r3 - 80031c4: 9503 str r5, [sp, #12] - 80031c6: 2d02 cmp r5, #2 - 80031c8: d114 bne.n 80031f4 + 80031f0: 684f ldr r7, [r1, #4] + 80031f2: 2310 movs r3, #16 + 80031f4: 003d movs r5, r7 + 80031f6: 439d bics r5, r3 + 80031f8: 9503 str r5, [sp, #12] + 80031fa: 2d02 cmp r5, #2 + 80031fc: d114 bne.n 8003228 tmp = GPIOx->AFR[position >> 3U]; - 80031ca: 4663 mov r3, ip - 80031cc: 08da lsrs r2, r3, #3 - 80031ce: 0092 lsls r2, r2, #2 - 80031d0: 1882 adds r2, r0, r2 - 80031d2: 6a13 ldr r3, [r2, #32] + 80031fe: 4663 mov r3, ip + 8003200: 08da lsrs r2, r3, #3 + 8003202: 0092 lsls r2, r2, #2 + 8003204: 1882 adds r2, r0, r2 + 8003206: 6a13 ldr r3, [r2, #32] tmp &= ~(0xFUL << ((position & 0x07U) * GPIO_AFRL_AFSEL1_Pos)) ; - 80031d4: 2407 movs r4, #7 + 8003208: 2407 movs r4, #7 tmp = GPIOx->AFR[position >> 3U]; - 80031d6: 001d movs r5, r3 + 800320a: 001d movs r5, r3 tmp &= ~(0xFUL << ((position & 0x07U) * GPIO_AFRL_AFSEL1_Pos)) ; - 80031d8: 4663 mov r3, ip - 80031da: 401c ands r4, r3 - 80031dc: 230f movs r3, #15 - 80031de: 00a4 lsls r4, r4, #2 - 80031e0: 40a3 lsls r3, r4 - 80031e2: 439d bics r5, r3 - 80031e4: 9502 str r5, [sp, #8] + 800320c: 4663 mov r3, ip + 800320e: 401c ands r4, r3 + 8003210: 230f movs r3, #15 + 8003212: 00a4 lsls r4, r4, #2 + 8003214: 40a3 lsls r3, r4 + 8003216: 439d bics r5, r3 + 8003218: 9502 str r5, [sp, #8] tmp |= ((pGPIO_Init->Alternate & 0x0FUL) << ((position & 0x07U) * GPIO_AFRL_AFSEL1_Pos)); - 80031e6: 250f movs r5, #15 - 80031e8: 690b ldr r3, [r1, #16] - 80031ea: 402b ands r3, r5 - 80031ec: 40a3 lsls r3, r4 - 80031ee: 9c02 ldr r4, [sp, #8] - 80031f0: 4323 orrs r3, r4 - GPIOx->AFR[position >> 3U] = tmp; - 80031f2: 6213 str r3, [r2, #32] - tmp = GPIOx->MODER; - 80031f4: 4663 mov r3, ip - 80031f6: 005a lsls r2, r3, #1 - tmp &= ~(GPIO_MODER_MODE0 << (position * GPIO_MODER_MODE1_Pos)); - 80031f8: 2303 movs r3, #3 - 80031fa: 4093 lsls r3, r2 - tmp = GPIOx->MODER; - 80031fc: 6804 ldr r4, [r0, #0] - tmp &= ~(GPIO_MODER_MODE0 << (position * GPIO_MODER_MODE1_Pos)); - 80031fe: 43dd mvns r5, r3 - 8003200: 439c bics r4, r3 - tmp |= ((pGPIO_Init->Mode & GPIO_MODE) << (position * GPIO_MODER_MODE1_Pos)); - 8003202: 2303 movs r3, #3 - 8003204: 403b ands r3, r7 - 8003206: 4093 lsls r3, r2 - tmp &= ~(GPIO_MODER_MODE0 << (position * GPIO_MODER_MODE1_Pos)); - 8003208: 9502 str r5, [sp, #8] - if ((pGPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (pGPIO_Init->Mode == GPIO_MODE_AF_PP) || - 800320a: 9d03 ldr r5, [sp, #12] - tmp |= ((pGPIO_Init->Mode & GPIO_MODE) << (position * GPIO_MODER_MODE1_Pos)); - 800320c: 4323 orrs r3, r4 - if ((pGPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (pGPIO_Init->Mode == GPIO_MODE_AF_PP) || - 800320e: 3d01 subs r5, #1 - GPIOx->MODER = tmp; - 8003210: 6003 str r3, [r0, #0] - if ((pGPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (pGPIO_Init->Mode == GPIO_MODE_AF_PP) || - 8003212: 2d01 cmp r5, #1 - 8003214: d95a bls.n 80032cc - if (pGPIO_Init->Mode != GPIO_MODE_ANALOG) - 8003216: 2f03 cmp r7, #3 - 8003218: d055 beq.n 80032c6 - tmp = GPIOx->PUPDR; - 800321a: 68c4 ldr r4, [r0, #12] - tmp &= ~(GPIO_PUPDR_PUPD0 << (position * GPIO_PUPDR_PUPD1_Pos)); - 800321c: 9b02 ldr r3, [sp, #8] - 800321e: 401c ands r4, r3 - tmp |= ((pGPIO_Init->Pull) << (position * GPIO_PUPDR_PUPD1_Pos)); - 8003220: 688b ldr r3, [r1, #8] - 8003222: 4093 lsls r3, r2 + 800321a: 250f movs r5, #15 + 800321c: 690b ldr r3, [r1, #16] + 800321e: 402b ands r3, r5 + 8003220: 40a3 lsls r3, r4 + 8003222: 9c02 ldr r4, [sp, #8] 8003224: 4323 orrs r3, r4 - GPIOx->PUPDR = tmp; - 8003226: 60c3 str r3, [r0, #12] - if ((pGPIO_Init->Mode & EXTI_MODE) == EXTI_MODE) - 8003228: 2380 movs r3, #128 @ 0x80 - 800322a: 055b lsls r3, r3, #21 - 800322c: 421f tst r7, r3 - 800322e: d04a beq.n 80032c6 - tmp = EXTI->EXTICR[position >> 2U]; - 8003230: 4663 mov r3, ip - 8003232: 089a lsrs r2, r3, #2 - 8003234: 4b2d ldr r3, [pc, #180] @ (80032ec ) - 8003236: 0092 lsls r2, r2, #2 - 8003238: 18d2 adds r2, r2, r3 - tmp &= ~((0x0FUL) << ((position & 0x03U) * EXTI_EXTICR1_EXTI1_Pos)); - 800323a: 2403 movs r4, #3 - 800323c: 4663 mov r3, ip - 800323e: 401c ands r4, r3 - 8003240: 230f movs r3, #15 - 8003242: 00e4 lsls r4, r4, #3 - 8003244: 40a3 lsls r3, r4 - tmp |= (GPIO_GET_INDEX(GPIOx) << ((position & 0x03U) * EXTI_EXTICR1_EXTI1_Pos)); - 8003246: 26a0 movs r6, #160 @ 0xa0 - tmp = EXTI->EXTICR[position >> 2U]; - 8003248: 6e15 ldr r5, [r2, #96] @ 0x60 - tmp |= (GPIO_GET_INDEX(GPIOx) << ((position & 0x03U) * EXTI_EXTICR1_EXTI1_Pos)); - 800324a: 05f6 lsls r6, r6, #23 - tmp &= ~((0x0FUL) << ((position & 0x03U) * EXTI_EXTICR1_EXTI1_Pos)); - 800324c: 439d bics r5, r3 - tmp |= (GPIO_GET_INDEX(GPIOx) << ((position & 0x03U) * EXTI_EXTICR1_EXTI1_Pos)); - 800324e: 2300 movs r3, #0 - 8003250: 42b0 cmp r0, r6 - 8003252: d010 beq.n 8003276 - 8003254: 4e26 ldr r6, [pc, #152] @ (80032f0 ) - 8003256: 3301 adds r3, #1 - 8003258: 42b0 cmp r0, r6 - 800325a: d00c beq.n 8003276 - 800325c: 4e25 ldr r6, [pc, #148] @ (80032f4 ) - 800325e: 3301 adds r3, #1 - 8003260: 42b0 cmp r0, r6 - 8003262: d008 beq.n 8003276 - 8003264: 4e24 ldr r6, [pc, #144] @ (80032f8 ) - 8003266: 3301 adds r3, #1 - 8003268: 42b0 cmp r0, r6 - 800326a: d004 beq.n 8003276 - 800326c: 4b23 ldr r3, [pc, #140] @ (80032fc ) - 800326e: 18c3 adds r3, r0, r3 - 8003270: 1e5e subs r6, r3, #1 - 8003272: 41b3 sbcs r3, r6 - 8003274: 3305 adds r3, #5 - 8003276: 40a3 lsls r3, r4 - 8003278: 432b orrs r3, r5 - EXTI->EXTICR[position >> 2U] = tmp; - 800327a: 6613 str r3, [r2, #96] @ 0x60 - tmp = EXTI->IMR1; - 800327c: 4b20 ldr r3, [pc, #128] @ (8003300 ) - tmp &= ~((uint32_t)iocurrent); - 800327e: 9a01 ldr r2, [sp, #4] - tmp = EXTI->IMR1; - 8003280: 6fdd ldr r5, [r3, #124] @ 0x7c - tmp |= iocurrent; - 8003282: 9c01 ldr r4, [sp, #4] - tmp &= ~((uint32_t)iocurrent); - 8003284: 43d2 mvns r2, r2 - tmp |= iocurrent; - 8003286: 432c orrs r4, r5 - if ((pGPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT) - 8003288: 03fe lsls r6, r7, #15 - 800328a: d401 bmi.n 8003290 - tmp &= ~((uint32_t)iocurrent); - 800328c: 002c movs r4, r5 - 800328e: 4014 ands r4, r2 - EXTI->IMR1 = tmp; - 8003290: 67dc str r4, [r3, #124] @ 0x7c - tmp = EXTI->EMR1; - 8003292: 4c1c ldr r4, [pc, #112] @ (8003304 ) - tmp |= iocurrent; - 8003294: 9d01 ldr r5, [sp, #4] - tmp = EXTI->EMR1; - 8003296: 6fe3 ldr r3, [r4, #124] @ 0x7c - tmp |= iocurrent; - 8003298: 431d orrs r5, r3 - if ((pGPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT) - 800329a: 03be lsls r6, r7, #14 - 800329c: d401 bmi.n 80032a2 - tmp &= ~((uint32_t)iocurrent); - 800329e: 4013 ands r3, r2 - 80032a0: 001d movs r5, r3 - EXTI->EMR1 = tmp; - 80032a2: 4b12 ldr r3, [pc, #72] @ (80032ec ) - 80032a4: 67e5 str r5, [r4, #124] @ 0x7c - tmp = EXTI->RTSR1; - 80032a6: 681d ldr r5, [r3, #0] - tmp |= iocurrent; - 80032a8: 9c01 ldr r4, [sp, #4] - 80032aa: 432c orrs r4, r5 - if ((pGPIO_Init->Mode & RISING_EDGE) == RISING_EDGE) - 80032ac: 02fe lsls r6, r7, #11 - 80032ae: d401 bmi.n 80032b4 - tmp &= ~((uint32_t)iocurrent); - 80032b0: 002c movs r4, r5 - 80032b2: 4014 ands r4, r2 - EXTI->RTSR1 = tmp; - 80032b4: 601c str r4, [r3, #0] - tmp = EXTI->FTSR1; - 80032b6: 685c ldr r4, [r3, #4] - tmp |= iocurrent; - 80032b8: 9d01 ldr r5, [sp, #4] - 80032ba: 4325 orrs r5, r4 - if ((pGPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE) - 80032bc: 02bf lsls r7, r7, #10 - 80032be: d401 bmi.n 80032c4 - tmp &= ~((uint32_t)iocurrent); - 80032c0: 4014 ands r4, r2 - 80032c2: 0025 movs r5, r4 - EXTI->FTSR1 = tmp; - 80032c4: 605d str r5, [r3, #4] - position++; - 80032c6: 2301 movs r3, #1 - 80032c8: 449c add ip, r3 - 80032ca: e767 b.n 800319c - tmp = GPIOx->OSPEEDR; - 80032cc: 6884 ldr r4, [r0, #8] - tmp &= ~(GPIO_OSPEEDR_OSPEED0 << (position * GPIO_OSPEEDR_OSPEED1_Pos)); - 80032ce: 9b02 ldr r3, [sp, #8] - tmp |= (((pGPIO_Init->Mode & GPIO_OUTPUT_TYPE) >> 4U) << position); - 80032d0: 4665 mov r5, ip - tmp &= ~(GPIO_OSPEEDR_OSPEED0 << (position * GPIO_OSPEEDR_OSPEED1_Pos)); - 80032d2: 401c ands r4, r3 - tmp |= (pGPIO_Init->Speed << (position * GPIO_OSPEEDR_OSPEED1_Pos)); - 80032d4: 68cb ldr r3, [r1, #12] - 80032d6: 4093 lsls r3, r2 - 80032d8: 4323 orrs r3, r4 - GPIOx->OSPEEDR = tmp; - 80032da: 6083 str r3, [r0, #8] - tmp |= (((pGPIO_Init->Mode & GPIO_OUTPUT_TYPE) >> 4U) << position); - 80032dc: 093b lsrs r3, r7, #4 - 80032de: 40ab lsls r3, r5 - tmp = GPIOx->OTYPER; - 80032e0: 6844 ldr r4, [r0, #4] - tmp &= ~(GPIO_OTYPER_OT0 << position) ; - 80032e2: 43b4 bics r4, r6 - tmp |= (((pGPIO_Init->Mode & GPIO_OUTPUT_TYPE) >> 4U) << position); - 80032e4: 4323 orrs r3, r4 - GPIOx->OTYPER = tmp; - 80032e6: 6043 str r3, [r0, #4] + GPIOx->AFR[position >> 3U] = tmp; + 8003226: 6213 str r3, [r2, #32] + tmp = GPIOx->MODER; + 8003228: 4663 mov r3, ip + 800322a: 005a lsls r2, r3, #1 + tmp &= ~(GPIO_MODER_MODE0 << (position * GPIO_MODER_MODE1_Pos)); + 800322c: 2303 movs r3, #3 + 800322e: 4093 lsls r3, r2 + tmp = GPIOx->MODER; + 8003230: 6804 ldr r4, [r0, #0] + tmp &= ~(GPIO_MODER_MODE0 << (position * GPIO_MODER_MODE1_Pos)); + 8003232: 43dd mvns r5, r3 + 8003234: 439c bics r4, r3 + tmp |= ((pGPIO_Init->Mode & GPIO_MODE) << (position * GPIO_MODER_MODE1_Pos)); + 8003236: 2303 movs r3, #3 + 8003238: 403b ands r3, r7 + 800323a: 4093 lsls r3, r2 + tmp &= ~(GPIO_MODER_MODE0 << (position * GPIO_MODER_MODE1_Pos)); + 800323c: 9502 str r5, [sp, #8] + if ((pGPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (pGPIO_Init->Mode == GPIO_MODE_AF_PP) || + 800323e: 9d03 ldr r5, [sp, #12] + tmp |= ((pGPIO_Init->Mode & GPIO_MODE) << (position * GPIO_MODER_MODE1_Pos)); + 8003240: 4323 orrs r3, r4 + if ((pGPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (pGPIO_Init->Mode == GPIO_MODE_AF_PP) || + 8003242: 3d01 subs r5, #1 + GPIOx->MODER = tmp; + 8003244: 6003 str r3, [r0, #0] + if ((pGPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (pGPIO_Init->Mode == GPIO_MODE_AF_PP) || + 8003246: 2d01 cmp r5, #1 + 8003248: d95a bls.n 8003300 if (pGPIO_Init->Mode != GPIO_MODE_ANALOG) - 80032e8: e797 b.n 800321a - 80032ea: 46c0 nop @ (mov r8, r8) - 80032ec: 40021800 .word 0x40021800 - 80032f0: 50000400 .word 0x50000400 - 80032f4: 50000800 .word 0x50000800 - 80032f8: 50000c00 .word 0x50000c00 - 80032fc: afffec00 .word 0xafffec00 - 8003300: 40021804 .word 0x40021804 - 8003304: 40021808 .word 0x40021808 + 800324a: 2f03 cmp r7, #3 + 800324c: d055 beq.n 80032fa + tmp = GPIOx->PUPDR; + 800324e: 68c4 ldr r4, [r0, #12] + tmp &= ~(GPIO_PUPDR_PUPD0 << (position * GPIO_PUPDR_PUPD1_Pos)); + 8003250: 9b02 ldr r3, [sp, #8] + 8003252: 401c ands r4, r3 + tmp |= ((pGPIO_Init->Pull) << (position * GPIO_PUPDR_PUPD1_Pos)); + 8003254: 688b ldr r3, [r1, #8] + 8003256: 4093 lsls r3, r2 + 8003258: 4323 orrs r3, r4 + GPIOx->PUPDR = tmp; + 800325a: 60c3 str r3, [r0, #12] + if ((pGPIO_Init->Mode & EXTI_MODE) == EXTI_MODE) + 800325c: 2380 movs r3, #128 @ 0x80 + 800325e: 055b lsls r3, r3, #21 + 8003260: 421f tst r7, r3 + 8003262: d04a beq.n 80032fa + tmp = EXTI->EXTICR[position >> 2U]; + 8003264: 4663 mov r3, ip + 8003266: 089a lsrs r2, r3, #2 + 8003268: 4b2d ldr r3, [pc, #180] @ (8003320 ) + 800326a: 0092 lsls r2, r2, #2 + 800326c: 18d2 adds r2, r2, r3 + tmp &= ~((0x0FUL) << ((position & 0x03U) * EXTI_EXTICR1_EXTI1_Pos)); + 800326e: 2403 movs r4, #3 + 8003270: 4663 mov r3, ip + 8003272: 401c ands r4, r3 + 8003274: 230f movs r3, #15 + 8003276: 00e4 lsls r4, r4, #3 + 8003278: 40a3 lsls r3, r4 + tmp |= (GPIO_GET_INDEX(GPIOx) << ((position & 0x03U) * EXTI_EXTICR1_EXTI1_Pos)); + 800327a: 26a0 movs r6, #160 @ 0xa0 + tmp = EXTI->EXTICR[position >> 2U]; + 800327c: 6e15 ldr r5, [r2, #96] @ 0x60 + tmp |= (GPIO_GET_INDEX(GPIOx) << ((position & 0x03U) * EXTI_EXTICR1_EXTI1_Pos)); + 800327e: 05f6 lsls r6, r6, #23 + tmp &= ~((0x0FUL) << ((position & 0x03U) * EXTI_EXTICR1_EXTI1_Pos)); + 8003280: 439d bics r5, r3 + tmp |= (GPIO_GET_INDEX(GPIOx) << ((position & 0x03U) * EXTI_EXTICR1_EXTI1_Pos)); + 8003282: 2300 movs r3, #0 + 8003284: 42b0 cmp r0, r6 + 8003286: d010 beq.n 80032aa + 8003288: 4e26 ldr r6, [pc, #152] @ (8003324 ) + 800328a: 3301 adds r3, #1 + 800328c: 42b0 cmp r0, r6 + 800328e: d00c beq.n 80032aa + 8003290: 4e25 ldr r6, [pc, #148] @ (8003328 ) + 8003292: 3301 adds r3, #1 + 8003294: 42b0 cmp r0, r6 + 8003296: d008 beq.n 80032aa + 8003298: 4e24 ldr r6, [pc, #144] @ (800332c ) + 800329a: 3301 adds r3, #1 + 800329c: 42b0 cmp r0, r6 + 800329e: d004 beq.n 80032aa + 80032a0: 4b23 ldr r3, [pc, #140] @ (8003330 ) + 80032a2: 18c3 adds r3, r0, r3 + 80032a4: 1e5e subs r6, r3, #1 + 80032a6: 41b3 sbcs r3, r6 + 80032a8: 3305 adds r3, #5 + 80032aa: 40a3 lsls r3, r4 + 80032ac: 432b orrs r3, r5 + EXTI->EXTICR[position >> 2U] = tmp; + 80032ae: 6613 str r3, [r2, #96] @ 0x60 + tmp = EXTI->IMR1; + 80032b0: 4b20 ldr r3, [pc, #128] @ (8003334 ) + tmp &= ~((uint32_t)iocurrent); + 80032b2: 9a01 ldr r2, [sp, #4] + tmp = EXTI->IMR1; + 80032b4: 6fdd ldr r5, [r3, #124] @ 0x7c + tmp |= iocurrent; + 80032b6: 9c01 ldr r4, [sp, #4] + tmp &= ~((uint32_t)iocurrent); + 80032b8: 43d2 mvns r2, r2 + tmp |= iocurrent; + 80032ba: 432c orrs r4, r5 + if ((pGPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT) + 80032bc: 03fe lsls r6, r7, #15 + 80032be: d401 bmi.n 80032c4 + tmp &= ~((uint32_t)iocurrent); + 80032c0: 002c movs r4, r5 + 80032c2: 4014 ands r4, r2 + EXTI->IMR1 = tmp; + 80032c4: 67dc str r4, [r3, #124] @ 0x7c + tmp = EXTI->EMR1; + 80032c6: 4c1c ldr r4, [pc, #112] @ (8003338 ) + tmp |= iocurrent; + 80032c8: 9d01 ldr r5, [sp, #4] + tmp = EXTI->EMR1; + 80032ca: 6fe3 ldr r3, [r4, #124] @ 0x7c + tmp |= iocurrent; + 80032cc: 431d orrs r5, r3 + if ((pGPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT) + 80032ce: 03be lsls r6, r7, #14 + 80032d0: d401 bmi.n 80032d6 + tmp &= ~((uint32_t)iocurrent); + 80032d2: 4013 ands r3, r2 + 80032d4: 001d movs r5, r3 + EXTI->EMR1 = tmp; + 80032d6: 4b12 ldr r3, [pc, #72] @ (8003320 ) + 80032d8: 67e5 str r5, [r4, #124] @ 0x7c + tmp = EXTI->RTSR1; + 80032da: 681d ldr r5, [r3, #0] + tmp |= iocurrent; + 80032dc: 9c01 ldr r4, [sp, #4] + 80032de: 432c orrs r4, r5 + if ((pGPIO_Init->Mode & RISING_EDGE) == RISING_EDGE) + 80032e0: 02fe lsls r6, r7, #11 + 80032e2: d401 bmi.n 80032e8 + tmp &= ~((uint32_t)iocurrent); + 80032e4: 002c movs r4, r5 + 80032e6: 4014 ands r4, r2 + EXTI->RTSR1 = tmp; + 80032e8: 601c str r4, [r3, #0] + tmp = EXTI->FTSR1; + 80032ea: 685c ldr r4, [r3, #4] + tmp |= iocurrent; + 80032ec: 9d01 ldr r5, [sp, #4] + 80032ee: 4325 orrs r5, r4 + if ((pGPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE) + 80032f0: 02bf lsls r7, r7, #10 + 80032f2: d401 bmi.n 80032f8 + tmp &= ~((uint32_t)iocurrent); + 80032f4: 4014 ands r4, r2 + 80032f6: 0025 movs r5, r4 + EXTI->FTSR1 = tmp; + 80032f8: 605d str r5, [r3, #4] + position++; + 80032fa: 2301 movs r3, #1 + 80032fc: 449c add ip, r3 + 80032fe: e767 b.n 80031d0 + tmp = GPIOx->OSPEEDR; + 8003300: 6884 ldr r4, [r0, #8] + tmp &= ~(GPIO_OSPEEDR_OSPEED0 << (position * GPIO_OSPEEDR_OSPEED1_Pos)); + 8003302: 9b02 ldr r3, [sp, #8] + tmp |= (((pGPIO_Init->Mode & GPIO_OUTPUT_TYPE) >> 4U) << position); + 8003304: 4665 mov r5, ip + tmp &= ~(GPIO_OSPEEDR_OSPEED0 << (position * GPIO_OSPEEDR_OSPEED1_Pos)); + 8003306: 401c ands r4, r3 + tmp |= (pGPIO_Init->Speed << (position * GPIO_OSPEEDR_OSPEED1_Pos)); + 8003308: 68cb ldr r3, [r1, #12] + 800330a: 4093 lsls r3, r2 + 800330c: 4323 orrs r3, r4 + GPIOx->OSPEEDR = tmp; + 800330e: 6083 str r3, [r0, #8] + tmp |= (((pGPIO_Init->Mode & GPIO_OUTPUT_TYPE) >> 4U) << position); + 8003310: 093b lsrs r3, r7, #4 + 8003312: 40ab lsls r3, r5 + tmp = GPIOx->OTYPER; + 8003314: 6844 ldr r4, [r0, #4] + tmp &= ~(GPIO_OTYPER_OT0 << position) ; + 8003316: 43b4 bics r4, r6 + tmp |= (((pGPIO_Init->Mode & GPIO_OUTPUT_TYPE) >> 4U) << position); + 8003318: 4323 orrs r3, r4 + GPIOx->OTYPER = tmp; + 800331a: 6043 str r3, [r0, #4] + if (pGPIO_Init->Mode != GPIO_MODE_ANALOG) + 800331c: e797 b.n 800324e + 800331e: 46c0 nop @ (mov r8, r8) + 8003320: 40021800 .word 0x40021800 + 8003324: 50000400 .word 0x50000400 + 8003328: 50000800 .word 0x50000800 + 800332c: 50000c00 .word 0x50000c00 + 8003330: afffec00 .word 0xafffec00 + 8003334: 40021804 .word 0x40021804 + 8003338: 40021808 .word 0x40021808 -08003308 : +0800333c : GPIO_PinState bitstatus; /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); if ((GPIOx->IDR & GPIO_Pin) != 0U) - 8003308: 6900 ldr r0, [r0, #16] - 800330a: 4008 ands r0, r1 - 800330c: 1e43 subs r3, r0, #1 - 800330e: 4198 sbcs r0, r3 + 800333c: 6900 ldr r0, [r0, #16] + 800333e: 4008 ands r0, r1 + 8003340: 1e43 subs r3, r0, #1 + 8003342: 4198 sbcs r0, r3 } else { bitstatus = GPIO_PIN_RESET; } return bitstatus; - 8003310: b2c0 uxtb r0, r0 + 8003344: b2c0 uxtb r0, r0 } - 8003312: 4770 bx lr + 8003346: 4770 bx lr -08003314 : +08003348 : { /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); assert_param(IS_GPIO_PIN_ACTION(PinState)); if (PinState != GPIO_PIN_RESET) - 8003314: 2a00 cmp r2, #0 - 8003316: d001 beq.n 800331c + 8003348: 2a00 cmp r2, #0 + 800334a: d001 beq.n 8003350 { GPIOx->BSRR = (uint32_t)GPIO_Pin; - 8003318: 6181 str r1, [r0, #24] + 800334c: 6181 str r1, [r0, #24] } else { GPIOx->BRR = (uint32_t)GPIO_Pin; } } - 800331a: 4770 bx lr + 800334e: 4770 bx lr GPIOx->BRR = (uint32_t)GPIO_Pin; - 800331c: 6281 str r1, [r0, #40] @ 0x28 + 8003350: 6281 str r1, [r0, #40] @ 0x28 } - 800331e: e7fc b.n 800331a + 8003352: e7fc b.n 800334e -08003320 : +08003354 : UNUSED(GPIO_Pin); /* NOTE: This function should not be modified, when the callback is needed, the HAL_GPIO_EXTI_Rising_Callback could be implemented in the user file */ } - 8003320: 4770 bx lr + 8003354: 4770 bx lr ... -08003324 : +08003358 : { - 8003324: b570 push {r4, r5, r6, lr} + 8003358: b570 push {r4, r5, r6, lr} if (__HAL_GPIO_EXTI_GET_RISING_IT(GPIO_Pin) != 0U) - 8003326: 4d08 ldr r5, [pc, #32] @ (8003348 ) + 800335a: 4d08 ldr r5, [pc, #32] @ (800337c ) { - 8003328: 0004 movs r4, r0 + 800335c: 0004 movs r4, r0 if (__HAL_GPIO_EXTI_GET_RISING_IT(GPIO_Pin) != 0U) - 800332a: 68eb ldr r3, [r5, #12] - 800332c: 4218 tst r0, r3 - 800332e: d002 beq.n 8003336 + 800335e: 68eb ldr r3, [r5, #12] + 8003360: 4218 tst r0, r3 + 8003362: d002 beq.n 800336a __HAL_GPIO_EXTI_CLEAR_RISING_IT(GPIO_Pin); - 8003330: 60e8 str r0, [r5, #12] + 8003364: 60e8 str r0, [r5, #12] HAL_GPIO_EXTI_Rising_Callback(GPIO_Pin); - 8003332: f7ff fff5 bl 8003320 + 8003366: f7ff fff5 bl 8003354 if (__HAL_GPIO_EXTI_GET_FALLING_IT(GPIO_Pin) != 0U) - 8003336: 692b ldr r3, [r5, #16] - 8003338: 4223 tst r3, r4 - 800333a: d003 beq.n 8003344 + 800336a: 692b ldr r3, [r5, #16] + 800336c: 4223 tst r3, r4 + 800336e: d003 beq.n 8003378 HAL_GPIO_EXTI_Falling_Callback(GPIO_Pin); - 800333c: 0020 movs r0, r4 + 8003370: 0020 movs r0, r4 __HAL_GPIO_EXTI_CLEAR_FALLING_IT(GPIO_Pin); - 800333e: 612c str r4, [r5, #16] + 8003372: 612c str r4, [r5, #16] HAL_GPIO_EXTI_Falling_Callback(GPIO_Pin); - 8003340: f7fd fb2e bl 80009a0 + 8003374: f7fd fb14 bl 80009a0 } - 8003344: bd70 pop {r4, r5, r6, pc} - 8003346: 46c0 nop @ (mov r8, r8) - 8003348: 40021800 .word 0x40021800 + 8003378: bd70 pop {r4, r5, r6, pc} + 800337a: 46c0 nop @ (mov r8, r8) + 800337c: 40021800 .word 0x40021800 -0800334c : +08003380 : must adjust the number of CPU wait states in their application (SystemClock_Config() API) before calling the HAL_RCC_OscConfig() API to update the HSI48 clock division factor. * @retval HAL status */ HAL_StatusTypeDef HAL_RCC_OscConfig(const RCC_OscInitTypeDef *RCC_OscInitStruct) { - 800334c: b5f8 push {r3, r4, r5, r6, r7, lr} - 800334e: 1e05 subs r5, r0, #0 + 8003380: b5f8 push {r3, r4, r5, r6, r7, lr} + 8003382: 1e05 subs r5, r0, #0 uint32_t tickstart; uint32_t temp_sysclksrc; /* Check Null pointer */ if (RCC_OscInitStruct == NULL) - 8003350: d101 bne.n 8003356 + 8003384: d101 bne.n 800338a { return HAL_ERROR; - 8003352: 2001 movs r0, #1 + 8003386: 2001 movs r0, #1 } } } #endif /* RCC_CR_HSIUSB48ON */ return HAL_OK; } - 8003354: bdf8 pop {r3, r4, r5, r6, r7, pc} + 8003388: bdf8 pop {r3, r4, r5, r6, r7, pc} if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) - 8003356: 6803 ldr r3, [r0, #0] - 8003358: 07db lsls r3, r3, #31 - 800335a: d40d bmi.n 8003378 + 800338a: 6803 ldr r3, [r0, #0] + 800338c: 07db lsls r3, r3, #31 + 800338e: d40d bmi.n 80033ac if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) - 800335c: 682b ldr r3, [r5, #0] - 800335e: 079b lsls r3, r3, #30 - 8003360: d44f bmi.n 8003402 + 8003390: 682b ldr r3, [r5, #0] + 8003392: 079b lsls r3, r3, #30 + 8003394: d44f bmi.n 8003436 if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) - 8003362: 682b ldr r3, [r5, #0] - 8003364: 071b lsls r3, r3, #28 - 8003366: d500 bpl.n 800336a - 8003368: e0a4 b.n 80034b4 + 8003396: 682b ldr r3, [r5, #0] + 8003398: 071b lsls r3, r3, #28 + 800339a: d500 bpl.n 800339e + 800339c: e0a4 b.n 80034e8 if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) - 800336a: 2204 movs r2, #4 - 800336c: 682b ldr r3, [r5, #0] - 800336e: 4213 tst r3, r2 - 8003370: d000 beq.n 8003374 - 8003372: e0cf b.n 8003514 + 800339e: 2204 movs r2, #4 + 80033a0: 682b ldr r3, [r5, #0] + 80033a2: 4213 tst r3, r2 + 80033a4: d000 beq.n 80033a8 + 80033a6: e0cf b.n 8003548 return HAL_OK; - 8003374: 2000 movs r0, #0 - 8003376: e7ed b.n 8003354 + 80033a8: 2000 movs r0, #0 + 80033aa: e7ed b.n 8003388 temp_sysclksrc = __HAL_RCC_GET_SYSCLK_SOURCE(); - 8003378: 2138 movs r1, #56 @ 0x38 - 800337a: 4c85 ldr r4, [pc, #532] @ (8003590 ) + 80033ac: 2138 movs r1, #56 @ 0x38 + 80033ae: 4c85 ldr r4, [pc, #532] @ (80035c4 ) if (RCC_OscInitStruct->HSEState == RCC_HSE_OFF) - 800337c: 6843 ldr r3, [r0, #4] + 80033b0: 6843 ldr r3, [r0, #4] temp_sysclksrc = __HAL_RCC_GET_SYSCLK_SOURCE(); - 800337e: 68a2 ldr r2, [r4, #8] - 8003380: 400a ands r2, r1 + 80033b2: 68a2 ldr r2, [r4, #8] + 80033b4: 400a ands r2, r1 if (temp_sysclksrc == RCC_CFGR_SWS_HSE) - 8003382: 2a08 cmp r2, #8 - 8003384: d102 bne.n 800338c + 80033b6: 2a08 cmp r2, #8 + 80033b8: d102 bne.n 80033c0 if (RCC_OscInitStruct->HSEState == RCC_HSE_OFF) - 8003386: 2b00 cmp r3, #0 - 8003388: d1e8 bne.n 800335c - 800338a: e7e2 b.n 8003352 + 80033ba: 2b00 cmp r3, #0 + 80033bc: d1e8 bne.n 8003390 + 80033be: e7e2 b.n 8003386 __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); - 800338c: 2280 movs r2, #128 @ 0x80 - 800338e: 0252 lsls r2, r2, #9 - 8003390: 4293 cmp r3, r2 - 8003392: d111 bne.n 80033b8 - 8003394: 6822 ldr r2, [r4, #0] - 8003396: 4313 orrs r3, r2 - 8003398: 6023 str r3, [r4, #0] + 80033c0: 2280 movs r2, #128 @ 0x80 + 80033c2: 0252 lsls r2, r2, #9 + 80033c4: 4293 cmp r3, r2 + 80033c6: d111 bne.n 80033ec + 80033c8: 6822 ldr r2, [r4, #0] + 80033ca: 4313 orrs r3, r2 + 80033cc: 6023 str r3, [r4, #0] tickstart = HAL_GetTick(); - 800339a: f7ff faa1 bl 80028e0 + 80033ce: f7ff fa9f bl 8002910 while (READ_BIT(RCC->CR, RCC_CR_HSERDY) == 0U) - 800339e: 2780 movs r7, #128 @ 0x80 + 80033d2: 2780 movs r7, #128 @ 0x80 tickstart = HAL_GetTick(); - 80033a0: 0006 movs r6, r0 + 80033d4: 0006 movs r6, r0 while (READ_BIT(RCC->CR, RCC_CR_HSERDY) == 0U) - 80033a2: 02bf lsls r7, r7, #10 - 80033a4: 6823 ldr r3, [r4, #0] - 80033a6: 423b tst r3, r7 - 80033a8: d1d8 bne.n 800335c + 80033d6: 02bf lsls r7, r7, #10 + 80033d8: 6823 ldr r3, [r4, #0] + 80033da: 423b tst r3, r7 + 80033dc: d1d8 bne.n 8003390 if ((HAL_GetTick() - tickstart) > RCC_HSE_TIMEOUT_VALUE) - 80033aa: f7ff fa99 bl 80028e0 - 80033ae: 1b80 subs r0, r0, r6 - 80033b0: 2864 cmp r0, #100 @ 0x64 - 80033b2: d9f7 bls.n 80033a4 + 80033de: f7ff fa97 bl 8002910 + 80033e2: 1b80 subs r0, r0, r6 + 80033e4: 2864 cmp r0, #100 @ 0x64 + 80033e6: d9f7 bls.n 80033d8 return HAL_TIMEOUT; - 80033b4: 2003 movs r0, #3 - 80033b6: e7cd b.n 8003354 + 80033e8: 2003 movs r0, #3 + 80033ea: e7cd b.n 8003388 __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); - 80033b8: 21a0 movs r1, #160 @ 0xa0 - 80033ba: 02c9 lsls r1, r1, #11 - 80033bc: 428b cmp r3, r1 - 80033be: d108 bne.n 80033d2 - 80033c0: 2380 movs r3, #128 @ 0x80 - 80033c2: 6821 ldr r1, [r4, #0] - 80033c4: 02db lsls r3, r3, #11 - 80033c6: 430b orrs r3, r1 - 80033c8: 6023 str r3, [r4, #0] - 80033ca: 6823 ldr r3, [r4, #0] - 80033cc: 431a orrs r2, r3 - 80033ce: 6022 str r2, [r4, #0] + 80033ec: 21a0 movs r1, #160 @ 0xa0 + 80033ee: 02c9 lsls r1, r1, #11 + 80033f0: 428b cmp r3, r1 + 80033f2: d108 bne.n 8003406 + 80033f4: 2380 movs r3, #128 @ 0x80 + 80033f6: 6821 ldr r1, [r4, #0] + 80033f8: 02db lsls r3, r3, #11 + 80033fa: 430b orrs r3, r1 + 80033fc: 6023 str r3, [r4, #0] + 80033fe: 6823 ldr r3, [r4, #0] + 8003400: 431a orrs r2, r3 + 8003402: 6022 str r2, [r4, #0] if (RCC_OscInitStruct->HSEState != RCC_HSE_OFF) - 80033d0: e7e3 b.n 800339a + 8003404: e7e3 b.n 80033ce __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); - 80033d2: 6822 ldr r2, [r4, #0] - 80033d4: 496f ldr r1, [pc, #444] @ (8003594 ) - 80033d6: 400a ands r2, r1 - 80033d8: 6022 str r2, [r4, #0] - 80033da: 6822 ldr r2, [r4, #0] - 80033dc: 496e ldr r1, [pc, #440] @ (8003598 ) - 80033de: 400a ands r2, r1 - 80033e0: 6022 str r2, [r4, #0] + 8003406: 6822 ldr r2, [r4, #0] + 8003408: 496f ldr r1, [pc, #444] @ (80035c8 ) + 800340a: 400a ands r2, r1 + 800340c: 6022 str r2, [r4, #0] + 800340e: 6822 ldr r2, [r4, #0] + 8003410: 496e ldr r1, [pc, #440] @ (80035cc ) + 8003412: 400a ands r2, r1 + 8003414: 6022 str r2, [r4, #0] if (RCC_OscInitStruct->HSEState != RCC_HSE_OFF) - 80033e2: 2b00 cmp r3, #0 - 80033e4: d1d9 bne.n 800339a + 8003416: 2b00 cmp r3, #0 + 8003418: d1d9 bne.n 80033ce tickstart = HAL_GetTick(); - 80033e6: f7ff fa7b bl 80028e0 + 800341a: f7ff fa79 bl 8002910 while (READ_BIT(RCC->CR, RCC_CR_HSERDY) != 0U) - 80033ea: 2780 movs r7, #128 @ 0x80 + 800341e: 2780 movs r7, #128 @ 0x80 tickstart = HAL_GetTick(); - 80033ec: 0006 movs r6, r0 + 8003420: 0006 movs r6, r0 while (READ_BIT(RCC->CR, RCC_CR_HSERDY) != 0U) - 80033ee: 02bf lsls r7, r7, #10 - 80033f0: 6823 ldr r3, [r4, #0] - 80033f2: 423b tst r3, r7 - 80033f4: d0b2 beq.n 800335c + 8003422: 02bf lsls r7, r7, #10 + 8003424: 6823 ldr r3, [r4, #0] + 8003426: 423b tst r3, r7 + 8003428: d0b2 beq.n 8003390 if ((HAL_GetTick() - tickstart) > RCC_HSE_TIMEOUT_VALUE) - 80033f6: f7ff fa73 bl 80028e0 - 80033fa: 1b80 subs r0, r0, r6 - 80033fc: 2864 cmp r0, #100 @ 0x64 - 80033fe: d9f7 bls.n 80033f0 - 8003400: e7d8 b.n 80033b4 + 800342a: f7ff fa71 bl 8002910 + 800342e: 1b80 subs r0, r0, r6 + 8003430: 2864 cmp r0, #100 @ 0x64 + 8003432: d9f7 bls.n 8003424 + 8003434: e7d8 b.n 80033e8 temp_sysclksrc = __HAL_RCC_GET_SYSCLK_SOURCE(); - 8003402: 2238 movs r2, #56 @ 0x38 - 8003404: 4c62 ldr r4, [pc, #392] @ (8003590 ) + 8003436: 2238 movs r2, #56 @ 0x38 + 8003438: 4c62 ldr r4, [pc, #392] @ (80035c4 ) if (RCC_OscInitStruct->HSIState == RCC_HSI_OFF) - 8003406: 68eb ldr r3, [r5, #12] + 800343a: 68eb ldr r3, [r5, #12] temp_sysclksrc = __HAL_RCC_GET_SYSCLK_SOURCE(); - 8003408: 68a1 ldr r1, [r4, #8] + 800343c: 68a1 ldr r1, [r4, #8] if (temp_sysclksrc == RCC_CFGR_SWS_HSI) - 800340a: 4211 tst r1, r2 - 800340c: d11c bne.n 8003448 + 800343e: 4211 tst r1, r2 + 8003440: d11c bne.n 800347c if (RCC_OscInitStruct->HSIState == RCC_HSI_OFF) - 800340e: 2b00 cmp r3, #0 - 8003410: d09f beq.n 8003352 + 8003442: 2b00 cmp r3, #0 + 8003444: d09f beq.n 8003386 __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); - 8003412: 6862 ldr r2, [r4, #4] - 8003414: 696b ldr r3, [r5, #20] - 8003416: 4961 ldr r1, [pc, #388] @ (800359c ) - 8003418: 021b lsls r3, r3, #8 - 800341a: 400a ands r2, r1 - 800341c: 4313 orrs r3, r2 - 800341e: 6063 str r3, [r4, #4] + 8003446: 6862 ldr r2, [r4, #4] + 8003448: 696b ldr r3, [r5, #20] + 800344a: 4961 ldr r1, [pc, #388] @ (80035d0 ) + 800344c: 021b lsls r3, r3, #8 + 800344e: 400a ands r2, r1 + 8003450: 4313 orrs r3, r2 + 8003452: 6063 str r3, [r4, #4] __HAL_RCC_HSI_CONFIG(RCC_OscInitStruct->HSIDiv); - 8003420: 6823 ldr r3, [r4, #0] - 8003422: 4a5f ldr r2, [pc, #380] @ (80035a0 ) + 8003454: 6823 ldr r3, [r4, #0] + 8003456: 4a5f ldr r2, [pc, #380] @ (80035d4 ) SystemCoreClock = (HSI_VALUE / (1UL << ((READ_BIT(RCC->CR, RCC_CR_HSIDIV)) >> RCC_CR_HSIDIV_Pos))); - 8003424: 495f ldr r1, [pc, #380] @ (80035a4 ) + 8003458: 495f ldr r1, [pc, #380] @ (80035d8 ) __HAL_RCC_HSI_CONFIG(RCC_OscInitStruct->HSIDiv); - 8003426: 4013 ands r3, r2 - 8003428: 692a ldr r2, [r5, #16] - 800342a: 4313 orrs r3, r2 - 800342c: 6023 str r3, [r4, #0] + 800345a: 4013 ands r3, r2 + 800345c: 692a ldr r2, [r5, #16] + 800345e: 4313 orrs r3, r2 + 8003460: 6023 str r3, [r4, #0] SystemCoreClock = (HSI_VALUE / (1UL << ((READ_BIT(RCC->CR, RCC_CR_HSIDIV)) >> RCC_CR_HSIDIV_Pos))); - 800342e: 6823 ldr r3, [r4, #0] - 8003430: 4a5d ldr r2, [pc, #372] @ (80035a8 ) - 8003432: 049b lsls r3, r3, #18 - 8003434: 0f5b lsrs r3, r3, #29 - 8003436: 40da lsrs r2, r3 + 8003462: 6823 ldr r3, [r4, #0] + 8003464: 4a5d ldr r2, [pc, #372] @ (80035dc ) + 8003466: 049b lsls r3, r3, #18 + 8003468: 0f5b lsrs r3, r3, #29 + 800346a: 40da lsrs r2, r3 if (HAL_InitTick(uwTickPrio) != HAL_OK) - 8003438: 4b5c ldr r3, [pc, #368] @ (80035ac ) + 800346c: 4b5c ldr r3, [pc, #368] @ (80035e0 ) SystemCoreClock = (HSI_VALUE / (1UL << ((READ_BIT(RCC->CR, RCC_CR_HSIDIV)) >> RCC_CR_HSIDIV_Pos))); - 800343a: 600a str r2, [r1, #0] + 800346e: 600a str r2, [r1, #0] if (HAL_InitTick(uwTickPrio) != HAL_OK) - 800343c: 6818 ldr r0, [r3, #0] - 800343e: f7ff fa0f bl 8002860 - 8003442: 2800 cmp r0, #0 - 8003444: d08d beq.n 8003362 - 8003446: e784 b.n 8003352 + 8003470: 6818 ldr r0, [r3, #0] + 8003472: f7ff fa0d bl 8002890 + 8003476: 2800 cmp r0, #0 + 8003478: d08d beq.n 8003396 + 800347a: e784 b.n 8003386 if (RCC_OscInitStruct->HSIState != RCC_HSI_OFF) - 8003448: 2b00 cmp r3, #0 - 800344a: d020 beq.n 800348e + 800347c: 2b00 cmp r3, #0 + 800347e: d020 beq.n 80034c2 __HAL_RCC_HSI_CONFIG(RCC_OscInitStruct->HSIDiv); - 800344c: 6823 ldr r3, [r4, #0] - 800344e: 4a54 ldr r2, [pc, #336] @ (80035a0 ) + 8003480: 6823 ldr r3, [r4, #0] + 8003482: 4a54 ldr r2, [pc, #336] @ (80035d4 ) while (READ_BIT(RCC->CR, RCC_CR_HSIRDY) == 0U) - 8003450: 2780 movs r7, #128 @ 0x80 + 8003484: 2780 movs r7, #128 @ 0x80 __HAL_RCC_HSI_CONFIG(RCC_OscInitStruct->HSIDiv); - 8003452: 4013 ands r3, r2 - 8003454: 692a ldr r2, [r5, #16] + 8003486: 4013 ands r3, r2 + 8003488: 692a ldr r2, [r5, #16] while (READ_BIT(RCC->CR, RCC_CR_HSIRDY) == 0U) - 8003456: 00ff lsls r7, r7, #3 + 800348a: 00ff lsls r7, r7, #3 __HAL_RCC_HSI_CONFIG(RCC_OscInitStruct->HSIDiv); - 8003458: 4313 orrs r3, r2 - 800345a: 6023 str r3, [r4, #0] + 800348c: 4313 orrs r3, r2 + 800348e: 6023 str r3, [r4, #0] __HAL_RCC_HSI_ENABLE(); - 800345c: 2380 movs r3, #128 @ 0x80 - 800345e: 6822 ldr r2, [r4, #0] - 8003460: 005b lsls r3, r3, #1 - 8003462: 4313 orrs r3, r2 - 8003464: 6023 str r3, [r4, #0] + 8003490: 2380 movs r3, #128 @ 0x80 + 8003492: 6822 ldr r2, [r4, #0] + 8003494: 005b lsls r3, r3, #1 + 8003496: 4313 orrs r3, r2 + 8003498: 6023 str r3, [r4, #0] tickstart = HAL_GetTick(); - 8003466: f7ff fa3b bl 80028e0 - 800346a: 0006 movs r6, r0 + 800349a: f7ff fa39 bl 8002910 + 800349e: 0006 movs r6, r0 while (READ_BIT(RCC->CR, RCC_CR_HSIRDY) == 0U) - 800346c: 6823 ldr r3, [r4, #0] - 800346e: 423b tst r3, r7 - 8003470: d007 beq.n 8003482 - __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); - 8003472: 6862 ldr r2, [r4, #4] - 8003474: 696b ldr r3, [r5, #20] - 8003476: 4949 ldr r1, [pc, #292] @ (800359c ) - 8003478: 021b lsls r3, r3, #8 - 800347a: 400a ands r2, r1 - 800347c: 4313 orrs r3, r2 - 800347e: 6063 str r3, [r4, #4] - 8003480: e76f b.n 8003362 - if ((HAL_GetTick() - tickstart) > RCC_HSI_TIMEOUT_VALUE) - 8003482: f7ff fa2d bl 80028e0 - 8003486: 1b80 subs r0, r0, r6 - 8003488: 2802 cmp r0, #2 - 800348a: d9ef bls.n 800346c - 800348c: e792 b.n 80033b4 - __HAL_RCC_HSI_DISABLE(); - 800348e: 6823 ldr r3, [r4, #0] - 8003490: 4a47 ldr r2, [pc, #284] @ (80035b0 ) - while (READ_BIT(RCC->CR, RCC_CR_HSIRDY) != 0U) - 8003492: 2780 movs r7, #128 @ 0x80 - __HAL_RCC_HSI_DISABLE(); - 8003494: 4013 ands r3, r2 - 8003496: 6023 str r3, [r4, #0] - tickstart = HAL_GetTick(); - 8003498: f7ff fa22 bl 80028e0 - 800349c: 0006 movs r6, r0 - while (READ_BIT(RCC->CR, RCC_CR_HSIRDY) != 0U) - 800349e: 00ff lsls r7, r7, #3 80034a0: 6823 ldr r3, [r4, #0] 80034a2: 423b tst r3, r7 - 80034a4: d100 bne.n 80034a8 - 80034a6: e75c b.n 8003362 + 80034a4: d007 beq.n 80034b6 + __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); + 80034a6: 6862 ldr r2, [r4, #4] + 80034a8: 696b ldr r3, [r5, #20] + 80034aa: 4949 ldr r1, [pc, #292] @ (80035d0 ) + 80034ac: 021b lsls r3, r3, #8 + 80034ae: 400a ands r2, r1 + 80034b0: 4313 orrs r3, r2 + 80034b2: 6063 str r3, [r4, #4] + 80034b4: e76f b.n 8003396 if ((HAL_GetTick() - tickstart) > RCC_HSI_TIMEOUT_VALUE) - 80034a8: f7ff fa1a bl 80028e0 - 80034ac: 1b80 subs r0, r0, r6 - 80034ae: 2802 cmp r0, #2 - 80034b0: d9f6 bls.n 80034a0 - 80034b2: e77f b.n 80033b4 + 80034b6: f7ff fa2b bl 8002910 + 80034ba: 1b80 subs r0, r0, r6 + 80034bc: 2802 cmp r0, #2 + 80034be: d9ef bls.n 80034a0 + 80034c0: e792 b.n 80033e8 + __HAL_RCC_HSI_DISABLE(); + 80034c2: 6823 ldr r3, [r4, #0] + 80034c4: 4a47 ldr r2, [pc, #284] @ (80035e4 ) + while (READ_BIT(RCC->CR, RCC_CR_HSIRDY) != 0U) + 80034c6: 2780 movs r7, #128 @ 0x80 + __HAL_RCC_HSI_DISABLE(); + 80034c8: 4013 ands r3, r2 + 80034ca: 6023 str r3, [r4, #0] + tickstart = HAL_GetTick(); + 80034cc: f7ff fa20 bl 8002910 + 80034d0: 0006 movs r6, r0 + while (READ_BIT(RCC->CR, RCC_CR_HSIRDY) != 0U) + 80034d2: 00ff lsls r7, r7, #3 + 80034d4: 6823 ldr r3, [r4, #0] + 80034d6: 423b tst r3, r7 + 80034d8: d100 bne.n 80034dc + 80034da: e75c b.n 8003396 + if ((HAL_GetTick() - tickstart) > RCC_HSI_TIMEOUT_VALUE) + 80034dc: f7ff fa18 bl 8002910 + 80034e0: 1b80 subs r0, r0, r6 + 80034e2: 2802 cmp r0, #2 + 80034e4: d9f6 bls.n 80034d4 + 80034e6: e77f b.n 80033e8 if (__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_LSI) - 80034b4: 2138 movs r1, #56 @ 0x38 - 80034b6: 4c36 ldr r4, [pc, #216] @ (8003590 ) + 80034e8: 2138 movs r1, #56 @ 0x38 + 80034ea: 4c36 ldr r4, [pc, #216] @ (80035c4 ) if (RCC_OscInitStruct->LSIState == RCC_LSI_OFF) - 80034b8: 69aa ldr r2, [r5, #24] + 80034ec: 69aa ldr r2, [r5, #24] if (__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_LSI) - 80034ba: 68a3 ldr r3, [r4, #8] - 80034bc: 400b ands r3, r1 - 80034be: 2b18 cmp r3, #24 - 80034c0: d103 bne.n 80034ca + 80034ee: 68a3 ldr r3, [r4, #8] + 80034f0: 400b ands r3, r1 + 80034f2: 2b18 cmp r3, #24 + 80034f4: d103 bne.n 80034fe if (RCC_OscInitStruct->LSIState == RCC_LSI_OFF) - 80034c2: 2a00 cmp r2, #0 - 80034c4: d000 beq.n 80034c8 - 80034c6: e750 b.n 800336a - 80034c8: e743 b.n 8003352 + 80034f6: 2a00 cmp r2, #0 + 80034f8: d000 beq.n 80034fc + 80034fa: e750 b.n 800339e + 80034fc: e743 b.n 8003386 if (RCC_OscInitStruct->LSIState != RCC_LSI_OFF) - 80034ca: 2301 movs r3, #1 - 80034cc: 2a00 cmp r2, #0 - 80034ce: d010 beq.n 80034f2 + 80034fe: 2301 movs r3, #1 + 8003500: 2a00 cmp r2, #0 + 8003502: d010 beq.n 8003526 __HAL_RCC_LSI_ENABLE(); - 80034d0: 6e22 ldr r2, [r4, #96] @ 0x60 + 8003504: 6e22 ldr r2, [r4, #96] @ 0x60 while (READ_BIT(RCC->CSR2, RCC_CSR2_LSIRDY) == 0U) - 80034d2: 2702 movs r7, #2 + 8003506: 2702 movs r7, #2 __HAL_RCC_LSI_ENABLE(); - 80034d4: 4313 orrs r3, r2 - 80034d6: 6623 str r3, [r4, #96] @ 0x60 + 8003508: 4313 orrs r3, r2 + 800350a: 6623 str r3, [r4, #96] @ 0x60 tickstart = HAL_GetTick(); - 80034d8: f7ff fa02 bl 80028e0 - 80034dc: 0006 movs r6, r0 + 800350c: f7ff fa00 bl 8002910 + 8003510: 0006 movs r6, r0 while (READ_BIT(RCC->CSR2, RCC_CSR2_LSIRDY) == 0U) - 80034de: 6e23 ldr r3, [r4, #96] @ 0x60 - 80034e0: 423b tst r3, r7 - 80034e2: d000 beq.n 80034e6 - 80034e4: e741 b.n 800336a + 8003512: 6e23 ldr r3, [r4, #96] @ 0x60 + 8003514: 423b tst r3, r7 + 8003516: d000 beq.n 800351a + 8003518: e741 b.n 800339e if ((HAL_GetTick() - tickstart) > RCC_LSI_TIMEOUT_VALUE) - 80034e6: f7ff f9fb bl 80028e0 - 80034ea: 1b80 subs r0, r0, r6 - 80034ec: 2802 cmp r0, #2 - 80034ee: d9f6 bls.n 80034de - 80034f0: e760 b.n 80033b4 + 800351a: f7ff f9f9 bl 8002910 + 800351e: 1b80 subs r0, r0, r6 + 8003520: 2802 cmp r0, #2 + 8003522: d9f6 bls.n 8003512 + 8003524: e760 b.n 80033e8 __HAL_RCC_LSI_DISABLE(); - 80034f2: 6e22 ldr r2, [r4, #96] @ 0x60 + 8003526: 6e22 ldr r2, [r4, #96] @ 0x60 while (READ_BIT(RCC->CSR2, RCC_CSR2_LSIRDY) != 0U) - 80034f4: 2702 movs r7, #2 + 8003528: 2702 movs r7, #2 __HAL_RCC_LSI_DISABLE(); - 80034f6: 439a bics r2, r3 - 80034f8: 6622 str r2, [r4, #96] @ 0x60 + 800352a: 439a bics r2, r3 + 800352c: 6622 str r2, [r4, #96] @ 0x60 tickstart = HAL_GetTick(); - 80034fa: f7ff f9f1 bl 80028e0 - 80034fe: 0006 movs r6, r0 + 800352e: f7ff f9ef bl 8002910 + 8003532: 0006 movs r6, r0 while (READ_BIT(RCC->CSR2, RCC_CSR2_LSIRDY) != 0U) - 8003500: 6e23 ldr r3, [r4, #96] @ 0x60 - 8003502: 423b tst r3, r7 - 8003504: d100 bne.n 8003508 - 8003506: e730 b.n 800336a + 8003534: 6e23 ldr r3, [r4, #96] @ 0x60 + 8003536: 423b tst r3, r7 + 8003538: d100 bne.n 800353c + 800353a: e730 b.n 800339e if ((HAL_GetTick() - tickstart) > RCC_LSI_TIMEOUT_VALUE) - 8003508: f7ff f9ea bl 80028e0 - 800350c: 1b80 subs r0, r0, r6 - 800350e: 2802 cmp r0, #2 - 8003510: d9f6 bls.n 8003500 - 8003512: e74f b.n 80033b4 + 800353c: f7ff f9e8 bl 8002910 + 8003540: 1b80 subs r0, r0, r6 + 8003542: 2802 cmp r0, #2 + 8003544: d9f6 bls.n 8003534 + 8003546: e74f b.n 80033e8 if (__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_LSE) - 8003514: 2138 movs r1, #56 @ 0x38 - 8003516: 4c1e ldr r4, [pc, #120] @ (8003590 ) + 8003548: 2138 movs r1, #56 @ 0x38 + 800354a: 4c1e ldr r4, [pc, #120] @ (80035c4 ) if (RCC_OscInitStruct->LSEState == RCC_LSE_OFF) - 8003518: 68a8 ldr r0, [r5, #8] + 800354c: 68a8 ldr r0, [r5, #8] if (__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_LSE) - 800351a: 68a3 ldr r3, [r4, #8] - 800351c: 400b ands r3, r1 - 800351e: 2b20 cmp r3, #32 - 8003520: d103 bne.n 800352a + 800354e: 68a3 ldr r3, [r4, #8] + 8003550: 400b ands r3, r1 + 8003552: 2b20 cmp r3, #32 + 8003554: d103 bne.n 800355e if (RCC_OscInitStruct->LSEState == RCC_LSE_OFF) - 8003522: 4243 negs r3, r0 - 8003524: 4158 adcs r0, r3 - 8003526: b2c0 uxtb r0, r0 - 8003528: e714 b.n 8003354 + 8003556: 4243 negs r3, r0 + 8003558: 4158 adcs r0, r3 + 800355a: b2c0 uxtb r0, r0 + 800355c: e714 b.n 8003388 __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); - 800352a: 6de3 ldr r3, [r4, #92] @ 0x5c - 800352c: 2801 cmp r0, #1 - 800352e: d110 bne.n 8003552 - 8003530: 4303 orrs r3, r0 - 8003532: 65e3 str r3, [r4, #92] @ 0x5c - tickstart = HAL_GetTick(); - 8003534: f7ff f9d4 bl 80028e0 - while (READ_BIT(RCC->CSR1, RCC_CSR1_LSERDY) == 0U) - 8003538: 2602 movs r6, #2 - tickstart = HAL_GetTick(); - 800353a: 0005 movs r5, r0 - while (READ_BIT(RCC->CSR1, RCC_CSR1_LSERDY) == 0U) - 800353c: 6de3 ldr r3, [r4, #92] @ 0x5c - 800353e: 4233 tst r3, r6 - 8003540: d000 beq.n 8003544 - 8003542: e717 b.n 8003374 - if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) - 8003544: f7ff f9cc bl 80028e0 - 8003548: 4b1a ldr r3, [pc, #104] @ (80035b4 ) - 800354a: 1b40 subs r0, r0, r5 - 800354c: 4298 cmp r0, r3 - 800354e: d9f5 bls.n 800353c - 8003550: e730 b.n 80033b4 - __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); - 8003552: 2805 cmp r0, #5 - 8003554: d105 bne.n 8003562 - 8003556: 4313 orrs r3, r2 - 8003558: 65e3 str r3, [r4, #92] @ 0x5c - 800355a: 2301 movs r3, #1 - 800355c: 6de2 ldr r2, [r4, #92] @ 0x5c - 800355e: 4313 orrs r3, r2 - 8003560: e7e7 b.n 8003532 - 8003562: 2101 movs r1, #1 - 8003564: 438b bics r3, r1 + 800355e: 6de3 ldr r3, [r4, #92] @ 0x5c + 8003560: 2801 cmp r0, #1 + 8003562: d110 bne.n 8003586 + 8003564: 4303 orrs r3, r0 8003566: 65e3 str r3, [r4, #92] @ 0x5c - 8003568: 6de3 ldr r3, [r4, #92] @ 0x5c - 800356a: 4393 bics r3, r2 - 800356c: 65e3 str r3, [r4, #92] @ 0x5c - if (RCC_OscInitStruct->LSEState != RCC_LSE_OFF) - 800356e: 2800 cmp r0, #0 - 8003570: d1e0 bne.n 8003534 tickstart = HAL_GetTick(); - 8003572: f7ff f9b5 bl 80028e0 - while (READ_BIT(RCC->CSR1, RCC_CSR1_LSERDY) != 0U) - 8003576: 2602 movs r6, #2 + 8003568: f7ff f9d2 bl 8002910 + while (READ_BIT(RCC->CSR1, RCC_CSR1_LSERDY) == 0U) + 800356c: 2602 movs r6, #2 tickstart = HAL_GetTick(); - 8003578: 0005 movs r5, r0 - while (READ_BIT(RCC->CSR1, RCC_CSR1_LSERDY) != 0U) - 800357a: 6de3 ldr r3, [r4, #92] @ 0x5c - 800357c: 4233 tst r3, r6 - 800357e: d100 bne.n 8003582 - 8003580: e6f8 b.n 8003374 + 800356e: 0005 movs r5, r0 + while (READ_BIT(RCC->CSR1, RCC_CSR1_LSERDY) == 0U) + 8003570: 6de3 ldr r3, [r4, #92] @ 0x5c + 8003572: 4233 tst r3, r6 + 8003574: d000 beq.n 8003578 + 8003576: e717 b.n 80033a8 if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) - 8003582: f7ff f9ad bl 80028e0 - 8003586: 4b0b ldr r3, [pc, #44] @ (80035b4 ) - 8003588: 1b40 subs r0, r0, r5 - 800358a: 4298 cmp r0, r3 - 800358c: d9f5 bls.n 800357a - 800358e: e711 b.n 80033b4 - 8003590: 40021000 .word 0x40021000 - 8003594: fffeffff .word 0xfffeffff - 8003598: fffbffff .word 0xfffbffff - 800359c: ffff80ff .word 0xffff80ff - 80035a0: ffffc7ff .word 0xffffc7ff - 80035a4: 20000024 .word 0x20000024 - 80035a8: 02dc6c00 .word 0x02dc6c00 - 80035ac: 2000002c .word 0x2000002c - 80035b0: fffffeff .word 0xfffffeff - 80035b4: 00001388 .word 0x00001388 + 8003578: f7ff f9ca bl 8002910 + 800357c: 4b1a ldr r3, [pc, #104] @ (80035e8 ) + 800357e: 1b40 subs r0, r0, r5 + 8003580: 4298 cmp r0, r3 + 8003582: d9f5 bls.n 8003570 + 8003584: e730 b.n 80033e8 + __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); + 8003586: 2805 cmp r0, #5 + 8003588: d105 bne.n 8003596 + 800358a: 4313 orrs r3, r2 + 800358c: 65e3 str r3, [r4, #92] @ 0x5c + 800358e: 2301 movs r3, #1 + 8003590: 6de2 ldr r2, [r4, #92] @ 0x5c + 8003592: 4313 orrs r3, r2 + 8003594: e7e7 b.n 8003566 + 8003596: 2101 movs r1, #1 + 8003598: 438b bics r3, r1 + 800359a: 65e3 str r3, [r4, #92] @ 0x5c + 800359c: 6de3 ldr r3, [r4, #92] @ 0x5c + 800359e: 4393 bics r3, r2 + 80035a0: 65e3 str r3, [r4, #92] @ 0x5c + if (RCC_OscInitStruct->LSEState != RCC_LSE_OFF) + 80035a2: 2800 cmp r0, #0 + 80035a4: d1e0 bne.n 8003568 + tickstart = HAL_GetTick(); + 80035a6: f7ff f9b3 bl 8002910 + while (READ_BIT(RCC->CSR1, RCC_CSR1_LSERDY) != 0U) + 80035aa: 2602 movs r6, #2 + tickstart = HAL_GetTick(); + 80035ac: 0005 movs r5, r0 + while (READ_BIT(RCC->CSR1, RCC_CSR1_LSERDY) != 0U) + 80035ae: 6de3 ldr r3, [r4, #92] @ 0x5c + 80035b0: 4233 tst r3, r6 + 80035b2: d100 bne.n 80035b6 + 80035b4: e6f8 b.n 80033a8 + if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) + 80035b6: f7ff f9ab bl 8002910 + 80035ba: 4b0b ldr r3, [pc, #44] @ (80035e8 ) + 80035bc: 1b40 subs r0, r0, r5 + 80035be: 4298 cmp r0, r3 + 80035c0: d9f5 bls.n 80035ae + 80035c2: e711 b.n 80033e8 + 80035c4: 40021000 .word 0x40021000 + 80035c8: fffeffff .word 0xfffeffff + 80035cc: fffbffff .word 0xfffbffff + 80035d0: ffff80ff .word 0xffff80ff + 80035d4: ffffc7ff .word 0xffffc7ff + 80035d8: 20000028 .word 0x20000028 + 80035dc: 02dc6c00 .word 0x02dc6c00 + 80035e0: 20000030 .word 0x20000030 + 80035e4: fffffeff .word 0xfffffeff + 80035e8: 00001388 .word 0x00001388 -080035b8 : +080035ec : uint32_t HAL_RCC_GetSysClockFreq(void) { uint32_t hsidiv; uint32_t sysclockfreq; #if defined(RCC_CR_SYSDIV) uint32_t sysclockdiv = (uint32_t)(((RCC->CR & RCC_CR_SYSDIV) >> RCC_CR_SYSDIV_Pos) + 1U); - 80035b8: 2007 movs r0, #7 + 80035ec: 2007 movs r0, #7 #endif /* RCC_CR_SYSDIV */ if (__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSI) - 80035ba: 2238 movs r2, #56 @ 0x38 + 80035ee: 2238 movs r2, #56 @ 0x38 uint32_t sysclockdiv = (uint32_t)(((RCC->CR & RCC_CR_SYSDIV) >> RCC_CR_SYSDIV_Pos) + 1U); - 80035bc: 4b12 ldr r3, [pc, #72] @ (8003608 ) + 80035f0: 4b12 ldr r3, [pc, #72] @ (800363c ) { - 80035be: b510 push {r4, lr} + 80035f2: b510 push {r4, lr} uint32_t sysclockdiv = (uint32_t)(((RCC->CR & RCC_CR_SYSDIV) >> RCC_CR_SYSDIV_Pos) + 1U); - 80035c0: 6819 ldr r1, [r3, #0] + 80035f4: 6819 ldr r1, [r3, #0] if (__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSI) - 80035c2: 689c ldr r4, [r3, #8] + 80035f6: 689c ldr r4, [r3, #8] uint32_t sysclockdiv = (uint32_t)(((RCC->CR & RCC_CR_SYSDIV) >> RCC_CR_SYSDIV_Pos) + 1U); - 80035c4: 0889 lsrs r1, r1, #2 - 80035c6: 4001 ands r1, r0 - 80035c8: 3101 adds r1, #1 + 80035f8: 0889 lsrs r1, r1, #2 + 80035fa: 4001 ands r1, r0 + 80035fc: 3101 adds r1, #1 if (__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSI) - 80035ca: 4214 tst r4, r2 - 80035cc: d107 bne.n 80035de + 80035fe: 4214 tst r4, r2 + 8003600: d107 bne.n 8003612 { /* HSISYS can be derived for HSI48 */ hsidiv = (1UL << ((READ_BIT(RCC->CR, RCC_CR_HSIDIV)) >> RCC_CR_HSIDIV_Pos)); - 80035ce: 681b ldr r3, [r3, #0] - 80035d0: 0adb lsrs r3, r3, #11 - 80035d2: 4003 ands r3, r0 + 8003602: 681b ldr r3, [r3, #0] + 8003604: 0adb lsrs r3, r3, #11 + 8003606: 4003 ands r3, r0 /* HSI used as system clock source */ sysclockfreq = (HSI_VALUE / hsidiv); - 80035d4: 480d ldr r0, [pc, #52] @ (800360c ) - 80035d6: 40d8 lsrs r0, r3 + 8003608: 480d ldr r0, [pc, #52] @ (8003640 ) + 800360a: 40d8 lsrs r0, r3 else { sysclockfreq = 0U; } #if defined(RCC_CR_SYSDIV) sysclockfreq = sysclockfreq / sysclockdiv; - 80035d8: f7fc fdaa bl 8000130 <__udivsi3> + 800360c: f7fc fd90 bl 8000130 <__udivsi3> #endif /* RCC_CR_SYSDIV */ return sysclockfreq; } - 80035dc: bd10 pop {r4, pc} + 8003610: bd10 pop {r4, pc} else if (__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSE) - 80035de: 6898 ldr r0, [r3, #8] - 80035e0: 4010 ands r0, r2 - 80035e2: 2808 cmp r0, #8 - 80035e4: d00b beq.n 80035fe + 8003612: 6898 ldr r0, [r3, #8] + 8003614: 4010 ands r0, r2 + 8003616: 2808 cmp r0, #8 + 8003618: d00b beq.n 8003632 else if (__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_LSE) - 80035e6: 6898 ldr r0, [r3, #8] - 80035e8: 4010 ands r0, r2 - 80035ea: 2820 cmp r0, #32 - 80035ec: d009 beq.n 8003602 + 800361a: 6898 ldr r0, [r3, #8] + 800361c: 4010 ands r0, r2 + 800361e: 2820 cmp r0, #32 + 8003620: d009 beq.n 8003636 else if (__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_LSI) - 80035ee: 689b ldr r3, [r3, #8] + 8003622: 689b ldr r3, [r3, #8] sysclockfreq = 0U; - 80035f0: 2000 movs r0, #0 + 8003624: 2000 movs r0, #0 else if (__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_LSI) - 80035f2: 4013 ands r3, r2 - 80035f4: 2b18 cmp r3, #24 - 80035f6: d1ef bne.n 80035d8 + 8003626: 4013 ands r3, r2 + 8003628: 2b18 cmp r3, #24 + 800362a: d1ef bne.n 800360c sysclockfreq = LSI_VALUE; - 80035f8: 20fa movs r0, #250 @ 0xfa - 80035fa: 01c0 lsls r0, r0, #7 - 80035fc: e7ec b.n 80035d8 + 800362c: 20fa movs r0, #250 @ 0xfa + 800362e: 01c0 lsls r0, r0, #7 + 8003630: e7ec b.n 800360c sysclockfreq = HSE_VALUE; - 80035fe: 4804 ldr r0, [pc, #16] @ (8003610 ) - 8003600: e7ea b.n 80035d8 + 8003632: 4804 ldr r0, [pc, #16] @ (8003644 ) + 8003634: e7ea b.n 800360c sysclockfreq = LSE_VALUE; - 8003602: 2080 movs r0, #128 @ 0x80 - 8003604: 0200 lsls r0, r0, #8 - 8003606: e7e7 b.n 80035d8 - 8003608: 40021000 .word 0x40021000 - 800360c: 02dc6c00 .word 0x02dc6c00 - 8003610: 007a1200 .word 0x007a1200 + 8003636: 2080 movs r0, #128 @ 0x80 + 8003638: 0200 lsls r0, r0, #8 + 800363a: e7e7 b.n 800360c + 800363c: 40021000 .word 0x40021000 + 8003640: 02dc6c00 .word 0x02dc6c00 + 8003644: 007a1200 .word 0x007a1200 -08003614 : +08003648 : { - 8003614: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr} - 8003616: 0004 movs r4, r0 - 8003618: 000d movs r5, r1 + 8003648: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr} + 800364a: 0004 movs r4, r0 + 800364c: 000d movs r5, r1 if (RCC_ClkInitStruct == NULL) - 800361a: 2800 cmp r0, #0 - 800361c: d101 bne.n 8003622 + 800364e: 2800 cmp r0, #0 + 8003650: d101 bne.n 8003656 return HAL_ERROR; - 800361e: 2001 movs r0, #1 + 8003652: 2001 movs r0, #1 } - 8003620: bdfe pop {r1, r2, r3, r4, r5, r6, r7, pc} + 8003654: bdfe pop {r1, r2, r3, r4, r5, r6, r7, pc} if (FLatency > __HAL_FLASH_GET_LATENCY()) - 8003622: 2707 movs r7, #7 - 8003624: 4e4b ldr r6, [pc, #300] @ (8003754 ) - 8003626: 6833 ldr r3, [r6, #0] - 8003628: 403b ands r3, r7 - 800362a: 428b cmp r3, r1 - 800362c: d32a bcc.n 8003684 + 8003656: 2707 movs r7, #7 + 8003658: 4e4b ldr r6, [pc, #300] @ (8003788 ) + 800365a: 6833 ldr r3, [r6, #0] + 800365c: 403b ands r3, r7 + 800365e: 428b cmp r3, r1 + 8003660: d32a bcc.n 80036b8 if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) - 800362e: 6822 ldr r2, [r4, #0] - 8003630: 0793 lsls r3, r2, #30 - 8003632: d43b bmi.n 80036ac + 8003662: 6822 ldr r2, [r4, #0] + 8003664: 0793 lsls r3, r2, #30 + 8003666: d43b bmi.n 80036e0 if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) - 8003634: 07d2 lsls r2, r2, #31 - 8003636: d44a bmi.n 80036ce + 8003668: 07d2 lsls r2, r2, #31 + 800366a: d44a bmi.n 8003702 if (FLatency < __HAL_FLASH_GET_LATENCY()) - 8003638: 2707 movs r7, #7 - 800363a: 6833 ldr r3, [r6, #0] - 800363c: 403b ands r3, r7 - 800363e: 42ab cmp r3, r5 - 8003640: d90a bls.n 8003658 + 800366c: 2707 movs r7, #7 + 800366e: 6833 ldr r3, [r6, #0] + 8003670: 403b ands r3, r7 + 8003672: 42ab cmp r3, r5 + 8003674: d90a bls.n 800368c __HAL_FLASH_SET_LATENCY(FLatency); - 8003642: 6833 ldr r3, [r6, #0] - 8003644: 43bb bics r3, r7 - 8003646: 432b orrs r3, r5 - 8003648: 6033 str r3, [r6, #0] + 8003676: 6833 ldr r3, [r6, #0] + 8003678: 43bb bics r3, r7 + 800367a: 432b orrs r3, r5 + 800367c: 6033 str r3, [r6, #0] tickstart = HAL_GetTick(); - 800364a: f7ff f949 bl 80028e0 - 800364e: 9001 str r0, [sp, #4] + 800367e: f7ff f947 bl 8002910 + 8003682: 9001 str r0, [sp, #4] while ((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency) - 8003650: 6833 ldr r3, [r6, #0] - 8003652: 403b ands r3, r7 - 8003654: 42ab cmp r3, r5 - 8003656: d16d bne.n 8003734 - if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) - 8003658: 6823 ldr r3, [r4, #0] - 800365a: 4d3f ldr r5, [pc, #252] @ (8003758 ) - 800365c: 075b lsls r3, r3, #29 - 800365e: d471 bmi.n 8003744 - SystemCoreClock = (HAL_RCC_GetSysClockFreq() >> ((AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE) \ - 8003660: f7ff ffaa bl 80035b8 - 8003664: 68ab ldr r3, [r5, #8] - 8003666: 493d ldr r1, [pc, #244] @ (800375c ) - >> RCC_CFGR_HPRE_Pos]) & 0x1FU)); - 8003668: 051b lsls r3, r3, #20 - 800366a: 0f1b lsrs r3, r3, #28 - SystemCoreClock = (HAL_RCC_GetSysClockFreq() >> ((AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE) \ - 800366c: 009b lsls r3, r3, #2 - >> RCC_CFGR_HPRE_Pos]) & 0x1FU)); - 800366e: 585b ldr r3, [r3, r1] - 8003670: 211f movs r1, #31 - 8003672: 400b ands r3, r1 - SystemCoreClock = (HAL_RCC_GetSysClockFreq() >> ((AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE) \ - 8003674: 40d8 lsrs r0, r3 - 8003676: 4a3a ldr r2, [pc, #232] @ (8003760 ) - return HAL_InitTick(uwTickPrio); - 8003678: 4b3a ldr r3, [pc, #232] @ (8003764 ) - SystemCoreClock = (HAL_RCC_GetSysClockFreq() >> ((AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE) \ - 800367a: 6010 str r0, [r2, #0] - return HAL_InitTick(uwTickPrio); - 800367c: 6818 ldr r0, [r3, #0] - 800367e: f7ff f8ef bl 8002860 - 8003682: e7cd b.n 8003620 - __HAL_FLASH_SET_LATENCY(FLatency); 8003684: 6833 ldr r3, [r6, #0] - 8003686: 43bb bics r3, r7 - 8003688: 430b orrs r3, r1 - 800368a: 6033 str r3, [r6, #0] + 8003686: 403b ands r3, r7 + 8003688: 42ab cmp r3, r5 + 800368a: d16d bne.n 8003768 + if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) + 800368c: 6823 ldr r3, [r4, #0] + 800368e: 4d3f ldr r5, [pc, #252] @ (800378c ) + 8003690: 075b lsls r3, r3, #29 + 8003692: d471 bmi.n 8003778 + SystemCoreClock = (HAL_RCC_GetSysClockFreq() >> ((AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE) \ + 8003694: f7ff ffaa bl 80035ec + 8003698: 68ab ldr r3, [r5, #8] + 800369a: 493d ldr r1, [pc, #244] @ (8003790 ) + >> RCC_CFGR_HPRE_Pos]) & 0x1FU)); + 800369c: 051b lsls r3, r3, #20 + 800369e: 0f1b lsrs r3, r3, #28 + SystemCoreClock = (HAL_RCC_GetSysClockFreq() >> ((AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE) \ + 80036a0: 009b lsls r3, r3, #2 + >> RCC_CFGR_HPRE_Pos]) & 0x1FU)); + 80036a2: 585b ldr r3, [r3, r1] + 80036a4: 211f movs r1, #31 + 80036a6: 400b ands r3, r1 + SystemCoreClock = (HAL_RCC_GetSysClockFreq() >> ((AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE) \ + 80036a8: 40d8 lsrs r0, r3 + 80036aa: 4a3a ldr r2, [pc, #232] @ (8003794 ) + return HAL_InitTick(uwTickPrio); + 80036ac: 4b3a ldr r3, [pc, #232] @ (8003798 ) + SystemCoreClock = (HAL_RCC_GetSysClockFreq() >> ((AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE) \ + 80036ae: 6010 str r0, [r2, #0] + return HAL_InitTick(uwTickPrio); + 80036b0: 6818 ldr r0, [r3, #0] + 80036b2: f7ff f8ed bl 8002890 + 80036b6: e7cd b.n 8003654 + __HAL_FLASH_SET_LATENCY(FLatency); + 80036b8: 6833 ldr r3, [r6, #0] + 80036ba: 43bb bics r3, r7 + 80036bc: 430b orrs r3, r1 + 80036be: 6033 str r3, [r6, #0] tickstart = HAL_GetTick(); - 800368c: f7ff f928 bl 80028e0 - 8003690: 9001 str r0, [sp, #4] + 80036c0: f7ff f926 bl 8002910 + 80036c4: 9001 str r0, [sp, #4] while ((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency) - 8003692: 6833 ldr r3, [r6, #0] - 8003694: 403b ands r3, r7 - 8003696: 42ab cmp r3, r5 - 8003698: d0c9 beq.n 800362e + 80036c6: 6833 ldr r3, [r6, #0] + 80036c8: 403b ands r3, r7 + 80036ca: 42ab cmp r3, r5 + 80036cc: d0c9 beq.n 8003662 if ((HAL_GetTick() - tickstart) > RCC_CLOCKSWITCH_TIMEOUT_VALUE) - 800369a: f7ff f921 bl 80028e0 - 800369e: 9b01 ldr r3, [sp, #4] - 80036a0: 1ac0 subs r0, r0, r3 - 80036a2: 4b31 ldr r3, [pc, #196] @ (8003768 ) - 80036a4: 4298 cmp r0, r3 - 80036a6: d9f4 bls.n 8003692 + 80036ce: f7ff f91f bl 8002910 + 80036d2: 9b01 ldr r3, [sp, #4] + 80036d4: 1ac0 subs r0, r0, r3 + 80036d6: 4b31 ldr r3, [pc, #196] @ (800379c ) + 80036d8: 4298 cmp r0, r3 + 80036da: d9f4 bls.n 80036c6 return HAL_TIMEOUT; - 80036a8: 2003 movs r0, #3 - 80036aa: e7b9 b.n 8003620 + 80036dc: 2003 movs r0, #3 + 80036de: e7b9 b.n 8003654 if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) - 80036ac: 492a ldr r1, [pc, #168] @ (8003758 ) - 80036ae: 0753 lsls r3, r2, #29 - 80036b0: d506 bpl.n 80036c0 + 80036e0: 492a ldr r1, [pc, #168] @ (800378c ) + 80036e2: 0753 lsls r3, r2, #29 + 80036e4: d506 bpl.n 80036f4 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE, RCC_HCLK_DIV16); - 80036b2: 6888 ldr r0, [r1, #8] - 80036b4: 4b2d ldr r3, [pc, #180] @ (800376c ) - 80036b6: 4018 ands r0, r3 - 80036b8: 23b0 movs r3, #176 @ 0xb0 - 80036ba: 011b lsls r3, r3, #4 - 80036bc: 4303 orrs r3, r0 - 80036be: 608b str r3, [r1, #8] + 80036e6: 6888 ldr r0, [r1, #8] + 80036e8: 4b2d ldr r3, [pc, #180] @ (80037a0 ) + 80036ea: 4018 ands r0, r3 + 80036ec: 23b0 movs r3, #176 @ 0xb0 + 80036ee: 011b lsls r3, r3, #4 + 80036f0: 4303 orrs r3, r0 + 80036f2: 608b str r3, [r1, #8] MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); - 80036c0: 688b ldr r3, [r1, #8] - 80036c2: 482b ldr r0, [pc, #172] @ (8003770 ) - 80036c4: 4003 ands r3, r0 - 80036c6: 68e0 ldr r0, [r4, #12] - 80036c8: 4303 orrs r3, r0 - 80036ca: 608b str r3, [r1, #8] - 80036cc: e7b2 b.n 8003634 + 80036f4: 688b ldr r3, [r1, #8] + 80036f6: 482b ldr r0, [pc, #172] @ (80037a4 ) + 80036f8: 4003 ands r3, r0 + 80036fa: 68e0 ldr r0, [r4, #12] + 80036fc: 4303 orrs r3, r0 + 80036fe: 608b str r3, [r1, #8] + 8003700: e7b2 b.n 8003668 MODIFY_REG(RCC->CR, RCC_CR_SYSDIV, RCC_ClkInitStruct->SYSCLKDivider); - 80036ce: 221c movs r2, #28 - 80036d0: 4f21 ldr r7, [pc, #132] @ (8003758 ) - 80036d2: 683b ldr r3, [r7, #0] - 80036d4: 4393 bics r3, r2 - 80036d6: 68a2 ldr r2, [r4, #8] - 80036d8: 4313 orrs r3, r2 - 80036da: 603b str r3, [r7, #0] + 8003702: 221c movs r2, #28 + 8003704: 4f21 ldr r7, [pc, #132] @ (800378c ) + 8003706: 683b ldr r3, [r7, #0] + 8003708: 4393 bics r3, r2 + 800370a: 68a2 ldr r2, [r4, #8] + 800370c: 4313 orrs r3, r2 + 800370e: 603b str r3, [r7, #0] if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) - 80036dc: 6862 ldr r2, [r4, #4] - 80036de: 2a01 cmp r2, #1 - 80036e0: d119 bne.n 8003716 + 8003710: 6862 ldr r2, [r4, #4] + 8003712: 2a01 cmp r2, #1 + 8003714: d119 bne.n 800374a if (READ_BIT(RCC->CR, RCC_CR_HSERDY) == 0U) - 80036e2: 683b ldr r3, [r7, #0] - 80036e4: 039b lsls r3, r3, #14 - 80036e6: d59a bpl.n 800361e + 8003716: 683b ldr r3, [r7, #0] + 8003718: 039b lsls r3, r3, #14 + 800371a: d59a bpl.n 8003652 MODIFY_REG(RCC->CFGR, RCC_CFGR_SW, RCC_ClkInitStruct->SYSCLKSource); - 80036e8: 2107 movs r1, #7 - 80036ea: 68bb ldr r3, [r7, #8] - 80036ec: 438b bics r3, r1 - 80036ee: 4313 orrs r3, r2 - 80036f0: 60bb str r3, [r7, #8] + 800371c: 2107 movs r1, #7 + 800371e: 68bb ldr r3, [r7, #8] + 8003720: 438b bics r3, r1 + 8003722: 4313 orrs r3, r2 + 8003724: 60bb str r3, [r7, #8] tickstart = HAL_GetTick(); - 80036f2: f7ff f8f5 bl 80028e0 - 80036f6: 9001 str r0, [sp, #4] + 8003726: f7ff f8f3 bl 8002910 + 800372a: 9001 str r0, [sp, #4] while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) - 80036f8: 2338 movs r3, #56 @ 0x38 - 80036fa: 68ba ldr r2, [r7, #8] - 80036fc: 401a ands r2, r3 - 80036fe: 6863 ldr r3, [r4, #4] - 8003700: 00db lsls r3, r3, #3 - 8003702: 429a cmp r2, r3 - 8003704: d098 beq.n 8003638 + 800372c: 2338 movs r3, #56 @ 0x38 + 800372e: 68ba ldr r2, [r7, #8] + 8003730: 401a ands r2, r3 + 8003732: 6863 ldr r3, [r4, #4] + 8003734: 00db lsls r3, r3, #3 + 8003736: 429a cmp r2, r3 + 8003738: d098 beq.n 800366c if ((HAL_GetTick() - tickstart) > RCC_CLOCKSWITCH_TIMEOUT_VALUE) - 8003706: f7ff f8eb bl 80028e0 - 800370a: 9b01 ldr r3, [sp, #4] - 800370c: 1ac0 subs r0, r0, r3 - 800370e: 4b16 ldr r3, [pc, #88] @ (8003768 ) - 8003710: 4298 cmp r0, r3 - 8003712: d9f1 bls.n 80036f8 - 8003714: e7c8 b.n 80036a8 + 800373a: f7ff f8e9 bl 8002910 + 800373e: 9b01 ldr r3, [sp, #4] + 8003740: 1ac0 subs r0, r0, r3 + 8003742: 4b16 ldr r3, [pc, #88] @ (800379c ) + 8003744: 4298 cmp r0, r3 + 8003746: d9f1 bls.n 800372c + 8003748: e7c8 b.n 80036dc else if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSI) - 8003716: 2a00 cmp r2, #0 - 8003718: d103 bne.n 8003722 + 800374a: 2a00 cmp r2, #0 + 800374c: d103 bne.n 8003756 if (READ_BIT(RCC->CR, RCC_CR_HSIRDY) == 0U) - 800371a: 683b ldr r3, [r7, #0] - 800371c: 055b lsls r3, r3, #21 - 800371e: d4e3 bmi.n 80036e8 - 8003720: e77d b.n 800361e + 800374e: 683b ldr r3, [r7, #0] + 8003750: 055b lsls r3, r3, #21 + 8003752: d4e3 bmi.n 800371c + 8003754: e77d b.n 8003652 else if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_LSI) - 8003722: 2302 movs r3, #2 - 8003724: 2a03 cmp r2, #3 - 8003726: d103 bne.n 8003730 + 8003756: 2302 movs r3, #2 + 8003758: 2a03 cmp r2, #3 + 800375a: d103 bne.n 8003764 if (READ_BIT(RCC->CSR2, RCC_CSR2_LSIRDY) == 0U) - 8003728: 6e39 ldr r1, [r7, #96] @ 0x60 + 800375c: 6e39 ldr r1, [r7, #96] @ 0x60 if (READ_BIT(RCC->CSR1, RCC_CSR1_LSERDY) == 0U) - 800372a: 4219 tst r1, r3 - 800372c: d1dc bne.n 80036e8 - 800372e: e776 b.n 800361e - 8003730: 6df9 ldr r1, [r7, #92] @ 0x5c - 8003732: e7fa b.n 800372a + 800375e: 4219 tst r1, r3 + 8003760: d1dc bne.n 800371c + 8003762: e776 b.n 8003652 + 8003764: 6df9 ldr r1, [r7, #92] @ 0x5c + 8003766: e7fa b.n 800375e if ((HAL_GetTick() - tickstart) > RCC_CLOCKSWITCH_TIMEOUT_VALUE) - 8003734: f7ff f8d4 bl 80028e0 - 8003738: 9b01 ldr r3, [sp, #4] - 800373a: 1ac0 subs r0, r0, r3 - 800373c: 4b0a ldr r3, [pc, #40] @ (8003768 ) - 800373e: 4298 cmp r0, r3 - 8003740: d986 bls.n 8003650 - 8003742: e7b1 b.n 80036a8 + 8003768: f7ff f8d2 bl 8002910 + 800376c: 9b01 ldr r3, [sp, #4] + 800376e: 1ac0 subs r0, r0, r3 + 8003770: 4b0a ldr r3, [pc, #40] @ (800379c ) + 8003772: 4298 cmp r0, r3 + 8003774: d986 bls.n 8003684 + 8003776: e7b1 b.n 80036dc MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE, RCC_ClkInitStruct->APB1CLKDivider); - 8003744: 68ab ldr r3, [r5, #8] - 8003746: 4a0b ldr r2, [pc, #44] @ (8003774 ) - 8003748: 4013 ands r3, r2 - 800374a: 6922 ldr r2, [r4, #16] - 800374c: 4313 orrs r3, r2 - 800374e: 60ab str r3, [r5, #8] - 8003750: e786 b.n 8003660 - 8003752: 46c0 nop @ (mov r8, r8) - 8003754: 40022000 .word 0x40022000 - 8003758: 40021000 .word 0x40021000 - 800375c: 0800524c .word 0x0800524c - 8003760: 20000024 .word 0x20000024 - 8003764: 2000002c .word 0x2000002c - 8003768: 00001388 .word 0x00001388 - 800376c: ffff84ff .word 0xffff84ff - 8003770: fffff0ff .word 0xfffff0ff - 8003774: ffff8fff .word 0xffff8fff + 8003778: 68ab ldr r3, [r5, #8] + 800377a: 4a0b ldr r2, [pc, #44] @ (80037a8 ) + 800377c: 4013 ands r3, r2 + 800377e: 6922 ldr r2, [r4, #16] + 8003780: 4313 orrs r3, r2 + 8003782: 60ab str r3, [r5, #8] + 8003784: e786 b.n 8003694 + 8003786: 46c0 nop @ (mov r8, r8) + 8003788: 40022000 .word 0x40022000 + 800378c: 40021000 .word 0x40021000 + 8003790: 08005340 .word 0x08005340 + 8003794: 20000028 .word 0x20000028 + 8003798: 20000030 .word 0x20000030 + 800379c: 00001388 .word 0x00001388 + 80037a0: ffff84ff .word 0xffff84ff + 80037a4: fffff0ff .word 0xfffff0ff + 80037a8: ffff8fff .word 0xffff8fff -08003778 : +080037ac : * * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency. * @retval HCLK frequency in Hz */ uint32_t HAL_RCC_GetHCLKFreq(void) { - 8003778: b510 push {r4, lr} + 80037ac: b510 push {r4, lr} SystemCoreClock = (HAL_RCC_GetSysClockFreq() >> ((AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE) \ - 800377a: f7ff ff1d bl 80035b8 - 800377e: 4b06 ldr r3, [pc, #24] @ (8003798 ) - 8003780: 4a06 ldr r2, [pc, #24] @ (800379c ) - 8003782: 689b ldr r3, [r3, #8] + 80037ae: f7ff ff1d bl 80035ec + 80037b2: 4b06 ldr r3, [pc, #24] @ (80037cc ) + 80037b4: 4a06 ldr r2, [pc, #24] @ (80037d0 ) + 80037b6: 689b ldr r3, [r3, #8] >> RCC_CFGR_HPRE_Pos]) & 0x1FU)); - 8003784: 051b lsls r3, r3, #20 - 8003786: 0f1b lsrs r3, r3, #28 + 80037b8: 051b lsls r3, r3, #20 + 80037ba: 0f1b lsrs r3, r3, #28 SystemCoreClock = (HAL_RCC_GetSysClockFreq() >> ((AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE) \ - 8003788: 009b lsls r3, r3, #2 + 80037bc: 009b lsls r3, r3, #2 >> RCC_CFGR_HPRE_Pos]) & 0x1FU)); - 800378a: 589b ldr r3, [r3, r2] - 800378c: 221f movs r2, #31 - 800378e: 4013 ands r3, r2 + 80037be: 589b ldr r3, [r3, r2] + 80037c0: 221f movs r2, #31 + 80037c2: 4013 ands r3, r2 SystemCoreClock = (HAL_RCC_GetSysClockFreq() >> ((AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE) \ - 8003790: 40d8 lsrs r0, r3 - 8003792: 4b03 ldr r3, [pc, #12] @ (80037a0 ) - 8003794: 6018 str r0, [r3, #0] + 80037c4: 40d8 lsrs r0, r3 + 80037c6: 4b03 ldr r3, [pc, #12] @ (80037d4 ) + 80037c8: 6018 str r0, [r3, #0] return SystemCoreClock; } - 8003796: bd10 pop {r4, pc} - 8003798: 40021000 .word 0x40021000 - 800379c: 0800524c .word 0x0800524c - 80037a0: 20000024 .word 0x20000024 + 80037ca: bd10 pop {r4, pc} + 80037cc: 40021000 .word 0x40021000 + 80037d0: 08005340 .word 0x08005340 + 80037d4: 20000028 .word 0x20000028 -080037a4 : +080037d8 : * @note Each time PCLK1 changes, this function must be called to update the * right PCLK1 value. Otherwise, any configuration based on this function will be incorrect. * @retval PCLK1 frequency in Hz */ uint32_t HAL_RCC_GetPCLK1Freq(void) { - 80037a4: b510 push {r4, lr} + 80037d8: b510 push {r4, lr} /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/ return (HAL_RCC_GetHCLKFreq() >> ((APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE) >> RCC_CFGR_PPRE_Pos]) & 0x1FU)); - 80037a6: f7ff ffe7 bl 8003778 - 80037aa: 4b05 ldr r3, [pc, #20] @ (80037c0 ) - 80037ac: 4a05 ldr r2, [pc, #20] @ (80037c4 ) - 80037ae: 689b ldr r3, [r3, #8] - 80037b0: 045b lsls r3, r3, #17 - 80037b2: 0f5b lsrs r3, r3, #29 - 80037b4: 009b lsls r3, r3, #2 - 80037b6: 589b ldr r3, [r3, r2] - 80037b8: 221f movs r2, #31 - 80037ba: 4013 ands r3, r2 - 80037bc: 40d8 lsrs r0, r3 + 80037da: f7ff ffe7 bl 80037ac + 80037de: 4b05 ldr r3, [pc, #20] @ (80037f4 ) + 80037e0: 4a05 ldr r2, [pc, #20] @ (80037f8 ) + 80037e2: 689b ldr r3, [r3, #8] + 80037e4: 045b lsls r3, r3, #17 + 80037e6: 0f5b lsrs r3, r3, #29 + 80037e8: 009b lsls r3, r3, #2 + 80037ea: 589b ldr r3, [r3, r2] + 80037ec: 221f movs r2, #31 + 80037ee: 4013 ands r3, r2 + 80037f0: 40d8 lsrs r0, r3 } - 80037be: bd10 pop {r4, pc} - 80037c0: 40021000 .word 0x40021000 - 80037c4: 0800522c .word 0x0800522c + 80037f2: bd10 pop {r4, pc} + 80037f4: 40021000 .word 0x40021000 + 80037f8: 08005320 .word 0x08005320 -080037c8 : +080037fc : * @note (*) not available on all devices * * @retval HAL status */ HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(const RCC_PeriphCLKInitTypeDef *PeriphClkInit) { - 80037c8: b5f0 push {r4, r5, r6, r7, lr} + 80037fc: b5f0 push {r4, r5, r6, r7, lr} /* Check the parameters */ assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection)); /*-------------------------- RTC clock source configuration ----------------------*/ if ((PeriphClkInit->PeriphClockSelection & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC) - 80037ca: 6803 ldr r3, [r0, #0] + 80037fe: 6803 ldr r3, [r0, #0] { - 80037cc: 0005 movs r5, r0 - 80037ce: b085 sub sp, #20 + 8003800: 0005 movs r5, r0 + 8003802: b085 sub sp, #20 HAL_StatusTypeDef status = HAL_OK; /* Final status */ - 80037d0: 2000 movs r0, #0 + 8003804: 2000 movs r0, #0 if ((PeriphClkInit->PeriphClockSelection & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC) - 80037d2: 065b lsls r3, r3, #25 - 80037d4: d522 bpl.n 800381c + 8003806: 065b lsls r3, r3, #25 + 8003808: d522 bpl.n 8003850 /* Check for RTC Parameters used to output RTCCLK */ assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection)); /* Enable Power Clock */ if (__HAL_RCC_PWR_IS_CLK_DISABLED()) - 80037d6: 2280 movs r2, #128 @ 0x80 - 80037d8: 4c39 ldr r4, [pc, #228] @ (80038c0 ) - 80037da: 0552 lsls r2, r2, #21 - 80037dc: 6be3 ldr r3, [r4, #60] @ 0x3c + 800380a: 2280 movs r2, #128 @ 0x80 + 800380c: 4c39 ldr r4, [pc, #228] @ (80038f4 ) + 800380e: 0552 lsls r2, r2, #21 + 8003810: 6be3 ldr r3, [r4, #60] @ 0x3c FlagStatus pwrclkchanged = RESET; - 80037de: 0006 movs r6, r0 + 8003812: 0006 movs r6, r0 if (__HAL_RCC_PWR_IS_CLK_DISABLED()) - 80037e0: 4213 tst r3, r2 - 80037e2: d107 bne.n 80037f4 + 8003814: 4213 tst r3, r2 + 8003816: d107 bne.n 8003828 { __HAL_RCC_PWR_CLK_ENABLE(); - 80037e4: 6be3 ldr r3, [r4, #60] @ 0x3c + 8003818: 6be3 ldr r3, [r4, #60] @ 0x3c pwrclkchanged = SET; - 80037e6: 3601 adds r6, #1 + 800381a: 3601 adds r6, #1 __HAL_RCC_PWR_CLK_ENABLE(); - 80037e8: 4313 orrs r3, r2 - 80037ea: 63e3 str r3, [r4, #60] @ 0x3c - 80037ec: 6be3 ldr r3, [r4, #60] @ 0x3c - 80037ee: 4013 ands r3, r2 - 80037f0: 9303 str r3, [sp, #12] - 80037f2: 9b03 ldr r3, [sp, #12] + 800381c: 4313 orrs r3, r2 + 800381e: 63e3 str r3, [r4, #60] @ 0x3c + 8003820: 6be3 ldr r3, [r4, #60] @ 0x3c + 8003822: 4013 ands r3, r2 + 8003824: 9303 str r3, [sp, #12] + 8003826: 9b03 ldr r3, [sp, #12] } /* Reset the RTC domain only if the RTC Clock source selection is modified from default */ tmpregister = READ_BIT(RCC->CSR1, RCC_CSR1_RTCSEL); - 80037f4: 6de2 ldr r2, [r4, #92] @ 0x5c - 80037f6: 23c0 movs r3, #192 @ 0xc0 - 80037f8: 0011 movs r1, r2 - 80037fa: 009b lsls r3, r3, #2 - 80037fc: 4f31 ldr r7, [pc, #196] @ (80038c4 ) - 80037fe: 4019 ands r1, r3 + 8003828: 6de2 ldr r2, [r4, #92] @ 0x5c + 800382a: 23c0 movs r3, #192 @ 0xc0 + 800382c: 0011 movs r1, r2 + 800382e: 009b lsls r3, r3, #2 + 8003830: 4f31 ldr r7, [pc, #196] @ (80038f8 ) + 8003832: 4019 ands r1, r3 /* Reset the RTC domain only if the RTC Clock source selection is modified */ if ((tmpregister != RCC_RTCCLKSOURCE_NONE) && (tmpregister != PeriphClkInit->RTCClockSelection)) - 8003800: 421a tst r2, r3 - 8003802: d13b bne.n 800387c + 8003834: 421a tst r2, r3 + 8003836: d13b bne.n 80038b0 HAL_StatusTypeDef status = HAL_OK; /* Final status */ - 8003804: 2000 movs r0, #0 + 8003838: 2000 movs r0, #0 } if (ret == HAL_OK) { /* Apply new RTC clock source selection */ __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection); - 8003806: 6de3 ldr r3, [r4, #92] @ 0x5c - 8003808: 69aa ldr r2, [r5, #24] - 800380a: 403b ands r3, r7 - 800380c: 4313 orrs r3, r2 - 800380e: 65e3 str r3, [r4, #92] @ 0x5c + 800383a: 6de3 ldr r3, [r4, #92] @ 0x5c + 800383c: 69aa ldr r2, [r5, #24] + 800383e: 403b ands r3, r7 + 8003840: 4313 orrs r3, r2 + 8003842: 65e3 str r3, [r4, #92] @ 0x5c /* set overall return value */ status = ret; } /* Restore clock configuration if changed */ if (pwrclkchanged == SET) - 8003810: 2e01 cmp r6, #1 - 8003812: d103 bne.n 800381c + 8003844: 2e01 cmp r6, #1 + 8003846: d103 bne.n 8003850 { __HAL_RCC_PWR_CLK_DISABLE(); - 8003814: 6be3 ldr r3, [r4, #60] @ 0x3c - 8003816: 4a2c ldr r2, [pc, #176] @ (80038c8 ) - 8003818: 4013 ands r3, r2 - 800381a: 63e3 str r3, [r4, #60] @ 0x3c + 8003848: 6be3 ldr r3, [r4, #60] @ 0x3c + 800384a: 4a2c ldr r2, [pc, #176] @ (80038fc ) + 800384c: 4013 ands r3, r2 + 800384e: 63e3 str r3, [r4, #60] @ 0x3c } } /*-------------------------- USART1 clock source configuration -------------------*/ if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART1) == RCC_PERIPHCLK_USART1) - 800381c: 682a ldr r2, [r5, #0] - 800381e: 07d3 lsls r3, r2, #31 - 8003820: d506 bpl.n 8003830 + 8003850: 682a ldr r2, [r5, #0] + 8003852: 07d3 lsls r3, r2, #31 + 8003854: d506 bpl.n 8003864 { /* Check the parameters */ assert_param(IS_RCC_USART1CLKSOURCE(PeriphClkInit->Usart1ClockSelection)); /* Configure the USART1 clock source */ __HAL_RCC_USART1_CONFIG(PeriphClkInit->Usart1ClockSelection); - 8003822: 2403 movs r4, #3 - 8003824: 4926 ldr r1, [pc, #152] @ (80038c0 ) - 8003826: 6d4b ldr r3, [r1, #84] @ 0x54 - 8003828: 43a3 bics r3, r4 - 800382a: 68ac ldr r4, [r5, #8] - 800382c: 4323 orrs r3, r4 - 800382e: 654b str r3, [r1, #84] @ 0x54 + 8003856: 2403 movs r4, #3 + 8003858: 4926 ldr r1, [pc, #152] @ (80038f4 ) + 800385a: 6d4b ldr r3, [r1, #84] @ 0x54 + 800385c: 43a3 bics r3, r4 + 800385e: 68ac ldr r4, [r5, #8] + 8003860: 4323 orrs r3, r4 + 8003862: 654b str r3, [r1, #84] @ 0x54 } /*-------------------------- I2C1 clock source configuration ---------------------*/ if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C1) == RCC_PERIPHCLK_I2C1) - 8003830: 0793 lsls r3, r2, #30 - 8003832: d506 bpl.n 8003842 + 8003864: 0793 lsls r3, r2, #30 + 8003866: d506 bpl.n 8003876 { /* Check the parameters */ assert_param(IS_RCC_I2C1CLKSOURCE(PeriphClkInit->I2c1ClockSelection)); /* Configure the I2C1 clock source */ __HAL_RCC_I2C1_CONFIG(PeriphClkInit->I2c1ClockSelection); - 8003834: 4922 ldr r1, [pc, #136] @ (80038c0 ) - 8003836: 4c25 ldr r4, [pc, #148] @ (80038cc ) - 8003838: 6d4b ldr r3, [r1, #84] @ 0x54 - 800383a: 4023 ands r3, r4 - 800383c: 68ec ldr r4, [r5, #12] - 800383e: 4323 orrs r3, r4 - 8003840: 654b str r3, [r1, #84] @ 0x54 + 8003868: 4922 ldr r1, [pc, #136] @ (80038f4 ) + 800386a: 4c25 ldr r4, [pc, #148] @ (8003900 ) + 800386c: 6d4b ldr r3, [r1, #84] @ 0x54 + 800386e: 4023 ands r3, r4 + 8003870: 68ec ldr r4, [r5, #12] + 8003872: 4323 orrs r3, r4 + 8003874: 654b str r3, [r1, #84] @ 0x54 } /*-------------------------- ADC clock source configuration ----------------------*/ if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC) - 8003842: 0693 lsls r3, r2, #26 - 8003844: d506 bpl.n 8003854 + 8003876: 0693 lsls r3, r2, #26 + 8003878: d506 bpl.n 8003888 { /* Check the parameters */ assert_param(IS_RCC_ADCCLKSOURCE(PeriphClkInit->AdcClockSelection)); /* Configure the ADC interface clock source */ __HAL_RCC_ADC_CONFIG(PeriphClkInit->AdcClockSelection); - 8003846: 491e ldr r1, [pc, #120] @ (80038c0 ) - 8003848: 696c ldr r4, [r5, #20] - 800384a: 6d4b ldr r3, [r1, #84] @ 0x54 - 800384c: 009b lsls r3, r3, #2 - 800384e: 089b lsrs r3, r3, #2 - 8003850: 4323 orrs r3, r4 - 8003852: 654b str r3, [r1, #84] @ 0x54 + 800387a: 491e ldr r1, [pc, #120] @ (80038f4 ) + 800387c: 696c ldr r4, [r5, #20] + 800387e: 6d4b ldr r3, [r1, #84] @ 0x54 + 8003880: 009b lsls r3, r3, #2 + 8003882: 089b lsrs r3, r3, #2 + 8003884: 4323 orrs r3, r4 + 8003886: 654b str r3, [r1, #84] @ 0x54 __HAL_RCC_FDCAN1_CONFIG(PeriphClkInit->Fdcan1ClockSelection); } #endif /* FDCAN1 */ /*-------------------------- I2S1 clock source configuration ---------------------*/ if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S1) == RCC_PERIPHCLK_I2S1) - 8003854: 0753 lsls r3, r2, #29 - 8003856: d506 bpl.n 8003866 + 8003888: 0753 lsls r3, r2, #29 + 800388a: d506 bpl.n 800389a { /* Check the parameters */ assert_param(IS_RCC_I2S1CLKSOURCE(PeriphClkInit->I2s1ClockSelection)); /* Configure the I2S1 clock source */ __HAL_RCC_I2S1_CONFIG(PeriphClkInit->I2s1ClockSelection); - 8003858: 4919 ldr r1, [pc, #100] @ (80038c0 ) - 800385a: 4c1d ldr r4, [pc, #116] @ (80038d0 ) - 800385c: 6d4b ldr r3, [r1, #84] @ 0x54 - 800385e: 4023 ands r3, r4 - 8003860: 692c ldr r4, [r5, #16] - 8003862: 4323 orrs r3, r4 - 8003864: 654b str r3, [r1, #84] @ 0x54 + 800388c: 4919 ldr r1, [pc, #100] @ (80038f4 ) + 800388e: 4c1d ldr r4, [pc, #116] @ (8003904 ) + 8003890: 6d4b ldr r3, [r1, #84] @ 0x54 + 8003892: 4023 ands r3, r4 + 8003894: 692c ldr r4, [r5, #16] + 8003896: 4323 orrs r3, r4 + 8003898: 654b str r3, [r1, #84] @ 0x54 } /*------------------------------------ HSI Kernel clock source configuration --------------------------------------*/ if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_HSIKER) == RCC_PERIPHCLK_HSIKER) - 8003866: 0612 lsls r2, r2, #24 - 8003868: d506 bpl.n 8003878 + 800389a: 0612 lsls r2, r2, #24 + 800389c: d506 bpl.n 80038ac { /* Check the parameters */ assert_param(IS_RCC_HSIKERDIV(PeriphClkInit->HSIKerClockDivider)); /* Configure the HSI Kernel clock source Divider */ __HAL_RCC_HSIKER_CONFIG(PeriphClkInit->HSIKerClockDivider); - 800386a: 21e0 movs r1, #224 @ 0xe0 - 800386c: 4a14 ldr r2, [pc, #80] @ (80038c0 ) - 800386e: 6813 ldr r3, [r2, #0] - 8003870: 438b bics r3, r1 - 8003872: 6869 ldr r1, [r5, #4] - 8003874: 430b orrs r3, r1 - 8003876: 6013 str r3, [r2, #0] + 800389e: 21e0 movs r1, #224 @ 0xe0 + 80038a0: 4a14 ldr r2, [pc, #80] @ (80038f4 ) + 80038a2: 6813 ldr r3, [r2, #0] + 80038a4: 438b bics r3, r1 + 80038a6: 6869 ldr r1, [r5, #4] + 80038a8: 430b orrs r3, r1 + 80038aa: 6013 str r3, [r2, #0] } return status; } - 8003878: b005 add sp, #20 - 800387a: bdf0 pop {r4, r5, r6, r7, pc} + 80038ac: b005 add sp, #20 + 80038ae: bdf0 pop {r4, r5, r6, r7, pc} if ((tmpregister != RCC_RTCCLKSOURCE_NONE) && (tmpregister != PeriphClkInit->RTCClockSelection)) - 800387c: 69ab ldr r3, [r5, #24] - 800387e: 428b cmp r3, r1 - 8003880: d0c0 beq.n 8003804 + 80038b0: 69ab ldr r3, [r5, #24] + 80038b2: 428b cmp r3, r1 + 80038b4: d0c0 beq.n 8003838 __HAL_RCC_BACKUPRESET_FORCE(); - 8003882: 2280 movs r2, #128 @ 0x80 + 80038b6: 2280 movs r2, #128 @ 0x80 tmpregister = READ_BIT(RCC->CSR1, ~(RCC_CSR1_RTCSEL)); - 8003884: 6de3 ldr r3, [r4, #92] @ 0x5c + 80038b8: 6de3 ldr r3, [r4, #92] @ 0x5c __HAL_RCC_BACKUPRESET_FORCE(); - 8003886: 6de0 ldr r0, [r4, #92] @ 0x5c + 80038ba: 6de0 ldr r0, [r4, #92] @ 0x5c tmpregister = READ_BIT(RCC->CSR1, ~(RCC_CSR1_RTCSEL)); - 8003888: 0019 movs r1, r3 + 80038bc: 0019 movs r1, r3 __HAL_RCC_BACKUPRESET_FORCE(); - 800388a: 0252 lsls r2, r2, #9 - 800388c: 4302 orrs r2, r0 - 800388e: 65e2 str r2, [r4, #92] @ 0x5c + 80038be: 0252 lsls r2, r2, #9 + 80038c0: 4302 orrs r2, r0 + 80038c2: 65e2 str r2, [r4, #92] @ 0x5c __HAL_RCC_BACKUPRESET_RELEASE(); - 8003890: 6de2 ldr r2, [r4, #92] @ 0x5c - 8003892: 4810 ldr r0, [pc, #64] @ (80038d4 ) + 80038c4: 6de2 ldr r2, [r4, #92] @ 0x5c + 80038c6: 4810 ldr r0, [pc, #64] @ (8003908 ) tmpregister = READ_BIT(RCC->CSR1, ~(RCC_CSR1_RTCSEL)); - 8003894: 4039 ands r1, r7 + 80038c8: 4039 ands r1, r7 __HAL_RCC_BACKUPRESET_RELEASE(); - 8003896: 4002 ands r2, r0 - 8003898: 65e2 str r2, [r4, #92] @ 0x5c + 80038ca: 4002 ands r2, r0 + 80038cc: 65e2 str r2, [r4, #92] @ 0x5c RCC->CSR1 = tmpregister; - 800389a: 65e1 str r1, [r4, #92] @ 0x5c + 80038ce: 65e1 str r1, [r4, #92] @ 0x5c if (HAL_IS_BIT_SET(tmpregister, RCC_CSR1_LSEON)) - 800389c: 07db lsls r3, r3, #31 - 800389e: d5b1 bpl.n 8003804 + 80038d0: 07db lsls r3, r3, #31 + 80038d2: d5b1 bpl.n 8003838 tickstart = HAL_GetTick(); - 80038a0: f7ff f81e bl 80028e0 - 80038a4: 9001 str r0, [sp, #4] + 80038d4: f7ff f81c bl 8002910 + 80038d8: 9001 str r0, [sp, #4] while (READ_BIT(RCC->CSR1, RCC_CSR1_LSERDY) == 0U) - 80038a6: 2202 movs r2, #2 - 80038a8: 6de3 ldr r3, [r4, #92] @ 0x5c - 80038aa: 4213 tst r3, r2 - 80038ac: d1aa bne.n 8003804 + 80038da: 2202 movs r2, #2 + 80038dc: 6de3 ldr r3, [r4, #92] @ 0x5c + 80038de: 4213 tst r3, r2 + 80038e0: d1aa bne.n 8003838 if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) - 80038ae: f7ff f817 bl 80028e0 - 80038b2: 9b01 ldr r3, [sp, #4] - 80038b4: 1ac0 subs r0, r0, r3 - 80038b6: 4b08 ldr r3, [pc, #32] @ (80038d8 ) - 80038b8: 4298 cmp r0, r3 - 80038ba: d9f4 bls.n 80038a6 + 80038e2: f7ff f815 bl 8002910 + 80038e6: 9b01 ldr r3, [sp, #4] + 80038e8: 1ac0 subs r0, r0, r3 + 80038ea: 4b08 ldr r3, [pc, #32] @ (800390c ) + 80038ec: 4298 cmp r0, r3 + 80038ee: d9f4 bls.n 80038da status = ret; - 80038bc: 2003 movs r0, #3 - 80038be: e7a7 b.n 8003810 - 80038c0: 40021000 .word 0x40021000 - 80038c4: fffffcff .word 0xfffffcff - 80038c8: efffffff .word 0xefffffff - 80038cc: ffffcfff .word 0xffffcfff - 80038d0: ffff3fff .word 0xffff3fff - 80038d4: fffeffff .word 0xfffeffff - 80038d8: 00001388 .word 0x00001388 + 80038f0: 2003 movs r0, #3 + 80038f2: e7a7 b.n 8003844 + 80038f4: 40021000 .word 0x40021000 + 80038f8: fffffcff .word 0xfffffcff + 80038fc: efffffff .word 0xefffffff + 8003900: ffffcfff .word 0xffffcfff + 8003904: ffff3fff .word 0xffff3fff + 8003908: fffeffff .word 0xfffeffff + 800390c: 00001388 .word 0x00001388 -080038dc : +08003910 : * @param TIMx to select the TIM peripheral * @param OC_Config The output configuration structure * @retval None */ static void TIM_OC1_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config) { - 80038dc: b570 push {r4, r5, r6, lr} + 8003910: b570 push {r4, r5, r6, lr} /* Get the TIMx CCER register value */ tmpccer = TIMx->CCER; /* Disable the Channel 1: Reset the CC1E Bit */ TIMx->CCER &= ~TIM_CCER_CC1E; - 80038de: 2401 movs r4, #1 + 8003912: 2401 movs r4, #1 tmpccer = TIMx->CCER; - 80038e0: 6a03 ldr r3, [r0, #32] + 8003914: 6a03 ldr r3, [r0, #32] TIMx->CCER &= ~TIM_CCER_CC1E; - 80038e2: 6a02 ldr r2, [r0, #32] - 80038e4: 43a2 bics r2, r4 - 80038e6: 6202 str r2, [r0, #32] + 8003916: 6a02 ldr r2, [r0, #32] + 8003918: 43a2 bics r2, r4 + 800391a: 6202 str r2, [r0, #32] /* Get the TIMx CR2 register value */ tmpcr2 = TIMx->CR2; - 80038e8: 6844 ldr r4, [r0, #4] + 800391c: 6844 ldr r4, [r0, #4] /* Get the TIMx CCMR1 register value */ tmpccmrx = TIMx->CCMR1; /* Reset the Output Compare Mode Bits */ tmpccmrx &= ~TIM_CCMR1_OC1M; tmpccmrx &= ~TIM_CCMR1_CC1S; - 80038ea: 4a12 ldr r2, [pc, #72] @ (8003934 ) + 800391e: 4a12 ldr r2, [pc, #72] @ (8003968 ) tmpccmrx = TIMx->CCMR1; - 80038ec: 6985 ldr r5, [r0, #24] + 8003920: 6985 ldr r5, [r0, #24] tmpccmrx &= ~TIM_CCMR1_CC1S; - 80038ee: 4015 ands r5, r2 + 8003922: 4015 ands r5, r2 /* Select the Output Compare Mode */ tmpccmrx |= OC_Config->OCMode; - 80038f0: 680a ldr r2, [r1, #0] - 80038f2: 4315 orrs r5, r2 + 8003924: 680a ldr r2, [r1, #0] + 8003926: 4315 orrs r5, r2 /* Reset the Output Polarity level */ tmpccer &= ~TIM_CCER_CC1P; - 80038f4: 2202 movs r2, #2 - 80038f6: 4393 bics r3, r2 + 8003928: 2202 movs r2, #2 + 800392a: 4393 bics r3, r2 /* Set the Output Compare Polarity */ tmpccer |= OC_Config->OCPolarity; - 80038f8: 688a ldr r2, [r1, #8] - 80038fa: 4313 orrs r3, r2 + 800392c: 688a ldr r2, [r1, #8] + 800392e: 4313 orrs r3, r2 if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_1)) - 80038fc: 4a0e ldr r2, [pc, #56] @ (8003938 ) - 80038fe: 4290 cmp r0, r2 - 8003900: d005 beq.n 800390e - 8003902: 4a0e ldr r2, [pc, #56] @ (800393c ) - 8003904: 4290 cmp r0, r2 - 8003906: d002 beq.n 800390e - 8003908: 4a0d ldr r2, [pc, #52] @ (8003940 ) - 800390a: 4290 cmp r0, r2 - 800390c: d10b bne.n 8003926 + 8003930: 4a0e ldr r2, [pc, #56] @ (800396c ) + 8003932: 4290 cmp r0, r2 + 8003934: d005 beq.n 8003942 + 8003936: 4a0e ldr r2, [pc, #56] @ (8003970 ) + 8003938: 4290 cmp r0, r2 + 800393a: d002 beq.n 8003942 + 800393c: 4a0d ldr r2, [pc, #52] @ (8003974 ) + 800393e: 4290 cmp r0, r2 + 8003940: d10b bne.n 800395a { /* Check parameters */ assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); /* Reset the Output N Polarity level */ tmpccer &= ~TIM_CCER_CC1NP; - 800390e: 2208 movs r2, #8 - 8003910: 4393 bics r3, r2 + 8003942: 2208 movs r2, #8 + 8003944: 4393 bics r3, r2 /* Set the Output N Polarity */ tmpccer |= OC_Config->OCNPolarity; - 8003912: 68ca ldr r2, [r1, #12] + 8003946: 68ca ldr r2, [r1, #12] tmpcr2 &= ~TIM_CR2_OIS1; tmpcr2 &= ~TIM_CR2_OIS1N; /* Set the Output Idle state */ tmpcr2 |= OC_Config->OCIdleState; /* Set the Output N Idle state */ tmpcr2 |= OC_Config->OCNIdleState; - 8003914: 698e ldr r6, [r1, #24] + 8003948: 698e ldr r6, [r1, #24] tmpccer |= OC_Config->OCNPolarity; - 8003916: 4313 orrs r3, r2 + 800394a: 4313 orrs r3, r2 tmpccer &= ~TIM_CCER_CC1NE; - 8003918: 2204 movs r2, #4 - 800391a: 4393 bics r3, r2 + 800394c: 2204 movs r2, #4 + 800394e: 4393 bics r3, r2 tmpcr2 &= ~TIM_CR2_OIS1N; - 800391c: 4a09 ldr r2, [pc, #36] @ (8003944 ) - 800391e: 4022 ands r2, r4 + 8003950: 4a09 ldr r2, [pc, #36] @ (8003978 ) + 8003952: 4022 ands r2, r4 tmpcr2 |= OC_Config->OCNIdleState; - 8003920: 694c ldr r4, [r1, #20] - 8003922: 4334 orrs r4, r6 - 8003924: 4314 orrs r4, r2 + 8003954: 694c ldr r4, [r1, #20] + 8003956: 4334 orrs r4, r6 + 8003958: 4314 orrs r4, r2 /* Write to TIMx CCMR1 */ TIMx->CCMR1 = tmpccmrx; /* Set the Capture Compare Register value */ TIMx->CCR1 = OC_Config->Pulse; - 8003926: 684a ldr r2, [r1, #4] + 800395a: 684a ldr r2, [r1, #4] TIMx->CR2 = tmpcr2; - 8003928: 6044 str r4, [r0, #4] + 800395c: 6044 str r4, [r0, #4] TIMx->CCMR1 = tmpccmrx; - 800392a: 6185 str r5, [r0, #24] + 800395e: 6185 str r5, [r0, #24] TIMx->CCR1 = OC_Config->Pulse; - 800392c: 6342 str r2, [r0, #52] @ 0x34 + 8003960: 6342 str r2, [r0, #52] @ 0x34 /* Write to TIMx CCER */ TIMx->CCER = tmpccer; - 800392e: 6203 str r3, [r0, #32] + 8003962: 6203 str r3, [r0, #32] } - 8003930: bd70 pop {r4, r5, r6, pc} - 8003932: 46c0 nop @ (mov r8, r8) - 8003934: fffeff8c .word 0xfffeff8c - 8003938: 40012c00 .word 0x40012c00 - 800393c: 40014400 .word 0x40014400 - 8003940: 40014800 .word 0x40014800 - 8003944: fffffcff .word 0xfffffcff + 8003964: bd70 pop {r4, r5, r6, pc} + 8003966: 46c0 nop @ (mov r8, r8) + 8003968: fffeff8c .word 0xfffeff8c + 800396c: 40012c00 .word 0x40012c00 + 8003970: 40014400 .word 0x40014400 + 8003974: 40014800 .word 0x40014800 + 8003978: fffffcff .word 0xfffffcff -08003948 : +0800397c : * @param TIMx to select the TIM peripheral * @param OC_Config The output configuration structure * @retval None */ static void TIM_OC3_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config) { - 8003948: b570 push {r4, r5, r6, lr} + 800397c: b570 push {r4, r5, r6, lr} /* Get the TIMx CCER register value */ tmpccer = TIMx->CCER; /* Disable the Channel 3: Reset the CC2E Bit */ TIMx->CCER &= ~TIM_CCER_CC3E; - 800394a: 4a17 ldr r2, [pc, #92] @ (80039a8 ) + 800397e: 4a17 ldr r2, [pc, #92] @ (80039dc ) tmpccer = TIMx->CCER; - 800394c: 6a05 ldr r5, [r0, #32] + 8003980: 6a05 ldr r5, [r0, #32] TIMx->CCER &= ~TIM_CCER_CC3E; - 800394e: 6a03 ldr r3, [r0, #32] - 8003950: 4013 ands r3, r2 - 8003952: 6203 str r3, [r0, #32] + 8003982: 6a03 ldr r3, [r0, #32] + 8003984: 4013 ands r3, r2 + 8003986: 6203 str r3, [r0, #32] /* Get the TIMx CR2 register value */ tmpcr2 = TIMx->CR2; - 8003954: 6842 ldr r2, [r0, #4] + 8003988: 6842 ldr r2, [r0, #4] /* Get the TIMx CCMR2 register value */ tmpccmrx = TIMx->CCMR2; /* Reset the Output Compare mode and Capture/Compare selection Bits */ tmpccmrx &= ~TIM_CCMR2_OC3M; tmpccmrx &= ~TIM_CCMR2_CC3S; - 8003956: 4b15 ldr r3, [pc, #84] @ (80039ac ) + 800398a: 4b15 ldr r3, [pc, #84] @ (80039e0 ) tmpccmrx = TIMx->CCMR2; - 8003958: 69c4 ldr r4, [r0, #28] + 800398c: 69c4 ldr r4, [r0, #28] tmpccmrx &= ~TIM_CCMR2_CC3S; - 800395a: 401c ands r4, r3 + 800398e: 401c ands r4, r3 /* Select the Output Compare Mode */ tmpccmrx |= OC_Config->OCMode; - 800395c: 680b ldr r3, [r1, #0] - 800395e: 431c orrs r4, r3 + 8003990: 680b ldr r3, [r1, #0] + 8003992: 431c orrs r4, r3 /* Reset the Output Polarity level */ tmpccer &= ~TIM_CCER_CC3P; - 8003960: 4b13 ldr r3, [pc, #76] @ (80039b0 ) - 8003962: 401d ands r5, r3 + 8003994: 4b13 ldr r3, [pc, #76] @ (80039e4 ) + 8003996: 401d ands r5, r3 /* Set the Output Compare Polarity */ tmpccer |= (OC_Config->OCPolarity << 8U); - 8003964: 688b ldr r3, [r1, #8] - 8003966: 021b lsls r3, r3, #8 - 8003968: 432b orrs r3, r5 + 8003998: 688b ldr r3, [r1, #8] + 800399a: 021b lsls r3, r3, #8 + 800399c: 432b orrs r3, r5 if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_3)) - 800396a: 4d12 ldr r5, [pc, #72] @ (80039b4 ) - 800396c: 42a8 cmp r0, r5 - 800396e: d10e bne.n 800398e + 800399e: 4d12 ldr r5, [pc, #72] @ (80039e8 ) + 80039a0: 42a8 cmp r0, r5 + 80039a2: d10e bne.n 80039c2 { assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); /* Reset the Output N Polarity level */ tmpccer &= ~TIM_CCER_CC3NP; - 8003970: 4d11 ldr r5, [pc, #68] @ (80039b8 ) - 8003972: 401d ands r5, r3 + 80039a4: 4d11 ldr r5, [pc, #68] @ (80039ec ) + 80039a6: 401d ands r5, r3 /* Set the Output N Polarity */ tmpccer |= (OC_Config->OCNPolarity << 8U); - 8003974: 68cb ldr r3, [r1, #12] - 8003976: 021b lsls r3, r3, #8 - 8003978: 432b orrs r3, r5 + 80039a8: 68cb ldr r3, [r1, #12] + 80039aa: 021b lsls r3, r3, #8 + 80039ac: 432b orrs r3, r5 /* Reset the Output N State */ tmpccer &= ~TIM_CCER_CC3NE; - 800397a: 4d10 ldr r5, [pc, #64] @ (80039bc ) - 800397c: 402b ands r3, r5 + 80039ae: 4d10 ldr r5, [pc, #64] @ (80039f0 ) + 80039b0: 402b ands r3, r5 assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState)); assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); /* Reset the Output Compare and Output Compare N IDLE State */ tmpcr2 &= ~TIM_CR2_OIS3; tmpcr2 &= ~TIM_CR2_OIS3N; - 800397e: 4d10 ldr r5, [pc, #64] @ (80039c0 ) + 80039b2: 4d10 ldr r5, [pc, #64] @ (80039f4 ) /* Set the Output Idle state */ tmpcr2 |= (OC_Config->OCIdleState << 4U); /* Set the Output N Idle state */ tmpcr2 |= (OC_Config->OCNIdleState << 4U); - 8003980: 698e ldr r6, [r1, #24] + 80039b4: 698e ldr r6, [r1, #24] tmpcr2 &= ~TIM_CR2_OIS3N; - 8003982: 4015 ands r5, r2 + 80039b6: 4015 ands r5, r2 tmpcr2 |= (OC_Config->OCNIdleState << 4U); - 8003984: 694a ldr r2, [r1, #20] - 8003986: 4332 orrs r2, r6 - 8003988: 0112 lsls r2, r2, #4 - 800398a: 432a orrs r2, r5 - 800398c: e005 b.n 800399a + 80039b8: 694a ldr r2, [r1, #20] + 80039ba: 4332 orrs r2, r6 + 80039bc: 0112 lsls r2, r2, #4 + 80039be: 432a orrs r2, r5 + 80039c0: e005 b.n 80039ce if (IS_TIM_BREAK_INSTANCE(TIMx)) - 800398e: 4d0d ldr r5, [pc, #52] @ (80039c4 ) - 8003990: 42a8 cmp r0, r5 - 8003992: d0f4 beq.n 800397e - 8003994: 4d0c ldr r5, [pc, #48] @ (80039c8 ) - 8003996: 42a8 cmp r0, r5 - 8003998: d0f1 beq.n 800397e + 80039c2: 4d0d ldr r5, [pc, #52] @ (80039f8 ) + 80039c4: 42a8 cmp r0, r5 + 80039c6: d0f4 beq.n 80039b2 + 80039c8: 4d0c ldr r5, [pc, #48] @ (80039fc ) + 80039ca: 42a8 cmp r0, r5 + 80039cc: d0f1 beq.n 80039b2 } /* Write to TIMx CR2 */ TIMx->CR2 = tmpcr2; - 800399a: 6042 str r2, [r0, #4] + 80039ce: 6042 str r2, [r0, #4] /* Write to TIMx CCMR2 */ TIMx->CCMR2 = tmpccmrx; /* Set the Capture Compare Register value */ TIMx->CCR3 = OC_Config->Pulse; - 800399c: 684a ldr r2, [r1, #4] + 80039d0: 684a ldr r2, [r1, #4] TIMx->CCMR2 = tmpccmrx; - 800399e: 61c4 str r4, [r0, #28] + 80039d2: 61c4 str r4, [r0, #28] TIMx->CCR3 = OC_Config->Pulse; - 80039a0: 63c2 str r2, [r0, #60] @ 0x3c + 80039d4: 63c2 str r2, [r0, #60] @ 0x3c /* Write to TIMx CCER */ TIMx->CCER = tmpccer; - 80039a2: 6203 str r3, [r0, #32] + 80039d6: 6203 str r3, [r0, #32] } - 80039a4: bd70 pop {r4, r5, r6, pc} - 80039a6: 46c0 nop @ (mov r8, r8) - 80039a8: fffffeff .word 0xfffffeff - 80039ac: fffeff8c .word 0xfffeff8c - 80039b0: fffffdff .word 0xfffffdff - 80039b4: 40012c00 .word 0x40012c00 - 80039b8: fffff7ff .word 0xfffff7ff - 80039bc: fffffbff .word 0xfffffbff - 80039c0: ffffcfff .word 0xffffcfff - 80039c4: 40014400 .word 0x40014400 - 80039c8: 40014800 .word 0x40014800 + 80039d8: bd70 pop {r4, r5, r6, pc} + 80039da: 46c0 nop @ (mov r8, r8) + 80039dc: fffffeff .word 0xfffffeff + 80039e0: fffeff8c .word 0xfffeff8c + 80039e4: fffffdff .word 0xfffffdff + 80039e8: 40012c00 .word 0x40012c00 + 80039ec: fffff7ff .word 0xfffff7ff + 80039f0: fffffbff .word 0xfffffbff + 80039f4: ffffcfff .word 0xffffcfff + 80039f8: 40014400 .word 0x40014400 + 80039fc: 40014800 .word 0x40014800 -080039cc : +08003a00 : * @param TIMx to select the TIM peripheral * @param OC_Config The output configuration structure * @retval None */ static void TIM_OC4_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config) { - 80039cc: b530 push {r4, r5, lr} + 8003a00: b530 push {r4, r5, lr} /* Get the TIMx CCER register value */ tmpccer = TIMx->CCER; /* Disable the Channel 4: Reset the CC4E Bit */ TIMx->CCER &= ~TIM_CCER_CC4E; - 80039ce: 4a12 ldr r2, [pc, #72] @ (8003a18 ) + 8003a02: 4a12 ldr r2, [pc, #72] @ (8003a4c ) tmpccer = TIMx->CCER; - 80039d0: 6a04 ldr r4, [r0, #32] + 8003a04: 6a04 ldr r4, [r0, #32] TIMx->CCER &= ~TIM_CCER_CC4E; - 80039d2: 6a03 ldr r3, [r0, #32] + 8003a06: 6a03 ldr r3, [r0, #32] /* Get the TIMx CCMR2 register value */ tmpccmrx = TIMx->CCMR2; /* Reset the Output Compare mode and Capture/Compare selection Bits */ tmpccmrx &= ~TIM_CCMR2_OC4M; tmpccmrx &= ~TIM_CCMR2_CC4S; - 80039d4: 4d11 ldr r5, [pc, #68] @ (8003a1c ) + 8003a08: 4d11 ldr r5, [pc, #68] @ (8003a50 ) TIMx->CCER &= ~TIM_CCER_CC4E; - 80039d6: 4013 ands r3, r2 - 80039d8: 6203 str r3, [r0, #32] + 8003a0a: 4013 ands r3, r2 + 8003a0c: 6203 str r3, [r0, #32] tmpcr2 = TIMx->CR2; - 80039da: 6843 ldr r3, [r0, #4] + 8003a0e: 6843 ldr r3, [r0, #4] tmpccmrx = TIMx->CCMR2; - 80039dc: 69c2 ldr r2, [r0, #28] + 8003a10: 69c2 ldr r2, [r0, #28] tmpccmrx &= ~TIM_CCMR2_CC4S; - 80039de: 402a ands r2, r5 + 8003a12: 402a ands r2, r5 /* Select the Output Compare Mode */ tmpccmrx |= (OC_Config->OCMode << 8U); - 80039e0: 680d ldr r5, [r1, #0] - 80039e2: 022d lsls r5, r5, #8 - 80039e4: 4315 orrs r5, r2 + 8003a14: 680d ldr r5, [r1, #0] + 8003a16: 022d lsls r5, r5, #8 + 8003a18: 4315 orrs r5, r2 /* Reset the Output Polarity level */ tmpccer &= ~TIM_CCER_CC4P; - 80039e6: 4a0e ldr r2, [pc, #56] @ (8003a20 ) - 80039e8: 4014 ands r4, r2 + 8003a1a: 4a0e ldr r2, [pc, #56] @ (8003a54 ) + 8003a1c: 4014 ands r4, r2 /* Set the Output Compare Polarity */ tmpccer |= (OC_Config->OCPolarity << 12U); - 80039ea: 688a ldr r2, [r1, #8] - 80039ec: 0312 lsls r2, r2, #12 - 80039ee: 4322 orrs r2, r4 + 8003a1e: 688a ldr r2, [r1, #8] + 8003a20: 0312 lsls r2, r2, #12 + 8003a22: 4322 orrs r2, r4 if (IS_TIM_BREAK_INSTANCE(TIMx)) - 80039f0: 4c0c ldr r4, [pc, #48] @ (8003a24 ) - 80039f2: 42a0 cmp r0, r4 - 80039f4: d005 beq.n 8003a02 - 80039f6: 4c0c ldr r4, [pc, #48] @ (8003a28 ) - 80039f8: 42a0 cmp r0, r4 - 80039fa: d002 beq.n 8003a02 - 80039fc: 4c0b ldr r4, [pc, #44] @ (8003a2c ) - 80039fe: 42a0 cmp r0, r4 - 8003a00: d104 bne.n 8003a0c + 8003a24: 4c0c ldr r4, [pc, #48] @ (8003a58 ) + 8003a26: 42a0 cmp r0, r4 + 8003a28: d005 beq.n 8003a36 + 8003a2a: 4c0c ldr r4, [pc, #48] @ (8003a5c ) + 8003a2c: 42a0 cmp r0, r4 + 8003a2e: d002 beq.n 8003a36 + 8003a30: 4c0b ldr r4, [pc, #44] @ (8003a60 ) + 8003a32: 42a0 cmp r0, r4 + 8003a34: d104 bne.n 8003a40 { /* Check parameters */ assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); /* Reset the Output Compare IDLE State */ tmpcr2 &= ~TIM_CR2_OIS4; - 8003a02: 4c0b ldr r4, [pc, #44] @ (8003a30 ) - 8003a04: 401c ands r4, r3 + 8003a36: 4c0b ldr r4, [pc, #44] @ (8003a64 ) + 8003a38: 401c ands r4, r3 /* Set the Output Idle state */ tmpcr2 |= (OC_Config->OCIdleState << 6U); - 8003a06: 694b ldr r3, [r1, #20] - 8003a08: 019b lsls r3, r3, #6 - 8003a0a: 4323 orrs r3, r4 + 8003a3a: 694b ldr r3, [r1, #20] + 8003a3c: 019b lsls r3, r3, #6 + 8003a3e: 4323 orrs r3, r4 } /* Write to TIMx CR2 */ TIMx->CR2 = tmpcr2; - 8003a0c: 6043 str r3, [r0, #4] + 8003a40: 6043 str r3, [r0, #4] /* Write to TIMx CCMR2 */ TIMx->CCMR2 = tmpccmrx; /* Set the Capture Compare Register value */ TIMx->CCR4 = OC_Config->Pulse; - 8003a0e: 684b ldr r3, [r1, #4] + 8003a42: 684b ldr r3, [r1, #4] TIMx->CCMR2 = tmpccmrx; - 8003a10: 61c5 str r5, [r0, #28] + 8003a44: 61c5 str r5, [r0, #28] TIMx->CCR4 = OC_Config->Pulse; - 8003a12: 6403 str r3, [r0, #64] @ 0x40 + 8003a46: 6403 str r3, [r0, #64] @ 0x40 /* Write to TIMx CCER */ TIMx->CCER = tmpccer; - 8003a14: 6202 str r2, [r0, #32] + 8003a48: 6202 str r2, [r0, #32] } - 8003a16: bd30 pop {r4, r5, pc} - 8003a18: ffffefff .word 0xffffefff - 8003a1c: feff8cff .word 0xfeff8cff - 8003a20: ffffdfff .word 0xffffdfff - 8003a24: 40012c00 .word 0x40012c00 - 8003a28: 40014400 .word 0x40014400 - 8003a2c: 40014800 .word 0x40014800 - 8003a30: ffffbfff .word 0xffffbfff + 8003a4a: bd30 pop {r4, r5, pc} + 8003a4c: ffffefff .word 0xffffefff + 8003a50: feff8cff .word 0xfeff8cff + 8003a54: ffffdfff .word 0xffffdfff + 8003a58: 40012c00 .word 0x40012c00 + 8003a5c: 40014400 .word 0x40014400 + 8003a60: 40014800 .word 0x40014800 + 8003a64: ffffbfff .word 0xffffbfff -08003a34 : +08003a68 : * @param OC_Config The output configuration structure * @retval None */ static void TIM_OC5_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config) { - 8003a34: b570 push {r4, r5, r6, lr} + 8003a68: b570 push {r4, r5, r6, lr} uint32_t tmpccmrx; uint32_t tmpccer; uint32_t tmpcr2; /* Get the TIMx CCER register value */ tmpccer = TIMx->CCER; - 8003a36: 6a06 ldr r6, [r0, #32] + 8003a6a: 6a06 ldr r6, [r0, #32] /* Disable the output: Reset the CCxE Bit */ TIMx->CCER &= ~TIM_CCER_CC5E; - 8003a38: 4c10 ldr r4, [pc, #64] @ (8003a7c ) - 8003a3a: 6a03 ldr r3, [r0, #32] + 8003a6c: 4c10 ldr r4, [pc, #64] @ (8003ab0 ) + 8003a6e: 6a03 ldr r3, [r0, #32] tmpcr2 = TIMx->CR2; /* Get the TIMx CCMR1 register value */ tmpccmrx = TIMx->CCMR3; /* Reset the Output Compare Mode Bits */ tmpccmrx &= ~(TIM_CCMR3_OC5M); - 8003a3c: 4a10 ldr r2, [pc, #64] @ (8003a80 ) + 8003a70: 4a10 ldr r2, [pc, #64] @ (8003ab4 ) TIMx->CCER &= ~TIM_CCER_CC5E; - 8003a3e: 4023 ands r3, r4 - 8003a40: 6203 str r3, [r0, #32] + 8003a72: 4023 ands r3, r4 + 8003a74: 6203 str r3, [r0, #32] tmpcr2 = TIMx->CR2; - 8003a42: 6843 ldr r3, [r0, #4] + 8003a76: 6843 ldr r3, [r0, #4] tmpccmrx = TIMx->CCMR3; - 8003a44: 6d45 ldr r5, [r0, #84] @ 0x54 + 8003a78: 6d45 ldr r5, [r0, #84] @ 0x54 tmpccmrx &= ~(TIM_CCMR3_OC5M); - 8003a46: 4015 ands r5, r2 + 8003a7a: 4015 ands r5, r2 /* Select the Output Compare Mode */ tmpccmrx |= OC_Config->OCMode; - 8003a48: 680a ldr r2, [r1, #0] - 8003a4a: 4315 orrs r5, r2 + 8003a7c: 680a ldr r2, [r1, #0] + 8003a7e: 4315 orrs r5, r2 /* Reset the Output Polarity level */ tmpccer &= ~TIM_CCER_CC5P; - 8003a4c: 4a0d ldr r2, [pc, #52] @ (8003a84 ) - 8003a4e: 4016 ands r6, r2 + 8003a80: 4a0d ldr r2, [pc, #52] @ (8003ab8 ) + 8003a82: 4016 ands r6, r2 /* Set the Output Compare Polarity */ tmpccer |= (OC_Config->OCPolarity << 16U); - 8003a50: 688a ldr r2, [r1, #8] - 8003a52: 0412 lsls r2, r2, #16 - 8003a54: 4332 orrs r2, r6 + 8003a84: 688a ldr r2, [r1, #8] + 8003a86: 0412 lsls r2, r2, #16 + 8003a88: 4332 orrs r2, r6 if (IS_TIM_BREAK_INSTANCE(TIMx)) - 8003a56: 4e0c ldr r6, [pc, #48] @ (8003a88 ) - 8003a58: 42b0 cmp r0, r6 - 8003a5a: d005 beq.n 8003a68 - 8003a5c: 4e0b ldr r6, [pc, #44] @ (8003a8c ) - 8003a5e: 42b0 cmp r0, r6 - 8003a60: d002 beq.n 8003a68 - 8003a62: 4e0b ldr r6, [pc, #44] @ (8003a90 ) - 8003a64: 42b0 cmp r0, r6 - 8003a66: d103 bne.n 8003a70 + 8003a8a: 4e0c ldr r6, [pc, #48] @ (8003abc ) + 8003a8c: 42b0 cmp r0, r6 + 8003a8e: d005 beq.n 8003a9c + 8003a90: 4e0b ldr r6, [pc, #44] @ (8003ac0 ) + 8003a92: 42b0 cmp r0, r6 + 8003a94: d002 beq.n 8003a9c + 8003a96: 4e0b ldr r6, [pc, #44] @ (8003ac4 ) + 8003a98: 42b0 cmp r0, r6 + 8003a9a: d103 bne.n 8003aa4 { /* Reset the Output Compare IDLE State */ tmpcr2 &= ~TIM_CR2_OIS5; - 8003a68: 401c ands r4, r3 + 8003a9c: 401c ands r4, r3 /* Set the Output Idle state */ tmpcr2 |= (OC_Config->OCIdleState << 8U); - 8003a6a: 694b ldr r3, [r1, #20] - 8003a6c: 021b lsls r3, r3, #8 - 8003a6e: 4323 orrs r3, r4 + 8003a9e: 694b ldr r3, [r1, #20] + 8003aa0: 021b lsls r3, r3, #8 + 8003aa2: 4323 orrs r3, r4 } /* Write to TIMx CR2 */ TIMx->CR2 = tmpcr2; - 8003a70: 6043 str r3, [r0, #4] + 8003aa4: 6043 str r3, [r0, #4] /* Write to TIMx CCMR3 */ TIMx->CCMR3 = tmpccmrx; /* Set the Capture Compare Register value */ TIMx->CCR5 = OC_Config->Pulse; - 8003a72: 684b ldr r3, [r1, #4] + 8003aa6: 684b ldr r3, [r1, #4] TIMx->CCMR3 = tmpccmrx; - 8003a74: 6545 str r5, [r0, #84] @ 0x54 + 8003aa8: 6545 str r5, [r0, #84] @ 0x54 TIMx->CCR5 = OC_Config->Pulse; - 8003a76: 6583 str r3, [r0, #88] @ 0x58 + 8003aaa: 6583 str r3, [r0, #88] @ 0x58 /* Write to TIMx CCER */ TIMx->CCER = tmpccer; - 8003a78: 6202 str r2, [r0, #32] + 8003aac: 6202 str r2, [r0, #32] } - 8003a7a: bd70 pop {r4, r5, r6, pc} - 8003a7c: fffeffff .word 0xfffeffff - 8003a80: fffeff8f .word 0xfffeff8f - 8003a84: fffdffff .word 0xfffdffff - 8003a88: 40012c00 .word 0x40012c00 - 8003a8c: 40014400 .word 0x40014400 - 8003a90: 40014800 .word 0x40014800 + 8003aae: bd70 pop {r4, r5, r6, pc} + 8003ab0: fffeffff .word 0xfffeffff + 8003ab4: fffeff8f .word 0xfffeff8f + 8003ab8: fffdffff .word 0xfffdffff + 8003abc: 40012c00 .word 0x40012c00 + 8003ac0: 40014400 .word 0x40014400 + 8003ac4: 40014800 .word 0x40014800 -08003a94 : +08003ac8 : * @param OC_Config The output configuration structure * @retval None */ static void TIM_OC6_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config) { - 8003a94: b530 push {r4, r5, lr} + 8003ac8: b530 push {r4, r5, lr} /* Get the TIMx CCER register value */ tmpccer = TIMx->CCER; /* Disable the output: Reset the CCxE Bit */ TIMx->CCER &= ~TIM_CCER_CC6E; - 8003a96: 4a12 ldr r2, [pc, #72] @ (8003ae0 ) + 8003aca: 4a12 ldr r2, [pc, #72] @ (8003b14 ) tmpccer = TIMx->CCER; - 8003a98: 6a04 ldr r4, [r0, #32] + 8003acc: 6a04 ldr r4, [r0, #32] TIMx->CCER &= ~TIM_CCER_CC6E; - 8003a9a: 6a03 ldr r3, [r0, #32] + 8003ace: 6a03 ldr r3, [r0, #32] tmpcr2 = TIMx->CR2; /* Get the TIMx CCMR1 register value */ tmpccmrx = TIMx->CCMR3; /* Reset the Output Compare Mode Bits */ tmpccmrx &= ~(TIM_CCMR3_OC6M); - 8003a9c: 4d11 ldr r5, [pc, #68] @ (8003ae4 ) + 8003ad0: 4d11 ldr r5, [pc, #68] @ (8003b18 ) TIMx->CCER &= ~TIM_CCER_CC6E; - 8003a9e: 4013 ands r3, r2 - 8003aa0: 6203 str r3, [r0, #32] + 8003ad2: 4013 ands r3, r2 + 8003ad4: 6203 str r3, [r0, #32] tmpcr2 = TIMx->CR2; - 8003aa2: 6843 ldr r3, [r0, #4] + 8003ad6: 6843 ldr r3, [r0, #4] tmpccmrx = TIMx->CCMR3; - 8003aa4: 6d42 ldr r2, [r0, #84] @ 0x54 + 8003ad8: 6d42 ldr r2, [r0, #84] @ 0x54 tmpccmrx &= ~(TIM_CCMR3_OC6M); - 8003aa6: 402a ands r2, r5 + 8003ada: 402a ands r2, r5 /* Select the Output Compare Mode */ tmpccmrx |= (OC_Config->OCMode << 8U); - 8003aa8: 680d ldr r5, [r1, #0] - 8003aaa: 022d lsls r5, r5, #8 - 8003aac: 4315 orrs r5, r2 + 8003adc: 680d ldr r5, [r1, #0] + 8003ade: 022d lsls r5, r5, #8 + 8003ae0: 4315 orrs r5, r2 /* Reset the Output Polarity level */ tmpccer &= (uint32_t)~TIM_CCER_CC6P; - 8003aae: 4a0e ldr r2, [pc, #56] @ (8003ae8 ) - 8003ab0: 4014 ands r4, r2 + 8003ae2: 4a0e ldr r2, [pc, #56] @ (8003b1c ) + 8003ae4: 4014 ands r4, r2 /* Set the Output Compare Polarity */ tmpccer |= (OC_Config->OCPolarity << 20U); - 8003ab2: 688a ldr r2, [r1, #8] - 8003ab4: 0512 lsls r2, r2, #20 - 8003ab6: 4322 orrs r2, r4 + 8003ae6: 688a ldr r2, [r1, #8] + 8003ae8: 0512 lsls r2, r2, #20 + 8003aea: 4322 orrs r2, r4 if (IS_TIM_BREAK_INSTANCE(TIMx)) - 8003ab8: 4c0c ldr r4, [pc, #48] @ (8003aec ) - 8003aba: 42a0 cmp r0, r4 - 8003abc: d005 beq.n 8003aca - 8003abe: 4c0c ldr r4, [pc, #48] @ (8003af0 ) - 8003ac0: 42a0 cmp r0, r4 - 8003ac2: d002 beq.n 8003aca - 8003ac4: 4c0b ldr r4, [pc, #44] @ (8003af4 ) - 8003ac6: 42a0 cmp r0, r4 - 8003ac8: d104 bne.n 8003ad4 + 8003aec: 4c0c ldr r4, [pc, #48] @ (8003b20 ) + 8003aee: 42a0 cmp r0, r4 + 8003af0: d005 beq.n 8003afe + 8003af2: 4c0c ldr r4, [pc, #48] @ (8003b24 ) + 8003af4: 42a0 cmp r0, r4 + 8003af6: d002 beq.n 8003afe + 8003af8: 4c0b ldr r4, [pc, #44] @ (8003b28 ) + 8003afa: 42a0 cmp r0, r4 + 8003afc: d104 bne.n 8003b08 { /* Reset the Output Compare IDLE State */ tmpcr2 &= ~TIM_CR2_OIS6; - 8003aca: 4c0b ldr r4, [pc, #44] @ (8003af8 ) - 8003acc: 401c ands r4, r3 + 8003afe: 4c0b ldr r4, [pc, #44] @ (8003b2c ) + 8003b00: 401c ands r4, r3 /* Set the Output Idle state */ tmpcr2 |= (OC_Config->OCIdleState << 10U); - 8003ace: 694b ldr r3, [r1, #20] - 8003ad0: 029b lsls r3, r3, #10 - 8003ad2: 4323 orrs r3, r4 + 8003b02: 694b ldr r3, [r1, #20] + 8003b04: 029b lsls r3, r3, #10 + 8003b06: 4323 orrs r3, r4 } /* Write to TIMx CR2 */ TIMx->CR2 = tmpcr2; - 8003ad4: 6043 str r3, [r0, #4] + 8003b08: 6043 str r3, [r0, #4] /* Write to TIMx CCMR3 */ TIMx->CCMR3 = tmpccmrx; /* Set the Capture Compare Register value */ TIMx->CCR6 = OC_Config->Pulse; - 8003ad6: 684b ldr r3, [r1, #4] + 8003b0a: 684b ldr r3, [r1, #4] TIMx->CCMR3 = tmpccmrx; - 8003ad8: 6545 str r5, [r0, #84] @ 0x54 + 8003b0c: 6545 str r5, [r0, #84] @ 0x54 TIMx->CCR6 = OC_Config->Pulse; - 8003ada: 65c3 str r3, [r0, #92] @ 0x5c + 8003b0e: 65c3 str r3, [r0, #92] @ 0x5c /* Write to TIMx CCER */ TIMx->CCER = tmpccer; - 8003adc: 6202 str r2, [r0, #32] + 8003b10: 6202 str r2, [r0, #32] } - 8003ade: bd30 pop {r4, r5, pc} - 8003ae0: ffefffff .word 0xffefffff - 8003ae4: feff8fff .word 0xfeff8fff - 8003ae8: ffdfffff .word 0xffdfffff - 8003aec: 40012c00 .word 0x40012c00 - 8003af0: 40014400 .word 0x40014400 - 8003af4: 40014800 .word 0x40014800 - 8003af8: fffbffff .word 0xfffbffff + 8003b12: bd30 pop {r4, r5, pc} + 8003b14: ffefffff .word 0xffefffff + 8003b18: feff8fff .word 0xfeff8fff + 8003b1c: ffdfffff .word 0xffdfffff + 8003b20: 40012c00 .word 0x40012c00 + 8003b24: 40014400 .word 0x40014400 + 8003b28: 40014800 .word 0x40014800 + 8003b2c: fffbffff .word 0xfffbffff -08003afc : +08003b30 : __HAL_TIM_DISABLE(htim); - 8003afc: 6803 ldr r3, [r0, #0] - 8003afe: 4a08 ldr r2, [pc, #32] @ (8003b20 ) - 8003b00: 6a19 ldr r1, [r3, #32] - 8003b02: 4211 tst r1, r2 - 8003b04: d107 bne.n 8003b16 - 8003b06: 6a19 ldr r1, [r3, #32] - 8003b08: 4a06 ldr r2, [pc, #24] @ (8003b24 ) - 8003b0a: 4211 tst r1, r2 - 8003b0c: d103 bne.n 8003b16 - 8003b0e: 2101 movs r1, #1 - 8003b10: 681a ldr r2, [r3, #0] - 8003b12: 438a bics r2, r1 - 8003b14: 601a str r2, [r3, #0] + 8003b30: 6803 ldr r3, [r0, #0] + 8003b32: 4a08 ldr r2, [pc, #32] @ (8003b54 ) + 8003b34: 6a19 ldr r1, [r3, #32] + 8003b36: 4211 tst r1, r2 + 8003b38: d107 bne.n 8003b4a + 8003b3a: 6a19 ldr r1, [r3, #32] + 8003b3c: 4a06 ldr r2, [pc, #24] @ (8003b58 ) + 8003b3e: 4211 tst r1, r2 + 8003b40: d103 bne.n 8003b4a + 8003b42: 2101 movs r1, #1 + 8003b44: 681a ldr r2, [r3, #0] + 8003b46: 438a bics r2, r1 + 8003b48: 601a str r2, [r3, #0] htim->State = HAL_TIM_STATE_READY; - 8003b16: 2301 movs r3, #1 - 8003b18: 303d adds r0, #61 @ 0x3d - 8003b1a: 7003 strb r3, [r0, #0] + 8003b4a: 2301 movs r3, #1 + 8003b4c: 303d adds r0, #61 @ 0x3d + 8003b4e: 7003 strb r3, [r0, #0] } - 8003b1c: 2000 movs r0, #0 - 8003b1e: 4770 bx lr - 8003b20: 00001111 .word 0x00001111 - 8003b24: 00000444 .word 0x00000444 + 8003b50: 2000 movs r0, #0 + 8003b52: 4770 bx lr + 8003b54: 00001111 .word 0x00001111 + 8003b58: 00000444 .word 0x00000444 -08003b28 : +08003b5c : if (htim->State != HAL_TIM_STATE_READY) - 8003b28: 0001 movs r1, r0 + 8003b5c: 0001 movs r1, r0 { - 8003b2a: 0003 movs r3, r0 + 8003b5e: 0003 movs r3, r0 return HAL_ERROR; - 8003b2c: 2001 movs r0, #1 + 8003b60: 2001 movs r0, #1 { - 8003b2e: b510 push {r4, lr} + 8003b62: b510 push {r4, lr} if (htim->State != HAL_TIM_STATE_READY) - 8003b30: 313d adds r1, #61 @ 0x3d - 8003b32: 780c ldrb r4, [r1, #0] - 8003b34: b2e2 uxtb r2, r4 - 8003b36: 4284 cmp r4, r0 - 8003b38: d11c bne.n 8003b74 + 8003b64: 313d adds r1, #61 @ 0x3d + 8003b66: 780c ldrb r4, [r1, #0] + 8003b68: b2e2 uxtb r2, r4 + 8003b6a: 4284 cmp r4, r0 + 8003b6c: d11c bne.n 8003ba8 htim->State = HAL_TIM_STATE_BUSY; - 8003b3a: 1800 adds r0, r0, r0 - 8003b3c: 7008 strb r0, [r1, #0] + 8003b6e: 1800 adds r0, r0, r0 + 8003b70: 7008 strb r0, [r1, #0] __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE); - 8003b3e: 681b ldr r3, [r3, #0] - 8003b40: 68d9 ldr r1, [r3, #12] - 8003b42: 4311 orrs r1, r2 - 8003b44: 60d9 str r1, [r3, #12] + 8003b72: 681b ldr r3, [r3, #0] + 8003b74: 68d9 ldr r1, [r3, #12] + 8003b76: 4311 orrs r1, r2 + 8003b78: 60d9 str r1, [r3, #12] if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) - 8003b46: 490d ldr r1, [pc, #52] @ (8003b7c ) - 8003b48: 428b cmp r3, r1 - 8003b4a: d006 beq.n 8003b5a - 8003b4c: 2180 movs r1, #128 @ 0x80 - 8003b4e: 05c9 lsls r1, r1, #23 - 8003b50: 428b cmp r3, r1 - 8003b52: d002 beq.n 8003b5a - 8003b54: 490a ldr r1, [pc, #40] @ (8003b80 ) - 8003b56: 428b cmp r3, r1 - 8003b58: d10d bne.n 8003b76 + 8003b7a: 490d ldr r1, [pc, #52] @ (8003bb0 ) + 8003b7c: 428b cmp r3, r1 + 8003b7e: d006 beq.n 8003b8e + 8003b80: 2180 movs r1, #128 @ 0x80 + 8003b82: 05c9 lsls r1, r1, #23 + 8003b84: 428b cmp r3, r1 + 8003b86: d002 beq.n 8003b8e + 8003b88: 490a ldr r1, [pc, #40] @ (8003bb4 ) + 8003b8a: 428b cmp r3, r1 + 8003b8c: d10d bne.n 8003baa tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; - 8003b5a: 689a ldr r2, [r3, #8] - 8003b5c: 4909 ldr r1, [pc, #36] @ (8003b84 ) - 8003b5e: 400a ands r2, r1 + 8003b8e: 689a ldr r2, [r3, #8] + 8003b90: 4909 ldr r1, [pc, #36] @ (8003bb8 ) + 8003b92: 400a ands r2, r1 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) - 8003b60: 2a06 cmp r2, #6 - 8003b62: d006 beq.n 8003b72 - 8003b64: 3907 subs r1, #7 - 8003b66: 428a cmp r2, r1 - 8003b68: d003 beq.n 8003b72 + 8003b94: 2a06 cmp r2, #6 + 8003b96: d006 beq.n 8003ba6 + 8003b98: 3907 subs r1, #7 + 8003b9a: 428a cmp r2, r1 + 8003b9c: d003 beq.n 8003ba6 __HAL_TIM_ENABLE(htim); - 8003b6a: 2201 movs r2, #1 - 8003b6c: 6819 ldr r1, [r3, #0] - 8003b6e: 430a orrs r2, r1 - 8003b70: 601a str r2, [r3, #0] + 8003b9e: 2201 movs r2, #1 + 8003ba0: 6819 ldr r1, [r3, #0] + 8003ba2: 430a orrs r2, r1 + 8003ba4: 601a str r2, [r3, #0] return HAL_OK; - 8003b72: 2000 movs r0, #0 + 8003ba6: 2000 movs r0, #0 } - 8003b74: bd10 pop {r4, pc} + 8003ba8: bd10 pop {r4, pc} __HAL_TIM_ENABLE(htim); - 8003b76: 6819 ldr r1, [r3, #0] - 8003b78: e7f9 b.n 8003b6e - 8003b7a: 46c0 nop @ (mov r8, r8) - 8003b7c: 40012c00 .word 0x40012c00 - 8003b80: 40000400 .word 0x40000400 - 8003b84: 00010007 .word 0x00010007 + 8003baa: 6819 ldr r1, [r3, #0] + 8003bac: e7f9 b.n 8003ba2 + 8003bae: 46c0 nop @ (mov r8, r8) + 8003bb0: 40012c00 .word 0x40012c00 + 8003bb4: 40000400 .word 0x40000400 + 8003bb8: 00010007 .word 0x00010007 -08003b88 : +08003bbc : __weak void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef *htim) - 8003b88: 4770 bx lr + 8003bbc: 4770 bx lr -08003b8a : +08003bbe : { - 8003b8a: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr} + 8003bbe: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr} HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); - 8003b8c: 223e movs r2, #62 @ 0x3e + 8003bc0: 223e movs r2, #62 @ 0x3e { - 8003b8e: 0003 movs r3, r0 + 8003bc2: 0003 movs r3, r0 HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); - 8003b90: 4694 mov ip, r2 + 8003bc4: 4694 mov ip, r2 HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); - 8003b92: 001f movs r7, r3 + 8003bc6: 001f movs r7, r3 HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); - 8003b94: 4484 add ip, r0 - 8003b96: 4662 mov r2, ip + 8003bc8: 4484 add ip, r0 + 8003bca: 4662 mov r2, ip HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_1); - 8003b98: 001e movs r6, r3 + 8003bcc: 001e movs r6, r3 HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_2); - 8003b9a: 001d movs r5, r3 + 8003bce: 001d movs r5, r3 HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); - 8003b9c: 373f adds r7, #63 @ 0x3f + 8003bd0: 373f adds r7, #63 @ 0x3f HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); - 8003b9e: 7810 ldrb r0, [r2, #0] + 8003bd2: 7810 ldrb r0, [r2, #0] HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); - 8003ba0: 783a ldrb r2, [r7, #0] + 8003bd4: 783a ldrb r2, [r7, #0] HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_1); - 8003ba2: 3644 adds r6, #68 @ 0x44 + 8003bd6: 3644 adds r6, #68 @ 0x44 HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); - 8003ba4: b2d2 uxtb r2, r2 - 8003ba6: 9201 str r2, [sp, #4] + 8003bd8: b2d2 uxtb r2, r2 + 8003bda: 9201 str r2, [sp, #4] HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_2); - 8003ba8: 3545 adds r5, #69 @ 0x45 + 8003bdc: 3545 adds r5, #69 @ 0x45 HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_1); - 8003baa: 7834 ldrb r4, [r6, #0] + 8003bde: 7834 ldrb r4, [r6, #0] HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_2); - 8003bac: 782a ldrb r2, [r5, #0] + 8003be0: 782a ldrb r2, [r5, #0] HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); - 8003bae: b2c0 uxtb r0, r0 + 8003be2: b2c0 uxtb r0, r0 HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_1); - 8003bb0: b2e4 uxtb r4, r4 + 8003be4: b2e4 uxtb r4, r4 HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_2); - 8003bb2: b2d2 uxtb r2, r2 + 8003be6: b2d2 uxtb r2, r2 if (Channel == TIM_CHANNEL_1) - 8003bb4: 2900 cmp r1, #0 - 8003bb6: d114 bne.n 8003be2 + 8003be8: 2900 cmp r1, #0 + 8003bea: d114 bne.n 8003c16 if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY) - 8003bb8: 2801 cmp r0, #1 - 8003bba: d13c bne.n 8003c36 + 8003bec: 2801 cmp r0, #1 + 8003bee: d13c bne.n 8003c6a || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY)) - 8003bbc: 2c01 cmp r4, #1 - 8003bbe: d10f bne.n 8003be0 + 8003bf0: 2c01 cmp r4, #1 + 8003bf2: d10f bne.n 8003c14 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); - 8003bc0: 2202 movs r2, #2 - 8003bc2: 4661 mov r1, ip - 8003bc4: 700a strb r2, [r1, #0] + 8003bf4: 2202 movs r2, #2 + 8003bf6: 4661 mov r1, ip + 8003bf8: 700a strb r2, [r1, #0] TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); - 8003bc6: 7032 strb r2, [r6, #0] + 8003bfa: 7032 strb r2, [r6, #0] TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); - 8003bc8: 681b ldr r3, [r3, #0] + 8003bfc: 681b ldr r3, [r3, #0] assert_param(IS_TIM_CHANNELS(Channel)); tmp = TIM_CCER_CC1E << (Channel & 0x1FU); /* 0x1FU = 31 bits max shift */ /* Reset the CCxE Bit */ TIMx->CCER &= ~tmp; - 8003bca: 6a1a ldr r2, [r3, #32] - 8003bcc: 43a2 bics r2, r4 - 8003bce: 621a str r2, [r3, #32] + 8003bfe: 6a1a ldr r2, [r3, #32] + 8003c00: 43a2 bics r2, r4 + 8003c02: 621a str r2, [r3, #32] /* Set or reset the CCxE Bit */ TIMx->CCER |= (uint32_t)(ChannelState << (Channel & 0x1FU)); /* 0x1FU = 31 bits max shift */ - 8003bd0: 6a1a ldr r2, [r3, #32] - 8003bd2: 4322 orrs r2, r4 - 8003bd4: 621a str r2, [r3, #32] + 8003c04: 6a1a ldr r2, [r3, #32] + 8003c06: 4322 orrs r2, r4 + 8003c08: 621a str r2, [r3, #32] __HAL_TIM_ENABLE(htim); - 8003bd6: 2201 movs r2, #1 + 8003c0a: 2201 movs r2, #1 return HAL_OK; - 8003bd8: 2000 movs r0, #0 + 8003c0c: 2000 movs r0, #0 __HAL_TIM_ENABLE(htim); - 8003bda: 6819 ldr r1, [r3, #0] - 8003bdc: 430a orrs r2, r1 - 8003bde: 601a str r2, [r3, #0] + 8003c0e: 6819 ldr r1, [r3, #0] + 8003c10: 430a orrs r2, r1 + 8003c12: 601a str r2, [r3, #0] } - 8003be0: bdfe pop {r1, r2, r3, r4, r5, r6, r7, pc} + 8003c14: bdfe pop {r1, r2, r3, r4, r5, r6, r7, pc} else if (Channel == TIM_CHANNEL_2) - 8003be2: 2904 cmp r1, #4 - 8003be4: d110 bne.n 8003c08 + 8003c16: 2904 cmp r1, #4 + 8003c18: d110 bne.n 8003c3c return HAL_ERROR; - 8003be6: 2001 movs r0, #1 + 8003c1a: 2001 movs r0, #1 if ((channel_2_state != HAL_TIM_CHANNEL_STATE_READY) - 8003be8: 9901 ldr r1, [sp, #4] - 8003bea: 4281 cmp r1, r0 - 8003bec: d1f8 bne.n 8003be0 + 8003c1c: 9901 ldr r1, [sp, #4] + 8003c1e: 4281 cmp r1, r0 + 8003c20: d1f8 bne.n 8003c14 || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) - 8003bee: 4282 cmp r2, r0 - 8003bf0: d1f6 bne.n 8003be0 + 8003c22: 4282 cmp r2, r0 + 8003c24: d1f6 bne.n 8003c14 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); - 8003bf2: 2202 movs r2, #2 - 8003bf4: 703a strb r2, [r7, #0] + 8003c26: 2202 movs r2, #2 + 8003c28: 703a strb r2, [r7, #0] TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); - 8003bf6: 702a strb r2, [r5, #0] + 8003c2a: 702a strb r2, [r5, #0] TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); - 8003bf8: 681b ldr r3, [r3, #0] + 8003c2c: 681b ldr r3, [r3, #0] TIMx->CCER &= ~tmp; - 8003bfa: 2210 movs r2, #16 - 8003bfc: 6a19 ldr r1, [r3, #32] - 8003bfe: 4391 bics r1, r2 - 8003c00: 6219 str r1, [r3, #32] + 8003c2e: 2210 movs r2, #16 + 8003c30: 6a19 ldr r1, [r3, #32] + 8003c32: 4391 bics r1, r2 + 8003c34: 6219 str r1, [r3, #32] TIMx->CCER |= (uint32_t)(ChannelState << (Channel & 0x1FU)); /* 0x1FU = 31 bits max shift */ - 8003c02: 6a19 ldr r1, [r3, #32] - 8003c04: 430a orrs r2, r1 - 8003c06: e7e5 b.n 8003bd4 + 8003c36: 6a19 ldr r1, [r3, #32] + 8003c38: 430a orrs r2, r1 + 8003c3a: e7e5 b.n 8003c08 if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY) - 8003c08: 2801 cmp r0, #1 - 8003c0a: d114 bne.n 8003c36 + 8003c3c: 2801 cmp r0, #1 + 8003c3e: d114 bne.n 8003c6a || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) - 8003c0c: 9901 ldr r1, [sp, #4] - 8003c0e: 2901 cmp r1, #1 - 8003c10: d1e6 bne.n 8003be0 + 8003c40: 9901 ldr r1, [sp, #4] + 8003c42: 2901 cmp r1, #1 + 8003c44: d1e6 bne.n 8003c14 || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY) - 8003c12: 2c01 cmp r4, #1 - 8003c14: d1e4 bne.n 8003be0 + 8003c46: 2c01 cmp r4, #1 + 8003c48: d1e4 bne.n 8003c14 || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) - 8003c16: 2a01 cmp r2, #1 - 8003c18: d1e2 bne.n 8003be0 + 8003c4a: 2a01 cmp r2, #1 + 8003c4c: d1e2 bne.n 8003c14 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); - 8003c1a: 4660 mov r0, ip - 8003c1c: 3101 adds r1, #1 - 8003c1e: 7001 strb r1, [r0, #0] + 8003c4e: 4660 mov r0, ip + 8003c50: 3101 adds r1, #1 + 8003c52: 7001 strb r1, [r0, #0] TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); - 8003c20: 7039 strb r1, [r7, #0] + 8003c54: 7039 strb r1, [r7, #0] TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); - 8003c22: 7031 strb r1, [r6, #0] + 8003c56: 7031 strb r1, [r6, #0] TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); - 8003c24: 7029 strb r1, [r5, #0] + 8003c58: 7029 strb r1, [r5, #0] TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); - 8003c26: 681b ldr r3, [r3, #0] + 8003c5a: 681b ldr r3, [r3, #0] TIMx->CCER &= ~tmp; - 8003c28: 6a19 ldr r1, [r3, #32] - 8003c2a: 4391 bics r1, r2 - 8003c2c: 6219 str r1, [r3, #32] + 8003c5c: 6a19 ldr r1, [r3, #32] + 8003c5e: 4391 bics r1, r2 + 8003c60: 6219 str r1, [r3, #32] TIMx->CCER |= (uint32_t)(ChannelState << (Channel & 0x1FU)); /* 0x1FU = 31 bits max shift */ - 8003c2e: 6a19 ldr r1, [r3, #32] - 8003c30: 430a orrs r2, r1 - 8003c32: 621a str r2, [r3, #32] - 8003c34: e7e1 b.n 8003bfa + 8003c62: 6a19 ldr r1, [r3, #32] + 8003c64: 430a orrs r2, r1 + 8003c66: 621a str r2, [r3, #32] + 8003c68: e7e1 b.n 8003c2e return HAL_ERROR; - 8003c36: 2001 movs r0, #1 - 8003c38: e7d2 b.n 8003be0 + 8003c6a: 2001 movs r0, #1 + 8003c6c: e7d2 b.n 8003c14 -08003c3a : +08003c6e : __weak void HAL_TIM_OC_DelayElapsedCallback(TIM_HandleTypeDef *htim) - 8003c3a: 4770 bx lr + 8003c6e: 4770 bx lr -08003c3c : +08003c70 : __weak void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim) - 8003c3c: 4770 bx lr + 8003c70: 4770 bx lr -08003c3e : +08003c72 : __weak void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim) - 8003c3e: 4770 bx lr + 8003c72: 4770 bx lr -08003c40 : +08003c74 : __weak void HAL_TIM_TriggerCallback(TIM_HandleTypeDef *htim) - 8003c40: 4770 bx lr + 8003c74: 4770 bx lr ... -08003c44 : +08003c78 : if ((itflag & (TIM_FLAG_CC1)) == (TIM_FLAG_CC1)) - 8003c44: 2202 movs r2, #2 + 8003c78: 2202 movs r2, #2 uint32_t itsource = htim->Instance->DIER; - 8003c46: 6803 ldr r3, [r0, #0] + 8003c7a: 6803 ldr r3, [r0, #0] { - 8003c48: b570 push {r4, r5, r6, lr} + 8003c7c: b570 push {r4, r5, r6, lr} uint32_t itsource = htim->Instance->DIER; - 8003c4a: 68dd ldr r5, [r3, #12] + 8003c7e: 68dd ldr r5, [r3, #12] uint32_t itflag = htim->Instance->SR; - 8003c4c: 691e ldr r6, [r3, #16] + 8003c80: 691e ldr r6, [r3, #16] { - 8003c4e: 0004 movs r4, r0 + 8003c82: 0004 movs r4, r0 if ((itflag & (TIM_FLAG_CC1)) == (TIM_FLAG_CC1)) - 8003c50: 4216 tst r6, r2 - 8003c52: d00d beq.n 8003c70 + 8003c84: 4216 tst r6, r2 + 8003c86: d00d beq.n 8003ca4 if ((itsource & (TIM_IT_CC1)) == (TIM_IT_CC1)) - 8003c54: 4215 tst r5, r2 - 8003c56: d00b beq.n 8003c70 + 8003c88: 4215 tst r5, r2 + 8003c8a: d00b beq.n 8003ca4 __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC1); - 8003c58: 3a05 subs r2, #5 - 8003c5a: 611a str r2, [r3, #16] + 8003c8c: 3a05 subs r2, #5 + 8003c8e: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; - 8003c5c: 3204 adds r2, #4 - 8003c5e: 7702 strb r2, [r0, #28] + 8003c90: 3204 adds r2, #4 + 8003c92: 7702 strb r2, [r0, #28] if ((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U) - 8003c60: 699b ldr r3, [r3, #24] - 8003c62: 079b lsls r3, r3, #30 - 8003c64: d100 bne.n 8003c68 - 8003c66: e07c b.n 8003d62 + 8003c94: 699b ldr r3, [r3, #24] + 8003c96: 079b lsls r3, r3, #30 + 8003c98: d100 bne.n 8003c9c + 8003c9a: e07c b.n 8003d96 HAL_TIM_IC_CaptureCallback(htim); - 8003c68: f7ff ffe8 bl 8003c3c + 8003c9c: f7ff ffe8 bl 8003c70 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; - 8003c6c: 2300 movs r3, #0 - 8003c6e: 7723 strb r3, [r4, #28] + 8003ca0: 2300 movs r3, #0 + 8003ca2: 7723 strb r3, [r4, #28] if ((itflag & (TIM_FLAG_CC2)) == (TIM_FLAG_CC2)) - 8003c70: 2304 movs r3, #4 - 8003c72: 421e tst r6, r3 - 8003c74: d012 beq.n 8003c9c + 8003ca4: 2304 movs r3, #4 + 8003ca6: 421e tst r6, r3 + 8003ca8: d012 beq.n 8003cd0 if ((itsource & (TIM_IT_CC2)) == (TIM_IT_CC2)) - 8003c76: 421d tst r5, r3 - 8003c78: d010 beq.n 8003c9c + 8003caa: 421d tst r5, r3 + 8003cac: d010 beq.n 8003cd0 __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC2); - 8003c7a: 2205 movs r2, #5 - 8003c7c: 6823 ldr r3, [r4, #0] - 8003c7e: 4252 negs r2, r2 - 8003c80: 611a str r2, [r3, #16] + 8003cae: 2205 movs r2, #5 + 8003cb0: 6823 ldr r3, [r4, #0] + 8003cb2: 4252 negs r2, r2 + 8003cb4: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; - 8003c82: 3207 adds r2, #7 - 8003c84: 7722 strb r2, [r4, #28] + 8003cb6: 3207 adds r2, #7 + 8003cb8: 7722 strb r2, [r4, #28] if ((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U) - 8003c86: 699a ldr r2, [r3, #24] - 8003c88: 23c0 movs r3, #192 @ 0xc0 - 8003c8a: 009b lsls r3, r3, #2 + 8003cba: 699a ldr r2, [r3, #24] + 8003cbc: 23c0 movs r3, #192 @ 0xc0 + 8003cbe: 009b lsls r3, r3, #2 HAL_TIM_IC_CaptureCallback(htim); - 8003c8c: 0020 movs r0, r4 + 8003cc0: 0020 movs r0, r4 if ((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U) - 8003c8e: 421a tst r2, r3 - 8003c90: d100 bne.n 8003c94 - 8003c92: e06c b.n 8003d6e + 8003cc2: 421a tst r2, r3 + 8003cc4: d100 bne.n 8003cc8 + 8003cc6: e06c b.n 8003da2 HAL_TIM_IC_CaptureCallback(htim); - 8003c94: f7ff ffd2 bl 8003c3c + 8003cc8: f7ff ffd2 bl 8003c70 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; - 8003c98: 2300 movs r3, #0 - 8003c9a: 7723 strb r3, [r4, #28] + 8003ccc: 2300 movs r3, #0 + 8003cce: 7723 strb r3, [r4, #28] if ((itflag & (TIM_FLAG_CC3)) == (TIM_FLAG_CC3)) - 8003c9c: 2308 movs r3, #8 - 8003c9e: 421e tst r6, r3 - 8003ca0: d00f beq.n 8003cc2 + 8003cd0: 2308 movs r3, #8 + 8003cd2: 421e tst r6, r3 + 8003cd4: d00f beq.n 8003cf6 if ((itsource & (TIM_IT_CC3)) == (TIM_IT_CC3)) - 8003ca2: 421d tst r5, r3 - 8003ca4: d00d beq.n 8003cc2 + 8003cd6: 421d tst r5, r3 + 8003cd8: d00d beq.n 8003cf6 __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC3); - 8003ca6: 2209 movs r2, #9 - 8003ca8: 6823 ldr r3, [r4, #0] - 8003caa: 4252 negs r2, r2 - 8003cac: 611a str r2, [r3, #16] + 8003cda: 2209 movs r2, #9 + 8003cdc: 6823 ldr r3, [r4, #0] + 8003cde: 4252 negs r2, r2 + 8003ce0: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; - 8003cae: 320d adds r2, #13 - 8003cb0: 7722 strb r2, [r4, #28] + 8003ce2: 320d adds r2, #13 + 8003ce4: 7722 strb r2, [r4, #28] if ((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U) - 8003cb2: 69db ldr r3, [r3, #28] + 8003ce6: 69db ldr r3, [r3, #28] HAL_TIM_IC_CaptureCallback(htim); - 8003cb4: 0020 movs r0, r4 + 8003ce8: 0020 movs r0, r4 if ((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U) - 8003cb6: 079b lsls r3, r3, #30 - 8003cb8: d05f beq.n 8003d7a + 8003cea: 079b lsls r3, r3, #30 + 8003cec: d05f beq.n 8003dae HAL_TIM_IC_CaptureCallback(htim); - 8003cba: f7ff ffbf bl 8003c3c + 8003cee: f7ff ffbf bl 8003c70 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; - 8003cbe: 2300 movs r3, #0 - 8003cc0: 7723 strb r3, [r4, #28] + 8003cf2: 2300 movs r3, #0 + 8003cf4: 7723 strb r3, [r4, #28] if ((itflag & (TIM_FLAG_CC4)) == (TIM_FLAG_CC4)) - 8003cc2: 2310 movs r3, #16 - 8003cc4: 421e tst r6, r3 - 8003cc6: d011 beq.n 8003cec + 8003cf6: 2310 movs r3, #16 + 8003cf8: 421e tst r6, r3 + 8003cfa: d011 beq.n 8003d20 if ((itsource & (TIM_IT_CC4)) == (TIM_IT_CC4)) - 8003cc8: 421d tst r5, r3 - 8003cca: d00f beq.n 8003cec + 8003cfc: 421d tst r5, r3 + 8003cfe: d00f beq.n 8003d20 __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC4); - 8003ccc: 2211 movs r2, #17 - 8003cce: 6823 ldr r3, [r4, #0] - 8003cd0: 4252 negs r2, r2 - 8003cd2: 611a str r2, [r3, #16] + 8003d00: 2211 movs r2, #17 + 8003d02: 6823 ldr r3, [r4, #0] + 8003d04: 4252 negs r2, r2 + 8003d06: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; - 8003cd4: 3219 adds r2, #25 - 8003cd6: 7722 strb r2, [r4, #28] + 8003d08: 3219 adds r2, #25 + 8003d0a: 7722 strb r2, [r4, #28] if ((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U) - 8003cd8: 69da ldr r2, [r3, #28] - 8003cda: 23c0 movs r3, #192 @ 0xc0 - 8003cdc: 009b lsls r3, r3, #2 + 8003d0c: 69da ldr r2, [r3, #28] + 8003d0e: 23c0 movs r3, #192 @ 0xc0 + 8003d10: 009b lsls r3, r3, #2 HAL_TIM_IC_CaptureCallback(htim); - 8003cde: 0020 movs r0, r4 + 8003d12: 0020 movs r0, r4 if ((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U) - 8003ce0: 421a tst r2, r3 - 8003ce2: d050 beq.n 8003d86 + 8003d14: 421a tst r2, r3 + 8003d16: d050 beq.n 8003dba HAL_TIM_IC_CaptureCallback(htim); - 8003ce4: f7ff ffaa bl 8003c3c + 8003d18: f7ff ffaa bl 8003c70 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; - 8003ce8: 2300 movs r3, #0 - 8003cea: 7723 strb r3, [r4, #28] + 8003d1c: 2300 movs r3, #0 + 8003d1e: 7723 strb r3, [r4, #28] if ((itflag & (TIM_FLAG_UPDATE)) == (TIM_FLAG_UPDATE)) - 8003cec: 2301 movs r3, #1 - 8003cee: 421e tst r6, r3 - 8003cf0: d008 beq.n 8003d04 + 8003d20: 2301 movs r3, #1 + 8003d22: 421e tst r6, r3 + 8003d24: d008 beq.n 8003d38 if ((itsource & (TIM_IT_UPDATE)) == (TIM_IT_UPDATE)) - 8003cf2: 421d tst r5, r3 - 8003cf4: d006 beq.n 8003d04 + 8003d26: 421d tst r5, r3 + 8003d28: d006 beq.n 8003d38 __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_UPDATE); - 8003cf6: 2202 movs r2, #2 - 8003cf8: 6823 ldr r3, [r4, #0] - 8003cfa: 4252 negs r2, r2 + 8003d2a: 2202 movs r2, #2 + 8003d2c: 6823 ldr r3, [r4, #0] + 8003d2e: 4252 negs r2, r2 HAL_TIM_PeriodElapsedCallback(htim); - 8003cfc: 0020 movs r0, r4 + 8003d30: 0020 movs r0, r4 __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_UPDATE); - 8003cfe: 611a str r2, [r3, #16] + 8003d32: 611a str r2, [r3, #16] HAL_TIM_PeriodElapsedCallback(htim); - 8003d00: f7fc fd70 bl 80007e4 + 8003d34: f7fc fd56 bl 80007e4 if (((itflag & (TIM_FLAG_BREAK)) == (TIM_FLAG_BREAK)) || \ - 8003d04: 2382 movs r3, #130 @ 0x82 - 8003d06: 019b lsls r3, r3, #6 - 8003d08: 421e tst r6, r3 - 8003d0a: d007 beq.n 8003d1c + 8003d38: 2382 movs r3, #130 @ 0x82 + 8003d3a: 019b lsls r3, r3, #6 + 8003d3c: 421e tst r6, r3 + 8003d3e: d007 beq.n 8003d50 if ((itsource & (TIM_IT_BREAK)) == (TIM_IT_BREAK)) - 8003d0c: 062b lsls r3, r5, #24 - 8003d0e: d505 bpl.n 8003d1c + 8003d40: 062b lsls r3, r5, #24 + 8003d42: d505 bpl.n 8003d50 __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_BREAK | TIM_FLAG_SYSTEM_BREAK); - 8003d10: 6823 ldr r3, [r4, #0] - 8003d12: 4a20 ldr r2, [pc, #128] @ (8003d94 ) + 8003d44: 6823 ldr r3, [r4, #0] + 8003d46: 4a20 ldr r2, [pc, #128] @ (8003dc8 ) HAL_TIMEx_BreakCallback(htim); - 8003d14: 0020 movs r0, r4 + 8003d48: 0020 movs r0, r4 __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_BREAK | TIM_FLAG_SYSTEM_BREAK); - 8003d16: 611a str r2, [r3, #16] + 8003d4a: 611a str r2, [r3, #16] HAL_TIMEx_BreakCallback(htim); - 8003d18: f000 fbb5 bl 8004486 + 8003d4c: f000 fbb5 bl 80044ba if ((itflag & (TIM_FLAG_BREAK2)) == (TIM_FLAG_BREAK2)) - 8003d1c: 05f3 lsls r3, r6, #23 - 8003d1e: d507 bpl.n 8003d30 + 8003d50: 05f3 lsls r3, r6, #23 + 8003d52: d507 bpl.n 8003d64 if ((itsource & (TIM_IT_BREAK)) == (TIM_IT_BREAK)) - 8003d20: 062b lsls r3, r5, #24 - 8003d22: d505 bpl.n 8003d30 + 8003d54: 062b lsls r3, r5, #24 + 8003d56: d505 bpl.n 8003d64 __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_BREAK2); - 8003d24: 6823 ldr r3, [r4, #0] - 8003d26: 4a1c ldr r2, [pc, #112] @ (8003d98 ) + 8003d58: 6823 ldr r3, [r4, #0] + 8003d5a: 4a1c ldr r2, [pc, #112] @ (8003dcc ) HAL_TIMEx_Break2Callback(htim); - 8003d28: 0020 movs r0, r4 + 8003d5c: 0020 movs r0, r4 __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_BREAK2); - 8003d2a: 611a str r2, [r3, #16] + 8003d5e: 611a str r2, [r3, #16] HAL_TIMEx_Break2Callback(htim); - 8003d2c: f000 fbac bl 8004488 + 8003d60: f000 fbac bl 80044bc if ((itflag & (TIM_FLAG_TRIGGER)) == (TIM_FLAG_TRIGGER)) - 8003d30: 2340 movs r3, #64 @ 0x40 - 8003d32: 421e tst r6, r3 - 8003d34: d008 beq.n 8003d48 + 8003d64: 2340 movs r3, #64 @ 0x40 + 8003d66: 421e tst r6, r3 + 8003d68: d008 beq.n 8003d7c if ((itsource & (TIM_IT_TRIGGER)) == (TIM_IT_TRIGGER)) - 8003d36: 421d tst r5, r3 - 8003d38: d006 beq.n 8003d48 + 8003d6a: 421d tst r5, r3 + 8003d6c: d006 beq.n 8003d7c __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_TRIGGER); - 8003d3a: 2241 movs r2, #65 @ 0x41 - 8003d3c: 6823 ldr r3, [r4, #0] - 8003d3e: 4252 negs r2, r2 + 8003d6e: 2241 movs r2, #65 @ 0x41 + 8003d70: 6823 ldr r3, [r4, #0] + 8003d72: 4252 negs r2, r2 HAL_TIM_TriggerCallback(htim); - 8003d40: 0020 movs r0, r4 + 8003d74: 0020 movs r0, r4 __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_TRIGGER); - 8003d42: 611a str r2, [r3, #16] + 8003d76: 611a str r2, [r3, #16] HAL_TIM_TriggerCallback(htim); - 8003d44: f7ff ff7c bl 8003c40 + 8003d78: f7ff ff7c bl 8003c74 if ((itflag & (TIM_FLAG_COM)) == (TIM_FLAG_COM)) - 8003d48: 2320 movs r3, #32 - 8003d4a: 421e tst r6, r3 - 8003d4c: d008 beq.n 8003d60 + 8003d7c: 2320 movs r3, #32 + 8003d7e: 421e tst r6, r3 + 8003d80: d008 beq.n 8003d94 if ((itsource & (TIM_IT_COM)) == (TIM_IT_COM)) - 8003d4e: 421d tst r5, r3 - 8003d50: d006 beq.n 8003d60 + 8003d82: 421d tst r5, r3 + 8003d84: d006 beq.n 8003d94 __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_COM); - 8003d52: 2221 movs r2, #33 @ 0x21 - 8003d54: 6823 ldr r3, [r4, #0] - 8003d56: 4252 negs r2, r2 + 8003d86: 2221 movs r2, #33 @ 0x21 + 8003d88: 6823 ldr r3, [r4, #0] + 8003d8a: 4252 negs r2, r2 HAL_TIMEx_CommutCallback(htim); - 8003d58: 0020 movs r0, r4 + 8003d8c: 0020 movs r0, r4 __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_COM); - 8003d5a: 611a str r2, [r3, #16] + 8003d8e: 611a str r2, [r3, #16] HAL_TIMEx_CommutCallback(htim); - 8003d5c: f000 fb92 bl 8004484 + 8003d90: f000 fb92 bl 80044b8 } - 8003d60: bd70 pop {r4, r5, r6, pc} + 8003d94: bd70 pop {r4, r5, r6, pc} HAL_TIM_OC_DelayElapsedCallback(htim); - 8003d62: f7ff ff6a bl 8003c3a + 8003d96: f7ff ff6a bl 8003c6e HAL_TIM_PWM_PulseFinishedCallback(htim); - 8003d66: 0020 movs r0, r4 - 8003d68: f7ff ff69 bl 8003c3e - 8003d6c: e77e b.n 8003c6c + 8003d9a: 0020 movs r0, r4 + 8003d9c: f7ff ff69 bl 8003c72 + 8003da0: e77e b.n 8003ca0 HAL_TIM_OC_DelayElapsedCallback(htim); - 8003d6e: f7ff ff64 bl 8003c3a + 8003da2: f7ff ff64 bl 8003c6e HAL_TIM_PWM_PulseFinishedCallback(htim); - 8003d72: 0020 movs r0, r4 - 8003d74: f7ff ff63 bl 8003c3e - 8003d78: e78e b.n 8003c98 + 8003da6: 0020 movs r0, r4 + 8003da8: f7ff ff63 bl 8003c72 + 8003dac: e78e b.n 8003ccc HAL_TIM_OC_DelayElapsedCallback(htim); - 8003d7a: f7ff ff5e bl 8003c3a + 8003dae: f7ff ff5e bl 8003c6e HAL_TIM_PWM_PulseFinishedCallback(htim); - 8003d7e: 0020 movs r0, r4 - 8003d80: f7ff ff5d bl 8003c3e - 8003d84: e79b b.n 8003cbe + 8003db2: 0020 movs r0, r4 + 8003db4: f7ff ff5d bl 8003c72 + 8003db8: e79b b.n 8003cf2 HAL_TIM_OC_DelayElapsedCallback(htim); - 8003d86: f7ff ff58 bl 8003c3a + 8003dba: f7ff ff58 bl 8003c6e HAL_TIM_PWM_PulseFinishedCallback(htim); - 8003d8a: 0020 movs r0, r4 - 8003d8c: f7ff ff57 bl 8003c3e - 8003d90: e7aa b.n 8003ce8 - 8003d92: 46c0 nop @ (mov r8, r8) - 8003d94: ffffdf7f .word 0xffffdf7f - 8003d98: fffffeff .word 0xfffffeff + 8003dbe: 0020 movs r0, r4 + 8003dc0: f7ff ff57 bl 8003c72 + 8003dc4: e7aa b.n 8003d1c + 8003dc6: 46c0 nop @ (mov r8, r8) + 8003dc8: ffffdf7f .word 0xffffdf7f + 8003dcc: fffffeff .word 0xfffffeff -08003d9c : +08003dd0 : { - 8003d9c: b510 push {r4, lr} + 8003dd0: b510 push {r4, lr} if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx)) - 8003d9e: 4c1b ldr r4, [pc, #108] @ (8003e0c ) + 8003dd2: 4c1b ldr r4, [pc, #108] @ (8003e40 ) tmpcr1 = TIMx->CR1; - 8003da0: 6803 ldr r3, [r0, #0] + 8003dd4: 6803 ldr r3, [r0, #0] if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx)) - 8003da2: 42a0 cmp r0, r4 - 8003da4: d006 beq.n 8003db4 - 8003da6: 2280 movs r2, #128 @ 0x80 - 8003da8: 05d2 lsls r2, r2, #23 - 8003daa: 4290 cmp r0, r2 - 8003dac: d002 beq.n 8003db4 - 8003dae: 4a18 ldr r2, [pc, #96] @ (8003e10 ) - 8003db0: 4290 cmp r0, r2 - 8003db2: d108 bne.n 8003dc6 + 8003dd6: 42a0 cmp r0, r4 + 8003dd8: d006 beq.n 8003de8 + 8003dda: 2280 movs r2, #128 @ 0x80 + 8003ddc: 05d2 lsls r2, r2, #23 + 8003dde: 4290 cmp r0, r2 + 8003de0: d002 beq.n 8003de8 + 8003de2: 4a18 ldr r2, [pc, #96] @ (8003e44 ) + 8003de4: 4290 cmp r0, r2 + 8003de6: d108 bne.n 8003dfa tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS); - 8003db4: 2270 movs r2, #112 @ 0x70 - 8003db6: 4393 bics r3, r2 + 8003de8: 2270 movs r2, #112 @ 0x70 + 8003dea: 4393 bics r3, r2 tmpcr1 |= Structure->CounterMode; - 8003db8: 684a ldr r2, [r1, #4] - 8003dba: 4313 orrs r3, r2 + 8003dec: 684a ldr r2, [r1, #4] + 8003dee: 4313 orrs r3, r2 tmpcr1 &= ~TIM_CR1_CKD; - 8003dbc: 4a15 ldr r2, [pc, #84] @ (8003e14 ) - 8003dbe: 401a ands r2, r3 + 8003df0: 4a15 ldr r2, [pc, #84] @ (8003e48 ) + 8003df2: 401a ands r2, r3 tmpcr1 |= (uint32_t)Structure->ClockDivision; - 8003dc0: 68cb ldr r3, [r1, #12] - 8003dc2: 4313 orrs r3, r2 - 8003dc4: e008 b.n 8003dd8 + 8003df4: 68cb ldr r3, [r1, #12] + 8003df6: 4313 orrs r3, r2 + 8003df8: e008 b.n 8003e0c if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx)) - 8003dc6: 4a14 ldr r2, [pc, #80] @ (8003e18 ) - 8003dc8: 4290 cmp r0, r2 - 8003dca: d0f7 beq.n 8003dbc - 8003dcc: 4a13 ldr r2, [pc, #76] @ (8003e1c ) - 8003dce: 4290 cmp r0, r2 - 8003dd0: d0f4 beq.n 8003dbc - 8003dd2: 4a13 ldr r2, [pc, #76] @ (8003e20 ) - 8003dd4: 4290 cmp r0, r2 - 8003dd6: d0f1 beq.n 8003dbc + 8003dfa: 4a14 ldr r2, [pc, #80] @ (8003e4c ) + 8003dfc: 4290 cmp r0, r2 + 8003dfe: d0f7 beq.n 8003df0 + 8003e00: 4a13 ldr r2, [pc, #76] @ (8003e50 ) + 8003e02: 4290 cmp r0, r2 + 8003e04: d0f4 beq.n 8003df0 + 8003e06: 4a13 ldr r2, [pc, #76] @ (8003e54 ) + 8003e08: 4290 cmp r0, r2 + 8003e0a: d0f1 beq.n 8003df0 MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload); - 8003dd8: 2280 movs r2, #128 @ 0x80 - 8003dda: 4393 bics r3, r2 - 8003ddc: 694a ldr r2, [r1, #20] - 8003dde: 4313 orrs r3, r2 + 8003e0c: 2280 movs r2, #128 @ 0x80 + 8003e0e: 4393 bics r3, r2 + 8003e10: 694a ldr r2, [r1, #20] + 8003e12: 4313 orrs r3, r2 TIMx->ARR = (uint32_t)Structure->Period ; - 8003de0: 688a ldr r2, [r1, #8] - 8003de2: 62c2 str r2, [r0, #44] @ 0x2c + 8003e14: 688a ldr r2, [r1, #8] + 8003e16: 62c2 str r2, [r0, #44] @ 0x2c TIMx->PSC = Structure->Prescaler; - 8003de4: 680a ldr r2, [r1, #0] - 8003de6: 6282 str r2, [r0, #40] @ 0x28 + 8003e18: 680a ldr r2, [r1, #0] + 8003e1a: 6282 str r2, [r0, #40] @ 0x28 if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx)) - 8003de8: 42a0 cmp r0, r4 - 8003dea: d005 beq.n 8003df8 - 8003dec: 4a0b ldr r2, [pc, #44] @ (8003e1c ) - 8003dee: 4290 cmp r0, r2 - 8003df0: d002 beq.n 8003df8 - 8003df2: 4a0b ldr r2, [pc, #44] @ (8003e20 ) - 8003df4: 4290 cmp r0, r2 - 8003df6: d101 bne.n 8003dfc + 8003e1c: 42a0 cmp r0, r4 + 8003e1e: d005 beq.n 8003e2c + 8003e20: 4a0b ldr r2, [pc, #44] @ (8003e50 ) + 8003e22: 4290 cmp r0, r2 + 8003e24: d002 beq.n 8003e2c + 8003e26: 4a0b ldr r2, [pc, #44] @ (8003e54 ) + 8003e28: 4290 cmp r0, r2 + 8003e2a: d101 bne.n 8003e30 TIMx->RCR = Structure->RepetitionCounter; - 8003df8: 690a ldr r2, [r1, #16] - 8003dfa: 6302 str r2, [r0, #48] @ 0x30 + 8003e2c: 690a ldr r2, [r1, #16] + 8003e2e: 6302 str r2, [r0, #48] @ 0x30 SET_BIT(TIMx->CR1, TIM_CR1_URS); - 8003dfc: 2204 movs r2, #4 - 8003dfe: 6801 ldr r1, [r0, #0] - 8003e00: 430a orrs r2, r1 - 8003e02: 6002 str r2, [r0, #0] + 8003e30: 2204 movs r2, #4 + 8003e32: 6801 ldr r1, [r0, #0] + 8003e34: 430a orrs r2, r1 + 8003e36: 6002 str r2, [r0, #0] TIMx->EGR = TIM_EGR_UG; - 8003e04: 2201 movs r2, #1 - 8003e06: 6142 str r2, [r0, #20] + 8003e38: 2201 movs r2, #1 + 8003e3a: 6142 str r2, [r0, #20] TIMx->CR1 = tmpcr1; - 8003e08: 6003 str r3, [r0, #0] + 8003e3c: 6003 str r3, [r0, #0] } - 8003e0a: bd10 pop {r4, pc} - 8003e0c: 40012c00 .word 0x40012c00 - 8003e10: 40000400 .word 0x40000400 - 8003e14: fffffcff .word 0xfffffcff - 8003e18: 40002000 .word 0x40002000 - 8003e1c: 40014400 .word 0x40014400 - 8003e20: 40014800 .word 0x40014800 + 8003e3e: bd10 pop {r4, pc} + 8003e40: 40012c00 .word 0x40012c00 + 8003e44: 40000400 .word 0x40000400 + 8003e48: fffffcff .word 0xfffffcff + 8003e4c: 40002000 .word 0x40002000 + 8003e50: 40014400 .word 0x40014400 + 8003e54: 40014800 .word 0x40014800 -08003e24 : +08003e58 : { - 8003e24: b570 push {r4, r5, r6, lr} - 8003e26: 0004 movs r4, r0 + 8003e58: b570 push {r4, r5, r6, lr} + 8003e5a: 0004 movs r4, r0 return HAL_ERROR; - 8003e28: 2001 movs r0, #1 + 8003e5c: 2001 movs r0, #1 if (htim == NULL) - 8003e2a: 2c00 cmp r4, #0 - 8003e2c: d023 beq.n 8003e76 + 8003e5e: 2c00 cmp r4, #0 + 8003e60: d023 beq.n 8003eaa if (htim->State == HAL_TIM_STATE_RESET) - 8003e2e: 0025 movs r5, r4 - 8003e30: 353d adds r5, #61 @ 0x3d - 8003e32: 782b ldrb r3, [r5, #0] - 8003e34: b2da uxtb r2, r3 - 8003e36: 2b00 cmp r3, #0 - 8003e38: d105 bne.n 8003e46 + 8003e62: 0025 movs r5, r4 + 8003e64: 353d adds r5, #61 @ 0x3d + 8003e66: 782b ldrb r3, [r5, #0] + 8003e68: b2da uxtb r2, r3 + 8003e6a: 2b00 cmp r3, #0 + 8003e6c: d105 bne.n 8003e7a htim->Lock = HAL_UNLOCKED; - 8003e3a: 0023 movs r3, r4 - 8003e3c: 333c adds r3, #60 @ 0x3c + 8003e6e: 0023 movs r3, r4 + 8003e70: 333c adds r3, #60 @ 0x3c HAL_TIM_Base_MspInit(htim); - 8003e3e: 0020 movs r0, r4 + 8003e72: 0020 movs r0, r4 htim->Lock = HAL_UNLOCKED; - 8003e40: 701a strb r2, [r3, #0] + 8003e74: 701a strb r2, [r3, #0] HAL_TIM_Base_MspInit(htim); - 8003e42: f7fe fb37 bl 80024b4 + 8003e76: f7fe fb35 bl 80024e4 htim->State = HAL_TIM_STATE_BUSY; - 8003e46: 2302 movs r3, #2 - 8003e48: 702b strb r3, [r5, #0] + 8003e7a: 2302 movs r3, #2 + 8003e7c: 702b strb r3, [r5, #0] TIM_Base_SetConfig(htim->Instance, &htim->Init); - 8003e4a: 6820 ldr r0, [r4, #0] - 8003e4c: 1d21 adds r1, r4, #4 - 8003e4e: f7ff ffa5 bl 8003d9c + 8003e7e: 6820 ldr r0, [r4, #0] + 8003e80: 1d21 adds r1, r4, #4 + 8003e82: f7ff ffa5 bl 8003dd0 htim->DMABurstState = HAL_DMA_BURST_STATE_READY; - 8003e52: 0022 movs r2, r4 - 8003e54: 2301 movs r3, #1 + 8003e86: 0022 movs r2, r4 + 8003e88: 2301 movs r3, #1 return HAL_OK; - 8003e56: 2000 movs r0, #0 + 8003e8a: 2000 movs r0, #0 htim->DMABurstState = HAL_DMA_BURST_STATE_READY; - 8003e58: 3248 adds r2, #72 @ 0x48 - 8003e5a: 7013 strb r3, [r2, #0] + 8003e8c: 3248 adds r2, #72 @ 0x48 + 8003e8e: 7013 strb r3, [r2, #0] TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); - 8003e5c: 3447 adds r4, #71 @ 0x47 + 8003e90: 3447 adds r4, #71 @ 0x47 TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); - 8003e5e: 3a0a subs r2, #10 - 8003e60: 7013 strb r3, [r2, #0] - 8003e62: 7053 strb r3, [r2, #1] - 8003e64: 7093 strb r3, [r2, #2] - 8003e66: 70d3 strb r3, [r2, #3] - 8003e68: 7113 strb r3, [r2, #4] - 8003e6a: 7153 strb r3, [r2, #5] + 8003e92: 3a0a subs r2, #10 + 8003e94: 7013 strb r3, [r2, #0] + 8003e96: 7053 strb r3, [r2, #1] + 8003e98: 7093 strb r3, [r2, #2] + 8003e9a: 70d3 strb r3, [r2, #3] + 8003e9c: 7113 strb r3, [r2, #4] + 8003e9e: 7153 strb r3, [r2, #5] TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); - 8003e6c: 7193 strb r3, [r2, #6] - 8003e6e: 71d3 strb r3, [r2, #7] - 8003e70: 7213 strb r3, [r2, #8] - 8003e72: 7023 strb r3, [r4, #0] + 8003ea0: 7193 strb r3, [r2, #6] + 8003ea2: 71d3 strb r3, [r2, #7] + 8003ea4: 7213 strb r3, [r2, #8] + 8003ea6: 7023 strb r3, [r4, #0] htim->State = HAL_TIM_STATE_READY; - 8003e74: 702b strb r3, [r5, #0] + 8003ea8: 702b strb r3, [r5, #0] } - 8003e76: bd70 pop {r4, r5, r6, pc} + 8003eaa: bd70 pop {r4, r5, r6, pc} -08003e78 : +08003eac : { - 8003e78: b570 push {r4, r5, r6, lr} - 8003e7a: 0004 movs r4, r0 + 8003eac: b570 push {r4, r5, r6, lr} + 8003eae: 0004 movs r4, r0 return HAL_ERROR; - 8003e7c: 2001 movs r0, #1 + 8003eb0: 2001 movs r0, #1 if (htim == NULL) - 8003e7e: 2c00 cmp r4, #0 - 8003e80: d023 beq.n 8003eca + 8003eb2: 2c00 cmp r4, #0 + 8003eb4: d023 beq.n 8003efe if (htim->State == HAL_TIM_STATE_RESET) - 8003e82: 0025 movs r5, r4 - 8003e84: 353d adds r5, #61 @ 0x3d - 8003e86: 782b ldrb r3, [r5, #0] - 8003e88: b2da uxtb r2, r3 - 8003e8a: 2b00 cmp r3, #0 - 8003e8c: d105 bne.n 8003e9a + 8003eb6: 0025 movs r5, r4 + 8003eb8: 353d adds r5, #61 @ 0x3d + 8003eba: 782b ldrb r3, [r5, #0] + 8003ebc: b2da uxtb r2, r3 + 8003ebe: 2b00 cmp r3, #0 + 8003ec0: d105 bne.n 8003ece htim->Lock = HAL_UNLOCKED; - 8003e8e: 0023 movs r3, r4 - 8003e90: 333c adds r3, #60 @ 0x3c + 8003ec2: 0023 movs r3, r4 + 8003ec4: 333c adds r3, #60 @ 0x3c HAL_TIM_PWM_MspInit(htim); - 8003e92: 0020 movs r0, r4 + 8003ec6: 0020 movs r0, r4 htim->Lock = HAL_UNLOCKED; - 8003e94: 701a strb r2, [r3, #0] + 8003ec8: 701a strb r2, [r3, #0] HAL_TIM_PWM_MspInit(htim); - 8003e96: f7ff fe77 bl 8003b88 + 8003eca: f7ff fe77 bl 8003bbc htim->State = HAL_TIM_STATE_BUSY; - 8003e9a: 2302 movs r3, #2 - 8003e9c: 702b strb r3, [r5, #0] + 8003ece: 2302 movs r3, #2 + 8003ed0: 702b strb r3, [r5, #0] TIM_Base_SetConfig(htim->Instance, &htim->Init); - 8003e9e: 6820 ldr r0, [r4, #0] - 8003ea0: 1d21 adds r1, r4, #4 - 8003ea2: f7ff ff7b bl 8003d9c + 8003ed2: 6820 ldr r0, [r4, #0] + 8003ed4: 1d21 adds r1, r4, #4 + 8003ed6: f7ff ff7b bl 8003dd0 htim->DMABurstState = HAL_DMA_BURST_STATE_READY; - 8003ea6: 0022 movs r2, r4 - 8003ea8: 2301 movs r3, #1 + 8003eda: 0022 movs r2, r4 + 8003edc: 2301 movs r3, #1 return HAL_OK; - 8003eaa: 2000 movs r0, #0 + 8003ede: 2000 movs r0, #0 htim->DMABurstState = HAL_DMA_BURST_STATE_READY; - 8003eac: 3248 adds r2, #72 @ 0x48 - 8003eae: 7013 strb r3, [r2, #0] + 8003ee0: 3248 adds r2, #72 @ 0x48 + 8003ee2: 7013 strb r3, [r2, #0] TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); - 8003eb0: 3447 adds r4, #71 @ 0x47 + 8003ee4: 3447 adds r4, #71 @ 0x47 TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); - 8003eb2: 3a0a subs r2, #10 - 8003eb4: 7013 strb r3, [r2, #0] - 8003eb6: 7053 strb r3, [r2, #1] - 8003eb8: 7093 strb r3, [r2, #2] - 8003eba: 70d3 strb r3, [r2, #3] - 8003ebc: 7113 strb r3, [r2, #4] - 8003ebe: 7153 strb r3, [r2, #5] + 8003ee6: 3a0a subs r2, #10 + 8003ee8: 7013 strb r3, [r2, #0] + 8003eea: 7053 strb r3, [r2, #1] + 8003eec: 7093 strb r3, [r2, #2] + 8003eee: 70d3 strb r3, [r2, #3] + 8003ef0: 7113 strb r3, [r2, #4] + 8003ef2: 7153 strb r3, [r2, #5] TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); - 8003ec0: 7193 strb r3, [r2, #6] - 8003ec2: 71d3 strb r3, [r2, #7] - 8003ec4: 7213 strb r3, [r2, #8] - 8003ec6: 7023 strb r3, [r4, #0] + 8003ef4: 7193 strb r3, [r2, #6] + 8003ef6: 71d3 strb r3, [r2, #7] + 8003ef8: 7213 strb r3, [r2, #8] + 8003efa: 7023 strb r3, [r4, #0] htim->State = HAL_TIM_STATE_READY; - 8003ec8: 702b strb r3, [r5, #0] + 8003efc: 702b strb r3, [r5, #0] } - 8003eca: bd70 pop {r4, r5, r6, pc} + 8003efe: bd70 pop {r4, r5, r6, pc} -08003ecc : +08003f00 : { - 8003ecc: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr} - 8003ece: 0004 movs r4, r0 - 8003ed0: 000d movs r5, r1 + 8003f00: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr} + 8003f02: 0004 movs r4, r0 + 8003f04: 000d movs r5, r1 return HAL_ERROR; - 8003ed2: 2001 movs r0, #1 + 8003f06: 2001 movs r0, #1 if (htim == NULL) - 8003ed4: 2c00 cmp r4, #0 - 8003ed6: d047 beq.n 8003f68 + 8003f08: 2c00 cmp r4, #0 + 8003f0a: d047 beq.n 8003f9c if (htim->State == HAL_TIM_STATE_RESET) - 8003ed8: 0026 movs r6, r4 - 8003eda: 363d adds r6, #61 @ 0x3d - 8003edc: 7833 ldrb r3, [r6, #0] - 8003ede: b2da uxtb r2, r3 - 8003ee0: 2b00 cmp r3, #0 - 8003ee2: d105 bne.n 8003ef0 + 8003f0c: 0026 movs r6, r4 + 8003f0e: 363d adds r6, #61 @ 0x3d + 8003f10: 7833 ldrb r3, [r6, #0] + 8003f12: b2da uxtb r2, r3 + 8003f14: 2b00 cmp r3, #0 + 8003f16: d105 bne.n 8003f24 htim->Lock = HAL_UNLOCKED; - 8003ee4: 0023 movs r3, r4 - 8003ee6: 333c adds r3, #60 @ 0x3c + 8003f18: 0023 movs r3, r4 + 8003f1a: 333c adds r3, #60 @ 0x3c HAL_TIM_Encoder_MspInit(htim); - 8003ee8: 0020 movs r0, r4 + 8003f1c: 0020 movs r0, r4 htim->Lock = HAL_UNLOCKED; - 8003eea: 701a strb r2, [r3, #0] + 8003f1e: 701a strb r2, [r3, #0] HAL_TIM_Encoder_MspInit(htim); - 8003eec: f7fe fb3c bl 8002568 + 8003f20: f7fe fb3a bl 8002598 htim->State = HAL_TIM_STATE_BUSY; - 8003ef0: 2302 movs r3, #2 + 8003f24: 2302 movs r3, #2 htim->Instance->SMCR &= ~(TIM_SMCR_SMS | TIM_SMCR_ECE); - 8003ef2: 0021 movs r1, r4 + 8003f26: 0021 movs r1, r4 htim->State = HAL_TIM_STATE_BUSY; - 8003ef4: 7033 strb r3, [r6, #0] + 8003f28: 7033 strb r3, [r6, #0] htim->Instance->SMCR &= ~(TIM_SMCR_SMS | TIM_SMCR_ECE); - 8003ef6: c980 ldmia r1!, {r7} - 8003ef8: 4a1c ldr r2, [pc, #112] @ (8003f6c ) - 8003efa: 68bb ldr r3, [r7, #8] + 8003f2a: c980 ldmia r1!, {r7} + 8003f2c: 4a1c ldr r2, [pc, #112] @ (8003fa0 ) + 8003f2e: 68bb ldr r3, [r7, #8] TIM_Base_SetConfig(htim->Instance, &htim->Init); - 8003efc: 0038 movs r0, r7 + 8003f30: 0038 movs r0, r7 htim->Instance->SMCR &= ~(TIM_SMCR_SMS | TIM_SMCR_ECE); - 8003efe: 4013 ands r3, r2 - 8003f00: 60bb str r3, [r7, #8] + 8003f32: 4013 ands r3, r2 + 8003f34: 60bb str r3, [r7, #8] TIM_Base_SetConfig(htim->Instance, &htim->Init); - 8003f02: f7ff ff4b bl 8003d9c + 8003f36: f7ff ff4b bl 8003dd0 tmpsmcr = htim->Instance->SMCR; - 8003f06: 68b9 ldr r1, [r7, #8] + 8003f3a: 68b9 ldr r1, [r7, #8] tmpsmcr |= sConfig->EncoderMode; - 8003f08: 682a ldr r2, [r5, #0] + 8003f3c: 682a ldr r2, [r5, #0] tmpccmr1 = htim->Instance->CCMR1; - 8003f0a: 69bb ldr r3, [r7, #24] + 8003f3e: 69bb ldr r3, [r7, #24] tmpsmcr |= sConfig->EncoderMode; - 8003f0c: 4311 orrs r1, r2 + 8003f40: 4311 orrs r1, r2 tmpccmr1 &= ~(TIM_CCMR1_CC1S | TIM_CCMR1_CC2S); - 8003f0e: 4a18 ldr r2, [pc, #96] @ (8003f70 ) + 8003f42: 4a18 ldr r2, [pc, #96] @ (8003fa4 ) tmpsmcr |= sConfig->EncoderMode; - 8003f10: 9101 str r1, [sp, #4] + 8003f44: 9101 str r1, [sp, #4] tmpccmr1 &= ~(TIM_CCMR1_CC1S | TIM_CCMR1_CC2S); - 8003f12: 4013 ands r3, r2 + 8003f46: 4013 ands r3, r2 tmpccmr1 |= (sConfig->IC1Selection | (sConfig->IC2Selection << 8U)); - 8003f14: 69aa ldr r2, [r5, #24] - 8003f16: 68a9 ldr r1, [r5, #8] - 8003f18: 0212 lsls r2, r2, #8 - 8003f1a: 430a orrs r2, r1 - 8003f1c: 431a orrs r2, r3 + 8003f48: 69aa ldr r2, [r5, #24] + 8003f4a: 68a9 ldr r1, [r5, #8] + 8003f4c: 0212 lsls r2, r2, #8 + 8003f4e: 430a orrs r2, r1 + 8003f50: 431a orrs r2, r3 tmpccmr1 &= ~(TIM_CCMR1_IC1F | TIM_CCMR1_IC2F); - 8003f1e: 4b15 ldr r3, [pc, #84] @ (8003f74 ) + 8003f52: 4b15 ldr r3, [pc, #84] @ (8003fa8 ) tmpccmr1 |= (sConfig->IC1Filter << 4U) | (sConfig->IC2Filter << 12U); - 8003f20: 6929 ldr r1, [r5, #16] + 8003f54: 6929 ldr r1, [r5, #16] tmpccmr1 &= ~(TIM_CCMR1_IC1F | TIM_CCMR1_IC2F); - 8003f22: 401a ands r2, r3 + 8003f56: 401a ands r2, r3 tmpccmr1 |= sConfig->IC1Prescaler | (sConfig->IC2Prescaler << 8U); - 8003f24: 69eb ldr r3, [r5, #28] + 8003f58: 69eb ldr r3, [r5, #28] tmpccmr1 |= (sConfig->IC1Filter << 4U) | (sConfig->IC2Filter << 12U); - 8003f26: 0109 lsls r1, r1, #4 + 8003f5a: 0109 lsls r1, r1, #4 tmpccmr1 |= sConfig->IC1Prescaler | (sConfig->IC2Prescaler << 8U); - 8003f28: 021b lsls r3, r3, #8 + 8003f5c: 021b lsls r3, r3, #8 tmpccmr1 |= (sConfig->IC1Filter << 4U) | (sConfig->IC2Filter << 12U); - 8003f2a: 430b orrs r3, r1 - 8003f2c: 68e9 ldr r1, [r5, #12] + 8003f5e: 430b orrs r3, r1 + 8003f60: 68e9 ldr r1, [r5, #12] tmpccer = htim->Instance->CCER; - 8003f2e: 6a38 ldr r0, [r7, #32] + 8003f62: 6a38 ldr r0, [r7, #32] tmpccmr1 |= (sConfig->IC1Filter << 4U) | (sConfig->IC2Filter << 12U); - 8003f30: 430b orrs r3, r1 - 8003f32: 6a29 ldr r1, [r5, #32] - 8003f34: 0309 lsls r1, r1, #12 - 8003f36: 430b orrs r3, r1 - 8003f38: 4313 orrs r3, r2 + 8003f64: 430b orrs r3, r1 + 8003f66: 6a29 ldr r1, [r5, #32] + 8003f68: 0309 lsls r1, r1, #12 + 8003f6a: 430b orrs r3, r1 + 8003f6c: 4313 orrs r3, r2 tmpccer &= ~(TIM_CCER_CC1NP | TIM_CCER_CC2NP); - 8003f3a: 22aa movs r2, #170 @ 0xaa - 8003f3c: 4390 bics r0, r2 + 8003f6e: 22aa movs r2, #170 @ 0xaa + 8003f70: 4390 bics r0, r2 tmpccer |= sConfig->IC1Polarity | (sConfig->IC2Polarity << 4U); - 8003f3e: 696a ldr r2, [r5, #20] - 8003f40: 686d ldr r5, [r5, #4] - 8003f42: 0112 lsls r2, r2, #4 + 8003f72: 696a ldr r2, [r5, #20] + 8003f74: 686d ldr r5, [r5, #4] + 8003f76: 0112 lsls r2, r2, #4 htim->Instance->SMCR = tmpsmcr; - 8003f44: 9901 ldr r1, [sp, #4] + 8003f78: 9901 ldr r1, [sp, #4] tmpccer |= sConfig->IC1Polarity | (sConfig->IC2Polarity << 4U); - 8003f46: 432a orrs r2, r5 - 8003f48: 4302 orrs r2, r0 + 8003f7a: 432a orrs r2, r5 + 8003f7c: 4302 orrs r2, r0 htim->Instance->SMCR = tmpsmcr; - 8003f4a: 60b9 str r1, [r7, #8] + 8003f7e: 60b9 str r1, [r7, #8] htim->Instance->CCMR1 = tmpccmr1; - 8003f4c: 61bb str r3, [r7, #24] + 8003f80: 61bb str r3, [r7, #24] htim->Instance->CCER = tmpccer; - 8003f4e: 623a str r2, [r7, #32] + 8003f82: 623a str r2, [r7, #32] htim->DMABurstState = HAL_DMA_BURST_STATE_READY; - 8003f50: 0022 movs r2, r4 - 8003f52: 2301 movs r3, #1 + 8003f84: 0022 movs r2, r4 + 8003f86: 2301 movs r3, #1 return HAL_OK; - 8003f54: 2000 movs r0, #0 + 8003f88: 2000 movs r0, #0 htim->DMABurstState = HAL_DMA_BURST_STATE_READY; - 8003f56: 3248 adds r2, #72 @ 0x48 - 8003f58: 7013 strb r3, [r2, #0] + 8003f8a: 3248 adds r2, #72 @ 0x48 + 8003f8c: 7013 strb r3, [r2, #0] TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); - 8003f5a: 3445 adds r4, #69 @ 0x45 + 8003f8e: 3445 adds r4, #69 @ 0x45 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); - 8003f5c: 3a0a subs r2, #10 - 8003f5e: 7013 strb r3, [r2, #0] + 8003f90: 3a0a subs r2, #10 + 8003f92: 7013 strb r3, [r2, #0] TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); - 8003f60: 7053 strb r3, [r2, #1] + 8003f94: 7053 strb r3, [r2, #1] TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); - 8003f62: 7193 strb r3, [r2, #6] + 8003f96: 7193 strb r3, [r2, #6] TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); - 8003f64: 7023 strb r3, [r4, #0] + 8003f98: 7023 strb r3, [r4, #0] htim->State = HAL_TIM_STATE_READY; - 8003f66: 7033 strb r3, [r6, #0] + 8003f9a: 7033 strb r3, [r6, #0] } - 8003f68: bdfe pop {r1, r2, r3, r4, r5, r6, r7, pc} - 8003f6a: 46c0 nop @ (mov r8, r8) - 8003f6c: fffebff8 .word 0xfffebff8 - 8003f70: fffffcfc .word 0xfffffcfc - 8003f74: ffff0303 .word 0xffff0303 + 8003f9c: bdfe pop {r1, r2, r3, r4, r5, r6, r7, pc} + 8003f9e: 46c0 nop @ (mov r8, r8) + 8003fa0: fffebff8 .word 0xfffebff8 + 8003fa4: fffffcfc .word 0xfffffcfc + 8003fa8: ffff0303 .word 0xffff0303 -08003f78 : +08003fac : TIMx->CCER &= ~TIM_CCER_CC2E; - 8003f78: 2210 movs r2, #16 + 8003fac: 2210 movs r2, #16 { - 8003f7a: b570 push {r4, r5, r6, lr} + 8003fae: b570 push {r4, r5, r6, lr} tmpccer = TIMx->CCER; - 8003f7c: 6a05 ldr r5, [r0, #32] + 8003fb0: 6a05 ldr r5, [r0, #32] TIMx->CCER &= ~TIM_CCER_CC2E; - 8003f7e: 6a03 ldr r3, [r0, #32] + 8003fb2: 6a03 ldr r3, [r0, #32] tmpccmrx &= ~TIM_CCMR1_CC2S; - 8003f80: 4c16 ldr r4, [pc, #88] @ (8003fdc ) + 8003fb4: 4c16 ldr r4, [pc, #88] @ (8004010 ) TIMx->CCER &= ~TIM_CCER_CC2E; - 8003f82: 4393 bics r3, r2 - 8003f84: 6203 str r3, [r0, #32] + 8003fb6: 4393 bics r3, r2 + 8003fb8: 6203 str r3, [r0, #32] tmpcr2 = TIMx->CR2; - 8003f86: 6842 ldr r2, [r0, #4] + 8003fba: 6842 ldr r2, [r0, #4] tmpccmrx = TIMx->CCMR1; - 8003f88: 6983 ldr r3, [r0, #24] + 8003fbc: 6983 ldr r3, [r0, #24] tmpccmrx &= ~TIM_CCMR1_CC2S; - 8003f8a: 4023 ands r3, r4 + 8003fbe: 4023 ands r3, r4 tmpccmrx |= (OC_Config->OCMode << 8U); - 8003f8c: 680c ldr r4, [r1, #0] - 8003f8e: 0224 lsls r4, r4, #8 - 8003f90: 431c orrs r4, r3 + 8003fc0: 680c ldr r4, [r1, #0] + 8003fc2: 0224 lsls r4, r4, #8 + 8003fc4: 431c orrs r4, r3 tmpccer &= ~TIM_CCER_CC2P; - 8003f92: 2320 movs r3, #32 - 8003f94: 439d bics r5, r3 + 8003fc6: 2320 movs r3, #32 + 8003fc8: 439d bics r5, r3 tmpccer |= (OC_Config->OCPolarity << 4U); - 8003f96: 688b ldr r3, [r1, #8] - 8003f98: 011b lsls r3, r3, #4 - 8003f9a: 432b orrs r3, r5 + 8003fca: 688b ldr r3, [r1, #8] + 8003fcc: 011b lsls r3, r3, #4 + 8003fce: 432b orrs r3, r5 if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_2)) - 8003f9c: 4d10 ldr r5, [pc, #64] @ (8003fe0 ) - 8003f9e: 42a8 cmp r0, r5 - 8003fa0: d10f bne.n 8003fc2 + 8003fd0: 4d10 ldr r5, [pc, #64] @ (8004014 ) + 8003fd2: 42a8 cmp r0, r5 + 8003fd4: d10f bne.n 8003ff6 tmpccer &= ~TIM_CCER_CC2NP; - 8003fa2: 2580 movs r5, #128 @ 0x80 - 8003fa4: 43ab bics r3, r5 - 8003fa6: 001e movs r6, r3 + 8003fd6: 2580 movs r5, #128 @ 0x80 + 8003fd8: 43ab bics r3, r5 + 8003fda: 001e movs r6, r3 tmpccer |= (OC_Config->OCNPolarity << 4U); - 8003fa8: 68cb ldr r3, [r1, #12] + 8003fdc: 68cb ldr r3, [r1, #12] tmpccer &= ~TIM_CCER_CC2NE; - 8003faa: 3d40 subs r5, #64 @ 0x40 + 8003fde: 3d40 subs r5, #64 @ 0x40 tmpccer |= (OC_Config->OCNPolarity << 4U); - 8003fac: 011b lsls r3, r3, #4 - 8003fae: 4333 orrs r3, r6 + 8003fe0: 011b lsls r3, r3, #4 + 8003fe2: 4333 orrs r3, r6 tmpccer &= ~TIM_CCER_CC2NE; - 8003fb0: 43ab bics r3, r5 + 8003fe4: 43ab bics r3, r5 tmpcr2 &= ~TIM_CR2_OIS2N; - 8003fb2: 4d0c ldr r5, [pc, #48] @ (8003fe4 ) + 8003fe6: 4d0c ldr r5, [pc, #48] @ (8004018 ) tmpcr2 |= (OC_Config->OCNIdleState << 2U); - 8003fb4: 698e ldr r6, [r1, #24] + 8003fe8: 698e ldr r6, [r1, #24] tmpcr2 &= ~TIM_CR2_OIS2N; - 8003fb6: 4015 ands r5, r2 + 8003fea: 4015 ands r5, r2 tmpcr2 |= (OC_Config->OCNIdleState << 2U); - 8003fb8: 694a ldr r2, [r1, #20] - 8003fba: 4332 orrs r2, r6 - 8003fbc: 0092 lsls r2, r2, #2 - 8003fbe: 432a orrs r2, r5 - 8003fc0: e005 b.n 8003fce + 8003fec: 694a ldr r2, [r1, #20] + 8003fee: 4332 orrs r2, r6 + 8003ff0: 0092 lsls r2, r2, #2 + 8003ff2: 432a orrs r2, r5 + 8003ff4: e005 b.n 8004002 if (IS_TIM_BREAK_INSTANCE(TIMx)) - 8003fc2: 4d09 ldr r5, [pc, #36] @ (8003fe8 ) - 8003fc4: 42a8 cmp r0, r5 - 8003fc6: d0f4 beq.n 8003fb2 - 8003fc8: 4d08 ldr r5, [pc, #32] @ (8003fec ) - 8003fca: 42a8 cmp r0, r5 - 8003fcc: d0f1 beq.n 8003fb2 + 8003ff6: 4d09 ldr r5, [pc, #36] @ (800401c ) + 8003ff8: 42a8 cmp r0, r5 + 8003ffa: d0f4 beq.n 8003fe6 + 8003ffc: 4d08 ldr r5, [pc, #32] @ (8004020 ) + 8003ffe: 42a8 cmp r0, r5 + 8004000: d0f1 beq.n 8003fe6 TIMx->CR2 = tmpcr2; - 8003fce: 6042 str r2, [r0, #4] + 8004002: 6042 str r2, [r0, #4] TIMx->CCR2 = OC_Config->Pulse; - 8003fd0: 684a ldr r2, [r1, #4] + 8004004: 684a ldr r2, [r1, #4] TIMx->CCMR1 = tmpccmrx; - 8003fd2: 6184 str r4, [r0, #24] + 8004006: 6184 str r4, [r0, #24] TIMx->CCR2 = OC_Config->Pulse; - 8003fd4: 6382 str r2, [r0, #56] @ 0x38 + 8004008: 6382 str r2, [r0, #56] @ 0x38 TIMx->CCER = tmpccer; - 8003fd6: 6203 str r3, [r0, #32] + 800400a: 6203 str r3, [r0, #32] } - 8003fd8: bd70 pop {r4, r5, r6, pc} - 8003fda: 46c0 nop @ (mov r8, r8) - 8003fdc: feff8cff .word 0xfeff8cff - 8003fe0: 40012c00 .word 0x40012c00 - 8003fe4: fffff3ff .word 0xfffff3ff - 8003fe8: 40014400 .word 0x40014400 - 8003fec: 40014800 .word 0x40014800 + 800400c: bd70 pop {r4, r5, r6, pc} + 800400e: 46c0 nop @ (mov r8, r8) + 8004010: feff8cff .word 0xfeff8cff + 8004014: 40012c00 .word 0x40012c00 + 8004018: fffff3ff .word 0xfffff3ff + 800401c: 40014400 .word 0x40014400 + 8004020: 40014800 .word 0x40014800 -08003ff0 : +08004024 : { - 8003ff0: b5f8 push {r3, r4, r5, r6, r7, lr} + 8004024: b5f8 push {r3, r4, r5, r6, r7, lr} __HAL_LOCK(htim); - 8003ff2: 0007 movs r7, r0 - 8003ff4: 373c adds r7, #60 @ 0x3c + 8004026: 0007 movs r7, r0 + 8004028: 373c adds r7, #60 @ 0x3c { - 8003ff6: 0015 movs r5, r2 + 800402a: 0015 movs r5, r2 __HAL_LOCK(htim); - 8003ff8: 783a ldrb r2, [r7, #0] + 800402c: 783a ldrb r2, [r7, #0] { - 8003ffa: 0003 movs r3, r0 - 8003ffc: 000c movs r4, r1 + 800402e: 0003 movs r3, r0 + 8004030: 000c movs r4, r1 __HAL_LOCK(htim); - 8003ffe: 2002 movs r0, #2 - 8004000: 2a01 cmp r2, #1 - 8004002: d00c beq.n 800401e - 8004004: 3801 subs r0, #1 - 8004006: 7038 strb r0, [r7, #0] + 8004032: 2002 movs r0, #2 + 8004034: 2a01 cmp r2, #1 + 8004036: d00c beq.n 8004052 + 8004038: 3801 subs r0, #1 + 800403a: 7038 strb r0, [r7, #0] switch (Channel) - 8004008: 2d0c cmp r5, #12 - 800400a: d051 beq.n 80040b0 - 800400c: d808 bhi.n 8004020 - 800400e: 2d04 cmp r5, #4 - 8004010: d02d beq.n 800406e - 8004012: 2d08 cmp r5, #8 - 8004014: d03c beq.n 8004090 - 8004016: 2d00 cmp r5, #0 - 8004018: d017 beq.n 800404a + 800403c: 2d0c cmp r5, #12 + 800403e: d051 beq.n 80040e4 + 8004040: d808 bhi.n 8004054 + 8004042: 2d04 cmp r5, #4 + 8004044: d02d beq.n 80040a2 + 8004046: 2d08 cmp r5, #8 + 8004048: d03c beq.n 80040c4 + 800404a: 2d00 cmp r5, #0 + 800404c: d017 beq.n 800407e __HAL_UNLOCK(htim); - 800401a: 2300 movs r3, #0 - 800401c: 703b strb r3, [r7, #0] + 800404e: 2300 movs r3, #0 + 8004050: 703b strb r3, [r7, #0] } - 800401e: bdf8 pop {r3, r4, r5, r6, r7, pc} + 8004052: bdf8 pop {r3, r4, r5, r6, r7, pc} switch (Channel) - 8004020: 2d10 cmp r5, #16 - 8004022: d058 beq.n 80040d6 - 8004024: 2d14 cmp r5, #20 - 8004026: d1f8 bne.n 800401a + 8004054: 2d10 cmp r5, #16 + 8004056: d058 beq.n 800410a + 8004058: 2d14 cmp r5, #20 + 800405a: d1f8 bne.n 800404e TIM_OC6_SetConfig(htim->Instance, sConfig); - 8004028: 681d ldr r5, [r3, #0] - 800402a: 0028 movs r0, r5 - 800402c: f7ff fd32 bl 8003a94 + 800405c: 681d ldr r5, [r3, #0] + 800405e: 0028 movs r0, r5 + 8004060: f7ff fd32 bl 8003ac8 htim->Instance->CCMR3 |= TIM_CCMR3_OC6PE; - 8004030: 2380 movs r3, #128 @ 0x80 - 8004032: 6d6a ldr r2, [r5, #84] @ 0x54 - 8004034: 011b lsls r3, r3, #4 - 8004036: 4313 orrs r3, r2 - 8004038: 656b str r3, [r5, #84] @ 0x54 + 8004064: 2380 movs r3, #128 @ 0x80 + 8004066: 6d6a ldr r2, [r5, #84] @ 0x54 + 8004068: 011b lsls r3, r3, #4 + 800406a: 4313 orrs r3, r2 + 800406c: 656b str r3, [r5, #84] @ 0x54 htim->Instance->CCMR3 &= ~TIM_CCMR3_OC6FE; - 800403a: 6d6b ldr r3, [r5, #84] @ 0x54 - 800403c: 4a2e ldr r2, [pc, #184] @ (80040f8 ) - 800403e: 4013 ands r3, r2 - 8004040: 656b str r3, [r5, #84] @ 0x54 + 800406e: 6d6b ldr r3, [r5, #84] @ 0x54 + 8004070: 4a2e ldr r2, [pc, #184] @ (800412c ) + 8004072: 4013 ands r3, r2 + 8004074: 656b str r3, [r5, #84] @ 0x54 htim->Instance->CCMR3 |= sConfig->OCFastMode << 8U; - 8004042: 6923 ldr r3, [r4, #16] - 8004044: 6d6a ldr r2, [r5, #84] @ 0x54 - 8004046: 021b lsls r3, r3, #8 - 8004048: e053 b.n 80040f2 + 8004076: 6923 ldr r3, [r4, #16] + 8004078: 6d6a ldr r2, [r5, #84] @ 0x54 + 800407a: 021b lsls r3, r3, #8 + 800407c: e053 b.n 8004126 TIM_OC1_SetConfig(htim->Instance, sConfig); - 800404a: 681d ldr r5, [r3, #0] - 800404c: 0028 movs r0, r5 - 800404e: f7ff fc45 bl 80038dc + 800407e: 681d ldr r5, [r3, #0] + 8004080: 0028 movs r0, r5 + 8004082: f7ff fc45 bl 8003910 htim->Instance->CCMR1 |= TIM_CCMR1_OC1PE; - 8004052: 2308 movs r3, #8 - 8004054: 69aa ldr r2, [r5, #24] - 8004056: 4313 orrs r3, r2 + 8004086: 2308 movs r3, #8 + 8004088: 69aa ldr r2, [r5, #24] + 800408a: 4313 orrs r3, r2 htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1FE; - 8004058: 2204 movs r2, #4 + 800408c: 2204 movs r2, #4 htim->Instance->CCMR1 |= TIM_CCMR1_OC1PE; - 800405a: 61ab str r3, [r5, #24] + 800408e: 61ab str r3, [r5, #24] htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1FE; - 800405c: 69ab ldr r3, [r5, #24] - 800405e: 4393 bics r3, r2 - 8004060: 61ab str r3, [r5, #24] + 8004090: 69ab ldr r3, [r5, #24] + 8004092: 4393 bics r3, r2 + 8004094: 61ab str r3, [r5, #24] htim->Instance->CCMR1 |= sConfig->OCFastMode; - 8004062: 69ab ldr r3, [r5, #24] - 8004064: 6922 ldr r2, [r4, #16] + 8004096: 69ab ldr r3, [r5, #24] + 8004098: 6922 ldr r2, [r4, #16] htim->Instance->CCMR1 |= sConfig->OCFastMode << 8U; - 8004066: 4313 orrs r3, r2 - 8004068: 61ab str r3, [r5, #24] + 800409a: 4313 orrs r3, r2 + 800409c: 61ab str r3, [r5, #24] HAL_StatusTypeDef status = HAL_OK; - 800406a: 2000 movs r0, #0 - 800406c: e7d5 b.n 800401a + 800409e: 2000 movs r0, #0 + 80040a0: e7d5 b.n 800404e TIM_OC2_SetConfig(htim->Instance, sConfig); - 800406e: 681d ldr r5, [r3, #0] - 8004070: 0028 movs r0, r5 - 8004072: f7ff ff81 bl 8003f78 + 80040a2: 681d ldr r5, [r3, #0] + 80040a4: 0028 movs r0, r5 + 80040a6: f7ff ff81 bl 8003fac htim->Instance->CCMR1 |= TIM_CCMR1_OC2PE; - 8004076: 2380 movs r3, #128 @ 0x80 - 8004078: 69aa ldr r2, [r5, #24] - 800407a: 011b lsls r3, r3, #4 - 800407c: 4313 orrs r3, r2 - 800407e: 61ab str r3, [r5, #24] + 80040aa: 2380 movs r3, #128 @ 0x80 + 80040ac: 69aa ldr r2, [r5, #24] + 80040ae: 011b lsls r3, r3, #4 + 80040b0: 4313 orrs r3, r2 + 80040b2: 61ab str r3, [r5, #24] htim->Instance->CCMR1 &= ~TIM_CCMR1_OC2FE; - 8004080: 69ab ldr r3, [r5, #24] - 8004082: 4a1d ldr r2, [pc, #116] @ (80040f8 ) - 8004084: 4013 ands r3, r2 - 8004086: 61ab str r3, [r5, #24] + 80040b4: 69ab ldr r3, [r5, #24] + 80040b6: 4a1d ldr r2, [pc, #116] @ (800412c ) + 80040b8: 4013 ands r3, r2 + 80040ba: 61ab str r3, [r5, #24] htim->Instance->CCMR1 |= sConfig->OCFastMode << 8U; - 8004088: 6923 ldr r3, [r4, #16] - 800408a: 69aa ldr r2, [r5, #24] - 800408c: 021b lsls r3, r3, #8 - 800408e: e7ea b.n 8004066 + 80040bc: 6923 ldr r3, [r4, #16] + 80040be: 69aa ldr r2, [r5, #24] + 80040c0: 021b lsls r3, r3, #8 + 80040c2: e7ea b.n 800409a TIM_OC3_SetConfig(htim->Instance, sConfig); - 8004090: 681e ldr r6, [r3, #0] - 8004092: 0030 movs r0, r6 - 8004094: f7ff fc58 bl 8003948 + 80040c4: 681e ldr r6, [r3, #0] + 80040c6: 0030 movs r0, r6 + 80040c8: f7ff fc58 bl 800397c htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3FE; - 8004098: 2204 movs r2, #4 + 80040cc: 2204 movs r2, #4 htim->Instance->CCMR2 |= TIM_CCMR2_OC3PE; - 800409a: 69f3 ldr r3, [r6, #28] - 800409c: 431d orrs r5, r3 - 800409e: 61f5 str r5, [r6, #28] + 80040ce: 69f3 ldr r3, [r6, #28] + 80040d0: 431d orrs r5, r3 + 80040d2: 61f5 str r5, [r6, #28] htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3FE; - 80040a0: 69f3 ldr r3, [r6, #28] - 80040a2: 4393 bics r3, r2 - 80040a4: 61f3 str r3, [r6, #28] + 80040d4: 69f3 ldr r3, [r6, #28] + 80040d6: 4393 bics r3, r2 + 80040d8: 61f3 str r3, [r6, #28] htim->Instance->CCMR2 |= sConfig->OCFastMode; - 80040a6: 69f3 ldr r3, [r6, #28] - 80040a8: 6922 ldr r2, [r4, #16] - 80040aa: 4313 orrs r3, r2 - 80040ac: 61f3 str r3, [r6, #28] + 80040da: 69f3 ldr r3, [r6, #28] + 80040dc: 6922 ldr r2, [r4, #16] + 80040de: 4313 orrs r3, r2 + 80040e0: 61f3 str r3, [r6, #28] break; - 80040ae: e7dc b.n 800406a + 80040e2: e7dc b.n 800409e TIM_OC4_SetConfig(htim->Instance, sConfig); - 80040b0: 681d ldr r5, [r3, #0] - 80040b2: 0028 movs r0, r5 - 80040b4: f7ff fc8a bl 80039cc + 80040e4: 681d ldr r5, [r3, #0] + 80040e6: 0028 movs r0, r5 + 80040e8: f7ff fc8a bl 8003a00 htim->Instance->CCMR2 |= TIM_CCMR2_OC4PE; - 80040b8: 2380 movs r3, #128 @ 0x80 - 80040ba: 69ea ldr r2, [r5, #28] - 80040bc: 011b lsls r3, r3, #4 - 80040be: 4313 orrs r3, r2 - 80040c0: 61eb str r3, [r5, #28] - htim->Instance->CCMR2 &= ~TIM_CCMR2_OC4FE; - 80040c2: 69eb ldr r3, [r5, #28] - 80040c4: 4a0c ldr r2, [pc, #48] @ (80040f8 ) - 80040c6: 4013 ands r3, r2 - 80040c8: 61eb str r3, [r5, #28] - htim->Instance->CCMR2 |= sConfig->OCFastMode << 8U; - 80040ca: 6923 ldr r3, [r4, #16] - 80040cc: 69ea ldr r2, [r5, #28] - 80040ce: 021b lsls r3, r3, #8 - 80040d0: 4313 orrs r3, r2 - 80040d2: 61eb str r3, [r5, #28] - break; - 80040d4: e7c9 b.n 800406a - TIM_OC5_SetConfig(htim->Instance, sConfig); - 80040d6: 681d ldr r5, [r3, #0] - 80040d8: 0028 movs r0, r5 - 80040da: f7ff fcab bl 8003a34 - htim->Instance->CCMR3 |= TIM_CCMR3_OC5PE; - 80040de: 2308 movs r3, #8 - 80040e0: 6d6a ldr r2, [r5, #84] @ 0x54 - 80040e2: 4313 orrs r3, r2 - htim->Instance->CCMR3 &= ~TIM_CCMR3_OC5FE; - 80040e4: 2204 movs r2, #4 - htim->Instance->CCMR3 |= TIM_CCMR3_OC5PE; - 80040e6: 656b str r3, [r5, #84] @ 0x54 - htim->Instance->CCMR3 &= ~TIM_CCMR3_OC5FE; - 80040e8: 6d6b ldr r3, [r5, #84] @ 0x54 - 80040ea: 4393 bics r3, r2 - 80040ec: 656b str r3, [r5, #84] @ 0x54 - htim->Instance->CCMR3 |= sConfig->OCFastMode; - 80040ee: 6d6b ldr r3, [r5, #84] @ 0x54 - 80040f0: 6922 ldr r2, [r4, #16] - htim->Instance->CCMR3 |= sConfig->OCFastMode << 8U; + 80040ec: 2380 movs r3, #128 @ 0x80 + 80040ee: 69ea ldr r2, [r5, #28] + 80040f0: 011b lsls r3, r3, #4 80040f2: 4313 orrs r3, r2 - 80040f4: 656b str r3, [r5, #84] @ 0x54 + 80040f4: 61eb str r3, [r5, #28] + htim->Instance->CCMR2 &= ~TIM_CCMR2_OC4FE; + 80040f6: 69eb ldr r3, [r5, #28] + 80040f8: 4a0c ldr r2, [pc, #48] @ (800412c ) + 80040fa: 4013 ands r3, r2 + 80040fc: 61eb str r3, [r5, #28] + htim->Instance->CCMR2 |= sConfig->OCFastMode << 8U; + 80040fe: 6923 ldr r3, [r4, #16] + 8004100: 69ea ldr r2, [r5, #28] + 8004102: 021b lsls r3, r3, #8 + 8004104: 4313 orrs r3, r2 + 8004106: 61eb str r3, [r5, #28] break; - 80040f6: e7b8 b.n 800406a - 80040f8: fffffbff .word 0xfffffbff + 8004108: e7c9 b.n 800409e + TIM_OC5_SetConfig(htim->Instance, sConfig); + 800410a: 681d ldr r5, [r3, #0] + 800410c: 0028 movs r0, r5 + 800410e: f7ff fcab bl 8003a68 + htim->Instance->CCMR3 |= TIM_CCMR3_OC5PE; + 8004112: 2308 movs r3, #8 + 8004114: 6d6a ldr r2, [r5, #84] @ 0x54 + 8004116: 4313 orrs r3, r2 + htim->Instance->CCMR3 &= ~TIM_CCMR3_OC5FE; + 8004118: 2204 movs r2, #4 + htim->Instance->CCMR3 |= TIM_CCMR3_OC5PE; + 800411a: 656b str r3, [r5, #84] @ 0x54 + htim->Instance->CCMR3 &= ~TIM_CCMR3_OC5FE; + 800411c: 6d6b ldr r3, [r5, #84] @ 0x54 + 800411e: 4393 bics r3, r2 + 8004120: 656b str r3, [r5, #84] @ 0x54 + htim->Instance->CCMR3 |= sConfig->OCFastMode; + 8004122: 6d6b ldr r3, [r5, #84] @ 0x54 + 8004124: 6922 ldr r2, [r4, #16] + htim->Instance->CCMR3 |= sConfig->OCFastMode << 8U; + 8004126: 4313 orrs r3, r2 + 8004128: 656b str r3, [r5, #84] @ 0x54 + break; + 800412a: e7b8 b.n 800409e + 800412c: fffffbff .word 0xfffffbff -080040fc : +08004130 : { - 80040fc: b530 push {r4, r5, lr} + 8004130: b530 push {r4, r5, lr} tmpsmcr = TIMx->SMCR; - 80040fe: 6884 ldr r4, [r0, #8] + 8004132: 6884 ldr r4, [r0, #8] tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP); - 8004100: 4d03 ldr r5, [pc, #12] @ (8004110 ) + 8004134: 4d03 ldr r5, [pc, #12] @ (8004144 ) tmpsmcr |= (uint32_t)(TIM_ExtTRGPrescaler | (TIM_ExtTRGPolarity | (ExtTRGFilter << 8U))); - 8004102: 430a orrs r2, r1 - 8004104: 021b lsls r3, r3, #8 + 8004136: 430a orrs r2, r1 + 8004138: 021b lsls r3, r3, #8 tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP); - 8004106: 402c ands r4, r5 + 800413a: 402c ands r4, r5 tmpsmcr |= (uint32_t)(TIM_ExtTRGPrescaler | (TIM_ExtTRGPolarity | (ExtTRGFilter << 8U))); - 8004108: 4313 orrs r3, r2 - 800410a: 4323 orrs r3, r4 + 800413c: 4313 orrs r3, r2 + 800413e: 4323 orrs r3, r4 TIMx->SMCR = tmpsmcr; - 800410c: 6083 str r3, [r0, #8] + 8004140: 6083 str r3, [r0, #8] } - 800410e: bd30 pop {r4, r5, pc} - 8004110: ffff00ff .word 0xffff00ff + 8004142: bd30 pop {r4, r5, pc} + 8004144: ffff00ff .word 0xffff00ff -08004114 : +08004148 : { - 8004114: b5f8 push {r3, r4, r5, r6, r7, lr} + 8004148: b5f8 push {r3, r4, r5, r6, r7, lr} __HAL_LOCK(htim); - 8004116: 0005 movs r5, r0 - 8004118: 2202 movs r2, #2 - 800411a: 353c adds r5, #60 @ 0x3c - 800411c: 782c ldrb r4, [r5, #0] + 800414a: 0005 movs r5, r0 + 800414c: 2202 movs r2, #2 + 800414e: 353c adds r5, #60 @ 0x3c + 8004150: 782c ldrb r4, [r5, #0] { - 800411e: 0003 movs r3, r0 + 8004152: 0003 movs r3, r0 __HAL_LOCK(htim); - 8004120: 0010 movs r0, r2 - 8004122: 2c01 cmp r4, #1 - 8004124: d01b beq.n 800415e + 8004154: 0010 movs r0, r2 + 8004156: 2c01 cmp r4, #1 + 8004158: d01b beq.n 8004192 htim->State = HAL_TIM_STATE_BUSY; - 8004126: 001e movs r6, r3 + 800415a: 001e movs r6, r3 __HAL_LOCK(htim); - 8004128: 3801 subs r0, #1 + 800415c: 3801 subs r0, #1 htim->State = HAL_TIM_STATE_BUSY; - 800412a: 363d adds r6, #61 @ 0x3d + 800415e: 363d adds r6, #61 @ 0x3d __HAL_LOCK(htim); - 800412c: 7028 strb r0, [r5, #0] + 8004160: 7028 strb r0, [r5, #0] htim->State = HAL_TIM_STATE_BUSY; - 800412e: 7032 strb r2, [r6, #0] + 8004162: 7032 strb r2, [r6, #0] tmpsmcr = htim->Instance->SMCR; - 8004130: 681c ldr r4, [r3, #0] + 8004164: 681c ldr r4, [r3, #0] tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP); - 8004132: 4a41 ldr r2, [pc, #260] @ (8004238 ) + 8004166: 4a41 ldr r2, [pc, #260] @ (800426c ) tmpsmcr = htim->Instance->SMCR; - 8004134: 68a3 ldr r3, [r4, #8] + 8004168: 68a3 ldr r3, [r4, #8] tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP); - 8004136: 4013 ands r3, r2 + 800416a: 4013 ands r3, r2 htim->Instance->SMCR = tmpsmcr; - 8004138: 60a3 str r3, [r4, #8] + 800416c: 60a3 str r3, [r4, #8] switch (sClockSourceConfig->ClockSource) - 800413a: 680b ldr r3, [r1, #0] - 800413c: 2b60 cmp r3, #96 @ 0x60 - 800413e: d04e beq.n 80041de - 8004140: d82d bhi.n 800419e - 8004142: 2b40 cmp r3, #64 @ 0x40 - 8004144: d062 beq.n 800420c - 8004146: d813 bhi.n 8004170 - 8004148: 2b20 cmp r3, #32 - 800414a: d00b beq.n 8004164 - 800414c: d808 bhi.n 8004160 - 800414e: 2210 movs r2, #16 - 8004150: 0019 movs r1, r3 - 8004152: 4391 bics r1, r2 - 8004154: d006 beq.n 8004164 + 800416e: 680b ldr r3, [r1, #0] + 8004170: 2b60 cmp r3, #96 @ 0x60 + 8004172: d04e beq.n 8004212 + 8004174: d82d bhi.n 80041d2 + 8004176: 2b40 cmp r3, #64 @ 0x40 + 8004178: d062 beq.n 8004240 + 800417a: d813 bhi.n 80041a4 + 800417c: 2b20 cmp r3, #32 + 800417e: d00b beq.n 8004198 + 8004180: d808 bhi.n 8004194 + 8004182: 2210 movs r2, #16 + 8004184: 0019 movs r1, r3 + 8004186: 4391 bics r1, r2 + 8004188: d006 beq.n 8004198 htim->State = HAL_TIM_STATE_READY; - 8004156: 2301 movs r3, #1 - 8004158: 7033 strb r3, [r6, #0] + 800418a: 2301 movs r3, #1 + 800418c: 7033 strb r3, [r6, #0] __HAL_UNLOCK(htim); - 800415a: 2300 movs r3, #0 - 800415c: 702b strb r3, [r5, #0] + 800418e: 2300 movs r3, #0 + 8004190: 702b strb r3, [r5, #0] } - 800415e: bdf8 pop {r3, r4, r5, r6, r7, pc} + 8004192: bdf8 pop {r3, r4, r5, r6, r7, pc} switch (sClockSourceConfig->ClockSource) - 8004160: 2b30 cmp r3, #48 @ 0x30 - 8004162: d1f8 bne.n 8004156 + 8004194: 2b30 cmp r3, #48 @ 0x30 + 8004196: d1f8 bne.n 800418a tmpsmcr = TIMx->SMCR; - 8004164: 68a2 ldr r2, [r4, #8] + 8004198: 68a2 ldr r2, [r4, #8] tmpsmcr &= ~TIM_SMCR_TS; - 8004166: 4935 ldr r1, [pc, #212] @ (800423c ) - 8004168: 400a ands r2, r1 + 800419a: 4935 ldr r1, [pc, #212] @ (8004270 ) + 800419c: 400a ands r2, r1 tmpsmcr |= (InputTriggerSource | TIM_SLAVEMODE_EXTERNAL1); - 800416a: 4313 orrs r3, r2 - 800416c: 2207 movs r2, #7 - 800416e: e028 b.n 80041c2 + 800419e: 4313 orrs r3, r2 + 80041a0: 2207 movs r2, #7 + 80041a2: e028 b.n 80041f6 switch (sClockSourceConfig->ClockSource) - 8004170: 2b50 cmp r3, #80 @ 0x50 - 8004172: d1f0 bne.n 8004156 + 80041a4: 2b50 cmp r3, #80 @ 0x50 + 80041a6: d1f0 bne.n 800418a sClockSourceConfig->ClockPolarity, - 8004174: 684a ldr r2, [r1, #4] + 80041a8: 684a ldr r2, [r1, #4] sClockSourceConfig->ClockFilter); - 8004176: 68cb ldr r3, [r1, #12] + 80041aa: 68cb ldr r3, [r1, #12] tmpccer = TIMx->CCER; - 8004178: 6a21 ldr r1, [r4, #32] + 80041ac: 6a21 ldr r1, [r4, #32] TIMx->CCER &= ~TIM_CCER_CC1E; - 800417a: 6a27 ldr r7, [r4, #32] + 80041ae: 6a27 ldr r7, [r4, #32] tmpccmr1 |= (TIM_ICFilter << 4U); - 800417c: 011b lsls r3, r3, #4 + 80041b0: 011b lsls r3, r3, #4 TIMx->CCER &= ~TIM_CCER_CC1E; - 800417e: 4387 bics r7, r0 - 8004180: 6227 str r7, [r4, #32] + 80041b2: 4387 bics r7, r0 + 80041b4: 6227 str r7, [r4, #32] tmpccmr1 &= ~TIM_CCMR1_IC1F; - 8004182: 27f0 movs r7, #240 @ 0xf0 + 80041b6: 27f0 movs r7, #240 @ 0xf0 tmpccmr1 = TIMx->CCMR1; - 8004184: 69a0 ldr r0, [r4, #24] + 80041b8: 69a0 ldr r0, [r4, #24] tmpccmr1 &= ~TIM_CCMR1_IC1F; - 8004186: 43b8 bics r0, r7 + 80041ba: 43b8 bics r0, r7 tmpccmr1 |= (TIM_ICFilter << 4U); - 8004188: 4303 orrs r3, r0 + 80041bc: 4303 orrs r3, r0 tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP); - 800418a: 200a movs r0, #10 - 800418c: 4381 bics r1, r0 + 80041be: 200a movs r0, #10 + 80041c0: 4381 bics r1, r0 tmpccer |= TIM_ICPolarity; - 800418e: 430a orrs r2, r1 + 80041c2: 430a orrs r2, r1 TIMx->CCMR1 = tmpccmr1; - 8004190: 61a3 str r3, [r4, #24] + 80041c4: 61a3 str r3, [r4, #24] TIMx->CCER = tmpccer; - 8004192: 6222 str r2, [r4, #32] + 80041c6: 6222 str r2, [r4, #32] tmpsmcr &= ~TIM_SMCR_TS; - 8004194: 4b29 ldr r3, [pc, #164] @ (800423c ) + 80041c8: 4b29 ldr r3, [pc, #164] @ (8004270 ) tmpsmcr = TIMx->SMCR; - 8004196: 68a2 ldr r2, [r4, #8] + 80041ca: 68a2 ldr r2, [r4, #8] tmpsmcr &= ~TIM_SMCR_TS; - 8004198: 401a ands r2, r3 + 80041cc: 401a ands r2, r3 tmpsmcr |= (InputTriggerSource | TIM_SLAVEMODE_EXTERNAL1); - 800419a: 2357 movs r3, #87 @ 0x57 - 800419c: e011 b.n 80041c2 + 80041ce: 2357 movs r3, #87 @ 0x57 + 80041d0: e011 b.n 80041f6 switch (sClockSourceConfig->ClockSource) - 800419e: 2280 movs r2, #128 @ 0x80 - 80041a0: 0152 lsls r2, r2, #5 - 80041a2: 4293 cmp r3, r2 - 80041a4: d00f beq.n 80041c6 - 80041a6: 2280 movs r2, #128 @ 0x80 - 80041a8: 0192 lsls r2, r2, #6 - 80041aa: 4293 cmp r3, r2 - 80041ac: d00d beq.n 80041ca - 80041ae: 2b70 cmp r3, #112 @ 0x70 - 80041b0: d1d1 bne.n 8004156 + 80041d2: 2280 movs r2, #128 @ 0x80 + 80041d4: 0152 lsls r2, r2, #5 + 80041d6: 4293 cmp r3, r2 + 80041d8: d00f beq.n 80041fa + 80041da: 2280 movs r2, #128 @ 0x80 + 80041dc: 0192 lsls r2, r2, #6 + 80041de: 4293 cmp r3, r2 + 80041e0: d00d beq.n 80041fe + 80041e2: 2b70 cmp r3, #112 @ 0x70 + 80041e4: d1d1 bne.n 800418a TIM_ETR_SetConfig(htim->Instance, - 80041b2: 68cb ldr r3, [r1, #12] - 80041b4: 684a ldr r2, [r1, #4] - 80041b6: 0020 movs r0, r4 - 80041b8: 6889 ldr r1, [r1, #8] - 80041ba: f7ff ff9f bl 80040fc + 80041e6: 68cb ldr r3, [r1, #12] + 80041e8: 684a ldr r2, [r1, #4] + 80041ea: 0020 movs r0, r4 + 80041ec: 6889 ldr r1, [r1, #8] + 80041ee: f7ff ff9f bl 8004130 tmpsmcr |= (TIM_SLAVEMODE_EXTERNAL1 | TIM_CLOCKSOURCE_ETRMODE1); - 80041be: 2377 movs r3, #119 @ 0x77 + 80041f2: 2377 movs r3, #119 @ 0x77 tmpsmcr = htim->Instance->SMCR; - 80041c0: 68a2 ldr r2, [r4, #8] + 80041f4: 68a2 ldr r2, [r4, #8] tmpsmcr |= (TIM_SLAVEMODE_EXTERNAL1 | TIM_CLOCKSOURCE_ETRMODE1); - 80041c2: 4313 orrs r3, r2 + 80041f6: 4313 orrs r3, r2 htim->Instance->SMCR = tmpsmcr; - 80041c4: 60a3 str r3, [r4, #8] + 80041f8: 60a3 str r3, [r4, #8] HAL_StatusTypeDef status = HAL_OK; - 80041c6: 2000 movs r0, #0 - 80041c8: e7c5 b.n 8004156 + 80041fa: 2000 movs r0, #0 + 80041fc: e7c5 b.n 800418a TIM_ETR_SetConfig(htim->Instance, - 80041ca: 68cb ldr r3, [r1, #12] - 80041cc: 684a ldr r2, [r1, #4] - 80041ce: 0020 movs r0, r4 - 80041d0: 6889 ldr r1, [r1, #8] - 80041d2: f7ff ff93 bl 80040fc + 80041fe: 68cb ldr r3, [r1, #12] + 8004200: 684a ldr r2, [r1, #4] + 8004202: 0020 movs r0, r4 + 8004204: 6889 ldr r1, [r1, #8] + 8004206: f7ff ff93 bl 8004130 htim->Instance->SMCR |= TIM_SMCR_ECE; - 80041d6: 2380 movs r3, #128 @ 0x80 - 80041d8: 68a2 ldr r2, [r4, #8] - 80041da: 01db lsls r3, r3, #7 - 80041dc: e7f1 b.n 80041c2 + 800420a: 2380 movs r3, #128 @ 0x80 + 800420c: 68a2 ldr r2, [r4, #8] + 800420e: 01db lsls r3, r3, #7 + 8004210: e7f1 b.n 80041f6 TIMx->CCER &= ~TIM_CCER_CC2E; - 80041de: 2710 movs r7, #16 + 8004212: 2710 movs r7, #16 sClockSourceConfig->ClockPolarity, - 80041e0: 684b ldr r3, [r1, #4] + 8004214: 684b ldr r3, [r1, #4] sClockSourceConfig->ClockFilter); - 80041e2: 68ca ldr r2, [r1, #12] + 8004216: 68ca ldr r2, [r1, #12] tmpccer = TIMx->CCER; - 80041e4: 6a21 ldr r1, [r4, #32] + 8004218: 6a21 ldr r1, [r4, #32] TIMx->CCER &= ~TIM_CCER_CC2E; - 80041e6: 6a20 ldr r0, [r4, #32] + 800421a: 6a20 ldr r0, [r4, #32] tmpccmr1 |= (TIM_ICFilter << 12U); - 80041e8: 0312 lsls r2, r2, #12 + 800421c: 0312 lsls r2, r2, #12 TIMx->CCER &= ~TIM_CCER_CC2E; - 80041ea: 43b8 bics r0, r7 - 80041ec: 6220 str r0, [r4, #32] - tmpccmr1 = TIMx->CCMR1; - 80041ee: 69a0 ldr r0, [r4, #24] - tmpccmr1 &= ~TIM_CCMR1_IC2F; - 80041f0: 4f13 ldr r7, [pc, #76] @ (8004240 ) - tmpccer |= (TIM_ICPolarity << 4U); - 80041f2: 011b lsls r3, r3, #4 - tmpccmr1 &= ~TIM_CCMR1_IC2F; - 80041f4: 4038 ands r0, r7 - tmpccmr1 |= (TIM_ICFilter << 12U); - 80041f6: 4302 orrs r2, r0 - tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP); - 80041f8: 20a0 movs r0, #160 @ 0xa0 - 80041fa: 4381 bics r1, r0 - tmpccer |= (TIM_ICPolarity << 4U); - 80041fc: 430b orrs r3, r1 - TIMx->CCMR1 = tmpccmr1 ; - 80041fe: 61a2 str r2, [r4, #24] - TIMx->CCER = tmpccer; - 8004200: 6223 str r3, [r4, #32] - tmpsmcr = TIMx->SMCR; - 8004202: 68a2 ldr r2, [r4, #8] - tmpsmcr &= ~TIM_SMCR_TS; - 8004204: 4b0d ldr r3, [pc, #52] @ (800423c ) - 8004206: 401a ands r2, r3 - tmpsmcr |= (InputTriggerSource | TIM_SLAVEMODE_EXTERNAL1); - 8004208: 2367 movs r3, #103 @ 0x67 - 800420a: e7da b.n 80041c2 - sClockSourceConfig->ClockPolarity, - 800420c: 684a ldr r2, [r1, #4] - sClockSourceConfig->ClockFilter); - 800420e: 68cb ldr r3, [r1, #12] - tmpccer = TIMx->CCER; - 8004210: 6a21 ldr r1, [r4, #32] - TIMx->CCER &= ~TIM_CCER_CC1E; - 8004212: 6a27 ldr r7, [r4, #32] - tmpccmr1 |= (TIM_ICFilter << 4U); - 8004214: 011b lsls r3, r3, #4 - TIMx->CCER &= ~TIM_CCER_CC1E; - 8004216: 4387 bics r7, r0 - 8004218: 6227 str r7, [r4, #32] - tmpccmr1 &= ~TIM_CCMR1_IC1F; - 800421a: 27f0 movs r7, #240 @ 0xf0 - tmpccmr1 = TIMx->CCMR1; - 800421c: 69a0 ldr r0, [r4, #24] - tmpccmr1 &= ~TIM_CCMR1_IC1F; 800421e: 43b8 bics r0, r7 - tmpccmr1 |= (TIM_ICFilter << 4U); - 8004220: 4303 orrs r3, r0 - tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP); - 8004222: 200a movs r0, #10 - 8004224: 4381 bics r1, r0 - tmpccer |= TIM_ICPolarity; - 8004226: 430a orrs r2, r1 - TIMx->CCMR1 = tmpccmr1; - 8004228: 61a3 str r3, [r4, #24] + 8004220: 6220 str r0, [r4, #32] + tmpccmr1 = TIMx->CCMR1; + 8004222: 69a0 ldr r0, [r4, #24] + tmpccmr1 &= ~TIM_CCMR1_IC2F; + 8004224: 4f13 ldr r7, [pc, #76] @ (8004274 ) + tmpccer |= (TIM_ICPolarity << 4U); + 8004226: 011b lsls r3, r3, #4 + tmpccmr1 &= ~TIM_CCMR1_IC2F; + 8004228: 4038 ands r0, r7 + tmpccmr1 |= (TIM_ICFilter << 12U); + 800422a: 4302 orrs r2, r0 + tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP); + 800422c: 20a0 movs r0, #160 @ 0xa0 + 800422e: 4381 bics r1, r0 + tmpccer |= (TIM_ICPolarity << 4U); + 8004230: 430b orrs r3, r1 + TIMx->CCMR1 = tmpccmr1 ; + 8004232: 61a2 str r2, [r4, #24] TIMx->CCER = tmpccer; - 800422a: 6222 str r2, [r4, #32] - tmpsmcr &= ~TIM_SMCR_TS; - 800422c: 4b03 ldr r3, [pc, #12] @ (800423c ) + 8004234: 6223 str r3, [r4, #32] tmpsmcr = TIMx->SMCR; - 800422e: 68a2 ldr r2, [r4, #8] + 8004236: 68a2 ldr r2, [r4, #8] tmpsmcr &= ~TIM_SMCR_TS; - 8004230: 401a ands r2, r3 + 8004238: 4b0d ldr r3, [pc, #52] @ (8004270 ) + 800423a: 401a ands r2, r3 tmpsmcr |= (InputTriggerSource | TIM_SLAVEMODE_EXTERNAL1); - 8004232: 2347 movs r3, #71 @ 0x47 - 8004234: e7c5 b.n 80041c2 - 8004236: 46c0 nop @ (mov r8, r8) - 8004238: ffce0088 .word 0xffce0088 - 800423c: ffcfff8f .word 0xffcfff8f - 8004240: ffff0fff .word 0xffff0fff + 800423c: 2367 movs r3, #103 @ 0x67 + 800423e: e7da b.n 80041f6 + sClockSourceConfig->ClockPolarity, + 8004240: 684a ldr r2, [r1, #4] + sClockSourceConfig->ClockFilter); + 8004242: 68cb ldr r3, [r1, #12] + tmpccer = TIMx->CCER; + 8004244: 6a21 ldr r1, [r4, #32] + TIMx->CCER &= ~TIM_CCER_CC1E; + 8004246: 6a27 ldr r7, [r4, #32] + tmpccmr1 |= (TIM_ICFilter << 4U); + 8004248: 011b lsls r3, r3, #4 + TIMx->CCER &= ~TIM_CCER_CC1E; + 800424a: 4387 bics r7, r0 + 800424c: 6227 str r7, [r4, #32] + tmpccmr1 &= ~TIM_CCMR1_IC1F; + 800424e: 27f0 movs r7, #240 @ 0xf0 + tmpccmr1 = TIMx->CCMR1; + 8004250: 69a0 ldr r0, [r4, #24] + tmpccmr1 &= ~TIM_CCMR1_IC1F; + 8004252: 43b8 bics r0, r7 + tmpccmr1 |= (TIM_ICFilter << 4U); + 8004254: 4303 orrs r3, r0 + tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP); + 8004256: 200a movs r0, #10 + 8004258: 4381 bics r1, r0 + tmpccer |= TIM_ICPolarity; + 800425a: 430a orrs r2, r1 + TIMx->CCMR1 = tmpccmr1; + 800425c: 61a3 str r3, [r4, #24] + TIMx->CCER = tmpccer; + 800425e: 6222 str r2, [r4, #32] + tmpsmcr &= ~TIM_SMCR_TS; + 8004260: 4b03 ldr r3, [pc, #12] @ (8004270 ) + tmpsmcr = TIMx->SMCR; + 8004262: 68a2 ldr r2, [r4, #8] + tmpsmcr &= ~TIM_SMCR_TS; + 8004264: 401a ands r2, r3 + tmpsmcr |= (InputTriggerSource | TIM_SLAVEMODE_EXTERNAL1); + 8004266: 2347 movs r3, #71 @ 0x47 + 8004268: e7c5 b.n 80041f6 + 800426a: 46c0 nop @ (mov r8, r8) + 800426c: ffce0088 .word 0xffce0088 + 8004270: ffcfff8f .word 0xffcfff8f + 8004274: ffff0fff .word 0xffff0fff -08004244 : +08004278 : tmp = TIM_CCER_CC1E << (Channel & 0x1FU); /* 0x1FU = 31 bits max shift */ - 8004244: 231f movs r3, #31 + 8004278: 231f movs r3, #31 { - 8004246: b510 push {r4, lr} + 800427a: b510 push {r4, lr} tmp = TIM_CCER_CC1E << (Channel & 0x1FU); /* 0x1FU = 31 bits max shift */ - 8004248: 2401 movs r4, #1 - 800424a: 4019 ands r1, r3 - 800424c: 408c lsls r4, r1 + 800427c: 2401 movs r4, #1 + 800427e: 4019 ands r1, r3 + 8004280: 408c lsls r4, r1 TIMx->CCER |= (uint32_t)(ChannelState << (Channel & 0x1FU)); /* 0x1FU = 31 bits max shift */ - 800424e: 408a lsls r2, r1 + 8004282: 408a lsls r2, r1 TIMx->CCER &= ~tmp; - 8004250: 6a03 ldr r3, [r0, #32] - 8004252: 43a3 bics r3, r4 - 8004254: 6203 str r3, [r0, #32] + 8004284: 6a03 ldr r3, [r0, #32] + 8004286: 43a3 bics r3, r4 + 8004288: 6203 str r3, [r0, #32] TIMx->CCER |= (uint32_t)(ChannelState << (Channel & 0x1FU)); /* 0x1FU = 31 bits max shift */ - 8004256: 6a03 ldr r3, [r0, #32] - 8004258: 431a orrs r2, r3 - 800425a: 6202 str r2, [r0, #32] + 800428a: 6a03 ldr r3, [r0, #32] + 800428c: 431a orrs r2, r3 + 800428e: 6202 str r2, [r0, #32] } - 800425c: bd10 pop {r4, pc} + 8004290: bd10 pop {r4, pc} ... -08004260 : +08004294 : { - 8004260: 0002 movs r2, r0 - 8004262: b510 push {r4, lr} - 8004264: 2908 cmp r1, #8 - 8004266: d01c beq.n 80042a2 - 8004268: d806 bhi.n 8004278 - 800426a: 2900 cmp r1, #0 - 800426c: d00b beq.n 8004286 - 800426e: 2904 cmp r1, #4 - 8004270: d014 beq.n 800429c + 8004294: 0002 movs r2, r0 + 8004296: b510 push {r4, lr} + 8004298: 2908 cmp r1, #8 + 800429a: d01c beq.n 80042d6 + 800429c: d806 bhi.n 80042ac + 800429e: 2900 cmp r1, #0 + 80042a0: d00b beq.n 80042ba + 80042a2: 2904 cmp r1, #4 + 80042a4: d014 beq.n 80042d0 if (TIM_CHANNEL_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY) - 8004272: 0013 movs r3, r2 - 8004274: 3343 adds r3, #67 @ 0x43 - 8004276: e008 b.n 800428a - 8004278: 290c cmp r1, #12 - 800427a: d015 beq.n 80042a8 - 800427c: 2910 cmp r1, #16 - 800427e: d1f8 bne.n 8004272 - 8004280: 0003 movs r3, r0 - 8004282: 3342 adds r3, #66 @ 0x42 - 8004284: e001 b.n 800428a - 8004286: 0003 movs r3, r0 - 8004288: 333e adds r3, #62 @ 0x3e - 800428a: 781b ldrb r3, [r3, #0] - 800428c: 3b01 subs r3, #1 - 800428e: 1e58 subs r0, r3, #1 - 8004290: 4183 sbcs r3, r0 - 8004292: b2db uxtb r3, r3 + 80042a6: 0013 movs r3, r2 + 80042a8: 3343 adds r3, #67 @ 0x43 + 80042aa: e008 b.n 80042be + 80042ac: 290c cmp r1, #12 + 80042ae: d015 beq.n 80042dc + 80042b0: 2910 cmp r1, #16 + 80042b2: d1f8 bne.n 80042a6 + 80042b4: 0003 movs r3, r0 + 80042b6: 3342 adds r3, #66 @ 0x42 + 80042b8: e001 b.n 80042be + 80042ba: 0003 movs r3, r0 + 80042bc: 333e adds r3, #62 @ 0x3e + 80042be: 781b ldrb r3, [r3, #0] + 80042c0: 3b01 subs r3, #1 + 80042c2: 1e58 subs r0, r3, #1 + 80042c4: 4183 sbcs r3, r0 + 80042c6: b2db uxtb r3, r3 return HAL_ERROR; - 8004294: 2001 movs r0, #1 + 80042c8: 2001 movs r0, #1 if (TIM_CHANNEL_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY) - 8004296: 2b00 cmp r3, #0 - 8004298: d009 beq.n 80042ae + 80042ca: 2b00 cmp r3, #0 + 80042cc: d009 beq.n 80042e2 } - 800429a: bd10 pop {r4, pc} + 80042ce: bd10 pop {r4, pc} if (TIM_CHANNEL_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY) - 800429c: 0003 movs r3, r0 - 800429e: 333f adds r3, #63 @ 0x3f - 80042a0: e7f3 b.n 800428a - 80042a2: 0003 movs r3, r0 - 80042a4: 3340 adds r3, #64 @ 0x40 - 80042a6: e7f0 b.n 800428a - 80042a8: 0003 movs r3, r0 - 80042aa: 3341 adds r3, #65 @ 0x41 - 80042ac: e7ed b.n 800428a + 80042d0: 0003 movs r3, r0 + 80042d2: 333f adds r3, #63 @ 0x3f + 80042d4: e7f3 b.n 80042be + 80042d6: 0003 movs r3, r0 + 80042d8: 3340 adds r3, #64 @ 0x40 + 80042da: e7f0 b.n 80042be + 80042dc: 0003 movs r3, r0 + 80042de: 3341 adds r3, #65 @ 0x41 + 80042e0: e7ed b.n 80042be TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); - 80042ae: 2302 movs r3, #2 - 80042b0: 2908 cmp r1, #8 - 80042b2: d030 beq.n 8004316 - 80042b4: d806 bhi.n 80042c4 - 80042b6: 2900 cmp r1, #0 - 80042b8: d00b beq.n 80042d2 - 80042ba: 2904 cmp r1, #4 - 80042bc: d028 beq.n 8004310 - 80042be: 0010 movs r0, r2 - 80042c0: 3043 adds r0, #67 @ 0x43 - 80042c2: e008 b.n 80042d6 - 80042c4: 290c cmp r1, #12 - 80042c6: d029 beq.n 800431c - 80042c8: 2910 cmp r1, #16 - 80042ca: d1f8 bne.n 80042be - 80042cc: 0010 movs r0, r2 - 80042ce: 3042 adds r0, #66 @ 0x42 - 80042d0: e001 b.n 80042d6 - 80042d2: 0010 movs r0, r2 - 80042d4: 303e adds r0, #62 @ 0x3e - 80042d6: 7003 strb r3, [r0, #0] + 80042e2: 2302 movs r3, #2 + 80042e4: 2908 cmp r1, #8 + 80042e6: d030 beq.n 800434a + 80042e8: d806 bhi.n 80042f8 + 80042ea: 2900 cmp r1, #0 + 80042ec: d00b beq.n 8004306 + 80042ee: 2904 cmp r1, #4 + 80042f0: d028 beq.n 8004344 + 80042f2: 0010 movs r0, r2 + 80042f4: 3043 adds r0, #67 @ 0x43 + 80042f6: e008 b.n 800430a + 80042f8: 290c cmp r1, #12 + 80042fa: d029 beq.n 8004350 + 80042fc: 2910 cmp r1, #16 + 80042fe: d1f8 bne.n 80042f2 + 8004300: 0010 movs r0, r2 + 8004302: 3042 adds r0, #66 @ 0x42 + 8004304: e001 b.n 800430a + 8004306: 0010 movs r0, r2 + 8004308: 303e adds r0, #62 @ 0x3e + 800430a: 7003 strb r3, [r0, #0] TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); - 80042d8: 6814 ldr r4, [r2, #0] - 80042da: 2201 movs r2, #1 - 80042dc: 0020 movs r0, r4 - 80042de: f7ff ffb1 bl 8004244 + 800430c: 6814 ldr r4, [r2, #0] + 800430e: 2201 movs r2, #1 + 8004310: 0020 movs r0, r4 + 8004312: f7ff ffb1 bl 8004278 if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) - 80042e2: 4a18 ldr r2, [pc, #96] @ (8004344 ) - 80042e4: 4294 cmp r4, r2 - 80042e6: d005 beq.n 80042f4 - 80042e8: 4b17 ldr r3, [pc, #92] @ (8004348 ) - 80042ea: 429c cmp r4, r3 - 80042ec: d002 beq.n 80042f4 - 80042ee: 4b17 ldr r3, [pc, #92] @ (800434c ) - 80042f0: 429c cmp r4, r3 - 80042f2: d116 bne.n 8004322 + 8004316: 4a18 ldr r2, [pc, #96] @ (8004378 ) + 8004318: 4294 cmp r4, r2 + 800431a: d005 beq.n 8004328 + 800431c: 4b17 ldr r3, [pc, #92] @ (800437c ) + 800431e: 429c cmp r4, r3 + 8004320: d002 beq.n 8004328 + 8004322: 4b17 ldr r3, [pc, #92] @ (8004380 ) + 8004324: 429c cmp r4, r3 + 8004326: d116 bne.n 8004356 __HAL_TIM_MOE_ENABLE(htim); - 80042f4: 2380 movs r3, #128 @ 0x80 - 80042f6: 6c61 ldr r1, [r4, #68] @ 0x44 - 80042f8: 021b lsls r3, r3, #8 - 80042fa: 430b orrs r3, r1 - 80042fc: 6463 str r3, [r4, #68] @ 0x44 + 8004328: 2380 movs r3, #128 @ 0x80 + 800432a: 6c61 ldr r1, [r4, #68] @ 0x44 + 800432c: 021b lsls r3, r3, #8 + 800432e: 430b orrs r3, r1 + 8004330: 6463 str r3, [r4, #68] @ 0x44 if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) - 80042fe: 4294 cmp r4, r2 - 8004300: d116 bne.n 8004330 + 8004332: 4294 cmp r4, r2 + 8004334: d116 bne.n 8004364 tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; - 8004302: 68a3 ldr r3, [r4, #8] - 8004304: 4a12 ldr r2, [pc, #72] @ (8004350 ) - 8004306: 4013 ands r3, r2 + 8004336: 68a3 ldr r3, [r4, #8] + 8004338: 4a12 ldr r2, [pc, #72] @ (8004384 ) + 800433a: 4013 ands r3, r2 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) - 8004308: 2b06 cmp r3, #6 - 800430a: d116 bne.n 800433a + 800433c: 2b06 cmp r3, #6 + 800433e: d116 bne.n 800436e return HAL_OK; - 800430c: 2000 movs r0, #0 - 800430e: e7c4 b.n 800429a + 8004340: 2000 movs r0, #0 + 8004342: e7c4 b.n 80042ce TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); - 8004310: 0010 movs r0, r2 - 8004312: 303f adds r0, #63 @ 0x3f - 8004314: e7df b.n 80042d6 - 8004316: 0010 movs r0, r2 - 8004318: 3040 adds r0, #64 @ 0x40 - 800431a: e7dc b.n 80042d6 - 800431c: 0010 movs r0, r2 - 800431e: 3041 adds r0, #65 @ 0x41 - 8004320: e7d9 b.n 80042d6 + 8004344: 0010 movs r0, r2 + 8004346: 303f adds r0, #63 @ 0x3f + 8004348: e7df b.n 800430a + 800434a: 0010 movs r0, r2 + 800434c: 3040 adds r0, #64 @ 0x40 + 800434e: e7dc b.n 800430a + 8004350: 0010 movs r0, r2 + 8004352: 3041 adds r0, #65 @ 0x41 + 8004354: e7d9 b.n 800430a if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) - 8004322: 2380 movs r3, #128 @ 0x80 - 8004324: 05db lsls r3, r3, #23 - 8004326: 429c cmp r4, r3 - 8004328: d0eb beq.n 8004302 - 800432a: 4b0a ldr r3, [pc, #40] @ (8004354 ) - 800432c: 429c cmp r4, r3 - 800432e: d0e8 beq.n 8004302 + 8004356: 2380 movs r3, #128 @ 0x80 + 8004358: 05db lsls r3, r3, #23 + 800435a: 429c cmp r4, r3 + 800435c: d0eb beq.n 8004336 + 800435e: 4b0a ldr r3, [pc, #40] @ (8004388 ) + 8004360: 429c cmp r4, r3 + 8004362: d0e8 beq.n 8004336 __HAL_TIM_ENABLE(htim); - 8004330: 2301 movs r3, #1 - 8004332: 6822 ldr r2, [r4, #0] - 8004334: 4313 orrs r3, r2 - 8004336: 6023 str r3, [r4, #0] - 8004338: e7e8 b.n 800430c + 8004364: 2301 movs r3, #1 + 8004366: 6822 ldr r2, [r4, #0] + 8004368: 4313 orrs r3, r2 + 800436a: 6023 str r3, [r4, #0] + 800436c: e7e8 b.n 8004340 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) - 800433a: 2280 movs r2, #128 @ 0x80 - 800433c: 0252 lsls r2, r2, #9 - 800433e: 4293 cmp r3, r2 - 8004340: d1f6 bne.n 8004330 - 8004342: e7e3 b.n 800430c - 8004344: 40012c00 .word 0x40012c00 - 8004348: 40014400 .word 0x40014400 - 800434c: 40014800 .word 0x40014800 - 8004350: 00010007 .word 0x00010007 - 8004354: 40000400 .word 0x40000400 + 800436e: 2280 movs r2, #128 @ 0x80 + 8004370: 0252 lsls r2, r2, #9 + 8004372: 4293 cmp r3, r2 + 8004374: d1f6 bne.n 8004364 + 8004376: e7e3 b.n 8004340 + 8004378: 40012c00 .word 0x40012c00 + 800437c: 40014400 .word 0x40014400 + 8004380: 40014800 .word 0x40014800 + 8004384: 00010007 .word 0x00010007 + 8004388: 40000400 .word 0x40000400 -08004358 : +0800438c : HAL_StatusTypeDef HAL_TIM_PWM_Start(TIM_HandleTypeDef *htim, uint32_t Channel) - 8004358: b510 push {r4, lr} - 800435a: f7ff ff81 bl 8004260 - 800435e: bd10 pop {r4, pc} + 800438c: b510 push {r4, lr} + 800438e: f7ff ff81 bl 8004294 + 8004392: bd10 pop {r4, pc} -08004360 : +08004394 : * mode. * @retval HAL status */ HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, const TIM_MasterConfigTypeDef *sMasterConfig) { - 8004360: b5f0 push {r4, r5, r6, r7, lr} + 8004394: b5f0 push {r4, r5, r6, r7, lr} assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance)); assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger)); assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode)); /* Check input state */ __HAL_LOCK(htim); - 8004362: 0004 movs r4, r0 - 8004364: 2202 movs r2, #2 - 8004366: 343c adds r4, #60 @ 0x3c - 8004368: 7825 ldrb r5, [r4, #0] + 8004396: 0004 movs r4, r0 + 8004398: 2202 movs r2, #2 + 800439a: 343c adds r4, #60 @ 0x3c + 800439c: 7825 ldrb r5, [r4, #0] { - 800436a: 0003 movs r3, r0 + 800439e: 0003 movs r3, r0 __HAL_LOCK(htim); - 800436c: 0010 movs r0, r2 - 800436e: 2d01 cmp r5, #1 - 8004370: d023 beq.n 80043ba + 80043a0: 0010 movs r0, r2 + 80043a2: 2d01 cmp r5, #1 + 80043a4: d023 beq.n 80043ee /* Change the handler state */ htim->State = HAL_TIM_STATE_BUSY; - 8004372: 001d movs r5, r3 - 8004374: 353d adds r5, #61 @ 0x3d - 8004376: 702a strb r2, [r5, #0] + 80043a6: 001d movs r5, r3 + 80043a8: 353d adds r5, #61 @ 0x3d + 80043aa: 702a strb r2, [r5, #0] /* Get the TIMx CR2 register value */ tmpcr2 = htim->Instance->CR2; - 8004378: 681a ldr r2, [r3, #0] + 80043ac: 681a ldr r2, [r3, #0] /* Get the TIMx SMCR register value */ tmpsmcr = htim->Instance->SMCR; /* If the timer supports ADC synchronization through TRGO2, set the master mode selection 2 */ if (IS_TIM_TRGO2_INSTANCE(htim->Instance)) - 800437a: 4e10 ldr r6, [pc, #64] @ (80043bc ) + 80043ae: 4e10 ldr r6, [pc, #64] @ (80043f0 ) tmpcr2 = htim->Instance->CR2; - 800437c: 6853 ldr r3, [r2, #4] + 80043b0: 6853 ldr r3, [r2, #4] tmpsmcr = htim->Instance->SMCR; - 800437e: 6890 ldr r0, [r2, #8] + 80043b2: 6890 ldr r0, [r2, #8] if (IS_TIM_TRGO2_INSTANCE(htim->Instance)) - 8004380: 42b2 cmp r2, r6 - 8004382: d103 bne.n 800438c + 80043b4: 42b2 cmp r2, r6 + 80043b6: d103 bne.n 80043c0 { /* Check the parameters */ assert_param(IS_TIM_TRGO2_SOURCE(sMasterConfig->MasterOutputTrigger2)); /* Clear the MMS2 bits */ tmpcr2 &= ~TIM_CR2_MMS2; - 8004384: 4f0e ldr r7, [pc, #56] @ (80043c0 ) - 8004386: 403b ands r3, r7 + 80043b8: 4f0e ldr r7, [pc, #56] @ (80043f4 ) + 80043ba: 403b ands r3, r7 /* Select the TRGO2 source*/ tmpcr2 |= sMasterConfig->MasterOutputTrigger2; - 8004388: 684f ldr r7, [r1, #4] - 800438a: 433b orrs r3, r7 + 80043bc: 684f ldr r7, [r1, #4] + 80043be: 433b orrs r3, r7 } /* Reset the MMS Bits */ tmpcr2 &= ~TIM_CR2_MMS; - 800438c: 2770 movs r7, #112 @ 0x70 - 800438e: 43bb bics r3, r7 + 80043c0: 2770 movs r7, #112 @ 0x70 + 80043c2: 43bb bics r3, r7 /* Select the TRGO source */ tmpcr2 |= sMasterConfig->MasterOutputTrigger; - 8004390: 680f ldr r7, [r1, #0] - 8004392: 433b orrs r3, r7 + 80043c4: 680f ldr r7, [r1, #0] + 80043c6: 433b orrs r3, r7 /* Update TIMx CR2 */ htim->Instance->CR2 = tmpcr2; - 8004394: 6053 str r3, [r2, #4] + 80043c8: 6053 str r3, [r2, #4] if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) - 8004396: 42b2 cmp r2, r6 - 8004398: d006 beq.n 80043a8 - 800439a: 2380 movs r3, #128 @ 0x80 - 800439c: 05db lsls r3, r3, #23 - 800439e: 429a cmp r2, r3 - 80043a0: d002 beq.n 80043a8 - 80043a2: 4b08 ldr r3, [pc, #32] @ (80043c4 ) - 80043a4: 429a cmp r2, r3 - 80043a6: d104 bne.n 80043b2 + 80043ca: 42b2 cmp r2, r6 + 80043cc: d006 beq.n 80043dc + 80043ce: 2380 movs r3, #128 @ 0x80 + 80043d0: 05db lsls r3, r3, #23 + 80043d2: 429a cmp r2, r3 + 80043d4: d002 beq.n 80043dc + 80043d6: 4b08 ldr r3, [pc, #32] @ (80043f8 ) + 80043d8: 429a cmp r2, r3 + 80043da: d104 bne.n 80043e6 { /* Reset the MSM Bit */ tmpsmcr &= ~TIM_SMCR_MSM; - 80043a8: 2380 movs r3, #128 @ 0x80 - 80043aa: 4398 bics r0, r3 + 80043dc: 2380 movs r3, #128 @ 0x80 + 80043de: 4398 bics r0, r3 /* Set master mode */ tmpsmcr |= sMasterConfig->MasterSlaveMode; - 80043ac: 688b ldr r3, [r1, #8] - 80043ae: 4318 orrs r0, r3 + 80043e0: 688b ldr r3, [r1, #8] + 80043e2: 4318 orrs r0, r3 /* Update TIMx SMCR */ htim->Instance->SMCR = tmpsmcr; - 80043b0: 6090 str r0, [r2, #8] + 80043e4: 6090 str r0, [r2, #8] } /* Change the htim state */ htim->State = HAL_TIM_STATE_READY; - 80043b2: 2301 movs r3, #1 + 80043e6: 2301 movs r3, #1 __HAL_UNLOCK(htim); - 80043b4: 2000 movs r0, #0 + 80043e8: 2000 movs r0, #0 htim->State = HAL_TIM_STATE_READY; - 80043b6: 702b strb r3, [r5, #0] + 80043ea: 702b strb r3, [r5, #0] __HAL_UNLOCK(htim); - 80043b8: 7020 strb r0, [r4, #0] + 80043ec: 7020 strb r0, [r4, #0] return HAL_OK; } - 80043ba: bdf0 pop {r4, r5, r6, r7, pc} - 80043bc: 40012c00 .word 0x40012c00 - 80043c0: ff0fffff .word 0xff0fffff - 80043c4: 40000400 .word 0x40000400 + 80043ee: bdf0 pop {r4, r5, r6, r7, pc} + 80043f0: 40012c00 .word 0x40012c00 + 80043f4: ff0fffff .word 0xff0fffff + 80043f8: 40000400 .word 0x40000400 -080043c8 : +080043fc : * interrupt can be enabled by calling the @ref __HAL_TIM_ENABLE_IT macro. * @retval HAL status */ HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim, const TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig) { - 80043c8: b510 push {r4, lr} + 80043fc: b510 push {r4, lr} assert_param(IS_TIM_BREAK_FILTER(sBreakDeadTimeConfig->BreakFilter)); assert_param(IS_TIM_AUTOMATIC_OUTPUT_STATE(sBreakDeadTimeConfig->AutomaticOutput)); assert_param(IS_TIM_BREAK_AFMODE(sBreakDeadTimeConfig->BreakAFMode)); /* Check input state */ __HAL_LOCK(htim); - 80043ca: 0004 movs r4, r0 - 80043cc: 343c adds r4, #60 @ 0x3c - 80043ce: 7823 ldrb r3, [r4, #0] + 80043fe: 0004 movs r4, r0 + 8004400: 343c adds r4, #60 @ 0x3c + 8004402: 7823 ldrb r3, [r4, #0] { - 80043d0: 0002 movs r2, r0 + 8004404: 0002 movs r2, r0 __HAL_LOCK(htim); - 80043d2: 2002 movs r0, #2 - 80043d4: 2b01 cmp r3, #1 - 80043d6: d039 beq.n 800444c + 8004406: 2002 movs r0, #2 + 8004408: 2b01 cmp r3, #1 + 800440a: d039 beq.n 8004480 /* Set the Lock level, the Break enable Bit and the Polarity, the OSSR State, the OSSI State, the dead time value and the Automatic Output Enable Bit */ /* Set the BDTR bits */ MODIFY_REG(tmpbdtr, TIM_BDTR_DTG, sBreakDeadTimeConfig->DeadTime); MODIFY_REG(tmpbdtr, TIM_BDTR_LOCK, sBreakDeadTimeConfig->LockLevel); - 80043d8: 481d ldr r0, [pc, #116] @ (8004450 ) - 80043da: 68cb ldr r3, [r1, #12] - 80043dc: 4003 ands r3, r0 - 80043de: 6888 ldr r0, [r1, #8] - 80043e0: 4303 orrs r3, r0 + 800440c: 481d ldr r0, [pc, #116] @ (8004484 ) + 800440e: 68cb ldr r3, [r1, #12] + 8004410: 4003 ands r3, r0 + 8004412: 6888 ldr r0, [r1, #8] + 8004414: 4303 orrs r3, r0 MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, sBreakDeadTimeConfig->OffStateIDLEMode); - 80043e2: 481c ldr r0, [pc, #112] @ (8004454 ) - 80043e4: 4003 ands r3, r0 - 80043e6: 6848 ldr r0, [r1, #4] - 80043e8: 4303 orrs r3, r0 + 8004416: 481c ldr r0, [pc, #112] @ (8004488 ) + 8004418: 4003 ands r3, r0 + 800441a: 6848 ldr r0, [r1, #4] + 800441c: 4303 orrs r3, r0 MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, sBreakDeadTimeConfig->OffStateRunMode); - 80043ea: 481b ldr r0, [pc, #108] @ (8004458 ) - 80043ec: 4003 ands r3, r0 - 80043ee: 6808 ldr r0, [r1, #0] - 80043f0: 4303 orrs r3, r0 + 800441e: 481b ldr r0, [pc, #108] @ (800448c ) + 8004420: 4003 ands r3, r0 + 8004422: 6808 ldr r0, [r1, #0] + 8004424: 4303 orrs r3, r0 MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, sBreakDeadTimeConfig->BreakState); - 80043f2: 481a ldr r0, [pc, #104] @ (800445c ) - 80043f4: 4003 ands r3, r0 - 80043f6: 6908 ldr r0, [r1, #16] - 80043f8: 4303 orrs r3, r0 + 8004426: 481a ldr r0, [pc, #104] @ (8004490 ) + 8004428: 4003 ands r3, r0 + 800442a: 6908 ldr r0, [r1, #16] + 800442c: 4303 orrs r3, r0 MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, sBreakDeadTimeConfig->BreakPolarity); - 80043fa: 4819 ldr r0, [pc, #100] @ (8004460 ) - 80043fc: 4003 ands r3, r0 - 80043fe: 6948 ldr r0, [r1, #20] - 8004400: 4303 orrs r3, r0 + 800442e: 4819 ldr r0, [pc, #100] @ (8004494 ) + 8004430: 4003 ands r3, r0 + 8004432: 6948 ldr r0, [r1, #20] + 8004434: 4303 orrs r3, r0 MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, sBreakDeadTimeConfig->AutomaticOutput); - 8004402: 4818 ldr r0, [pc, #96] @ (8004464 ) - 8004404: 4003 ands r3, r0 - 8004406: 6b08 ldr r0, [r1, #48] @ 0x30 - 8004408: 4303 orrs r3, r0 + 8004436: 4818 ldr r0, [pc, #96] @ (8004498 ) + 8004438: 4003 ands r3, r0 + 800443a: 6b08 ldr r0, [r1, #48] @ 0x30 + 800443c: 4303 orrs r3, r0 MODIFY_REG(tmpbdtr, TIM_BDTR_BKF, (sBreakDeadTimeConfig->BreakFilter << TIM_BDTR_BKF_Pos)); - 800440a: 4817 ldr r0, [pc, #92] @ (8004468 ) - 800440c: 4003 ands r3, r0 - 800440e: 6988 ldr r0, [r1, #24] - 8004410: 0400 lsls r0, r0, #16 - 8004412: 4303 orrs r3, r0 + 800443e: 4817 ldr r0, [pc, #92] @ (800449c ) + 8004440: 4003 ands r3, r0 + 8004442: 6988 ldr r0, [r1, #24] + 8004444: 0400 lsls r0, r0, #16 + 8004446: 4303 orrs r3, r0 MODIFY_REG(tmpbdtr, TIM_BDTR_BKBID, sBreakDeadTimeConfig->BreakAFMode); - 8004414: 4815 ldr r0, [pc, #84] @ (800446c ) - 8004416: 4003 ands r3, r0 - 8004418: 69c8 ldr r0, [r1, #28] - 800441a: 4303 orrs r3, r0 + 8004448: 4815 ldr r0, [pc, #84] @ (80044a0 ) + 800444a: 4003 ands r3, r0 + 800444c: 69c8 ldr r0, [r1, #28] + 800444e: 4303 orrs r3, r0 if (IS_TIM_BKIN2_INSTANCE(htim->Instance)) - 800441c: 6810 ldr r0, [r2, #0] - 800441e: 4a14 ldr r2, [pc, #80] @ (8004470 ) - 8004420: 4290 cmp r0, r2 - 8004422: d110 bne.n 8004446 + 8004450: 6810 ldr r0, [r2, #0] + 8004452: 4a14 ldr r2, [pc, #80] @ (80044a4 ) + 8004454: 4290 cmp r0, r2 + 8004456: d110 bne.n 800447a assert_param(IS_TIM_BREAK2_POLARITY(sBreakDeadTimeConfig->Break2Polarity)); assert_param(IS_TIM_BREAK_FILTER(sBreakDeadTimeConfig->Break2Filter)); assert_param(IS_TIM_BREAK2_AFMODE(sBreakDeadTimeConfig->Break2AFMode)); /* Set the BREAK2 input related BDTR bits */ MODIFY_REG(tmpbdtr, TIM_BDTR_BK2F, (sBreakDeadTimeConfig->Break2Filter << TIM_BDTR_BK2F_Pos)); - 8004424: 4a13 ldr r2, [pc, #76] @ (8004474 ) - 8004426: 4013 ands r3, r2 - 8004428: 6a8a ldr r2, [r1, #40] @ 0x28 - 800442a: 0512 lsls r2, r2, #20 - 800442c: 431a orrs r2, r3 + 8004458: 4a13 ldr r2, [pc, #76] @ (80044a8 ) + 800445a: 4013 ands r3, r2 + 800445c: 6a8a ldr r2, [r1, #40] @ 0x28 + 800445e: 0512 lsls r2, r2, #20 + 8004460: 431a orrs r2, r3 MODIFY_REG(tmpbdtr, TIM_BDTR_BK2E, sBreakDeadTimeConfig->Break2State); - 800442e: 4b12 ldr r3, [pc, #72] @ (8004478 ) - 8004430: 401a ands r2, r3 - 8004432: 6a0b ldr r3, [r1, #32] - 8004434: 431a orrs r2, r3 + 8004462: 4b12 ldr r3, [pc, #72] @ (80044ac ) + 8004464: 401a ands r2, r3 + 8004466: 6a0b ldr r3, [r1, #32] + 8004468: 431a orrs r2, r3 MODIFY_REG(tmpbdtr, TIM_BDTR_BK2P, sBreakDeadTimeConfig->Break2Polarity); - 8004436: 4b11 ldr r3, [pc, #68] @ (800447c ) - 8004438: 401a ands r2, r3 - 800443a: 6a4b ldr r3, [r1, #36] @ 0x24 - 800443c: 431a orrs r2, r3 + 800446a: 4b11 ldr r3, [pc, #68] @ (80044b0 ) + 800446c: 401a ands r2, r3 + 800446e: 6a4b ldr r3, [r1, #36] @ 0x24 + 8004470: 431a orrs r2, r3 MODIFY_REG(tmpbdtr, TIM_BDTR_BK2BID, sBreakDeadTimeConfig->Break2AFMode); - 800443e: 4b10 ldr r3, [pc, #64] @ (8004480 ) - 8004440: 401a ands r2, r3 - 8004442: 6acb ldr r3, [r1, #44] @ 0x2c - 8004444: 4313 orrs r3, r2 + 8004472: 4b10 ldr r3, [pc, #64] @ (80044b4 ) + 8004474: 401a ands r2, r3 + 8004476: 6acb ldr r3, [r1, #44] @ 0x2c + 8004478: 4313 orrs r3, r2 } /* Set TIMx_BDTR */ htim->Instance->BDTR = tmpbdtr; - 8004446: 6443 str r3, [r0, #68] @ 0x44 + 800447a: 6443 str r3, [r0, #68] @ 0x44 __HAL_UNLOCK(htim); - 8004448: 2000 movs r0, #0 - 800444a: 7020 strb r0, [r4, #0] + 800447c: 2000 movs r0, #0 + 800447e: 7020 strb r0, [r4, #0] return HAL_OK; } - 800444c: bd10 pop {r4, pc} - 800444e: 46c0 nop @ (mov r8, r8) - 8004450: fffffcff .word 0xfffffcff - 8004454: fffffbff .word 0xfffffbff - 8004458: fffff7ff .word 0xfffff7ff - 800445c: ffffefff .word 0xffffefff - 8004460: ffffdfff .word 0xffffdfff - 8004464: ffffbfff .word 0xffffbfff - 8004468: fff0ffff .word 0xfff0ffff - 800446c: efffffff .word 0xefffffff - 8004470: 40012c00 .word 0x40012c00 - 8004474: ff0fffff .word 0xff0fffff - 8004478: feffffff .word 0xfeffffff - 800447c: fdffffff .word 0xfdffffff - 8004480: dfffffff .word 0xdfffffff + 8004480: bd10 pop {r4, pc} + 8004482: 46c0 nop @ (mov r8, r8) + 8004484: fffffcff .word 0xfffffcff + 8004488: fffffbff .word 0xfffffbff + 800448c: fffff7ff .word 0xfffff7ff + 8004490: ffffefff .word 0xffffefff + 8004494: ffffdfff .word 0xffffdfff + 8004498: ffffbfff .word 0xffffbfff + 800449c: fff0ffff .word 0xfff0ffff + 80044a0: efffffff .word 0xefffffff + 80044a4: 40012c00 .word 0x40012c00 + 80044a8: ff0fffff .word 0xff0fffff + 80044ac: feffffff .word 0xfeffffff + 80044b0: fdffffff .word 0xfdffffff + 80044b4: dfffffff .word 0xdfffffff -08004484 : +080044b8 : /** * @brief Commutation callback in non-blocking mode * @param htim TIM handle * @retval None */ __weak void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim) - 8004484: 4770 bx lr + 80044b8: 4770 bx lr -08004486 : +080044ba : /** * @brief Break detection callback in non-blocking mode * @param htim TIM handle * @retval None */ __weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim) - 8004486: 4770 bx lr + 80044ba: 4770 bx lr -08004488 : +080044bc : /** * @brief Break2 detection callback in non blocking mode * @param htim: TIM handle * @retval None */ __weak void HAL_TIMEx_Break2Callback(TIM_HandleTypeDef *htim) - 8004488: 4770 bx lr + 80044bc: 4770 bx lr ... -0800448c : +080044c0 : * @brief End ongoing Tx transfer on UART peripheral (following error detection or Transmit completion). * @param huart UART handle. * @retval None */ static void UART_EndTxTransfer(UART_HandleTypeDef *huart) { - 800448c: b530 push {r4, r5, lr} + 80044c0: b530 push {r4, r5, lr} */ __STATIC_FORCEINLINE uint32_t __get_PRIMASK(void) { uint32_t result; __ASM volatile ("MRS %0, primask" : "=r" (result) ); - 800448e: f3ef 8410 mrs r4, PRIMASK + 80044c2: f3ef 8410 mrs r4, PRIMASK \details Assigns the given value to the Priority Mask Register. \param [in] priMask Priority Mask */ __STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask) { __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 8004492: 2201 movs r2, #1 - 8004494: f382 8810 msr PRIMASK, r2 + 80044c6: 2201 movs r2, #1 + 80044c8: f382 8810 msr PRIMASK, r2 /* Disable TXEIE, TCIE, TXFT interrupts */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE_TXFNFIE | USART_CR1_TCIE)); - 8004498: 25c0 movs r5, #192 @ 0xc0 - 800449a: 6801 ldr r1, [r0, #0] - 800449c: 680b ldr r3, [r1, #0] - 800449e: 43ab bics r3, r5 - 80044a0: 600b str r3, [r1, #0] - 80044a2: f384 8810 msr PRIMASK, r4 + 80044cc: 25c0 movs r5, #192 @ 0xc0 + 80044ce: 6801 ldr r1, [r0, #0] + 80044d0: 680b ldr r3, [r1, #0] + 80044d2: 43ab bics r3, r5 + 80044d4: 600b str r3, [r1, #0] + 80044d6: f384 8810 msr PRIMASK, r4 __ASM volatile ("MRS %0, primask" : "=r" (result) ); - 80044a6: f3ef 8110 mrs r1, PRIMASK + 80044da: f3ef 8110 mrs r1, PRIMASK __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 80044aa: f382 8810 msr PRIMASK, r2 + 80044de: f382 8810 msr PRIMASK, r2 ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_TXFTIE)); - 80044ae: 6802 ldr r2, [r0, #0] - 80044b0: 4c04 ldr r4, [pc, #16] @ (80044c4 ) - 80044b2: 6893 ldr r3, [r2, #8] - 80044b4: 4023 ands r3, r4 - 80044b6: 6093 str r3, [r2, #8] - 80044b8: f381 8810 msr PRIMASK, r1 + 80044e2: 6802 ldr r2, [r0, #0] + 80044e4: 4c04 ldr r4, [pc, #16] @ (80044f8 ) + 80044e6: 6893 ldr r3, [r2, #8] + 80044e8: 4023 ands r3, r4 + 80044ea: 6093 str r3, [r2, #8] + 80044ec: f381 8810 msr PRIMASK, r1 /* At end of Tx process, restore huart->gState to Ready */ huart->gState = HAL_UART_STATE_READY; - 80044bc: 2320 movs r3, #32 - 80044be: 3088 adds r0, #136 @ 0x88 - 80044c0: 6003 str r3, [r0, #0] + 80044f0: 2320 movs r3, #32 + 80044f2: 3088 adds r0, #136 @ 0x88 + 80044f4: 6003 str r3, [r0, #0] } - 80044c2: bd30 pop {r4, r5, pc} - 80044c4: ff7fffff .word 0xff7fffff + 80044f6: bd30 pop {r4, r5, pc} + 80044f8: ff7fffff .word 0xff7fffff -080044c8 : +080044fc : * @brief End ongoing Rx transfer on UART peripheral (following error detection or Reception completion). * @param huart UART handle. * @retval None */ static void UART_EndRxTransfer(UART_HandleTypeDef *huart) { - 80044c8: b530 push {r4, r5, lr} + 80044fc: b530 push {r4, r5, lr} __ASM volatile ("MRS %0, primask" : "=r" (result) ); - 80044ca: f3ef 8410 mrs r4, PRIMASK + 80044fe: f3ef 8410 mrs r4, PRIMASK __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 80044ce: 2201 movs r2, #1 - 80044d0: f382 8810 msr PRIMASK, r2 + 8004502: 2201 movs r2, #1 + 8004504: f382 8810 msr PRIMASK, r2 /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE)); - 80044d4: 6801 ldr r1, [r0, #0] - 80044d6: 4d13 ldr r5, [pc, #76] @ (8004524 ) - 80044d8: 680b ldr r3, [r1, #0] - 80044da: 402b ands r3, r5 - 80044dc: 600b str r3, [r1, #0] - 80044de: f384 8810 msr PRIMASK, r4 + 8004508: 6801 ldr r1, [r0, #0] + 800450a: 4d13 ldr r5, [pc, #76] @ (8004558 ) + 800450c: 680b ldr r3, [r1, #0] + 800450e: 402b ands r3, r5 + 8004510: 600b str r3, [r1, #0] + 8004512: f384 8810 msr PRIMASK, r4 __ASM volatile ("MRS %0, primask" : "=r" (result) ); - 80044e2: f3ef 8110 mrs r1, PRIMASK + 8004516: f3ef 8110 mrs r1, PRIMASK __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 80044e6: f382 8810 msr PRIMASK, r2 + 800451a: f382 8810 msr PRIMASK, r2 ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE)); - 80044ea: 6802 ldr r2, [r0, #0] - 80044ec: 4c0e ldr r4, [pc, #56] @ (8004528 ) - 80044ee: 6893 ldr r3, [r2, #8] - 80044f0: 4023 ands r3, r4 - 80044f2: 6093 str r3, [r2, #8] - 80044f4: f381 8810 msr PRIMASK, r1 + 800451e: 6802 ldr r2, [r0, #0] + 8004520: 4c0e ldr r4, [pc, #56] @ (800455c ) + 8004522: 6893 ldr r3, [r2, #8] + 8004524: 4023 ands r3, r4 + 8004526: 6093 str r3, [r2, #8] + 8004528: f381 8810 msr PRIMASK, r1 /* In case of reception waiting for IDLE event, disable also the IDLE IE interrupt source */ if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) - 80044f8: 6ec3 ldr r3, [r0, #108] @ 0x6c - 80044fa: 2b01 cmp r3, #1 - 80044fc: d10a bne.n 8004514 + 800452c: 6ec3 ldr r3, [r0, #108] @ 0x6c + 800452e: 2b01 cmp r3, #1 + 8004530: d10a bne.n 8004548 __ASM volatile ("MRS %0, primask" : "=r" (result) ); - 80044fe: f3ef 8110 mrs r1, PRIMASK + 8004532: f3ef 8110 mrs r1, PRIMASK __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 8004502: f383 8810 msr PRIMASK, r3 + 8004536: f383 8810 msr PRIMASK, r3 { ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); - 8004506: 2410 movs r4, #16 - 8004508: 6802 ldr r2, [r0, #0] - 800450a: 6813 ldr r3, [r2, #0] - 800450c: 43a3 bics r3, r4 - 800450e: 6013 str r3, [r2, #0] - 8004510: f381 8810 msr PRIMASK, r1 + 800453a: 2410 movs r4, #16 + 800453c: 6802 ldr r2, [r0, #0] + 800453e: 6813 ldr r3, [r2, #0] + 8004540: 43a3 bics r3, r4 + 8004542: 6013 str r3, [r2, #0] + 8004544: f381 8810 msr PRIMASK, r1 } /* At end of Rx process, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; - 8004514: 0003 movs r3, r0 - 8004516: 2220 movs r2, #32 - 8004518: 338c adds r3, #140 @ 0x8c - 800451a: 601a str r2, [r3, #0] + 8004548: 0003 movs r3, r0 + 800454a: 2220 movs r2, #32 + 800454c: 338c adds r3, #140 @ 0x8c + 800454e: 601a str r2, [r3, #0] huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - 800451c: 2300 movs r3, #0 - 800451e: 66c3 str r3, [r0, #108] @ 0x6c + 8004550: 2300 movs r3, #0 + 8004552: 66c3 str r3, [r0, #108] @ 0x6c /* Reset RxIsr function pointer */ huart->RxISR = NULL; - 8004520: 6743 str r3, [r0, #116] @ 0x74 + 8004554: 6743 str r3, [r0, #116] @ 0x74 } - 8004522: bd30 pop {r4, r5, pc} - 8004524: fffffedf .word 0xfffffedf - 8004528: effffffe .word 0xeffffffe + 8004556: bd30 pop {r4, r5, pc} + 8004558: fffffedf .word 0xfffffedf + 800455c: effffffe .word 0xeffffffe -0800452c : +08004560 : +{ + 8004560: b570 push {r4, r5, r6, lr} + 8004562: 0004 movs r4, r0 + __ASM volatile ("MRS %0, primask" : "=r" (result) ); + 8004564: f3ef 8010 mrs r0, PRIMASK + __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); + 8004568: 2201 movs r2, #1 + 800456a: f382 8810 msr PRIMASK, r2 + ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_PEIE | USART_CR1_RXNEIE_RXFNEIE)); + 800456e: 6821 ldr r1, [r4, #0] + 8004570: 4d29 ldr r5, [pc, #164] @ (8004618 ) + 8004572: 680b ldr r3, [r1, #0] + 8004574: 402b ands r3, r5 + 8004576: 600b str r3, [r1, #0] + 8004578: f380 8810 msr PRIMASK, r0 + __ASM volatile ("MRS %0, primask" : "=r" (result) ); + 800457c: f3ef 8110 mrs r1, PRIMASK + __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); + 8004580: f382 8810 msr PRIMASK, r2 + ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE | USART_CR3_RXFTIE); + 8004584: 6822 ldr r2, [r4, #0] + 8004586: 4825 ldr r0, [pc, #148] @ (800461c ) + 8004588: 6893 ldr r3, [r2, #8] + 800458a: 4003 ands r3, r0 + 800458c: 6093 str r3, [r2, #8] + 800458e: f381 8810 msr PRIMASK, r1 + if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) + 8004592: 6ee3 ldr r3, [r4, #108] @ 0x6c + 8004594: 2b01 cmp r3, #1 + 8004596: d10a bne.n 80045ae + __ASM volatile ("MRS %0, primask" : "=r" (result) ); + 8004598: f3ef 8110 mrs r1, PRIMASK + __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); + 800459c: f383 8810 msr PRIMASK, r3 + ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_IDLEIE)); + 80045a0: 2010 movs r0, #16 + 80045a2: 6822 ldr r2, [r4, #0] + 80045a4: 6813 ldr r3, [r2, #0] + 80045a6: 4383 bics r3, r0 + 80045a8: 6013 str r3, [r2, #0] + 80045aa: f381 8810 msr PRIMASK, r1 + if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) + 80045ae: 2140 movs r1, #64 @ 0x40 + 80045b0: 6823 ldr r3, [r4, #0] + 80045b2: 689b ldr r3, [r3, #8] + 80045b4: 420b tst r3, r1 + 80045b6: d01e beq.n 80045f6 + __ASM volatile ("MRS %0, primask" : "=r" (result) ); + 80045b8: f3ef 8010 mrs r0, PRIMASK + __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); + 80045bc: 2301 movs r3, #1 + 80045be: f383 8810 msr PRIMASK, r3 + ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); + 80045c2: 0025 movs r5, r4 + 80045c4: cd04 ldmia r5!, {r2} + 80045c6: 6893 ldr r3, [r2, #8] + 80045c8: 438b bics r3, r1 + 80045ca: 6093 str r3, [r2, #8] + 80045cc: f380 8810 msr PRIMASK, r0 + if (huart->hdmarx != NULL) + 80045d0: 6fe8 ldr r0, [r5, #124] @ 0x7c + 80045d2: 2800 cmp r0, #0 + 80045d4: d00f beq.n 80045f6 + huart->hdmarx->XferAbortCallback = NULL; + 80045d6: 2300 movs r3, #0 + 80045d8: 6383 str r3, [r0, #56] @ 0x38 + if (HAL_DMA_Abort(huart->hdmarx) != HAL_OK) + 80045da: f7fe fd27 bl 800302c + 80045de: 2800 cmp r0, #0 + 80045e0: d009 beq.n 80045f6 + if (HAL_DMA_GetError(huart->hdmarx) == HAL_DMA_ERROR_TIMEOUT) + 80045e2: 6fe8 ldr r0, [r5, #124] @ 0x7c + 80045e4: f7fe fdee bl 80031c4 + 80045e8: 2820 cmp r0, #32 + 80045ea: d104 bne.n 80045f6 + huart->ErrorCode = HAL_UART_ERROR_DMA; + 80045ec: 2310 movs r3, #16 + 80045ee: 3490 adds r4, #144 @ 0x90 + 80045f0: 6023 str r3, [r4, #0] + return HAL_TIMEOUT; + 80045f2: 381d subs r0, #29 +} + 80045f4: bd70 pop {r4, r5, r6, pc} + huart->RxXferCount = 0U; + 80045f6: 0023 movs r3, r4 + 80045f8: 2000 movs r0, #0 + __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF); + 80045fa: 220f movs r2, #15 + huart->RxXferCount = 0U; + 80045fc: 335e adds r3, #94 @ 0x5e + 80045fe: 8018 strh r0, [r3, #0] + __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF); + 8004600: 6823 ldr r3, [r4, #0] + 8004602: 621a str r2, [r3, #32] + __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); + 8004604: 6999 ldr r1, [r3, #24] + 8004606: 3a07 subs r2, #7 + 8004608: 430a orrs r2, r1 + 800460a: 619a str r2, [r3, #24] + huart->RxState = HAL_UART_STATE_READY; + 800460c: 0023 movs r3, r4 + 800460e: 2220 movs r2, #32 + 8004610: 338c adds r3, #140 @ 0x8c + 8004612: 601a str r2, [r3, #0] + huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; + 8004614: 66e0 str r0, [r4, #108] @ 0x6c + return HAL_OK; + 8004616: e7ed b.n 80045f4 + 8004618: fffffedf .word 0xfffffedf + 800461c: effffffe .word 0xeffffffe + +08004620 : __weak void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) - 800452c: 4770 bx lr + 8004620: 4770 bx lr -0800452e : +08004622 : __weak void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart) - 800452e: 4770 bx lr + 8004622: 4770 bx lr -08004530 : +08004624 : __weak void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart) - 8004530: 4770 bx lr + 8004624: 4770 bx lr -08004532 : +08004626 : * @brief DMA UART communication error callback. * @param hdma DMA handle. * @retval None */ static void UART_DMAError(DMA_HandleTypeDef *hdma) { - 8004532: b570 push {r4, r5, r6, lr} + 8004626: b570 push {r4, r5, r6, lr} UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); - 8004534: 6a84 ldr r4, [r0, #40] @ 0x28 + 8004628: 6a84 ldr r4, [r0, #40] @ 0x28 const HAL_UART_StateTypeDef gstate = huart->gState; - 8004536: 0023 movs r3, r4 - 8004538: 3388 adds r3, #136 @ 0x88 - 800453a: 681a ldr r2, [r3, #0] + 800462a: 0023 movs r3, r4 + 800462c: 3388 adds r3, #136 @ 0x88 + 800462e: 681a ldr r2, [r3, #0] const HAL_UART_StateTypeDef rxstate = huart->RxState; - 800453c: 685d ldr r5, [r3, #4] + 8004630: 685d ldr r5, [r3, #4] /* Stop UART DMA Tx request if ongoing */ if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) && - 800453e: 6823 ldr r3, [r4, #0] - 8004540: 689b ldr r3, [r3, #8] - 8004542: 061b lsls r3, r3, #24 - 8004544: d508 bpl.n 8004558 - 8004546: 2a21 cmp r2, #33 @ 0x21 - 8004548: d106 bne.n 8004558 + 8004632: 6823 ldr r3, [r4, #0] + 8004634: 689b ldr r3, [r3, #8] + 8004636: 061b lsls r3, r3, #24 + 8004638: d508 bpl.n 800464c + 800463a: 2a21 cmp r2, #33 @ 0x21 + 800463c: d106 bne.n 800464c (gstate == HAL_UART_STATE_BUSY_TX)) { huart->TxXferCount = 0U; - 800454a: 0023 movs r3, r4 - 800454c: 2200 movs r2, #0 - 800454e: 3356 adds r3, #86 @ 0x56 + 800463e: 0023 movs r3, r4 + 8004640: 2200 movs r2, #0 + 8004642: 3356 adds r3, #86 @ 0x56 UART_EndTxTransfer(huart); - 8004550: 0020 movs r0, r4 + 8004644: 0020 movs r0, r4 huart->TxXferCount = 0U; - 8004552: 801a strh r2, [r3, #0] + 8004646: 801a strh r2, [r3, #0] UART_EndTxTransfer(huart); - 8004554: f7ff ff9a bl 800448c + 8004648: f7ff ff3a bl 80044c0 } /* Stop UART DMA Rx request if ongoing */ if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) && - 8004558: 6823 ldr r3, [r4, #0] - 800455a: 689b ldr r3, [r3, #8] - 800455c: 065b lsls r3, r3, #25 - 800455e: d508 bpl.n 8004572 - 8004560: 2d22 cmp r5, #34 @ 0x22 - 8004562: d106 bne.n 8004572 + 800464c: 6823 ldr r3, [r4, #0] + 800464e: 689b ldr r3, [r3, #8] + 8004650: 065b lsls r3, r3, #25 + 8004652: d508 bpl.n 8004666 + 8004654: 2d22 cmp r5, #34 @ 0x22 + 8004656: d106 bne.n 8004666 (rxstate == HAL_UART_STATE_BUSY_RX)) { huart->RxXferCount = 0U; - 8004564: 0023 movs r3, r4 - 8004566: 2200 movs r2, #0 - 8004568: 335e adds r3, #94 @ 0x5e + 8004658: 0023 movs r3, r4 + 800465a: 2200 movs r2, #0 + 800465c: 335e adds r3, #94 @ 0x5e UART_EndRxTransfer(huart); - 800456a: 0020 movs r0, r4 + 800465e: 0020 movs r0, r4 huart->RxXferCount = 0U; - 800456c: 801a strh r2, [r3, #0] + 8004660: 801a strh r2, [r3, #0] UART_EndRxTransfer(huart); - 800456e: f7ff ffab bl 80044c8 + 8004662: f7ff ff4b bl 80044fc } huart->ErrorCode |= HAL_UART_ERROR_DMA; - 8004572: 0022 movs r2, r4 - 8004574: 2310 movs r3, #16 - 8004576: 3290 adds r2, #144 @ 0x90 - 8004578: 6811 ldr r1, [r2, #0] + 8004666: 0022 movs r2, r4 + 8004668: 2310 movs r3, #16 + 800466a: 3290 adds r2, #144 @ 0x90 + 800466c: 6811 ldr r1, [r2, #0] #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); - 800457a: 0020 movs r0, r4 + 800466e: 0020 movs r0, r4 huart->ErrorCode |= HAL_UART_ERROR_DMA; - 800457c: 430b orrs r3, r1 - 800457e: 6013 str r3, [r2, #0] + 8004670: 430b orrs r3, r1 + 8004672: 6013 str r3, [r2, #0] HAL_UART_ErrorCallback(huart); - 8004580: f7fc fa6a bl 8000a58 + 8004674: f7fc f9f0 bl 8000a58 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } - 8004584: bd70 pop {r4, r5, r6, pc} + 8004678: bd70 pop {r4, r5, r6, pc} -08004586 : +0800467a : * @param hdma DMA handle. * @retval None */ static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma) { UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); - 8004586: 6a80 ldr r0, [r0, #40] @ 0x28 + 800467a: 6a80 ldr r0, [r0, #40] @ 0x28 huart->RxXferCount = 0U; - 8004588: 2200 movs r2, #0 - 800458a: 0003 movs r3, r0 + 800467c: 2200 movs r2, #0 + 800467e: 0003 movs r3, r0 { - 800458c: b510 push {r4, lr} + 8004680: b510 push {r4, lr} huart->RxXferCount = 0U; - 800458e: 335e adds r3, #94 @ 0x5e - 8004590: 801a strh r2, [r3, #0] + 8004682: 335e adds r3, #94 @ 0x5e + 8004684: 801a strh r2, [r3, #0] #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); - 8004592: f7fc fa61 bl 8000a58 + 8004686: f7fc f9e7 bl 8000a58 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } - 8004596: bd10 pop {r4, pc} + 800468a: bd10 pop {r4, pc} -08004598 : +0800468c : { - 8004598: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr} + 800468c: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr} uint32_t isrflags = READ_REG(huart->Instance->ISR); - 800459a: 6801 ldr r1, [r0, #0] + 800468e: 6801 ldr r1, [r0, #0] errorflags = (isrflags & (uint32_t)(USART_ISR_PE | USART_ISR_FE | USART_ISR_ORE | USART_ISR_NE | USART_ISR_RTOF)); - 800459c: 4dc3 ldr r5, [pc, #780] @ (80048ac ) + 8004690: 4dc3 ldr r5, [pc, #780] @ (80049a0 ) uint32_t isrflags = READ_REG(huart->Instance->ISR); - 800459e: 69cb ldr r3, [r1, #28] + 8004692: 69cb ldr r3, [r1, #28] { - 80045a0: 0004 movs r4, r0 + 8004694: 0004 movs r4, r0 uint32_t cr1its = READ_REG(huart->Instance->CR1); - 80045a2: 680a ldr r2, [r1, #0] + 8004696: 680a ldr r2, [r1, #0] uint32_t cr3its = READ_REG(huart->Instance->CR3); - 80045a4: 6888 ldr r0, [r1, #8] + 8004698: 6888 ldr r0, [r1, #8] if (errorflags == 0U) - 80045a6: 422b tst r3, r5 - 80045a8: d110 bne.n 80045cc + 800469a: 422b tst r3, r5 + 800469c: d110 bne.n 80046c0 if (((isrflags & USART_ISR_RXNE_RXFNE) != 0U) - 80045aa: 2520 movs r5, #32 - 80045ac: 422b tst r3, r5 - 80045ae: d100 bne.n 80045b2 - 80045b0: e09b b.n 80046ea + 800469e: 2520 movs r5, #32 + 80046a0: 422b tst r3, r5 + 80046a2: d100 bne.n 80046a6 + 80046a4: e09b b.n 80047de || ((cr3its & USART_CR3_RXFTIE) != 0U))) - 80045b2: 2680 movs r6, #128 @ 0x80 - 80045b4: 0576 lsls r6, r6, #21 + 80046a6: 2680 movs r6, #128 @ 0x80 + 80046a8: 0576 lsls r6, r6, #21 && (((cr1its & USART_CR1_RXNEIE_RXFNEIE) != 0U) - 80045b6: 4015 ands r5, r2 + 80046aa: 4015 ands r5, r2 || ((cr3its & USART_CR3_RXFTIE) != 0U))) - 80045b8: 4006 ands r6, r0 - 80045ba: 4335 orrs r5, r6 - 80045bc: d100 bne.n 80045c0 - 80045be: e094 b.n 80046ea + 80046ac: 4006 ands r6, r0 + 80046ae: 4335 orrs r5, r6 + 80046b0: d100 bne.n 80046b4 + 80046b2: e094 b.n 80047de if (huart->RxISR != NULL) - 80045c0: 6f63 ldr r3, [r4, #116] @ 0x74 + 80046b4: 6f63 ldr r3, [r4, #116] @ 0x74 huart->TxISR(huart); - 80045c2: 0020 movs r0, r4 + 80046b6: 0020 movs r0, r4 if (huart->TxISR != NULL) - 80045c4: 2b00 cmp r3, #0 - 80045c6: d000 beq.n 80045ca - 80045c8: e085 b.n 80046d6 - 80045ca: e085 b.n 80046d8 + 80046b8: 2b00 cmp r3, #0 + 80046ba: d000 beq.n 80046be + 80046bc: e085 b.n 80047ca + 80046be: e085 b.n 80047cc && ((((cr3its & (USART_CR3_RXFTIE | USART_CR3_EIE)) != 0U) - 80045cc: 4db8 ldr r5, [pc, #736] @ (80048b0 ) - 80045ce: 4005 ands r5, r0 - 80045d0: 9500 str r5, [sp, #0] + 80046c0: 4db8 ldr r5, [pc, #736] @ (80049a4 ) + 80046c2: 4005 ands r5, r0 + 80046c4: 9500 str r5, [sp, #0] || ((cr1its & (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE | USART_CR1_RTOIE)) != 0U)))) - 80045d2: 4db8 ldr r5, [pc, #736] @ (80048b4 ) - 80045d4: 9e00 ldr r6, [sp, #0] - 80045d6: 4015 ands r5, r2 - 80045d8: 4335 orrs r5, r6 - 80045da: d100 bne.n 80045de - 80045dc: e085 b.n 80046ea + 80046c6: 4db8 ldr r5, [pc, #736] @ (80049a8 ) + 80046c8: 9e00 ldr r6, [sp, #0] + 80046ca: 4015 ands r5, r2 + 80046cc: 4335 orrs r5, r6 + 80046ce: d100 bne.n 80046d2 + 80046d0: e085 b.n 80047de if (((isrflags & USART_ISR_PE) != 0U) && ((cr1its & USART_CR1_PEIE) != 0U)) - 80045de: 0025 movs r5, r4 - 80045e0: 2601 movs r6, #1 - 80045e2: 3590 adds r5, #144 @ 0x90 - 80045e4: 4233 tst r3, r6 - 80045e6: d005 beq.n 80045f4 - 80045e8: 05d7 lsls r7, r2, #23 - 80045ea: d503 bpl.n 80045f4 + 80046d2: 0025 movs r5, r4 + 80046d4: 2601 movs r6, #1 + 80046d6: 3590 adds r5, #144 @ 0x90 + 80046d8: 4233 tst r3, r6 + 80046da: d005 beq.n 80046e8 + 80046dc: 05d7 lsls r7, r2, #23 + 80046de: d503 bpl.n 80046e8 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_PEF); - 80045ec: 620e str r6, [r1, #32] + 80046e0: 620e str r6, [r1, #32] huart->ErrorCode |= HAL_UART_ERROR_PE; - 80045ee: 682f ldr r7, [r5, #0] - 80045f0: 433e orrs r6, r7 - 80045f2: 602e str r6, [r5, #0] - if (((isrflags & USART_ISR_FE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U)) - 80045f4: 2602 movs r6, #2 - 80045f6: 4233 tst r3, r6 - 80045f8: d00c beq.n 8004614 - 80045fa: 07c7 lsls r7, r0, #31 - 80045fc: d50a bpl.n 8004614 - huart->ErrorCode |= HAL_UART_ERROR_FE; - 80045fe: 0027 movs r7, r4 - __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_FEF); - 8004600: 620e str r6, [r1, #32] - huart->ErrorCode |= HAL_UART_ERROR_FE; - 8004602: 3790 adds r7, #144 @ 0x90 - 8004604: 683e ldr r6, [r7, #0] - 8004606: 9701 str r7, [sp, #4] - 8004608: 46b4 mov ip, r6 - 800460a: 2604 movs r6, #4 - 800460c: 4667 mov r7, ip - 800460e: 433e orrs r6, r7 - 8004610: 9f01 ldr r7, [sp, #4] - 8004612: 603e str r6, [r7, #0] - if (((isrflags & USART_ISR_NE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U)) - 8004614: 2604 movs r6, #4 - 8004616: 4233 tst r3, r6 - 8004618: d00c beq.n 8004634 - 800461a: 07c7 lsls r7, r0, #31 - 800461c: d50a bpl.n 8004634 - huart->ErrorCode |= HAL_UART_ERROR_NE; - 800461e: 0027 movs r7, r4 - __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_NEF); - 8004620: 620e str r6, [r1, #32] - huart->ErrorCode |= HAL_UART_ERROR_NE; - 8004622: 3790 adds r7, #144 @ 0x90 - 8004624: 683e ldr r6, [r7, #0] - 8004626: 9701 str r7, [sp, #4] - 8004628: 46b4 mov ip, r6 - 800462a: 2602 movs r6, #2 - 800462c: 4667 mov r7, ip - 800462e: 433e orrs r6, r7 - 8004630: 9f01 ldr r7, [sp, #4] - 8004632: 603e str r6, [r7, #0] - if (((isrflags & USART_ISR_ORE) != 0U) - 8004634: 2608 movs r6, #8 - 8004636: 46b4 mov ip, r6 - 8004638: 4233 tst r3, r6 - 800463a: d009 beq.n 8004650 - && (((cr1its & USART_CR1_RXNEIE_RXFNEIE) != 0U) || - 800463c: 2720 movs r7, #32 - 800463e: 9e00 ldr r6, [sp, #0] - 8004640: 4017 ands r7, r2 - 8004642: 4337 orrs r7, r6 - 8004644: d004 beq.n 8004650 - __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF); - 8004646: 4666 mov r6, ip - 8004648: 620e str r6, [r1, #32] - huart->ErrorCode |= HAL_UART_ERROR_ORE; - 800464a: 682f ldr r7, [r5, #0] - 800464c: 433e orrs r6, r7 - 800464e: 602e str r6, [r5, #0] - if (((isrflags & USART_ISR_RTOF) != 0U) && ((cr1its & USART_CR1_RTOIE) != 0U)) - 8004650: 2680 movs r6, #128 @ 0x80 - 8004652: 0136 lsls r6, r6, #4 - 8004654: 4233 tst r3, r6 - 8004656: d006 beq.n 8004666 - 8004658: 0157 lsls r7, r2, #5 - 800465a: d504 bpl.n 8004666 - __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_RTOF); - 800465c: 620e str r6, [r1, #32] - huart->ErrorCode |= HAL_UART_ERROR_RTO; - 800465e: 2120 movs r1, #32 - 8004660: 682e ldr r6, [r5, #0] - 8004662: 4331 orrs r1, r6 - 8004664: 6029 str r1, [r5, #0] - if (huart->ErrorCode != HAL_UART_ERROR_NONE) - 8004666: 6829 ldr r1, [r5, #0] - 8004668: 2900 cmp r1, #0 - 800466a: d035 beq.n 80046d8 - if (((isrflags & USART_ISR_RXNE_RXFNE) != 0U) - 800466c: 2120 movs r1, #32 - 800466e: 420b tst r3, r1 - 8004670: d00a beq.n 8004688 - || ((cr3its & USART_CR3_RXFTIE) != 0U))) - 8004672: 2380 movs r3, #128 @ 0x80 - 8004674: 055b lsls r3, r3, #21 - && (((cr1its & USART_CR1_RXNEIE_RXFNEIE) != 0U) - 8004676: 4011 ands r1, r2 - || ((cr3its & USART_CR3_RXFTIE) != 0U))) - 8004678: 4003 ands r3, r0 - 800467a: 4319 orrs r1, r3 - 800467c: d004 beq.n 8004688 - if (huart->RxISR != NULL) - 800467e: 6f63 ldr r3, [r4, #116] @ 0x74 - 8004680: 2b00 cmp r3, #0 - 8004682: d001 beq.n 8004688 - huart->RxISR(huart); - 8004684: 0020 movs r0, r4 - 8004686: 4798 blx r3 - if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) || - 8004688: 6822 ldr r2, [r4, #0] - errorcode = huart->ErrorCode; - 800468a: 682b ldr r3, [r5, #0] - if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) || - 800468c: 2740 movs r7, #64 @ 0x40 - 800468e: 6896 ldr r6, [r2, #8] - ((errorcode & (HAL_UART_ERROR_RTO | HAL_UART_ERROR_ORE)) != 0U)) - 8004690: 2228 movs r2, #40 @ 0x28 - if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) || - 8004692: 403e ands r6, r7 - ((errorcode & (HAL_UART_ERROR_RTO | HAL_UART_ERROR_ORE)) != 0U)) - 8004694: 4013 ands r3, r2 - UART_EndRxTransfer(huart); - 8004696: 0020 movs r0, r4 - if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) || - 8004698: 431e orrs r6, r3 - 800469a: d022 beq.n 80046e2 - UART_EndRxTransfer(huart); - 800469c: f7ff ff14 bl 80044c8 - if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 80046a0: 6823 ldr r3, [r4, #0] - 80046a2: 689b ldr r3, [r3, #8] - 80046a4: 423b tst r3, r7 - 80046a6: d018 beq.n 80046da - __ASM volatile ("MRS %0, primask" : "=r" (result) ); - 80046a8: f3ef 8110 mrs r1, PRIMASK - __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 80046ac: 2301 movs r3, #1 - 80046ae: f383 8810 msr PRIMASK, r3 - ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); - 80046b2: 0025 movs r5, r4 - 80046b4: cd04 ldmia r5!, {r2} - 80046b6: 6893 ldr r3, [r2, #8] - 80046b8: 43bb bics r3, r7 - 80046ba: 6093 str r3, [r2, #8] - 80046bc: f381 8810 msr PRIMASK, r1 - if (huart->hdmarx != NULL) - 80046c0: 6fe8 ldr r0, [r5, #124] @ 0x7c - 80046c2: 2800 cmp r0, #0 - 80046c4: d009 beq.n 80046da - huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError; - 80046c6: 4b7c ldr r3, [pc, #496] @ (80048b8 ) - 80046c8: 6383 str r3, [r0, #56] @ 0x38 - if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK) - 80046ca: f7fe fcd1 bl 8003070 - 80046ce: 2800 cmp r0, #0 - 80046d0: d002 beq.n 80046d8 - huart->hdmarx->XferAbortCallback(huart->hdmarx); - 80046d2: 6fe8 ldr r0, [r5, #124] @ 0x7c - 80046d4: 6b83 ldr r3, [r0, #56] @ 0x38 - 80046d6: 4798 blx r3 -} - 80046d8: bdf7 pop {r0, r1, r2, r4, r5, r6, r7, pc} - HAL_UART_ErrorCallback(huart); - 80046da: 0020 movs r0, r4 - 80046dc: f7fc f9bc bl 8000a58 - 80046e0: e7fa b.n 80046d8 - HAL_UART_ErrorCallback(huart); - 80046e2: f7fc f9b9 bl 8000a58 - huart->ErrorCode = HAL_UART_ERROR_NONE; + 80046e2: 682f ldr r7, [r5, #0] + 80046e4: 433e orrs r6, r7 80046e6: 602e str r6, [r5, #0] - 80046e8: e7f6 b.n 80046d8 - if ((huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) - 80046ea: 6ee5 ldr r5, [r4, #108] @ 0x6c - 80046ec: 2d01 cmp r5, #1 - 80046ee: d000 beq.n 80046f2 - 80046f0: e0a4 b.n 800483c - && ((isrflags & USART_ISR_IDLE) != 0U) - 80046f2: 2610 movs r6, #16 - 80046f4: 4233 tst r3, r6 - 80046f6: d100 bne.n 80046fa - 80046f8: e0a0 b.n 800483c - && ((cr1its & USART_ISR_IDLE) != 0U)) - 80046fa: 4232 tst r2, r6 - 80046fc: d100 bne.n 8004700 - 80046fe: e09d b.n 800483c - && (nb_remaining_rx_data < huart->RxXferSize)) - 8004700: 0023 movs r3, r4 - __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF); - 8004702: 620e str r6, [r1, #32] - if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 8004704: 6889 ldr r1, [r1, #8] - && (nb_remaining_rx_data < huart->RxXferSize)) - 8004706: 335c adds r3, #92 @ 0x5c - if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 8004708: 0008 movs r0, r1 - && (nb_remaining_rx_data < huart->RxXferSize)) - 800470a: 881a ldrh r2, [r3, #0] - if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 800470c: 2340 movs r3, #64 @ 0x40 - 800470e: 4018 ands r0, r3 - 8004710: 4219 tst r1, r3 - 8004712: d05e beq.n 80047d2 - uint16_t nb_remaining_rx_data = (uint16_t) __HAL_DMA_GET_COUNTER(huart->hdmarx); - 8004714: 1d20 adds r0, r4, #4 - 8004716: 6fc1 ldr r1, [r0, #124] @ 0x7c - 8004718: 680f ldr r7, [r1, #0] - 800471a: 6879 ldr r1, [r7, #4] - 800471c: b289 uxth r1, r1 - if ((nb_remaining_rx_data > 0U) - 800471e: 2900 cmp r1, #0 - 8004720: d04d beq.n 80047be - && (nb_remaining_rx_data < huart->RxXferSize)) - 8004722: 4291 cmp r1, r2 - 8004724: d24b bcs.n 80047be - huart->RxXferCount = nb_remaining_rx_data; - 8004726: 0022 movs r2, r4 - 8004728: 325e adds r2, #94 @ 0x5e - 800472a: 8011 strh r1, [r2, #0] - if (HAL_IS_BIT_CLR(huart->hdmarx->Instance->CCR, DMA_CCR_CIRC)) - 800472c: 2120 movs r1, #32 - 800472e: 468c mov ip, r1 - 8004730: 683a ldr r2, [r7, #0] - 8004732: 4011 ands r1, r2 - 8004734: 9100 str r1, [sp, #0] - 8004736: 4661 mov r1, ip - 8004738: 420a tst r2, r1 - 800473a: d132 bne.n 80047a2 + if (((isrflags & USART_ISR_FE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U)) + 80046e8: 2602 movs r6, #2 + 80046ea: 4233 tst r3, r6 + 80046ec: d00c beq.n 8004708 + 80046ee: 07c7 lsls r7, r0, #31 + 80046f0: d50a bpl.n 8004708 + huart->ErrorCode |= HAL_UART_ERROR_FE; + 80046f2: 0027 movs r7, r4 + __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_FEF); + 80046f4: 620e str r6, [r1, #32] + huart->ErrorCode |= HAL_UART_ERROR_FE; + 80046f6: 3790 adds r7, #144 @ 0x90 + 80046f8: 683e ldr r6, [r7, #0] + 80046fa: 9701 str r7, [sp, #4] + 80046fc: 46b4 mov ip, r6 + 80046fe: 2604 movs r6, #4 + 8004700: 4667 mov r7, ip + 8004702: 433e orrs r6, r7 + 8004704: 9f01 ldr r7, [sp, #4] + 8004706: 603e str r6, [r7, #0] + if (((isrflags & USART_ISR_NE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U)) + 8004708: 2604 movs r6, #4 + 800470a: 4233 tst r3, r6 + 800470c: d00c beq.n 8004728 + 800470e: 07c7 lsls r7, r0, #31 + 8004710: d50a bpl.n 8004728 + huart->ErrorCode |= HAL_UART_ERROR_NE; + 8004712: 0027 movs r7, r4 + __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_NEF); + 8004714: 620e str r6, [r1, #32] + huart->ErrorCode |= HAL_UART_ERROR_NE; + 8004716: 3790 adds r7, #144 @ 0x90 + 8004718: 683e ldr r6, [r7, #0] + 800471a: 9701 str r7, [sp, #4] + 800471c: 46b4 mov ip, r6 + 800471e: 2602 movs r6, #2 + 8004720: 4667 mov r7, ip + 8004722: 433e orrs r6, r7 + 8004724: 9f01 ldr r7, [sp, #4] + 8004726: 603e str r6, [r7, #0] + if (((isrflags & USART_ISR_ORE) != 0U) + 8004728: 2608 movs r6, #8 + 800472a: 46b4 mov ip, r6 + 800472c: 4233 tst r3, r6 + 800472e: d009 beq.n 8004744 + && (((cr1its & USART_CR1_RXNEIE_RXFNEIE) != 0U) || + 8004730: 2720 movs r7, #32 + 8004732: 9e00 ldr r6, [sp, #0] + 8004734: 4017 ands r7, r2 + 8004736: 4337 orrs r7, r6 + 8004738: d004 beq.n 8004744 + __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF); + 800473a: 4666 mov r6, ip + 800473c: 620e str r6, [r1, #32] + huart->ErrorCode |= HAL_UART_ERROR_ORE; + 800473e: 682f ldr r7, [r5, #0] + 8004740: 433e orrs r6, r7 + 8004742: 602e str r6, [r5, #0] + if (((isrflags & USART_ISR_RTOF) != 0U) && ((cr1its & USART_CR1_RTOIE) != 0U)) + 8004744: 2680 movs r6, #128 @ 0x80 + 8004746: 0136 lsls r6, r6, #4 + 8004748: 4233 tst r3, r6 + 800474a: d006 beq.n 800475a + 800474c: 0157 lsls r7, r2, #5 + 800474e: d504 bpl.n 800475a + __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_RTOF); + 8004750: 620e str r6, [r1, #32] + huart->ErrorCode |= HAL_UART_ERROR_RTO; + 8004752: 2120 movs r1, #32 + 8004754: 682e ldr r6, [r5, #0] + 8004756: 4331 orrs r1, r6 + 8004758: 6029 str r1, [r5, #0] + if (huart->ErrorCode != HAL_UART_ERROR_NONE) + 800475a: 6829 ldr r1, [r5, #0] + 800475c: 2900 cmp r1, #0 + 800475e: d035 beq.n 80047cc + if (((isrflags & USART_ISR_RXNE_RXFNE) != 0U) + 8004760: 2120 movs r1, #32 + 8004762: 420b tst r3, r1 + 8004764: d00a beq.n 800477c + || ((cr3its & USART_CR3_RXFTIE) != 0U))) + 8004766: 2380 movs r3, #128 @ 0x80 + 8004768: 055b lsls r3, r3, #21 + && (((cr1its & USART_CR1_RXNEIE_RXFNEIE) != 0U) + 800476a: 4011 ands r1, r2 + || ((cr3its & USART_CR3_RXFTIE) != 0U))) + 800476c: 4003 ands r3, r0 + 800476e: 4319 orrs r1, r3 + 8004770: d004 beq.n 800477c + if (huart->RxISR != NULL) + 8004772: 6f63 ldr r3, [r4, #116] @ 0x74 + 8004774: 2b00 cmp r3, #0 + 8004776: d001 beq.n 800477c + huart->RxISR(huart); + 8004778: 0020 movs r0, r4 + 800477a: 4798 blx r3 + if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) || + 800477c: 6822 ldr r2, [r4, #0] + errorcode = huart->ErrorCode; + 800477e: 682b ldr r3, [r5, #0] + if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) || + 8004780: 2740 movs r7, #64 @ 0x40 + 8004782: 6896 ldr r6, [r2, #8] + ((errorcode & (HAL_UART_ERROR_RTO | HAL_UART_ERROR_ORE)) != 0U)) + 8004784: 2228 movs r2, #40 @ 0x28 + if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) || + 8004786: 403e ands r6, r7 + ((errorcode & (HAL_UART_ERROR_RTO | HAL_UART_ERROR_ORE)) != 0U)) + 8004788: 4013 ands r3, r2 + UART_EndRxTransfer(huart); + 800478a: 0020 movs r0, r4 + if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) || + 800478c: 431e orrs r6, r3 + 800478e: d022 beq.n 80047d6 + UART_EndRxTransfer(huart); + 8004790: f7ff feb4 bl 80044fc + if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) + 8004794: 6823 ldr r3, [r4, #0] + 8004796: 689b ldr r3, [r3, #8] + 8004798: 423b tst r3, r7 + 800479a: d018 beq.n 80047ce __ASM volatile ("MRS %0, primask" : "=r" (result) ); - 800473c: f3ef 8710 mrs r7, PRIMASK + 800479c: f3ef 8110 mrs r1, PRIMASK __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 8004740: f385 8810 msr PRIMASK, r5 - ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); - 8004744: 6821 ldr r1, [r4, #0] - 8004746: 4e5d ldr r6, [pc, #372] @ (80048bc ) - 8004748: 680a ldr r2, [r1, #0] - 800474a: 4032 ands r2, r6 - 800474c: 600a str r2, [r1, #0] - 800474e: f387 8810 msr PRIMASK, r7 - __ASM volatile ("MRS %0, primask" : "=r" (result) ); - 8004752: f3ef 8710 mrs r7, PRIMASK - __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 8004756: f385 8810 msr PRIMASK, r5 - ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - 800475a: 6821 ldr r1, [r4, #0] - 800475c: 688a ldr r2, [r1, #8] - 800475e: 43aa bics r2, r5 - 8004760: 608a str r2, [r1, #8] - 8004762: f387 8810 msr PRIMASK, r7 - __ASM volatile ("MRS %0, primask" : "=r" (result) ); - 8004766: f3ef 8710 mrs r7, PRIMASK - __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 800476a: f385 8810 msr PRIMASK, r5 + 80047a0: 2301 movs r3, #1 + 80047a2: f383 8810 msr PRIMASK, r3 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); - 800476e: 6821 ldr r1, [r4, #0] - 8004770: 688a ldr r2, [r1, #8] - 8004772: 439a bics r2, r3 - 8004774: 608a str r2, [r1, #8] - 8004776: f387 8810 msr PRIMASK, r7 + 80047a6: 0025 movs r5, r4 + 80047a8: cd04 ldmia r5!, {r2} + 80047aa: 6893 ldr r3, [r2, #8] + 80047ac: 43bb bics r3, r7 + 80047ae: 6093 str r3, [r2, #8] + 80047b0: f381 8810 msr PRIMASK, r1 + if (huart->hdmarx != NULL) + 80047b4: 6fe8 ldr r0, [r5, #124] @ 0x7c + 80047b6: 2800 cmp r0, #0 + 80047b8: d009 beq.n 80047ce + huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError; + 80047ba: 4b7c ldr r3, [pc, #496] @ (80049ac ) + 80047bc: 6383 str r3, [r0, #56] @ 0x38 + if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK) + 80047be: f7fe fc6f bl 80030a0 + 80047c2: 2800 cmp r0, #0 + 80047c4: d002 beq.n 80047cc + huart->hdmarx->XferAbortCallback(huart->hdmarx); + 80047c6: 6fe8 ldr r0, [r5, #124] @ 0x7c + 80047c8: 6b83 ldr r3, [r0, #56] @ 0x38 + 80047ca: 4798 blx r3 +} + 80047cc: bdf7 pop {r0, r1, r2, r4, r5, r6, r7, pc} + HAL_UART_ErrorCallback(huart); + 80047ce: 0020 movs r0, r4 + 80047d0: f7fc f942 bl 8000a58 + 80047d4: e7fa b.n 80047cc + HAL_UART_ErrorCallback(huart); + 80047d6: f7fc f93f bl 8000a58 + huart->ErrorCode = HAL_UART_ERROR_NONE; + 80047da: 602e str r6, [r5, #0] + 80047dc: e7f6 b.n 80047cc + if ((huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) + 80047de: 6ee5 ldr r5, [r4, #108] @ 0x6c + 80047e0: 2d01 cmp r5, #1 + 80047e2: d000 beq.n 80047e6 + 80047e4: e0a4 b.n 8004930 + && ((isrflags & USART_ISR_IDLE) != 0U) + 80047e6: 2610 movs r6, #16 + 80047e8: 4233 tst r3, r6 + 80047ea: d100 bne.n 80047ee + 80047ec: e0a0 b.n 8004930 + && ((cr1its & USART_ISR_IDLE) != 0U)) + 80047ee: 4232 tst r2, r6 + 80047f0: d100 bne.n 80047f4 + 80047f2: e09d b.n 8004930 + && (nb_remaining_rx_data < huart->RxXferSize)) + 80047f4: 0023 movs r3, r4 + __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF); + 80047f6: 620e str r6, [r1, #32] + if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) + 80047f8: 6889 ldr r1, [r1, #8] + && (nb_remaining_rx_data < huart->RxXferSize)) + 80047fa: 335c adds r3, #92 @ 0x5c + if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) + 80047fc: 0008 movs r0, r1 + && (nb_remaining_rx_data < huart->RxXferSize)) + 80047fe: 881a ldrh r2, [r3, #0] + if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) + 8004800: 2340 movs r3, #64 @ 0x40 + 8004802: 4018 ands r0, r3 + 8004804: 4219 tst r1, r3 + 8004806: d05e beq.n 80048c6 + uint16_t nb_remaining_rx_data = (uint16_t) __HAL_DMA_GET_COUNTER(huart->hdmarx); + 8004808: 1d20 adds r0, r4, #4 + 800480a: 6fc1 ldr r1, [r0, #124] @ 0x7c + 800480c: 680f ldr r7, [r1, #0] + 800480e: 6879 ldr r1, [r7, #4] + 8004810: b289 uxth r1, r1 + if ((nb_remaining_rx_data > 0U) + 8004812: 2900 cmp r1, #0 + 8004814: d04d beq.n 80048b2 + && (nb_remaining_rx_data < huart->RxXferSize)) + 8004816: 4291 cmp r1, r2 + 8004818: d24b bcs.n 80048b2 + huart->RxXferCount = nb_remaining_rx_data; + 800481a: 0022 movs r2, r4 + 800481c: 325e adds r2, #94 @ 0x5e + 800481e: 8011 strh r1, [r2, #0] + if (HAL_IS_BIT_CLR(huart->hdmarx->Instance->CCR, DMA_CCR_CIRC)) + 8004820: 2120 movs r1, #32 + 8004822: 468c mov ip, r1 + 8004824: 683a ldr r2, [r7, #0] + 8004826: 4011 ands r1, r2 + 8004828: 9100 str r1, [sp, #0] + 800482a: 4661 mov r1, ip + 800482c: 420a tst r2, r1 + 800482e: d132 bne.n 8004896 + __ASM volatile ("MRS %0, primask" : "=r" (result) ); + 8004830: f3ef 8710 mrs r7, PRIMASK + __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); + 8004834: f385 8810 msr PRIMASK, r5 + ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); + 8004838: 6821 ldr r1, [r4, #0] + 800483a: 4e5d ldr r6, [pc, #372] @ (80049b0 ) + 800483c: 680a ldr r2, [r1, #0] + 800483e: 4032 ands r2, r6 + 8004840: 600a str r2, [r1, #0] + 8004842: f387 8810 msr PRIMASK, r7 + __ASM volatile ("MRS %0, primask" : "=r" (result) ); + 8004846: f3ef 8710 mrs r7, PRIMASK + __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); + 800484a: f385 8810 msr PRIMASK, r5 + ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 800484e: 6821 ldr r1, [r4, #0] + 8004850: 688a ldr r2, [r1, #8] + 8004852: 43aa bics r2, r5 + 8004854: 608a str r2, [r1, #8] + 8004856: f387 8810 msr PRIMASK, r7 + __ASM volatile ("MRS %0, primask" : "=r" (result) ); + 800485a: f3ef 8710 mrs r7, PRIMASK + __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); + 800485e: f385 8810 msr PRIMASK, r5 + ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); + 8004862: 6821 ldr r1, [r4, #0] + 8004864: 688a ldr r2, [r1, #8] + 8004866: 439a bics r2, r3 + 8004868: 608a str r2, [r1, #8] + 800486a: f387 8810 msr PRIMASK, r7 huart->RxState = HAL_UART_STATE_READY; - 800477a: 0023 movs r3, r4 - 800477c: 4662 mov r2, ip - 800477e: 338c adds r3, #140 @ 0x8c - 8004780: 601a str r2, [r3, #0] + 800486e: 0023 movs r3, r4 + 8004870: 4662 mov r2, ip + 8004872: 338c adds r3, #140 @ 0x8c + 8004874: 601a str r2, [r3, #0] huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - 8004782: 9b00 ldr r3, [sp, #0] - 8004784: 66e3 str r3, [r4, #108] @ 0x6c + 8004876: 9b00 ldr r3, [sp, #0] + 8004878: 66e3 str r3, [r4, #108] @ 0x6c __ASM volatile ("MRS %0, primask" : "=r" (result) ); - 8004786: f3ef 8110 mrs r1, PRIMASK + 800487a: f3ef 8110 mrs r1, PRIMASK __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 800478a: f385 8810 msr PRIMASK, r5 + 800487e: f385 8810 msr PRIMASK, r5 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); - 800478e: 6822 ldr r2, [r4, #0] - 8004790: 350f adds r5, #15 - 8004792: 6813 ldr r3, [r2, #0] - 8004794: 43ab bics r3, r5 - 8004796: 6013 str r3, [r2, #0] - 8004798: f381 8810 msr PRIMASK, r1 + 8004882: 6822 ldr r2, [r4, #0] + 8004884: 350f adds r5, #15 + 8004886: 6813 ldr r3, [r2, #0] + 8004888: 43ab bics r3, r5 + 800488a: 6013 str r3, [r2, #0] + 800488c: f381 8810 msr PRIMASK, r1 (void)HAL_DMA_Abort(huart->hdmarx); - 800479c: 6fc0 ldr r0, [r0, #124] @ 0x7c - 800479e: f7fe fc2d bl 8002ffc + 8004890: 6fc0 ldr r0, [r0, #124] @ 0x7c + 8004892: f7fe fbcb bl 800302c huart->RxEventType = HAL_UART_RXEVENT_IDLE; - 80047a2: 2302 movs r3, #2 + 8004896: 2302 movs r3, #2 HAL_UARTEx_RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount)); - 80047a4: 0022 movs r2, r4 + 8004898: 0022 movs r2, r4 huart->RxEventType = HAL_UART_RXEVENT_IDLE; - 80047a6: 6723 str r3, [r4, #112] @ 0x70 + 800489a: 6723 str r3, [r4, #112] @ 0x70 HAL_UARTEx_RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount)); - 80047a8: 0023 movs r3, r4 - 80047aa: 325c adds r2, #92 @ 0x5c - 80047ac: 335e adds r3, #94 @ 0x5e - 80047ae: 881b ldrh r3, [r3, #0] - 80047b0: 8811 ldrh r1, [r2, #0] - 80047b2: 1ac9 subs r1, r1, r3 - 80047b4: b289 uxth r1, r1 + 800489c: 0023 movs r3, r4 + 800489e: 325c adds r2, #92 @ 0x5c + 80048a0: 335e adds r3, #94 @ 0x5e + 80048a2: 881b ldrh r3, [r3, #0] + 80048a4: 8811 ldrh r1, [r2, #0] + 80048a6: 1ac9 subs r1, r1, r3 + 80048a8: b289 uxth r1, r1 HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize); - 80047b6: 0020 movs r0, r4 - 80047b8: f7fc f916 bl 80009e8 - 80047bc: e78c b.n 80046d8 + 80048aa: 0020 movs r0, r4 + 80048ac: f7fc f89c bl 80009e8 + 80048b0: e78c b.n 80047cc if (nb_remaining_rx_data == huart->RxXferSize) - 80047be: 4291 cmp r1, r2 - 80047c0: d000 beq.n 80047c4 - 80047c2: e789 b.n 80046d8 + 80048b2: 4291 cmp r1, r2 + 80048b4: d000 beq.n 80048b8 + 80048b6: e789 b.n 80047cc if (HAL_IS_BIT_SET(huart->hdmarx->Instance->CCR, DMA_CCR_CIRC)) - 80047c4: 683b ldr r3, [r7, #0] - 80047c6: 069b lsls r3, r3, #26 - 80047c8: d400 bmi.n 80047cc - 80047ca: e785 b.n 80046d8 + 80048b8: 683b ldr r3, [r7, #0] + 80048ba: 069b lsls r3, r3, #26 + 80048bc: d400 bmi.n 80048c0 + 80048be: e785 b.n 80047cc huart->RxEventType = HAL_UART_RXEVENT_IDLE; - 80047cc: 2302 movs r3, #2 - 80047ce: 6723 str r3, [r4, #112] @ 0x70 - 80047d0: e7f1 b.n 80047b6 + 80048c0: 2302 movs r3, #2 + 80048c2: 6723 str r3, [r4, #112] @ 0x70 + 80048c4: e7f1 b.n 80048aa uint16_t nb_rx_data = huart->RxXferSize - huart->RxXferCount; - 80047d2: 0021 movs r1, r4 - 80047d4: 315e adds r1, #94 @ 0x5e - 80047d6: 880b ldrh r3, [r1, #0] + 80048c6: 0021 movs r1, r4 + 80048c8: 315e adds r1, #94 @ 0x5e + 80048ca: 880b ldrh r3, [r1, #0] if ((huart->RxXferCount > 0U) - 80047d8: 8809 ldrh r1, [r1, #0] + 80048cc: 8809 ldrh r1, [r1, #0] uint16_t nb_rx_data = huart->RxXferSize - huart->RxXferCount; - 80047da: b29b uxth r3, r3 + 80048ce: b29b uxth r3, r3 if ((huart->RxXferCount > 0U) - 80047dc: 2900 cmp r1, #0 - 80047de: d100 bne.n 80047e2 - 80047e0: e77a b.n 80046d8 + 80048d0: 2900 cmp r1, #0 + 80048d2: d100 bne.n 80048d6 + 80048d4: e77a b.n 80047cc uint16_t nb_rx_data = huart->RxXferSize - huart->RxXferCount; - 80047e2: 1ad2 subs r2, r2, r3 - 80047e4: b291 uxth r1, r2 + 80048d6: 1ad2 subs r2, r2, r3 + 80048d8: b291 uxth r1, r2 && (nb_rx_data > 0U)) - 80047e6: 2900 cmp r1, #0 - 80047e8: d100 bne.n 80047ec - 80047ea: e775 b.n 80046d8 + 80048da: 2900 cmp r1, #0 + 80048dc: d100 bne.n 80048e0 + 80048de: e775 b.n 80047cc __ASM volatile ("MRS %0, primask" : "=r" (result) ); - 80047ec: f3ef 8710 mrs r7, PRIMASK + 80048e0: f3ef 8710 mrs r7, PRIMASK __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 80047f0: f385 8810 msr PRIMASK, r5 + 80048e4: f385 8810 msr PRIMASK, r5 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE)); - 80047f4: 6822 ldr r2, [r4, #0] - 80047f6: 4e32 ldr r6, [pc, #200] @ (80048c0 ) - 80047f8: 6813 ldr r3, [r2, #0] - 80047fa: 4033 ands r3, r6 - 80047fc: 6013 str r3, [r2, #0] - 80047fe: f387 8810 msr PRIMASK, r7 + 80048e8: 6822 ldr r2, [r4, #0] + 80048ea: 4e32 ldr r6, [pc, #200] @ (80049b4 ) + 80048ec: 6813 ldr r3, [r2, #0] + 80048ee: 4033 ands r3, r6 + 80048f0: 6013 str r3, [r2, #0] + 80048f2: f387 8810 msr PRIMASK, r7 __ASM volatile ("MRS %0, primask" : "=r" (result) ); - 8004802: f3ef 8710 mrs r7, PRIMASK + 80048f6: f3ef 8710 mrs r7, PRIMASK __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 8004806: f385 8810 msr PRIMASK, r5 + 80048fa: f385 8810 msr PRIMASK, r5 ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE)); - 800480a: 6822 ldr r2, [r4, #0] - 800480c: 4e2d ldr r6, [pc, #180] @ (80048c4 ) - 800480e: 6893 ldr r3, [r2, #8] - 8004810: 4033 ands r3, r6 - 8004812: 6093 str r3, [r2, #8] - 8004814: f387 8810 msr PRIMASK, r7 + 80048fe: 6822 ldr r2, [r4, #0] + 8004900: 4e2d ldr r6, [pc, #180] @ (80049b8 ) + 8004902: 6893 ldr r3, [r2, #8] + 8004904: 4033 ands r3, r6 + 8004906: 6093 str r3, [r2, #8] + 8004908: f387 8810 msr PRIMASK, r7 huart->RxState = HAL_UART_STATE_READY; - 8004818: 0023 movs r3, r4 - 800481a: 2220 movs r2, #32 - 800481c: 338c adds r3, #140 @ 0x8c - 800481e: 601a str r2, [r3, #0] + 800490c: 0023 movs r3, r4 + 800490e: 2220 movs r2, #32 + 8004910: 338c adds r3, #140 @ 0x8c + 8004912: 601a str r2, [r3, #0] huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - 8004820: 66e0 str r0, [r4, #108] @ 0x6c + 8004914: 66e0 str r0, [r4, #108] @ 0x6c huart->RxISR = NULL; - 8004822: 6760 str r0, [r4, #116] @ 0x74 + 8004916: 6760 str r0, [r4, #116] @ 0x74 __ASM volatile ("MRS %0, primask" : "=r" (result) ); - 8004824: f3ef 8010 mrs r0, PRIMASK + 8004918: f3ef 8010 mrs r0, PRIMASK __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 8004828: f385 8810 msr PRIMASK, r5 + 800491c: f385 8810 msr PRIMASK, r5 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); - 800482c: 2510 movs r5, #16 - 800482e: 6822 ldr r2, [r4, #0] - 8004830: 6813 ldr r3, [r2, #0] - 8004832: 43ab bics r3, r5 - 8004834: 6013 str r3, [r2, #0] - 8004836: f380 8810 msr PRIMASK, r0 + 8004920: 2510 movs r5, #16 + 8004922: 6822 ldr r2, [r4, #0] + 8004924: 6813 ldr r3, [r2, #0] + 8004926: 43ab bics r3, r5 + 8004928: 6013 str r3, [r2, #0] + 800492a: f380 8810 msr PRIMASK, r0 huart->RxEventType = HAL_UART_RXEVENT_IDLE; - 800483a: e7c7 b.n 80047cc + 800492e: e7c7 b.n 80048c0 if (((isrflags & USART_ISR_WUF) != 0U) && ((cr3its & USART_CR3_WUFIE) != 0U)) - 800483c: 2580 movs r5, #128 @ 0x80 - 800483e: 036d lsls r5, r5, #13 - 8004840: 422b tst r3, r5 - 8004842: d006 beq.n 8004852 - 8004844: 0246 lsls r6, r0, #9 - 8004846: d504 bpl.n 8004852 + 8004930: 2580 movs r5, #128 @ 0x80 + 8004932: 036d lsls r5, r5, #13 + 8004934: 422b tst r3, r5 + 8004936: d006 beq.n 8004946 + 8004938: 0246 lsls r6, r0, #9 + 800493a: d504 bpl.n 8004946 HAL_UARTEx_WakeupCallback(huart); - 8004848: 0020 movs r0, r4 + 800493c: 0020 movs r0, r4 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_WUF); - 800484a: 620d str r5, [r1, #32] + 800493e: 620d str r5, [r1, #32] HAL_UARTEx_WakeupCallback(huart); - 800484c: f000 fbfa bl 8005044 + 8004940: f000 fbfa bl 8005138 return; - 8004850: e742 b.n 80046d8 + 8004944: e742 b.n 80047cc if (((isrflags & USART_ISR_TXE_TXFNF) != 0U) - 8004852: 2180 movs r1, #128 @ 0x80 - 8004854: 420b tst r3, r1 - 8004856: d007 beq.n 8004868 + 8004946: 2180 movs r1, #128 @ 0x80 + 8004948: 420b tst r3, r1 + 800494a: d007 beq.n 800495c || ((cr3its & USART_CR3_TXFTIE) != 0U))) - 8004858: 2580 movs r5, #128 @ 0x80 - 800485a: 042d lsls r5, r5, #16 + 800494c: 2580 movs r5, #128 @ 0x80 + 800494e: 042d lsls r5, r5, #16 && (((cr1its & USART_CR1_TXEIE_TXFNFIE) != 0U) - 800485c: 4011 ands r1, r2 + 8004950: 4011 ands r1, r2 || ((cr3its & USART_CR3_TXFTIE) != 0U))) - 800485e: 4028 ands r0, r5 - 8004860: 4301 orrs r1, r0 - 8004862: d001 beq.n 8004868 + 8004952: 4028 ands r0, r5 + 8004954: 4301 orrs r1, r0 + 8004956: d001 beq.n 800495c if (huart->TxISR != NULL) - 8004864: 6fa3 ldr r3, [r4, #120] @ 0x78 - 8004866: e6ac b.n 80045c2 + 8004958: 6fa3 ldr r3, [r4, #120] @ 0x78 + 800495a: e6ac b.n 80046b6 if (((isrflags & USART_ISR_TC) != 0U) && ((cr1its & USART_CR1_TCIE) != 0U)) - 8004868: 2140 movs r1, #64 @ 0x40 - 800486a: 420b tst r3, r1 - 800486c: d016 beq.n 800489c - 800486e: 420a tst r2, r1 - 8004870: d014 beq.n 800489c + 800495c: 2140 movs r1, #64 @ 0x40 + 800495e: 420b tst r3, r1 + 8004960: d016 beq.n 8004990 + 8004962: 420a tst r2, r1 + 8004964: d014 beq.n 8004990 __ASM volatile ("MRS %0, primask" : "=r" (result) ); - 8004872: f3ef 8010 mrs r0, PRIMASK + 8004966: f3ef 8010 mrs r0, PRIMASK __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 8004876: 2301 movs r3, #1 - 8004878: f383 8810 msr PRIMASK, r3 + 800496a: 2301 movs r3, #1 + 800496c: f383 8810 msr PRIMASK, r3 * @retval None */ static void UART_EndTransmit_IT(UART_HandleTypeDef *huart) { /* Disable the UART Transmit Complete Interrupt */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_TCIE); - 800487c: 6822 ldr r2, [r4, #0] - 800487e: 6813 ldr r3, [r2, #0] - 8004880: 438b bics r3, r1 - 8004882: 6013 str r3, [r2, #0] - 8004884: f380 8810 msr PRIMASK, r0 + 8004970: 6822 ldr r2, [r4, #0] + 8004972: 6813 ldr r3, [r2, #0] + 8004974: 438b bics r3, r1 + 8004976: 6013 str r3, [r2, #0] + 8004978: f380 8810 msr PRIMASK, r0 /* Tx process is ended, restore huart->gState to Ready */ huart->gState = HAL_UART_STATE_READY; - 8004888: 0023 movs r3, r4 - 800488a: 2220 movs r2, #32 - 800488c: 3388 adds r3, #136 @ 0x88 - 800488e: 601a str r2, [r3, #0] + 800497c: 0023 movs r3, r4 + 800497e: 2220 movs r2, #32 + 8004980: 3388 adds r3, #136 @ 0x88 + 8004982: 601a str r2, [r3, #0] /* Cleat TxISR function pointer */ huart->TxISR = NULL; - 8004890: 2300 movs r3, #0 + 8004984: 2300 movs r3, #0 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Tx complete callback*/ huart->TxCpltCallback(huart); #else /*Call legacy weak Tx complete callback*/ HAL_UART_TxCpltCallback(huart); - 8004892: 0020 movs r0, r4 + 8004986: 0020 movs r0, r4 huart->TxISR = NULL; - 8004894: 67a3 str r3, [r4, #120] @ 0x78 + 8004988: 67a3 str r3, [r4, #120] @ 0x78 HAL_UART_TxCpltCallback(huart); - 8004896: f7ff fe49 bl 800452c + 800498a: f7ff fe49 bl 8004620 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } - 800489a: e71d b.n 80046d8 + 800498e: e71d b.n 80047cc if (((isrflags & USART_ISR_TXFE) != 0U) && ((cr1its & USART_CR1_TXFEIE) != 0U)) - 800489c: 0219 lsls r1, r3, #8 - 800489e: d513 bpl.n 80048c8 - 80048a0: 0051 lsls r1, r2, #1 - 80048a2: d511 bpl.n 80048c8 + 8004990: 0219 lsls r1, r3, #8 + 8004992: d513 bpl.n 80049bc + 8004994: 0051 lsls r1, r2, #1 + 8004996: d511 bpl.n 80049bc HAL_UARTEx_TxFifoEmptyCallback(huart); - 80048a4: 0020 movs r0, r4 - 80048a6: f000 fbcf bl 8005048 + 8004998: 0020 movs r0, r4 + 800499a: f000 fbcf bl 800513c return; - 80048aa: e715 b.n 80046d8 - 80048ac: 0000080f .word 0x0000080f - 80048b0: 10000001 .word 0x10000001 - 80048b4: 04000120 .word 0x04000120 - 80048b8: 08004587 .word 0x08004587 - 80048bc: fffffeff .word 0xfffffeff - 80048c0: fffffedf .word 0xfffffedf - 80048c4: effffffe .word 0xeffffffe + 800499e: e715 b.n 80047cc + 80049a0: 0000080f .word 0x0000080f + 80049a4: 10000001 .word 0x10000001 + 80049a8: 04000120 .word 0x04000120 + 80049ac: 0800467b .word 0x0800467b + 80049b0: fffffeff .word 0xfffffeff + 80049b4: fffffedf .word 0xfffffedf + 80049b8: effffffe .word 0xeffffffe if (((isrflags & USART_ISR_RXFF) != 0U) && ((cr1its & USART_CR1_RXFFIE) != 0U)) - 80048c8: 01db lsls r3, r3, #7 - 80048ca: d400 bmi.n 80048ce - 80048cc: e704 b.n 80046d8 - 80048ce: 2a00 cmp r2, #0 - 80048d0: db00 blt.n 80048d4 - 80048d2: e701 b.n 80046d8 + 80049bc: 01db lsls r3, r3, #7 + 80049be: d400 bmi.n 80049c2 + 80049c0: e704 b.n 80047cc + 80049c2: 2a00 cmp r2, #0 + 80049c4: db00 blt.n 80049c8 + 80049c6: e701 b.n 80047cc HAL_UARTEx_RxFifoFullCallback(huart); - 80048d4: 0020 movs r0, r4 - 80048d6: f000 fbb6 bl 8005046 + 80049c8: 0020 movs r0, r4 + 80049ca: f000 fbb6 bl 800513a return; - 80048da: e6fd b.n 80046d8 + 80049ce: e6fd b.n 80047cc -080048dc : +080049d0 : huart->RxEventType = HAL_UART_RXEVENT_HT; - 80048dc: 2201 movs r2, #1 + 80049d0: 2201 movs r2, #1 { - 80048de: 0003 movs r3, r0 + 80049d2: 0003 movs r3, r0 UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); - 80048e0: 6a80 ldr r0, [r0, #40] @ 0x28 + 80049d4: 6a80 ldr r0, [r0, #40] @ 0x28 { - 80048e2: b510 push {r4, lr} + 80049d6: b510 push {r4, lr} huart->RxEventType = HAL_UART_RXEVENT_HT; - 80048e4: 6702 str r2, [r0, #112] @ 0x70 + 80049d8: 6702 str r2, [r0, #112] @ 0x70 if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) - 80048e6: 6ec2 ldr r2, [r0, #108] @ 0x6c - 80048e8: 2a01 cmp r2, #1 - 80048ea: d111 bne.n 8004910 + 80049da: 6ec2 ldr r2, [r0, #108] @ 0x6c + 80049dc: 2a01 cmp r2, #1 + 80049de: d111 bne.n 8004a04 huart->RxXferCount = huart->RxXferSize / 2U; - 80048ec: 0002 movs r2, r0 - 80048ee: 325c adds r2, #92 @ 0x5c - 80048f0: 8811 ldrh r1, [r2, #0] + 80049e0: 0002 movs r2, r0 + 80049e2: 325c adds r2, #92 @ 0x5c + 80049e4: 8811 ldrh r1, [r2, #0] uint16_t nb_remaining_rx_data = (uint16_t) __HAL_DMA_GET_COUNTER(hdma); - 80048f2: 681b ldr r3, [r3, #0] + 80049e6: 681b ldr r3, [r3, #0] huart->RxXferCount = huart->RxXferSize / 2U; - 80048f4: 084c lsrs r4, r1, #1 - 80048f6: 8054 strh r4, [r2, #2] + 80049e8: 084c lsrs r4, r1, #1 + 80049ea: 8054 strh r4, [r2, #2] uint16_t nb_remaining_rx_data = (uint16_t) __HAL_DMA_GET_COUNTER(hdma); - 80048f8: 685b ldr r3, [r3, #4] + 80049ec: 685b ldr r3, [r3, #4] huart->RxXferCount = huart->RxXferSize / 2U; - 80048fa: 3202 adds r2, #2 + 80049ee: 3202 adds r2, #2 uint16_t nb_remaining_rx_data = (uint16_t) __HAL_DMA_GET_COUNTER(hdma); - 80048fc: b29b uxth r3, r3 + 80049f0: b29b uxth r3, r3 if (nb_remaining_rx_data <= huart->RxXferSize) - 80048fe: 4299 cmp r1, r3 - 8004900: d300 bcc.n 8004904 + 80049f2: 4299 cmp r1, r3 + 80049f4: d300 bcc.n 80049f8 huart->RxXferCount = nb_remaining_rx_data; - 8004902: 8013 strh r3, [r2, #0] + 80049f6: 8013 strh r3, [r2, #0] HAL_UARTEx_RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount)); - 8004904: 8813 ldrh r3, [r2, #0] - 8004906: 1ac9 subs r1, r1, r3 - 8004908: b289 uxth r1, r1 - 800490a: f7fc f86d bl 80009e8 + 80049f8: 8813 ldrh r3, [r2, #0] + 80049fa: 1ac9 subs r1, r1, r3 + 80049fc: b289 uxth r1, r1 + 80049fe: f7fb fff3 bl 80009e8 } - 800490e: bd10 pop {r4, pc} + 8004a02: bd10 pop {r4, pc} HAL_UART_RxHalfCpltCallback(huart); - 8004910: f7ff fe0e bl 8004530 + 8004a04: f7ff fe0e bl 8004624 } - 8004914: e7fb b.n 800490e + 8004a08: e7fb b.n 8004a02 ... -08004918 : +08004a0c : { - 8004918: b5f8 push {r3, r4, r5, r6, r7, lr} - 800491a: 0003 movs r3, r0 + 8004a0c: b5f8 push {r3, r4, r5, r6, r7, lr} + 8004a0e: 0003 movs r3, r0 if (HAL_IS_BIT_CLR(hdma->Instance->CCR, DMA_CCR_CIRC)) - 800491c: 681a ldr r2, [r3, #0] - 800491e: 2120 movs r1, #32 - 8004920: 6812 ldr r2, [r2, #0] + 8004a10: 681a ldr r2, [r3, #0] + 8004a12: 2120 movs r1, #32 + 8004a14: 6812 ldr r2, [r2, #0] UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); - 8004922: 6a80 ldr r0, [r0, #40] @ 0x28 + 8004a16: 6a80 ldr r0, [r0, #40] @ 0x28 if (HAL_IS_BIT_CLR(hdma->Instance->CCR, DMA_CCR_CIRC)) - 8004924: 0014 movs r4, r2 - 8004926: 400c ands r4, r1 - 8004928: 420a tst r2, r1 - 800492a: d134 bne.n 8004996 + 8004a18: 0014 movs r4, r2 + 8004a1a: 400c ands r4, r1 + 8004a1c: 420a tst r2, r1 + 8004a1e: d134 bne.n 8004a8a huart->RxXferCount = 0U; - 800492c: 0002 movs r2, r0 - 800492e: 325e adds r2, #94 @ 0x5e - 8004930: 8014 strh r4, [r2, #0] + 8004a20: 0002 movs r2, r0 + 8004a22: 325e adds r2, #94 @ 0x5e + 8004a24: 8014 strh r4, [r2, #0] __ASM volatile ("MRS %0, primask" : "=r" (result) ); - 8004932: f3ef 8610 mrs r6, PRIMASK + 8004a26: f3ef 8610 mrs r6, PRIMASK __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 8004936: 2201 movs r2, #1 - 8004938: f382 8810 msr PRIMASK, r2 + 8004a2a: 2201 movs r2, #1 + 8004a2c: f382 8810 msr PRIMASK, r2 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); - 800493c: 6805 ldr r5, [r0, #0] - 800493e: 4f23 ldr r7, [pc, #140] @ (80049cc ) - 8004940: 682c ldr r4, [r5, #0] - 8004942: 403c ands r4, r7 - 8004944: 602c str r4, [r5, #0] - 8004946: f386 8810 msr PRIMASK, r6 + 8004a30: 6805 ldr r5, [r0, #0] + 8004a32: 4f23 ldr r7, [pc, #140] @ (8004ac0 ) + 8004a34: 682c ldr r4, [r5, #0] + 8004a36: 403c ands r4, r7 + 8004a38: 602c str r4, [r5, #0] + 8004a3a: f386 8810 msr PRIMASK, r6 __ASM volatile ("MRS %0, primask" : "=r" (result) ); - 800494a: f3ef 8610 mrs r6, PRIMASK + 8004a3e: f3ef 8610 mrs r6, PRIMASK __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 800494e: f382 8810 msr PRIMASK, r2 + 8004a42: f382 8810 msr PRIMASK, r2 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - 8004952: 6805 ldr r5, [r0, #0] - 8004954: 68ac ldr r4, [r5, #8] - 8004956: 4394 bics r4, r2 - 8004958: 60ac str r4, [r5, #8] - 800495a: f386 8810 msr PRIMASK, r6 + 8004a46: 6805 ldr r5, [r0, #0] + 8004a48: 68ac ldr r4, [r5, #8] + 8004a4a: 4394 bics r4, r2 + 8004a4c: 60ac str r4, [r5, #8] + 8004a4e: f386 8810 msr PRIMASK, r6 __ASM volatile ("MRS %0, primask" : "=r" (result) ); - 800495e: f3ef 8510 mrs r5, PRIMASK + 8004a52: f3ef 8510 mrs r5, PRIMASK __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 8004962: f382 8810 msr PRIMASK, r2 + 8004a56: f382 8810 msr PRIMASK, r2 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); - 8004966: 2640 movs r6, #64 @ 0x40 - 8004968: 6804 ldr r4, [r0, #0] - 800496a: 68a2 ldr r2, [r4, #8] - 800496c: 43b2 bics r2, r6 - 800496e: 60a2 str r2, [r4, #8] - 8004970: f385 8810 msr PRIMASK, r5 + 8004a5a: 2640 movs r6, #64 @ 0x40 + 8004a5c: 6804 ldr r4, [r0, #0] + 8004a5e: 68a2 ldr r2, [r4, #8] + 8004a60: 43b2 bics r2, r6 + 8004a62: 60a2 str r2, [r4, #8] + 8004a64: f385 8810 msr PRIMASK, r5 huart->RxState = HAL_UART_STATE_READY; - 8004974: 0002 movs r2, r0 - 8004976: 328c adds r2, #140 @ 0x8c - 8004978: 6011 str r1, [r2, #0] + 8004a68: 0002 movs r2, r0 + 8004a6a: 328c adds r2, #140 @ 0x8c + 8004a6c: 6011 str r1, [r2, #0] if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) - 800497a: 6ec2 ldr r2, [r0, #108] @ 0x6c - 800497c: 2a01 cmp r2, #1 - 800497e: d10a bne.n 8004996 + 8004a6e: 6ec2 ldr r2, [r0, #108] @ 0x6c + 8004a70: 2a01 cmp r2, #1 + 8004a72: d10a bne.n 8004a8a __ASM volatile ("MRS %0, primask" : "=r" (result) ); - 8004980: f3ef 8410 mrs r4, PRIMASK + 8004a74: f3ef 8410 mrs r4, PRIMASK __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 8004984: f382 8810 msr PRIMASK, r2 + 8004a78: f382 8810 msr PRIMASK, r2 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); - 8004988: 2510 movs r5, #16 - 800498a: 6801 ldr r1, [r0, #0] - 800498c: 680a ldr r2, [r1, #0] - 800498e: 43aa bics r2, r5 - 8004990: 600a str r2, [r1, #0] - 8004992: f384 8810 msr PRIMASK, r4 + 8004a7c: 2510 movs r5, #16 + 8004a7e: 6801 ldr r1, [r0, #0] + 8004a80: 680a ldr r2, [r1, #0] + 8004a82: 43aa bics r2, r5 + 8004a84: 600a str r2, [r1, #0] + 8004a86: f384 8810 msr PRIMASK, r4 huart->RxEventType = HAL_UART_RXEVENT_TC; - 8004996: 2100 movs r1, #0 - 8004998: 6701 str r1, [r0, #112] @ 0x70 + 8004a8a: 2100 movs r1, #0 + 8004a8c: 6701 str r1, [r0, #112] @ 0x70 if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) - 800499a: 6ec2 ldr r2, [r0, #108] @ 0x6c - 800499c: 2a01 cmp r2, #1 - 800499e: d111 bne.n 80049c4 + 8004a8e: 6ec2 ldr r2, [r0, #108] @ 0x6c + 8004a90: 2a01 cmp r2, #1 + 8004a92: d111 bne.n 8004ab8 huart->RxXferCount = 0; - 80049a0: 0002 movs r2, r0 - 80049a2: 325e adds r2, #94 @ 0x5e - 80049a4: 8011 strh r1, [r2, #0] + 8004a94: 0002 movs r2, r0 + 8004a96: 325e adds r2, #94 @ 0x5e + 8004a98: 8011 strh r1, [r2, #0] if (nb_remaining_rx_data < huart->RxXferSize) - 80049a6: 0001 movs r1, r0 + 8004a9a: 0001 movs r1, r0 uint16_t nb_remaining_rx_data = (uint16_t) __HAL_DMA_GET_COUNTER(hdma); - 80049a8: 681b ldr r3, [r3, #0] + 8004a9c: 681b ldr r3, [r3, #0] if (nb_remaining_rx_data < huart->RxXferSize) - 80049aa: 315c adds r1, #92 @ 0x5c + 8004a9e: 315c adds r1, #92 @ 0x5c uint16_t nb_remaining_rx_data = (uint16_t) __HAL_DMA_GET_COUNTER(hdma); - 80049ac: 685b ldr r3, [r3, #4] + 8004aa0: 685b ldr r3, [r3, #4] if (nb_remaining_rx_data < huart->RxXferSize) - 80049ae: 8809 ldrh r1, [r1, #0] + 8004aa2: 8809 ldrh r1, [r1, #0] uint16_t nb_remaining_rx_data = (uint16_t) __HAL_DMA_GET_COUNTER(hdma); - 80049b0: b29b uxth r3, r3 + 8004aa4: b29b uxth r3, r3 if (nb_remaining_rx_data < huart->RxXferSize) - 80049b2: 4299 cmp r1, r3 - 80049b4: d900 bls.n 80049b8 + 8004aa6: 4299 cmp r1, r3 + 8004aa8: d900 bls.n 8004aac huart->RxXferCount = nb_remaining_rx_data; - 80049b6: 8013 strh r3, [r2, #0] + 8004aaa: 8013 strh r3, [r2, #0] HAL_UARTEx_RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount)); - 80049b8: 8813 ldrh r3, [r2, #0] - 80049ba: 1ac9 subs r1, r1, r3 - 80049bc: b289 uxth r1, r1 - 80049be: f7fc f813 bl 80009e8 + 8004aac: 8813 ldrh r3, [r2, #0] + 8004aae: 1ac9 subs r1, r1, r3 + 8004ab0: b289 uxth r1, r1 + 8004ab2: f7fb ff99 bl 80009e8 } - 80049c2: bdf8 pop {r3, r4, r5, r6, r7, pc} + 8004ab6: bdf8 pop {r3, r4, r5, r6, r7, pc} HAL_UART_RxCpltCallback(huart); - 80049c4: f7ff fdb3 bl 800452e + 8004ab8: f7ff fdb3 bl 8004622 } - 80049c8: e7fb b.n 80049c2 - 80049ca: 46c0 nop @ (mov r8, r8) - 80049cc: fffffeff .word 0xfffffeff + 8004abc: e7fb b.n 8004ab6 + 8004abe: 46c0 nop @ (mov r8, r8) + 8004ac0: fffffeff .word 0xfffffeff -080049d0 : +08004ac4 : { - 80049d0: b570 push {r4, r5, r6, lr} - 80049d2: 0004 movs r4, r0 + 8004ac4: b570 push {r4, r5, r6, lr} + 8004ac6: 0004 movs r4, r0 tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling ; - 80049d4: 6925 ldr r5, [r4, #16] - 80049d6: 68a1 ldr r1, [r4, #8] + 8004ac8: 6925 ldr r5, [r4, #16] + 8004aca: 68a1 ldr r1, [r4, #8] MODIFY_REG(huart->Instance->CR1, USART_CR1_FIELDS, tmpreg); - 80049d8: 6803 ldr r3, [r0, #0] + 8004acc: 6803 ldr r3, [r0, #0] tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling ; - 80049da: 4329 orrs r1, r5 - 80049dc: 6965 ldr r5, [r4, #20] - 80049de: 69c2 ldr r2, [r0, #28] - 80049e0: 4329 orrs r1, r5 + 8004ace: 4329 orrs r1, r5 + 8004ad0: 6965 ldr r5, [r4, #20] + 8004ad2: 69c2 ldr r2, [r0, #28] + 8004ad4: 4329 orrs r1, r5 MODIFY_REG(huart->Instance->CR1, USART_CR1_FIELDS, tmpreg); - 80049e2: 6818 ldr r0, [r3, #0] - 80049e4: 4d50 ldr r5, [pc, #320] @ (8004b28 ) + 8004ad6: 6818 ldr r0, [r3, #0] + 8004ad8: 4d50 ldr r5, [pc, #320] @ (8004c1c ) tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling ; - 80049e6: 4311 orrs r1, r2 + 8004ada: 4311 orrs r1, r2 MODIFY_REG(huart->Instance->CR1, USART_CR1_FIELDS, tmpreg); - 80049e8: 4028 ands r0, r5 - 80049ea: 4301 orrs r1, r0 - 80049ec: 6019 str r1, [r3, #0] + 8004adc: 4028 ands r0, r5 + 8004ade: 4301 orrs r1, r0 + 8004ae0: 6019 str r1, [r3, #0] MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits); - 80049ee: 6859 ldr r1, [r3, #4] - 80049f0: 484e ldr r0, [pc, #312] @ (8004b2c ) + 8004ae2: 6859 ldr r1, [r3, #4] + 8004ae4: 484e ldr r0, [pc, #312] @ (8004c20 ) tmpreg |= huart->Init.OneBitSampling; - 80049f2: 6a25 ldr r5, [r4, #32] + 8004ae6: 6a25 ldr r5, [r4, #32] MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits); - 80049f4: 4001 ands r1, r0 - 80049f6: 68e0 ldr r0, [r4, #12] - 80049f8: 4301 orrs r1, r0 - 80049fa: 6059 str r1, [r3, #4] + 8004ae8: 4001 ands r1, r0 + 8004aea: 68e0 ldr r0, [r4, #12] + 8004aec: 4301 orrs r1, r0 + 8004aee: 6059 str r1, [r3, #4] tmpreg = (uint32_t)huart->Init.HwFlowCtl; - 80049fc: 69a1 ldr r1, [r4, #24] + 8004af0: 69a1 ldr r1, [r4, #24] MODIFY_REG(huart->Instance->CR3, USART_CR3_FIELDS, tmpreg); - 80049fe: 6898 ldr r0, [r3, #8] + 8004af2: 6898 ldr r0, [r3, #8] tmpreg |= huart->Init.OneBitSampling; - 8004a00: 4329 orrs r1, r5 + 8004af4: 4329 orrs r1, r5 MODIFY_REG(huart->Instance->CR3, USART_CR3_FIELDS, tmpreg); - 8004a02: 4d4b ldr r5, [pc, #300] @ (8004b30 ) - 8004a04: 4028 ands r0, r5 - 8004a06: 4301 orrs r1, r0 + 8004af6: 4d4b ldr r5, [pc, #300] @ (8004c24 ) + 8004af8: 4028 ands r0, r5 + 8004afa: 4301 orrs r1, r0 MODIFY_REG(huart->Instance->PRESC, USART_PRESC_PRESCALER, huart->Init.ClockPrescaler); - 8004a08: 200f movs r0, #15 + 8004afc: 200f movs r0, #15 MODIFY_REG(huart->Instance->CR3, USART_CR3_FIELDS, tmpreg); - 8004a0a: 6099 str r1, [r3, #8] + 8004afe: 6099 str r1, [r3, #8] MODIFY_REG(huart->Instance->PRESC, USART_PRESC_PRESCALER, huart->Init.ClockPrescaler); - 8004a0c: 6ad9 ldr r1, [r3, #44] @ 0x2c - 8004a0e: 4381 bics r1, r0 - 8004a10: 6a60 ldr r0, [r4, #36] @ 0x24 - 8004a12: 4301 orrs r1, r0 - 8004a14: 62d9 str r1, [r3, #44] @ 0x2c + 8004b00: 6ad9 ldr r1, [r3, #44] @ 0x2c + 8004b02: 4381 bics r1, r0 + 8004b04: 6a60 ldr r0, [r4, #36] @ 0x24 + 8004b06: 4301 orrs r1, r0 + 8004b08: 62d9 str r1, [r3, #44] @ 0x2c UART_GETCLOCKSOURCE(huart, clocksource); - 8004a16: 4947 ldr r1, [pc, #284] @ (8004b34 ) - 8004a18: 428b cmp r3, r1 - 8004a1a: d115 bne.n 8004a48 - 8004a1c: 2103 movs r1, #3 - 8004a1e: 4b46 ldr r3, [pc, #280] @ (8004b38 ) - 8004a20: 6d5b ldr r3, [r3, #84] @ 0x54 - 8004a22: 400b ands r3, r1 - 8004a24: 3b01 subs r3, #1 - 8004a26: 2b02 cmp r3, #2 - 8004a28: d86f bhi.n 8004b0a - 8004a2a: 4944 ldr r1, [pc, #272] @ (8004b3c ) - 8004a2c: 5cc8 ldrb r0, [r1, r3] + 8004b0a: 4947 ldr r1, [pc, #284] @ (8004c28 ) + 8004b0c: 428b cmp r3, r1 + 8004b0e: d115 bne.n 8004b3c + 8004b10: 2103 movs r1, #3 + 8004b12: 4b46 ldr r3, [pc, #280] @ (8004c2c ) + 8004b14: 6d5b ldr r3, [r3, #84] @ 0x54 + 8004b16: 400b ands r3, r1 + 8004b18: 3b01 subs r3, #1 + 8004b1a: 2b02 cmp r3, #2 + 8004b1c: d86f bhi.n 8004bfe + 8004b1e: 4944 ldr r1, [pc, #272] @ (8004c30 ) + 8004b20: 5cc8 ldrb r0, [r1, r3] if (huart->Init.OverSampling == UART_OVERSAMPLING_8) - 8004a2e: 2380 movs r3, #128 @ 0x80 - 8004a30: 021b lsls r3, r3, #8 - 8004a32: 429a cmp r2, r3 - 8004a34: d137 bne.n 8004aa6 + 8004b22: 2380 movs r3, #128 @ 0x80 + 8004b24: 021b lsls r3, r3, #8 + 8004b26: 429a cmp r2, r3 + 8004b28: d137 bne.n 8004b9a switch (clocksource) - 8004a36: 2808 cmp r0, #8 - 8004a38: d865 bhi.n 8004b06 - 8004a3a: f7fb fb65 bl 8000108 <__gnu_thumb1_case_uqi> - 8004a3e: 646a .short 0x646a - 8004a40: 6431640b .word 0x6431640b - 8004a44: 6464 .short 0x6464 - 8004a46: 14 .byte 0x14 - 8004a47: 00 .byte 0x00 + 8004b2a: 2808 cmp r0, #8 + 8004b2c: d865 bhi.n 8004bfa + 8004b2e: f7fb faeb bl 8000108 <__gnu_thumb1_case_uqi> + 8004b32: 646a .short 0x646a + 8004b34: 6431640b .word 0x6431640b + 8004b38: 6464 .short 0x6464 + 8004b3a: 14 .byte 0x14 + 8004b3b: 00 .byte 0x00 UART_GETCLOCKSOURCE(huart, clocksource); - 8004a48: 493d ldr r1, [pc, #244] @ (8004b40 ) - 8004a4a: 185b adds r3, r3, r1 - 8004a4c: 1e59 subs r1, r3, #1 - 8004a4e: 418b sbcs r3, r1 - 8004a50: 0118 lsls r0, r3, #4 - 8004a52: e7ec b.n 8004a2e + 8004b3c: 493d ldr r1, [pc, #244] @ (8004c34 ) + 8004b3e: 185b adds r3, r3, r1 + 8004b40: 1e59 subs r1, r3, #1 + 8004b42: 418b sbcs r3, r1 + 8004b44: 0118 lsls r0, r3, #4 + 8004b46: e7ec b.n 8004b22 pclk = (HSI_VALUE / ((__HAL_RCC_GET_HSIKER_DIVIDER() >> RCC_CR_HSIKERDIV_Pos) + 1U)); - 8004a54: 4b38 ldr r3, [pc, #224] @ (8004b38 ) - 8004a56: 483b ldr r0, [pc, #236] @ (8004b44 ) - 8004a58: 6819 ldr r1, [r3, #0] - 8004a5a: 0609 lsls r1, r1, #24 - 8004a5c: 0f49 lsrs r1, r1, #29 - 8004a5e: 3101 adds r1, #1 - 8004a60: f7fb fb66 bl 8000130 <__udivsi3> - 8004a64: 0002 movs r2, r0 + 8004b48: 4b38 ldr r3, [pc, #224] @ (8004c2c ) + 8004b4a: 483b ldr r0, [pc, #236] @ (8004c38 ) + 8004b4c: 6819 ldr r1, [r3, #0] + 8004b4e: 0609 lsls r1, r1, #24 + 8004b50: 0f49 lsrs r1, r1, #29 + 8004b52: 3101 adds r1, #1 + 8004b54: f7fb faec bl 8000130 <__udivsi3> + 8004b58: 0002 movs r2, r0 usartdiv = (uint32_t)(UART_DIV_SAMPLING8(pclk, huart->Init.BaudRate, huart->Init.ClockPrescaler)); - 8004a66: 6a61 ldr r1, [r4, #36] @ 0x24 - 8004a68: 4b37 ldr r3, [pc, #220] @ (8004b48 ) - 8004a6a: 0049 lsls r1, r1, #1 - 8004a6c: 0010 movs r0, r2 - 8004a6e: 5ac9 ldrh r1, [r1, r3] - 8004a70: f7fb fb5e bl 8000130 <__udivsi3> - 8004a74: 6865 ldr r5, [r4, #4] - 8004a76: 0040 lsls r0, r0, #1 - 8004a78: 086b lsrs r3, r5, #1 - 8004a7a: 18c0 adds r0, r0, r3 - 8004a7c: 0029 movs r1, r5 - 8004a7e: f7fb fb57 bl 8000130 <__udivsi3> + 8004b5a: 6a61 ldr r1, [r4, #36] @ 0x24 + 8004b5c: 4b37 ldr r3, [pc, #220] @ (8004c3c ) + 8004b5e: 0049 lsls r1, r1, #1 + 8004b60: 0010 movs r0, r2 + 8004b62: 5ac9 ldrh r1, [r1, r3] + 8004b64: f7fb fae4 bl 8000130 <__udivsi3> + 8004b68: 6865 ldr r5, [r4, #4] + 8004b6a: 0040 lsls r0, r0, #1 + 8004b6c: 086b lsrs r3, r5, #1 + 8004b6e: 18c0 adds r0, r0, r3 + 8004b70: 0029 movs r1, r5 + 8004b72: f7fb fadd bl 8000130 <__udivsi3> if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX)) - 8004a82: 0002 movs r2, r0 - 8004a84: 4b31 ldr r3, [pc, #196] @ (8004b4c ) - 8004a86: 3a10 subs r2, #16 - 8004a88: 429a cmp r2, r3 - 8004a8a: d83c bhi.n 8004b06 + 8004b76: 0002 movs r2, r0 + 8004b78: 4b31 ldr r3, [pc, #196] @ (8004c40 ) + 8004b7a: 3a10 subs r2, #16 + 8004b7c: 429a cmp r2, r3 + 8004b7e: d83c bhi.n 8004bfa brrtemp = (uint16_t)(usartdiv & 0xFFF0U); - 8004a8c: 230f movs r3, #15 - 8004a8e: 0002 movs r2, r0 + 8004b80: 230f movs r3, #15 + 8004b82: 0002 movs r2, r0 brrtemp |= (uint16_t)((usartdiv & (uint16_t)0x000FU) >> 1U); - 8004a90: 0700 lsls r0, r0, #28 + 8004b84: 0700 lsls r0, r0, #28 brrtemp = (uint16_t)(usartdiv & 0xFFF0U); - 8004a92: 439a bics r2, r3 - 8004a94: b293 uxth r3, r2 + 8004b86: 439a bics r2, r3 + 8004b88: b293 uxth r3, r2 brrtemp |= (uint16_t)((usartdiv & (uint16_t)0x000FU) >> 1U); - 8004a96: 0f40 lsrs r0, r0, #29 + 8004b8a: 0f40 lsrs r0, r0, #29 huart->Instance->BRR = brrtemp; - 8004a98: 6822 ldr r2, [r4, #0] - 8004a9a: 4303 orrs r3, r0 - 8004a9c: 60d3 str r3, [r2, #12] - 8004a9e: e03c b.n 8004b1a + 8004b8c: 6822 ldr r2, [r4, #0] + 8004b8e: 4303 orrs r3, r0 + 8004b90: 60d3 str r3, [r2, #12] + 8004b92: e03c b.n 8004c0e pclk = HAL_RCC_GetSysClockFreq(); - 8004aa0: f7fe fd8a bl 80035b8 - 8004aa4: e037 b.n 8004b16 + 8004b94: f7fe fd2a bl 80035ec + 8004b98: e037 b.n 8004c0a switch (clocksource) - 8004aa6: 2808 cmp r0, #8 - 8004aa8: d82d bhi.n 8004b06 - 8004aaa: f7fb fb2d bl 8000108 <__gnu_thumb1_case_uqi> - 8004aae: 2c05 .short 0x2c05 - 8004ab0: 2c262c0a .word 0x2c262c0a - 8004ab4: 2c2c .short 0x2c2c - 8004ab6: 29 .byte 0x29 - 8004ab7: 00 .byte 0x00 + 8004b9a: 2808 cmp r0, #8 + 8004b9c: d82d bhi.n 8004bfa + 8004b9e: f7fb fab3 bl 8000108 <__gnu_thumb1_case_uqi> + 8004ba2: 2c05 .short 0x2c05 + 8004ba4: 2c262c0a .word 0x2c262c0a + 8004ba8: 2c2c .short 0x2c2c + 8004baa: 29 .byte 0x29 + 8004bab: 00 .byte 0x00 pclk = HAL_RCC_GetPCLK1Freq(); - 8004ab8: f7fe fe74 bl 80037a4 + 8004bac: f7fe fe14 bl 80037d8 if (pclk != 0U) - 8004abc: 2800 cmp r0, #0 - 8004abe: d02c beq.n 8004b1a - 8004ac0: e007 b.n 8004ad2 + 8004bb0: 2800 cmp r0, #0 + 8004bb2: d02c beq.n 8004c0e + 8004bb4: e007 b.n 8004bc6 pclk = (HSI_VALUE / ((__HAL_RCC_GET_HSIKER_DIVIDER() >> RCC_CR_HSIKERDIV_Pos) + 1U)); - 8004ac2: 4b1d ldr r3, [pc, #116] @ (8004b38 ) - 8004ac4: 481f ldr r0, [pc, #124] @ (8004b44 ) - 8004ac6: 6819 ldr r1, [r3, #0] - 8004ac8: 0609 lsls r1, r1, #24 - 8004aca: 0f49 lsrs r1, r1, #29 - 8004acc: 3101 adds r1, #1 - 8004ace: f7fb fb2f bl 8000130 <__udivsi3> + 8004bb6: 4b1d ldr r3, [pc, #116] @ (8004c2c ) + 8004bb8: 481f ldr r0, [pc, #124] @ (8004c38 ) + 8004bba: 6819 ldr r1, [r3, #0] + 8004bbc: 0609 lsls r1, r1, #24 + 8004bbe: 0f49 lsrs r1, r1, #29 + 8004bc0: 3101 adds r1, #1 + 8004bc2: f7fb fab5 bl 8000130 <__udivsi3> usartdiv = (uint32_t)(UART_DIV_SAMPLING16(pclk, huart->Init.BaudRate, huart->Init.ClockPrescaler)); - 8004ad2: 6a62 ldr r2, [r4, #36] @ 0x24 - 8004ad4: 4b1c ldr r3, [pc, #112] @ (8004b48 ) - 8004ad6: 0052 lsls r2, r2, #1 - 8004ad8: 5ad1 ldrh r1, [r2, r3] - 8004ada: f7fb fb29 bl 8000130 <__udivsi3> - 8004ade: 6865 ldr r5, [r4, #4] - 8004ae0: 086b lsrs r3, r5, #1 - 8004ae2: 18c0 adds r0, r0, r3 - 8004ae4: 0029 movs r1, r5 - 8004ae6: f7fb fb23 bl 8000130 <__udivsi3> + 8004bc6: 6a62 ldr r2, [r4, #36] @ 0x24 + 8004bc8: 4b1c ldr r3, [pc, #112] @ (8004c3c ) + 8004bca: 0052 lsls r2, r2, #1 + 8004bcc: 5ad1 ldrh r1, [r2, r3] + 8004bce: f7fb faaf bl 8000130 <__udivsi3> + 8004bd2: 6865 ldr r5, [r4, #4] + 8004bd4: 086b lsrs r3, r5, #1 + 8004bd6: 18c0 adds r0, r0, r3 + 8004bd8: 0029 movs r1, r5 + 8004bda: f7fb faa9 bl 8000130 <__udivsi3> if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX)) - 8004aea: 0002 movs r2, r0 - 8004aec: 4b17 ldr r3, [pc, #92] @ (8004b4c ) - 8004aee: 3a10 subs r2, #16 - 8004af0: 429a cmp r2, r3 - 8004af2: d808 bhi.n 8004b06 + 8004bde: 0002 movs r2, r0 + 8004be0: 4b17 ldr r3, [pc, #92] @ (8004c40 ) + 8004be2: 3a10 subs r2, #16 + 8004be4: 429a cmp r2, r3 + 8004be6: d808 bhi.n 8004bfa huart->Instance->BRR = (uint16_t)usartdiv; - 8004af4: 6823 ldr r3, [r4, #0] - 8004af6: 60d8 str r0, [r3, #12] - 8004af8: e00f b.n 8004b1a + 8004be8: 6823 ldr r3, [r4, #0] + 8004bea: 60d8 str r0, [r3, #12] + 8004bec: e00f b.n 8004c0e pclk = HAL_RCC_GetSysClockFreq(); - 8004afa: f7fe fd5d bl 80035b8 + 8004bee: f7fe fcfd bl 80035ec break; - 8004afe: e7dd b.n 8004abc + 8004bf2: e7dd b.n 8004bb0 switch (clocksource) - 8004b00: 2080 movs r0, #128 @ 0x80 - 8004b02: 0200 lsls r0, r0, #8 - 8004b04: e7e5 b.n 8004ad2 + 8004bf4: 2080 movs r0, #128 @ 0x80 + 8004bf6: 0200 lsls r0, r0, #8 + 8004bf8: e7e5 b.n 8004bc6 ret = HAL_ERROR; - 8004b06: 2001 movs r0, #1 - 8004b08: e008 b.n 8004b1c + 8004bfa: 2001 movs r0, #1 + 8004bfc: e008 b.n 8004c10 if (huart->Init.OverSampling == UART_OVERSAMPLING_8) - 8004b0a: 2380 movs r3, #128 @ 0x80 - 8004b0c: 021b lsls r3, r3, #8 - 8004b0e: 429a cmp r2, r3 - 8004b10: d1d2 bne.n 8004ab8 + 8004bfe: 2380 movs r3, #128 @ 0x80 + 8004c00: 021b lsls r3, r3, #8 + 8004c02: 429a cmp r2, r3 + 8004c04: d1d2 bne.n 8004bac pclk = HAL_RCC_GetPCLK1Freq(); - 8004b12: f7fe fe47 bl 80037a4 + 8004c06: f7fe fde7 bl 80037d8 pclk = HAL_RCC_GetSysClockFreq(); - 8004b16: 1e02 subs r2, r0, #0 + 8004c0a: 1e02 subs r2, r0, #0 if (pclk != 0U) - 8004b18: d1a5 bne.n 8004a66 + 8004c0c: d1a5 bne.n 8004b5a switch (clocksource) - 8004b1a: 2000 movs r0, #0 + 8004c0e: 2000 movs r0, #0 huart->NbRxDataToProcess = 1; - 8004b1c: 4b0c ldr r3, [pc, #48] @ (8004b50 ) - 8004b1e: 66a3 str r3, [r4, #104] @ 0x68 + 8004c10: 4b0c ldr r3, [pc, #48] @ (8004c44 ) + 8004c12: 66a3 str r3, [r4, #104] @ 0x68 huart->RxISR = NULL; - 8004b20: 2300 movs r3, #0 - 8004b22: 6763 str r3, [r4, #116] @ 0x74 + 8004c14: 2300 movs r3, #0 + 8004c16: 6763 str r3, [r4, #116] @ 0x74 huart->TxISR = NULL; - 8004b24: 67a3 str r3, [r4, #120] @ 0x78 + 8004c18: 67a3 str r3, [r4, #120] @ 0x78 } - 8004b26: bd70 pop {r4, r5, r6, pc} - 8004b28: cfff69f3 .word 0xcfff69f3 - 8004b2c: ffffcfff .word 0xffffcfff - 8004b30: 11fff4ff .word 0x11fff4ff - 8004b34: 40013800 .word 0x40013800 - 8004b38: 40021000 .word 0x40021000 - 8004b3c: 0800528c .word 0x0800528c - 8004b40: bfffbc00 .word 0xbfffbc00 - 8004b44: 02dc6c00 .word 0x02dc6c00 - 8004b48: 08005290 .word 0x08005290 - 8004b4c: 0000ffef .word 0x0000ffef - 8004b50: 00010001 .word 0x00010001 + 8004c1a: bd70 pop {r4, r5, r6, pc} + 8004c1c: cfff69f3 .word 0xcfff69f3 + 8004c20: ffffcfff .word 0xffffcfff + 8004c24: 11fff4ff .word 0x11fff4ff + 8004c28: 40013800 .word 0x40013800 + 8004c2c: 40021000 .word 0x40021000 + 8004c30: 08005380 .word 0x08005380 + 8004c34: bfffbc00 .word 0xbfffbc00 + 8004c38: 02dc6c00 .word 0x02dc6c00 + 8004c3c: 08005384 .word 0x08005384 + 8004c40: 0000ffef .word 0x0000ffef + 8004c44: 00010001 .word 0x00010001 -08004b54 : +08004c48 : if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_SWAP_INIT)) - 8004b54: 6a83 ldr r3, [r0, #40] @ 0x28 + 8004c48: 6a83 ldr r3, [r0, #40] @ 0x28 { - 8004b56: b530 push {r4, r5, lr} + 8004c4a: b530 push {r4, r5, lr} if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_SWAP_INIT)) - 8004b58: 071a lsls r2, r3, #28 - 8004b5a: d506 bpl.n 8004b6a + 8004c4c: 071a lsls r2, r3, #28 + 8004c4e: d506 bpl.n 8004c5e MODIFY_REG(huart->Instance->CR2, USART_CR2_SWAP, huart->AdvancedInit.Swap); - 8004b5c: 6801 ldr r1, [r0, #0] - 8004b5e: 4c28 ldr r4, [pc, #160] @ (8004c00 ) - 8004b60: 684a ldr r2, [r1, #4] - 8004b62: 4022 ands r2, r4 - 8004b64: 6b84 ldr r4, [r0, #56] @ 0x38 - 8004b66: 4322 orrs r2, r4 - 8004b68: 604a str r2, [r1, #4] + 8004c50: 6801 ldr r1, [r0, #0] + 8004c52: 4c28 ldr r4, [pc, #160] @ (8004cf4 ) + 8004c54: 684a ldr r2, [r1, #4] + 8004c56: 4022 ands r2, r4 + 8004c58: 6b84 ldr r4, [r0, #56] @ 0x38 + 8004c5a: 4322 orrs r2, r4 + 8004c5c: 604a str r2, [r1, #4] if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_TXINVERT_INIT)) - 8004b6a: 07da lsls r2, r3, #31 - 8004b6c: d506 bpl.n 8004b7c + 8004c5e: 07da lsls r2, r3, #31 + 8004c60: d506 bpl.n 8004c70 MODIFY_REG(huart->Instance->CR2, USART_CR2_TXINV, huart->AdvancedInit.TxPinLevelInvert); - 8004b6e: 6801 ldr r1, [r0, #0] - 8004b70: 4c24 ldr r4, [pc, #144] @ (8004c04 ) - 8004b72: 684a ldr r2, [r1, #4] - 8004b74: 4022 ands r2, r4 - 8004b76: 6ac4 ldr r4, [r0, #44] @ 0x2c - 8004b78: 4322 orrs r2, r4 - 8004b7a: 604a str r2, [r1, #4] + 8004c62: 6801 ldr r1, [r0, #0] + 8004c64: 4c24 ldr r4, [pc, #144] @ (8004cf8 ) + 8004c66: 684a ldr r2, [r1, #4] + 8004c68: 4022 ands r2, r4 + 8004c6a: 6ac4 ldr r4, [r0, #44] @ 0x2c + 8004c6c: 4322 orrs r2, r4 + 8004c6e: 604a str r2, [r1, #4] if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXINVERT_INIT)) - 8004b7c: 079a lsls r2, r3, #30 - 8004b7e: d506 bpl.n 8004b8e + 8004c70: 079a lsls r2, r3, #30 + 8004c72: d506 bpl.n 8004c82 MODIFY_REG(huart->Instance->CR2, USART_CR2_RXINV, huart->AdvancedInit.RxPinLevelInvert); - 8004b80: 6801 ldr r1, [r0, #0] - 8004b82: 4c21 ldr r4, [pc, #132] @ (8004c08 ) - 8004b84: 684a ldr r2, [r1, #4] - 8004b86: 4022 ands r2, r4 - 8004b88: 6b04 ldr r4, [r0, #48] @ 0x30 - 8004b8a: 4322 orrs r2, r4 - 8004b8c: 604a str r2, [r1, #4] + 8004c74: 6801 ldr r1, [r0, #0] + 8004c76: 4c21 ldr r4, [pc, #132] @ (8004cfc ) + 8004c78: 684a ldr r2, [r1, #4] + 8004c7a: 4022 ands r2, r4 + 8004c7c: 6b04 ldr r4, [r0, #48] @ 0x30 + 8004c7e: 4322 orrs r2, r4 + 8004c80: 604a str r2, [r1, #4] if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DATAINVERT_INIT)) - 8004b8e: 075a lsls r2, r3, #29 - 8004b90: d506 bpl.n 8004ba0 + 8004c82: 075a lsls r2, r3, #29 + 8004c84: d506 bpl.n 8004c94 MODIFY_REG(huart->Instance->CR2, USART_CR2_DATAINV, huart->AdvancedInit.DataInvert); - 8004b92: 6801 ldr r1, [r0, #0] - 8004b94: 4c1d ldr r4, [pc, #116] @ (8004c0c ) - 8004b96: 684a ldr r2, [r1, #4] - 8004b98: 4022 ands r2, r4 - 8004b9a: 6b44 ldr r4, [r0, #52] @ 0x34 - 8004b9c: 4322 orrs r2, r4 - 8004b9e: 604a str r2, [r1, #4] + 8004c86: 6801 ldr r1, [r0, #0] + 8004c88: 4c1d ldr r4, [pc, #116] @ (8004d00 ) + 8004c8a: 684a ldr r2, [r1, #4] + 8004c8c: 4022 ands r2, r4 + 8004c8e: 6b44 ldr r4, [r0, #52] @ 0x34 + 8004c90: 4322 orrs r2, r4 + 8004c92: 604a str r2, [r1, #4] if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXOVERRUNDISABLE_INIT)) - 8004ba0: 06da lsls r2, r3, #27 - 8004ba2: d506 bpl.n 8004bb2 + 8004c94: 06da lsls r2, r3, #27 + 8004c96: d506 bpl.n 8004ca6 MODIFY_REG(huart->Instance->CR3, USART_CR3_OVRDIS, huart->AdvancedInit.OverrunDisable); - 8004ba4: 6801 ldr r1, [r0, #0] - 8004ba6: 4c1a ldr r4, [pc, #104] @ (8004c10 ) - 8004ba8: 688a ldr r2, [r1, #8] - 8004baa: 4022 ands r2, r4 - 8004bac: 6bc4 ldr r4, [r0, #60] @ 0x3c - 8004bae: 4322 orrs r2, r4 - 8004bb0: 608a str r2, [r1, #8] + 8004c98: 6801 ldr r1, [r0, #0] + 8004c9a: 4c1a ldr r4, [pc, #104] @ (8004d04 ) + 8004c9c: 688a ldr r2, [r1, #8] + 8004c9e: 4022 ands r2, r4 + 8004ca0: 6bc4 ldr r4, [r0, #60] @ 0x3c + 8004ca2: 4322 orrs r2, r4 + 8004ca4: 608a str r2, [r1, #8] if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DMADISABLEONERROR_INIT)) - 8004bb2: 069a lsls r2, r3, #26 - 8004bb4: d506 bpl.n 8004bc4 + 8004ca6: 069a lsls r2, r3, #26 + 8004ca8: d506 bpl.n 8004cb8 MODIFY_REG(huart->Instance->CR3, USART_CR3_DDRE, huart->AdvancedInit.DMADisableonRxError); - 8004bb6: 6801 ldr r1, [r0, #0] - 8004bb8: 4c16 ldr r4, [pc, #88] @ (8004c14 ) - 8004bba: 688a ldr r2, [r1, #8] - 8004bbc: 4022 ands r2, r4 - 8004bbe: 6c04 ldr r4, [r0, #64] @ 0x40 - 8004bc0: 4322 orrs r2, r4 - 8004bc2: 608a str r2, [r1, #8] + 8004caa: 6801 ldr r1, [r0, #0] + 8004cac: 4c16 ldr r4, [pc, #88] @ (8004d08 ) + 8004cae: 688a ldr r2, [r1, #8] + 8004cb0: 4022 ands r2, r4 + 8004cb2: 6c04 ldr r4, [r0, #64] @ 0x40 + 8004cb4: 4322 orrs r2, r4 + 8004cb6: 608a str r2, [r1, #8] if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_AUTOBAUDRATE_INIT)) - 8004bc4: 065a lsls r2, r3, #25 - 8004bc6: d510 bpl.n 8004bea + 8004cb8: 065a lsls r2, r3, #25 + 8004cba: d510 bpl.n 8004cde MODIFY_REG(huart->Instance->CR2, USART_CR2_ABREN, huart->AdvancedInit.AutoBaudRateEnable); - 8004bc8: 6801 ldr r1, [r0, #0] - 8004bca: 4d13 ldr r5, [pc, #76] @ (8004c18 ) - 8004bcc: 684a ldr r2, [r1, #4] - 8004bce: 6c44 ldr r4, [r0, #68] @ 0x44 - 8004bd0: 402a ands r2, r5 - 8004bd2: 4322 orrs r2, r4 - 8004bd4: 604a str r2, [r1, #4] + 8004cbc: 6801 ldr r1, [r0, #0] + 8004cbe: 4d13 ldr r5, [pc, #76] @ (8004d0c ) + 8004cc0: 684a ldr r2, [r1, #4] + 8004cc2: 6c44 ldr r4, [r0, #68] @ 0x44 + 8004cc4: 402a ands r2, r5 + 8004cc6: 4322 orrs r2, r4 + 8004cc8: 604a str r2, [r1, #4] if (huart->AdvancedInit.AutoBaudRateEnable == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE) - 8004bd6: 2280 movs r2, #128 @ 0x80 - 8004bd8: 0352 lsls r2, r2, #13 - 8004bda: 4294 cmp r4, r2 - 8004bdc: d105 bne.n 8004bea + 8004cca: 2280 movs r2, #128 @ 0x80 + 8004ccc: 0352 lsls r2, r2, #13 + 8004cce: 4294 cmp r4, r2 + 8004cd0: d105 bne.n 8004cde MODIFY_REG(huart->Instance->CR2, USART_CR2_ABRMODE, huart->AdvancedInit.AutoBaudRateMode); - 8004bde: 684a ldr r2, [r1, #4] - 8004be0: 4c0e ldr r4, [pc, #56] @ (8004c1c ) - 8004be2: 4022 ands r2, r4 - 8004be4: 6c84 ldr r4, [r0, #72] @ 0x48 - 8004be6: 4322 orrs r2, r4 - 8004be8: 604a str r2, [r1, #4] + 8004cd2: 684a ldr r2, [r1, #4] + 8004cd4: 4c0e ldr r4, [pc, #56] @ (8004d10 ) + 8004cd6: 4022 ands r2, r4 + 8004cd8: 6c84 ldr r4, [r0, #72] @ 0x48 + 8004cda: 4322 orrs r2, r4 + 8004cdc: 604a str r2, [r1, #4] if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_MSBFIRST_INIT)) - 8004bea: 061b lsls r3, r3, #24 - 8004bec: d506 bpl.n 8004bfc + 8004cde: 061b lsls r3, r3, #24 + 8004ce0: d506 bpl.n 8004cf0 MODIFY_REG(huart->Instance->CR2, USART_CR2_MSBFIRST, huart->AdvancedInit.MSBFirst); - 8004bee: 6802 ldr r2, [r0, #0] - 8004bf0: 490b ldr r1, [pc, #44] @ (8004c20 ) - 8004bf2: 6853 ldr r3, [r2, #4] - 8004bf4: 400b ands r3, r1 - 8004bf6: 6cc1 ldr r1, [r0, #76] @ 0x4c - 8004bf8: 430b orrs r3, r1 - 8004bfa: 6053 str r3, [r2, #4] + 8004ce2: 6802 ldr r2, [r0, #0] + 8004ce4: 490b ldr r1, [pc, #44] @ (8004d14 ) + 8004ce6: 6853 ldr r3, [r2, #4] + 8004ce8: 400b ands r3, r1 + 8004cea: 6cc1 ldr r1, [r0, #76] @ 0x4c + 8004cec: 430b orrs r3, r1 + 8004cee: 6053 str r3, [r2, #4] } - 8004bfc: bd30 pop {r4, r5, pc} - 8004bfe: 46c0 nop @ (mov r8, r8) - 8004c00: ffff7fff .word 0xffff7fff - 8004c04: fffdffff .word 0xfffdffff - 8004c08: fffeffff .word 0xfffeffff - 8004c0c: fffbffff .word 0xfffbffff - 8004c10: ffffefff .word 0xffffefff - 8004c14: ffffdfff .word 0xffffdfff - 8004c18: ffefffff .word 0xffefffff - 8004c1c: ff9fffff .word 0xff9fffff - 8004c20: fff7ffff .word 0xfff7ffff + 8004cf0: bd30 pop {r4, r5, pc} + 8004cf2: 46c0 nop @ (mov r8, r8) + 8004cf4: ffff7fff .word 0xffff7fff + 8004cf8: fffdffff .word 0xfffdffff + 8004cfc: fffeffff .word 0xfffeffff + 8004d00: fffbffff .word 0xfffbffff + 8004d04: ffffefff .word 0xffffefff + 8004d08: ffffdfff .word 0xffffdfff + 8004d0c: ffefffff .word 0xffefffff + 8004d10: ff9fffff .word 0xff9fffff + 8004d14: fff7ffff .word 0xfff7ffff -08004c24 : +08004d18 : { - 8004c24: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr} - 8004c26: 0004 movs r4, r0 - 8004c28: 000d movs r5, r1 - 8004c2a: 0017 movs r7, r2 - 8004c2c: 9300 str r3, [sp, #0] + 8004d18: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr} + 8004d1a: 0004 movs r4, r0 + 8004d1c: 000d movs r5, r1 + 8004d1e: 0017 movs r7, r2 + 8004d20: 9300 str r3, [sp, #0] while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) - 8004c2e: 6822 ldr r2, [r4, #0] - 8004c30: 69d3 ldr r3, [r2, #28] - 8004c32: 402b ands r3, r5 - 8004c34: 1b5b subs r3, r3, r5 - 8004c36: 4259 negs r1, r3 - 8004c38: 414b adcs r3, r1 - 8004c3a: 42bb cmp r3, r7 - 8004c3c: d001 beq.n 8004c42 + 8004d22: 6822 ldr r2, [r4, #0] + 8004d24: 69d3 ldr r3, [r2, #28] + 8004d26: 402b ands r3, r5 + 8004d28: 1b5b subs r3, r3, r5 + 8004d2a: 4259 negs r1, r3 + 8004d2c: 414b adcs r3, r1 + 8004d2e: 42bb cmp r3, r7 + 8004d30: d001 beq.n 8004d36 return HAL_OK; - 8004c3e: 2000 movs r0, #0 - 8004c40: e026 b.n 8004c90 + 8004d32: 2000 movs r0, #0 + 8004d34: e026 b.n 8004d84 if (Timeout != HAL_MAX_DELAY) - 8004c42: 9b08 ldr r3, [sp, #32] - 8004c44: 3301 adds r3, #1 - 8004c46: d0f3 beq.n 8004c30 + 8004d36: 9b08 ldr r3, [sp, #32] + 8004d38: 3301 adds r3, #1 + 8004d3a: d0f3 beq.n 8004d24 if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) - 8004c48: f7fd fe4a bl 80028e0 - 8004c4c: 9b00 ldr r3, [sp, #0] - 8004c4e: 1ac0 subs r0, r0, r3 - 8004c50: 9b08 ldr r3, [sp, #32] - 8004c52: 4298 cmp r0, r3 - 8004c54: d82d bhi.n 8004cb2 - 8004c56: 2b00 cmp r3, #0 - 8004c58: d02b beq.n 8004cb2 + 8004d3c: f7fd fde8 bl 8002910 + 8004d40: 9b00 ldr r3, [sp, #0] + 8004d42: 1ac0 subs r0, r0, r3 + 8004d44: 9b08 ldr r3, [sp, #32] + 8004d46: 4298 cmp r0, r3 + 8004d48: d82d bhi.n 8004da6 + 8004d4a: 2b00 cmp r3, #0 + 8004d4c: d02b beq.n 8004da6 if ((READ_BIT(huart->Instance->CR1, USART_CR1_RE) != 0U) && (Flag != UART_FLAG_TXE) && (Flag != UART_FLAG_TC)) - 8004c5a: 6823 ldr r3, [r4, #0] - 8004c5c: 681a ldr r2, [r3, #0] - 8004c5e: 0752 lsls r2, r2, #29 - 8004c60: d5e5 bpl.n 8004c2e - 8004c62: 002a movs r2, r5 - 8004c64: 2140 movs r1, #64 @ 0x40 - 8004c66: 3a40 subs r2, #64 @ 0x40 - 8004c68: 438a bics r2, r1 - 8004c6a: d0e0 beq.n 8004c2e + 8004d4e: 6823 ldr r3, [r4, #0] + 8004d50: 681a ldr r2, [r3, #0] + 8004d52: 0752 lsls r2, r2, #29 + 8004d54: d5e5 bpl.n 8004d22 + 8004d56: 002a movs r2, r5 + 8004d58: 2140 movs r1, #64 @ 0x40 + 8004d5a: 3a40 subs r2, #64 @ 0x40 + 8004d5c: 438a bics r2, r1 + 8004d5e: d0e0 beq.n 8004d22 if (__HAL_UART_GET_FLAG(huart, UART_FLAG_ORE) == SET) - 8004c6c: 69da ldr r2, [r3, #28] - 8004c6e: 2608 movs r6, #8 - 8004c70: 0011 movs r1, r2 - 8004c72: 4031 ands r1, r6 - 8004c74: 9101 str r1, [sp, #4] - 8004c76: 4232 tst r2, r6 - 8004c78: d00b beq.n 8004c92 + 8004d60: 69da ldr r2, [r3, #28] + 8004d62: 2608 movs r6, #8 + 8004d64: 0011 movs r1, r2 + 8004d66: 4031 ands r1, r6 + 8004d68: 9101 str r1, [sp, #4] + 8004d6a: 4232 tst r2, r6 + 8004d6c: d00b beq.n 8004d86 UART_EndRxTransfer(huart); - 8004c7a: 0020 movs r0, r4 + 8004d6e: 0020 movs r0, r4 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF); - 8004c7c: 621e str r6, [r3, #32] + 8004d70: 621e str r6, [r3, #32] UART_EndRxTransfer(huart); - 8004c7e: f7ff fc23 bl 80044c8 + 8004d72: f7ff fbc3 bl 80044fc huart->ErrorCode = HAL_UART_ERROR_ORE; - 8004c82: 0023 movs r3, r4 - 8004c84: 3390 adds r3, #144 @ 0x90 - 8004c86: 601e str r6, [r3, #0] + 8004d76: 0023 movs r3, r4 + 8004d78: 3390 adds r3, #144 @ 0x90 + 8004d7a: 601e str r6, [r3, #0] __HAL_UNLOCK(huart); - 8004c88: 2300 movs r3, #0 + 8004d7c: 2300 movs r3, #0 return HAL_ERROR; - 8004c8a: 2001 movs r0, #1 + 8004d7e: 2001 movs r0, #1 __HAL_UNLOCK(huart); - 8004c8c: 3484 adds r4, #132 @ 0x84 - 8004c8e: 7023 strb r3, [r4, #0] + 8004d80: 3484 adds r4, #132 @ 0x84 + 8004d82: 7023 strb r3, [r4, #0] } - 8004c90: bdfe pop {r1, r2, r3, r4, r5, r6, r7, pc} + 8004d84: bdfe pop {r1, r2, r3, r4, r5, r6, r7, pc} if (__HAL_UART_GET_FLAG(huart, UART_FLAG_RTOF) == SET) - 8004c92: 2280 movs r2, #128 @ 0x80 - 8004c94: 69d9 ldr r1, [r3, #28] - 8004c96: 0112 lsls r2, r2, #4 - 8004c98: 4211 tst r1, r2 - 8004c9a: d0c8 beq.n 8004c2e + 8004d86: 2280 movs r2, #128 @ 0x80 + 8004d88: 69d9 ldr r1, [r3, #28] + 8004d8a: 0112 lsls r2, r2, #4 + 8004d8c: 4211 tst r1, r2 + 8004d8e: d0c8 beq.n 8004d22 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_RTOF); - 8004c9c: 621a str r2, [r3, #32] + 8004d90: 621a str r2, [r3, #32] UART_EndRxTransfer(huart); - 8004c9e: 0020 movs r0, r4 - 8004ca0: f7ff fc12 bl 80044c8 + 8004d92: 0020 movs r0, r4 + 8004d94: f7ff fbb2 bl 80044fc huart->ErrorCode = HAL_UART_ERROR_RTO; - 8004ca4: 0023 movs r3, r4 - 8004ca6: 2220 movs r2, #32 - 8004ca8: 3390 adds r3, #144 @ 0x90 - 8004caa: 601a str r2, [r3, #0] + 8004d98: 0023 movs r3, r4 + 8004d9a: 2220 movs r2, #32 + 8004d9c: 3390 adds r3, #144 @ 0x90 + 8004d9e: 601a str r2, [r3, #0] __HAL_UNLOCK(huart); - 8004cac: 9b01 ldr r3, [sp, #4] - 8004cae: 3484 adds r4, #132 @ 0x84 - 8004cb0: 7023 strb r3, [r4, #0] + 8004da0: 9b01 ldr r3, [sp, #4] + 8004da2: 3484 adds r4, #132 @ 0x84 + 8004da4: 7023 strb r3, [r4, #0] return HAL_TIMEOUT; - 8004cb2: 2003 movs r0, #3 - 8004cb4: e7ec b.n 8004c90 + 8004da6: 2003 movs r0, #3 + 8004da8: e7ec b.n 8004d84 -08004cb6 : +08004daa : { - 8004cb6: b5f0 push {r4, r5, r6, r7, lr} - 8004cb8: 0017 movs r7, r2 + 8004daa: b5f0 push {r4, r5, r6, r7, lr} + 8004dac: 0017 movs r7, r2 if (huart->gState == HAL_UART_STATE_READY) - 8004cba: 0002 movs r2, r0 + 8004dae: 0002 movs r2, r0 { - 8004cbc: b087 sub sp, #28 + 8004db0: b087 sub sp, #28 if (huart->gState == HAL_UART_STATE_READY) - 8004cbe: 3288 adds r2, #136 @ 0x88 + 8004db2: 3288 adds r2, #136 @ 0x88 { - 8004cc0: 9305 str r3, [sp, #20] + 8004db4: 9305 str r3, [sp, #20] if (huart->gState == HAL_UART_STATE_READY) - 8004cc2: 6813 ldr r3, [r2, #0] + 8004db6: 6813 ldr r3, [r2, #0] { - 8004cc4: 0004 movs r4, r0 - 8004cc6: 000d movs r5, r1 + 8004db8: 0004 movs r4, r0 + 8004dba: 000d movs r5, r1 return HAL_BUSY; - 8004cc8: 2002 movs r0, #2 + 8004dbc: 2002 movs r0, #2 if (huart->gState == HAL_UART_STATE_READY) - 8004cca: 2b20 cmp r3, #32 - 8004ccc: d139 bne.n 8004d42 + 8004dbe: 2b20 cmp r3, #32 + 8004dc0: d139 bne.n 8004e36 return HAL_ERROR; - 8004cce: 3801 subs r0, #1 + 8004dc2: 3801 subs r0, #1 if ((pData == NULL) || (Size == 0U)) - 8004cd0: 2900 cmp r1, #0 - 8004cd2: d036 beq.n 8004d42 - 8004cd4: 2f00 cmp r7, #0 - 8004cd6: d034 beq.n 8004d42 + 8004dc4: 2900 cmp r1, #0 + 8004dc6: d036 beq.n 8004e36 + 8004dc8: 2f00 cmp r7, #0 + 8004dca: d034 beq.n 8004e36 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) - 8004cd8: 2380 movs r3, #128 @ 0x80 - 8004cda: 68a1 ldr r1, [r4, #8] - 8004cdc: 015b lsls r3, r3, #5 - 8004cde: 4299 cmp r1, r3 - 8004ce0: d104 bne.n 8004cec - 8004ce2: 6923 ldr r3, [r4, #16] - 8004ce4: 2b00 cmp r3, #0 - 8004ce6: d101 bne.n 8004cec + 8004dcc: 2380 movs r3, #128 @ 0x80 + 8004dce: 68a1 ldr r1, [r4, #8] + 8004dd0: 015b lsls r3, r3, #5 + 8004dd2: 4299 cmp r1, r3 + 8004dd4: d104 bne.n 8004de0 + 8004dd6: 6923 ldr r3, [r4, #16] + 8004dd8: 2b00 cmp r3, #0 + 8004dda: d101 bne.n 8004de0 if ((((uint32_t)pData) & 1U) != 0U) - 8004ce8: 4205 tst r5, r0 - 8004cea: d12a bne.n 8004d42 + 8004ddc: 4205 tst r5, r0 + 8004dde: d12a bne.n 8004e36 huart->ErrorCode = HAL_UART_ERROR_NONE; - 8004cec: 0023 movs r3, r4 - 8004cee: 2600 movs r6, #0 - 8004cf0: 3390 adds r3, #144 @ 0x90 - 8004cf2: 601e str r6, [r3, #0] + 8004de0: 0023 movs r3, r4 + 8004de2: 2600 movs r6, #0 + 8004de4: 3390 adds r3, #144 @ 0x90 + 8004de6: 601e str r6, [r3, #0] huart->gState = HAL_UART_STATE_BUSY_TX; - 8004cf4: 2321 movs r3, #33 @ 0x21 - 8004cf6: 6013 str r3, [r2, #0] + 8004de8: 2321 movs r3, #33 @ 0x21 + 8004dea: 6013 str r3, [r2, #0] tickstart = HAL_GetTick(); - 8004cf8: f7fd fdf2 bl 80028e0 + 8004dec: f7fd fd90 bl 8002910 huart->TxXferSize = Size; - 8004cfc: 0023 movs r3, r4 - 8004cfe: 3354 adds r3, #84 @ 0x54 - 8004d00: 801f strh r7, [r3, #0] + 8004df0: 0023 movs r3, r4 + 8004df2: 3354 adds r3, #84 @ 0x54 + 8004df4: 801f strh r7, [r3, #0] huart->TxXferCount = Size; - 8004d02: 3302 adds r3, #2 - 8004d04: 9303 str r3, [sp, #12] - 8004d06: 801f strh r7, [r3, #0] + 8004df6: 3302 adds r3, #2 + 8004df8: 9303 str r3, [sp, #12] + 8004dfa: 801f strh r7, [r3, #0] if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) - 8004d08: 2380 movs r3, #128 @ 0x80 - 8004d0a: 68a2 ldr r2, [r4, #8] + 8004dfc: 2380 movs r3, #128 @ 0x80 + 8004dfe: 68a2 ldr r2, [r4, #8] tickstart = HAL_GetTick(); - 8004d0c: 9004 str r0, [sp, #16] + 8004e00: 9004 str r0, [sp, #16] if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) - 8004d0e: 015b lsls r3, r3, #5 - 8004d10: 429a cmp r2, r3 - 8004d12: d104 bne.n 8004d1e - 8004d14: 6923 ldr r3, [r4, #16] - 8004d16: 42b3 cmp r3, r6 - 8004d18: d101 bne.n 8004d1e + 8004e02: 015b lsls r3, r3, #5 + 8004e04: 429a cmp r2, r3 + 8004e06: d104 bne.n 8004e12 + 8004e08: 6923 ldr r3, [r4, #16] + 8004e0a: 42b3 cmp r3, r6 + 8004e0c: d101 bne.n 8004e12 pdata16bits = (const uint16_t *) pData; - 8004d1a: 002e movs r6, r5 + 8004e0e: 002e movs r6, r5 pdata8bits = NULL; - 8004d1c: 001d movs r5, r3 + 8004e10: 001d movs r5, r3 while (huart->TxXferCount > 0U) - 8004d1e: 0023 movs r3, r4 - 8004d20: 3356 adds r3, #86 @ 0x56 - 8004d22: 881b ldrh r3, [r3, #0] - 8004d24: b29a uxth r2, r3 - 8004d26: 2b00 cmp r3, #0 - 8004d28: d10d bne.n 8004d46 + 8004e12: 0023 movs r3, r4 + 8004e14: 3356 adds r3, #86 @ 0x56 + 8004e16: 881b ldrh r3, [r3, #0] + 8004e18: b29a uxth r2, r3 + 8004e1a: 2b00 cmp r3, #0 + 8004e1c: d10d bne.n 8004e3a if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK) - 8004d2a: 9b05 ldr r3, [sp, #20] - 8004d2c: 0020 movs r0, r4 - 8004d2e: 9300 str r3, [sp, #0] - 8004d30: 2140 movs r1, #64 @ 0x40 - 8004d32: 9b04 ldr r3, [sp, #16] - 8004d34: f7ff ff76 bl 8004c24 - 8004d38: 2320 movs r3, #32 - 8004d3a: 3488 adds r4, #136 @ 0x88 + 8004e1e: 9b05 ldr r3, [sp, #20] + 8004e20: 0020 movs r0, r4 + 8004e22: 9300 str r3, [sp, #0] + 8004e24: 2140 movs r1, #64 @ 0x40 + 8004e26: 9b04 ldr r3, [sp, #16] + 8004e28: f7ff ff76 bl 8004d18 + 8004e2c: 2320 movs r3, #32 + 8004e2e: 3488 adds r4, #136 @ 0x88 huart->gState = HAL_UART_STATE_READY; - 8004d3c: 6023 str r3, [r4, #0] + 8004e30: 6023 str r3, [r4, #0] if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK) - 8004d3e: 2800 cmp r0, #0 - 8004d40: d10e bne.n 8004d60 + 8004e32: 2800 cmp r0, #0 + 8004e34: d10e bne.n 8004e54 } - 8004d42: b007 add sp, #28 - 8004d44: bdf0 pop {r4, r5, r6, r7, pc} + 8004e36: b007 add sp, #28 + 8004e38: bdf0 pop {r4, r5, r6, r7, pc} if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) - 8004d46: 9b05 ldr r3, [sp, #20] - 8004d48: 2200 movs r2, #0 - 8004d4a: 9300 str r3, [sp, #0] - 8004d4c: 2180 movs r1, #128 @ 0x80 - 8004d4e: 0020 movs r0, r4 - 8004d50: 9b04 ldr r3, [sp, #16] - 8004d52: f7ff ff67 bl 8004c24 - 8004d56: 2800 cmp r0, #0 - 8004d58: d004 beq.n 8004d64 + 8004e3a: 9b05 ldr r3, [sp, #20] + 8004e3c: 2200 movs r2, #0 + 8004e3e: 9300 str r3, [sp, #0] + 8004e40: 2180 movs r1, #128 @ 0x80 + 8004e42: 0020 movs r0, r4 + 8004e44: 9b04 ldr r3, [sp, #16] + 8004e46: f7ff ff67 bl 8004d18 + 8004e4a: 2800 cmp r0, #0 + 8004e4c: d004 beq.n 8004e58 huart->gState = HAL_UART_STATE_READY; - 8004d5a: 2320 movs r3, #32 - 8004d5c: 3488 adds r4, #136 @ 0x88 - 8004d5e: 6023 str r3, [r4, #0] + 8004e4e: 2320 movs r3, #32 + 8004e50: 3488 adds r4, #136 @ 0x88 + 8004e52: 6023 str r3, [r4, #0] return HAL_TIMEOUT; - 8004d60: 2003 movs r0, #3 - 8004d62: e7ee b.n 8004d42 + 8004e54: 2003 movs r0, #3 + 8004e56: e7ee b.n 8004e36 huart->Instance->TDR = (uint16_t)(*pdata16bits & 0x01FFU); - 8004d64: 6822 ldr r2, [r4, #0] + 8004e58: 6822 ldr r2, [r4, #0] if (pdata8bits == NULL) - 8004d66: 2d00 cmp r5, #0 - 8004d68: d10b bne.n 8004d82 + 8004e5a: 2d00 cmp r5, #0 + 8004e5c: d10b bne.n 8004e76 huart->Instance->TDR = (uint16_t)(*pdata16bits & 0x01FFU); - 8004d6a: 8833 ldrh r3, [r6, #0] + 8004e5e: 8833 ldrh r3, [r6, #0] pdata16bits++; - 8004d6c: 3602 adds r6, #2 + 8004e60: 3602 adds r6, #2 huart->Instance->TDR = (uint16_t)(*pdata16bits & 0x01FFU); - 8004d6e: 05db lsls r3, r3, #23 - 8004d70: 0ddb lsrs r3, r3, #23 - 8004d72: 6293 str r3, [r2, #40] @ 0x28 + 8004e62: 05db lsls r3, r3, #23 + 8004e64: 0ddb lsrs r3, r3, #23 + 8004e66: 6293 str r3, [r2, #40] @ 0x28 huart->TxXferCount--; - 8004d74: 9b03 ldr r3, [sp, #12] - 8004d76: 9a03 ldr r2, [sp, #12] - 8004d78: 881b ldrh r3, [r3, #0] - 8004d7a: 3b01 subs r3, #1 - 8004d7c: b29b uxth r3, r3 - 8004d7e: 8013 strh r3, [r2, #0] - 8004d80: e7cd b.n 8004d1e + 8004e68: 9b03 ldr r3, [sp, #12] + 8004e6a: 9a03 ldr r2, [sp, #12] + 8004e6c: 881b ldrh r3, [r3, #0] + 8004e6e: 3b01 subs r3, #1 + 8004e70: b29b uxth r3, r3 + 8004e72: 8013 strh r3, [r2, #0] + 8004e74: e7cd b.n 8004e12 huart->Instance->TDR = (uint8_t)(*pdata8bits & 0xFFU); - 8004d82: 782b ldrb r3, [r5, #0] + 8004e76: 782b ldrb r3, [r5, #0] pdata8bits++; - 8004d84: 3501 adds r5, #1 + 8004e78: 3501 adds r5, #1 huart->Instance->TDR = (uint8_t)(*pdata8bits & 0xFFU); - 8004d86: 6293 str r3, [r2, #40] @ 0x28 + 8004e7a: 6293 str r3, [r2, #40] @ 0x28 pdata8bits++; - 8004d88: e7f4 b.n 8004d74 + 8004e7c: e7f4 b.n 8004e68 ... -08004d8c : +08004e80 : huart->ErrorCode = HAL_UART_ERROR_NONE; - 8004d8c: 0003 movs r3, r0 + 8004e80: 0003 movs r3, r0 { - 8004d8e: b573 push {r0, r1, r4, r5, r6, lr} + 8004e82: b573 push {r0, r1, r4, r5, r6, lr} huart->ErrorCode = HAL_UART_ERROR_NONE; - 8004d90: 2600 movs r6, #0 + 8004e84: 2600 movs r6, #0 { - 8004d92: 0004 movs r4, r0 + 8004e86: 0004 movs r4, r0 huart->ErrorCode = HAL_UART_ERROR_NONE; - 8004d94: 3390 adds r3, #144 @ 0x90 - 8004d96: 601e str r6, [r3, #0] + 8004e88: 3390 adds r3, #144 @ 0x90 + 8004e8a: 601e str r6, [r3, #0] tickstart = HAL_GetTick(); - 8004d98: f7fd fda2 bl 80028e0 + 8004e8c: f7fd fd40 bl 8002910 if ((huart->Instance->CR1 & USART_CR1_TE) == USART_CR1_TE) - 8004d9c: 6823 ldr r3, [r4, #0] + 8004e90: 6823 ldr r3, [r4, #0] tickstart = HAL_GetTick(); - 8004d9e: 0005 movs r5, r0 + 8004e92: 0005 movs r5, r0 if ((huart->Instance->CR1 & USART_CR1_TE) == USART_CR1_TE) - 8004da0: 681b ldr r3, [r3, #0] - 8004da2: 071b lsls r3, r3, #28 - 8004da4: d51f bpl.n 8004de6 + 8004e94: 681b ldr r3, [r3, #0] + 8004e96: 071b lsls r3, r3, #28 + 8004e98: d51f bpl.n 8004eda if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_TEACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK) - 8004da6: 2180 movs r1, #128 @ 0x80 - 8004da8: 4b28 ldr r3, [pc, #160] @ (8004e4c ) - 8004daa: 0032 movs r2, r6 - 8004dac: 9300 str r3, [sp, #0] - 8004dae: 0389 lsls r1, r1, #14 - 8004db0: 0003 movs r3, r0 - 8004db2: 0020 movs r0, r4 - 8004db4: f7ff ff36 bl 8004c24 - 8004db8: 42b0 cmp r0, r6 - 8004dba: d014 beq.n 8004de6 + 8004e9a: 2180 movs r1, #128 @ 0x80 + 8004e9c: 4b28 ldr r3, [pc, #160] @ (8004f40 ) + 8004e9e: 0032 movs r2, r6 + 8004ea0: 9300 str r3, [sp, #0] + 8004ea2: 0389 lsls r1, r1, #14 + 8004ea4: 0003 movs r3, r0 + 8004ea6: 0020 movs r0, r4 + 8004ea8: f7ff ff36 bl 8004d18 + 8004eac: 42b0 cmp r0, r6 + 8004eae: d014 beq.n 8004eda __ASM volatile ("MRS %0, primask" : "=r" (result) ); - 8004dbc: f3ef 8110 mrs r1, PRIMASK + 8004eb0: f3ef 8110 mrs r1, PRIMASK __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 8004dc0: 2301 movs r3, #1 - 8004dc2: f383 8810 msr PRIMASK, r3 + 8004eb4: 2301 movs r3, #1 + 8004eb6: f383 8810 msr PRIMASK, r3 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE_TXFNFIE)); - 8004dc6: 2080 movs r0, #128 @ 0x80 - 8004dc8: 6822 ldr r2, [r4, #0] - 8004dca: 6813 ldr r3, [r2, #0] - 8004dcc: 4383 bics r3, r0 - 8004dce: 6013 str r3, [r2, #0] - 8004dd0: f381 8810 msr PRIMASK, r1 + 8004eba: 2080 movs r0, #128 @ 0x80 + 8004ebc: 6822 ldr r2, [r4, #0] + 8004ebe: 6813 ldr r3, [r2, #0] + 8004ec0: 4383 bics r3, r0 + 8004ec2: 6013 str r3, [r2, #0] + 8004ec4: f381 8810 msr PRIMASK, r1 huart->gState = HAL_UART_STATE_READY; - 8004dd4: 0023 movs r3, r4 - 8004dd6: 2220 movs r2, #32 - 8004dd8: 3388 adds r3, #136 @ 0x88 - 8004dda: 601a str r2, [r3, #0] + 8004ec8: 0023 movs r3, r4 + 8004eca: 2220 movs r2, #32 + 8004ecc: 3388 adds r3, #136 @ 0x88 + 8004ece: 601a str r2, [r3, #0] return HAL_TIMEOUT; - 8004ddc: 2003 movs r0, #3 + 8004ed0: 2003 movs r0, #3 __HAL_UNLOCK(huart); - 8004dde: 2300 movs r3, #0 - 8004de0: 3484 adds r4, #132 @ 0x84 - 8004de2: 7023 strb r3, [r4, #0] + 8004ed2: 2300 movs r3, #0 + 8004ed4: 3484 adds r4, #132 @ 0x84 + 8004ed6: 7023 strb r3, [r4, #0] } - 8004de4: bd76 pop {r1, r2, r4, r5, r6, pc} + 8004ed8: bd76 pop {r1, r2, r4, r5, r6, pc} if ((huart->Instance->CR1 & USART_CR1_RE) == USART_CR1_RE) - 8004de6: 0026 movs r6, r4 - 8004de8: 6823 ldr r3, [r4, #0] - 8004dea: 368c adds r6, #140 @ 0x8c - 8004dec: 681b ldr r3, [r3, #0] - 8004dee: 075b lsls r3, r3, #29 - 8004df0: d523 bpl.n 8004e3a + 8004eda: 0026 movs r6, r4 + 8004edc: 6823 ldr r3, [r4, #0] + 8004ede: 368c adds r6, #140 @ 0x8c + 8004ee0: 681b ldr r3, [r3, #0] + 8004ee2: 075b lsls r3, r3, #29 + 8004ee4: d523 bpl.n 8004f2e if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_REACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK) - 8004df2: 2180 movs r1, #128 @ 0x80 - 8004df4: 4b15 ldr r3, [pc, #84] @ (8004e4c ) - 8004df6: 2200 movs r2, #0 - 8004df8: 9300 str r3, [sp, #0] - 8004dfa: 0020 movs r0, r4 - 8004dfc: 002b movs r3, r5 - 8004dfe: 03c9 lsls r1, r1, #15 - 8004e00: f7ff ff10 bl 8004c24 - 8004e04: 2800 cmp r0, #0 - 8004e06: d018 beq.n 8004e3a + 8004ee6: 2180 movs r1, #128 @ 0x80 + 8004ee8: 4b15 ldr r3, [pc, #84] @ (8004f40 ) + 8004eea: 2200 movs r2, #0 + 8004eec: 9300 str r3, [sp, #0] + 8004eee: 0020 movs r0, r4 + 8004ef0: 002b movs r3, r5 + 8004ef2: 03c9 lsls r1, r1, #15 + 8004ef4: f7ff ff10 bl 8004d18 + 8004ef8: 2800 cmp r0, #0 + 8004efa: d018 beq.n 8004f2e __ASM volatile ("MRS %0, primask" : "=r" (result) ); - 8004e08: f3ef 8010 mrs r0, PRIMASK + 8004efc: f3ef 8010 mrs r0, PRIMASK __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 8004e0c: 2201 movs r2, #1 - 8004e0e: f382 8810 msr PRIMASK, r2 + 8004f00: 2201 movs r2, #1 + 8004f02: f382 8810 msr PRIMASK, r2 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE)); - 8004e12: 6821 ldr r1, [r4, #0] - 8004e14: 4d0e ldr r5, [pc, #56] @ (8004e50 ) - 8004e16: 680b ldr r3, [r1, #0] - 8004e18: 402b ands r3, r5 - 8004e1a: 600b str r3, [r1, #0] - 8004e1c: f380 8810 msr PRIMASK, r0 + 8004f06: 6821 ldr r1, [r4, #0] + 8004f08: 4d0e ldr r5, [pc, #56] @ (8004f44 ) + 8004f0a: 680b ldr r3, [r1, #0] + 8004f0c: 402b ands r3, r5 + 8004f0e: 600b str r3, [r1, #0] + 8004f10: f380 8810 msr PRIMASK, r0 __ASM volatile ("MRS %0, primask" : "=r" (result) ); - 8004e20: f3ef 8010 mrs r0, PRIMASK + 8004f14: f3ef 8010 mrs r0, PRIMASK __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 8004e24: f382 8810 msr PRIMASK, r2 + 8004f18: f382 8810 msr PRIMASK, r2 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - 8004e28: 6821 ldr r1, [r4, #0] - 8004e2a: 688b ldr r3, [r1, #8] - 8004e2c: 4393 bics r3, r2 - 8004e2e: 608b str r3, [r1, #8] - 8004e30: f380 8810 msr PRIMASK, r0 + 8004f1c: 6821 ldr r1, [r4, #0] + 8004f1e: 688b ldr r3, [r1, #8] + 8004f20: 4393 bics r3, r2 + 8004f22: 608b str r3, [r1, #8] + 8004f24: f380 8810 msr PRIMASK, r0 huart->RxState = HAL_UART_STATE_READY; - 8004e34: 2320 movs r3, #32 - 8004e36: 6033 str r3, [r6, #0] + 8004f28: 2320 movs r3, #32 + 8004f2a: 6033 str r3, [r6, #0] return HAL_TIMEOUT; - 8004e38: e7d0 b.n 8004ddc + 8004f2c: e7d0 b.n 8004ed0 huart->gState = HAL_UART_STATE_READY; - 8004e3a: 0023 movs r3, r4 - 8004e3c: 2220 movs r2, #32 + 8004f2e: 0023 movs r3, r4 + 8004f30: 2220 movs r2, #32 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - 8004e3e: 2000 movs r0, #0 + 8004f32: 2000 movs r0, #0 huart->gState = HAL_UART_STATE_READY; - 8004e40: 3388 adds r3, #136 @ 0x88 - 8004e42: 601a str r2, [r3, #0] + 8004f34: 3388 adds r3, #136 @ 0x88 + 8004f36: 601a str r2, [r3, #0] huart->RxState = HAL_UART_STATE_READY; - 8004e44: 6032 str r2, [r6, #0] + 8004f38: 6032 str r2, [r6, #0] huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - 8004e46: 66e0 str r0, [r4, #108] @ 0x6c + 8004f3a: 66e0 str r0, [r4, #108] @ 0x6c huart->RxEventType = HAL_UART_RXEVENT_TC; - 8004e48: 6720 str r0, [r4, #112] @ 0x70 + 8004f3c: 6720 str r0, [r4, #112] @ 0x70 return HAL_OK; - 8004e4a: e7c8 b.n 8004dde - 8004e4c: 01ffffff .word 0x01ffffff - 8004e50: fffffedf .word 0xfffffedf + 8004f3e: e7c8 b.n 8004ed2 + 8004f40: 01ffffff .word 0x01ffffff + 8004f44: fffffedf .word 0xfffffedf -08004e54 : +08004f48 : { - 8004e54: b570 push {r4, r5, r6, lr} - 8004e56: 1e04 subs r4, r0, #0 + 8004f48: b570 push {r4, r5, r6, lr} + 8004f4a: 1e04 subs r4, r0, #0 if (huart == NULL) - 8004e58: d101 bne.n 8004e5e + 8004f4c: d101 bne.n 8004f52 return HAL_ERROR; - 8004e5a: 2001 movs r0, #1 + 8004f4e: 2001 movs r0, #1 } - 8004e5c: bd70 pop {r4, r5, r6, pc} + 8004f50: bd70 pop {r4, r5, r6, pc} if (huart->gState == HAL_UART_STATE_RESET) - 8004e5e: 0005 movs r5, r0 - 8004e60: 3588 adds r5, #136 @ 0x88 - 8004e62: 682b ldr r3, [r5, #0] - 8004e64: 2b00 cmp r3, #0 - 8004e66: d104 bne.n 8004e72 + 8004f52: 0005 movs r5, r0 + 8004f54: 3588 adds r5, #136 @ 0x88 + 8004f56: 682b ldr r3, [r5, #0] + 8004f58: 2b00 cmp r3, #0 + 8004f5a: d104 bne.n 8004f66 huart->Lock = HAL_UNLOCKED; - 8004e68: 0002 movs r2, r0 - 8004e6a: 3284 adds r2, #132 @ 0x84 - 8004e6c: 7013 strb r3, [r2, #0] + 8004f5c: 0002 movs r2, r0 + 8004f5e: 3284 adds r2, #132 @ 0x84 + 8004f60: 7013 strb r3, [r2, #0] HAL_UART_MspInit(huart); - 8004e6e: f7fd fbdd bl 800262c + 8004f62: f7fd fb7b bl 800265c huart->gState = HAL_UART_STATE_BUSY; - 8004e72: 2324 movs r3, #36 @ 0x24 + 8004f66: 2324 movs r3, #36 @ 0x24 __HAL_UART_DISABLE(huart); - 8004e74: 2101 movs r1, #1 - 8004e76: 6822 ldr r2, [r4, #0] + 8004f68: 2101 movs r1, #1 + 8004f6a: 6822 ldr r2, [r4, #0] huart->gState = HAL_UART_STATE_BUSY; - 8004e78: 602b str r3, [r5, #0] + 8004f6c: 602b str r3, [r5, #0] __HAL_UART_DISABLE(huart); - 8004e7a: 6813 ldr r3, [r2, #0] - 8004e7c: 438b bics r3, r1 - 8004e7e: 6013 str r3, [r2, #0] + 8004f6e: 6813 ldr r3, [r2, #0] + 8004f70: 438b bics r3, r1 + 8004f72: 6013 str r3, [r2, #0] if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT) - 8004e80: 6aa3 ldr r3, [r4, #40] @ 0x28 - 8004e82: 2b00 cmp r3, #0 - 8004e84: d002 beq.n 8004e8c + 8004f74: 6aa3 ldr r3, [r4, #40] @ 0x28 + 8004f76: 2b00 cmp r3, #0 + 8004f78: d002 beq.n 8004f80 UART_AdvFeatureConfig(huart); - 8004e86: 0020 movs r0, r4 - 8004e88: f7ff fe64 bl 8004b54 + 8004f7a: 0020 movs r0, r4 + 8004f7c: f7ff fe64 bl 8004c48 if (UART_SetConfig(huart) == HAL_ERROR) - 8004e8c: 0020 movs r0, r4 - 8004e8e: f7ff fd9f bl 80049d0 - 8004e92: 2801 cmp r0, #1 - 8004e94: d0e1 beq.n 8004e5a + 8004f80: 0020 movs r0, r4 + 8004f82: f7ff fd9f bl 8004ac4 + 8004f86: 2801 cmp r0, #1 + 8004f88: d0e1 beq.n 8004f4e CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); - 8004e96: 6823 ldr r3, [r4, #0] - 8004e98: 4907 ldr r1, [pc, #28] @ (8004eb8 ) - 8004e9a: 685a ldr r2, [r3, #4] + 8004f8a: 6823 ldr r3, [r4, #0] + 8004f8c: 4907 ldr r1, [pc, #28] @ (8004fac ) + 8004f8e: 685a ldr r2, [r3, #4] return (UART_CheckIdleState(huart)); - 8004e9c: 0020 movs r0, r4 + 8004f90: 0020 movs r0, r4 CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); - 8004e9e: 400a ands r2, r1 + 8004f92: 400a ands r2, r1 CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); - 8004ea0: 212a movs r1, #42 @ 0x2a + 8004f94: 212a movs r1, #42 @ 0x2a CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); - 8004ea2: 605a str r2, [r3, #4] + 8004f96: 605a str r2, [r3, #4] CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); - 8004ea4: 689a ldr r2, [r3, #8] - 8004ea6: 438a bics r2, r1 - 8004ea8: 609a str r2, [r3, #8] + 8004f98: 689a ldr r2, [r3, #8] + 8004f9a: 438a bics r2, r1 + 8004f9c: 609a str r2, [r3, #8] __HAL_UART_ENABLE(huart); - 8004eaa: 2201 movs r2, #1 - 8004eac: 6819 ldr r1, [r3, #0] - 8004eae: 430a orrs r2, r1 - 8004eb0: 601a str r2, [r3, #0] + 8004f9e: 2201 movs r2, #1 + 8004fa0: 6819 ldr r1, [r3, #0] + 8004fa2: 430a orrs r2, r1 + 8004fa4: 601a str r2, [r3, #0] return (UART_CheckIdleState(huart)); - 8004eb2: f7ff ff6b bl 8004d8c - 8004eb6: e7d1 b.n 8004e5c - 8004eb8: ffffb7ff .word 0xffffb7ff + 8004fa6: f7ff ff6b bl 8004e80 + 8004faa: e7d1 b.n 8004f50 + 8004fac: ffffb7ff .word 0xffffb7ff -08004ebc : +08004fb0 : { - 8004ebc: b5f8 push {r3, r4, r5, r6, r7, lr} - 8004ebe: 0013 movs r3, r2 + 8004fb0: b5f8 push {r3, r4, r5, r6, r7, lr} + 8004fb2: 0013 movs r3, r2 huart->RxXferSize = Size; - 8004ec0: 0002 movs r2, r0 + 8004fb4: 0002 movs r2, r0 huart->ErrorCode = HAL_UART_ERROR_NONE; - 8004ec2: 0006 movs r6, r0 + 8004fb6: 0006 movs r6, r0 huart->RxState = HAL_UART_STATE_BUSY_RX; - 8004ec4: 0005 movs r5, r0 + 8004fb8: 0005 movs r5, r0 huart->RxXferSize = Size; - 8004ec6: 325c adds r2, #92 @ 0x5c + 8004fba: 325c adds r2, #92 @ 0x5c huart->pRxBuffPtr = pData; - 8004ec8: 6581 str r1, [r0, #88] @ 0x58 + 8004fbc: 6581 str r1, [r0, #88] @ 0x58 { - 8004eca: 000f movs r7, r1 + 8004fbe: 000f movs r7, r1 huart->RxXferSize = Size; - 8004ecc: 8013 strh r3, [r2, #0] + 8004fc0: 8013 strh r3, [r2, #0] huart->RxState = HAL_UART_STATE_BUSY_RX; - 8004ece: 2122 movs r1, #34 @ 0x22 + 8004fc2: 2122 movs r1, #34 @ 0x22 huart->ErrorCode = HAL_UART_ERROR_NONE; - 8004ed0: 2200 movs r2, #0 - 8004ed2: 3690 adds r6, #144 @ 0x90 + 8004fc4: 2200 movs r2, #0 + 8004fc6: 3690 adds r6, #144 @ 0x90 huart->RxState = HAL_UART_STATE_BUSY_RX; - 8004ed4: 358c adds r5, #140 @ 0x8c + 8004fc8: 358c adds r5, #140 @ 0x8c huart->ErrorCode = HAL_UART_ERROR_NONE; - 8004ed6: 6032 str r2, [r6, #0] + 8004fca: 6032 str r2, [r6, #0] huart->RxState = HAL_UART_STATE_BUSY_RX; - 8004ed8: 6029 str r1, [r5, #0] + 8004fcc: 6029 str r1, [r5, #0] if (huart->hdmarx != NULL) - 8004eda: 1d01 adds r1, r0, #4 + 8004fce: 1d01 adds r1, r0, #4 { - 8004edc: 0004 movs r4, r0 + 8004fd0: 0004 movs r4, r0 if (huart->hdmarx != NULL) - 8004ede: 6fc8 ldr r0, [r1, #124] @ 0x7c - 8004ee0: 4290 cmp r0, r2 - 8004ee2: d013 beq.n 8004f0c + 8004fd2: 6fc8 ldr r0, [r1, #124] @ 0x7c + 8004fd4: 4290 cmp r0, r2 + 8004fd6: d013 beq.n 8005000 huart->hdmarx->XferCpltCallback = UART_DMAReceiveCplt; - 8004ee4: 491d ldr r1, [pc, #116] @ (8004f5c ) + 8004fd8: 491d ldr r1, [pc, #116] @ (8005050 ) huart->hdmarx->XferAbortCallback = NULL; - 8004ee6: 6382 str r2, [r0, #56] @ 0x38 + 8004fda: 6382 str r2, [r0, #56] @ 0x38 huart->hdmarx->XferCpltCallback = UART_DMAReceiveCplt; - 8004ee8: 62c1 str r1, [r0, #44] @ 0x2c + 8004fdc: 62c1 str r1, [r0, #44] @ 0x2c huart->hdmarx->XferHalfCpltCallback = UART_DMARxHalfCplt; - 8004eea: 491d ldr r1, [pc, #116] @ (8004f60 ) + 8004fde: 491d ldr r1, [pc, #116] @ (8005054 ) if (HAL_DMA_Start_IT(huart->hdmarx, (uint32_t)&huart->Instance->RDR, (uint32_t)huart->pRxBuffPtr, Size) != HAL_OK) - 8004eec: 003a movs r2, r7 + 8004fe0: 003a movs r2, r7 huart->hdmarx->XferHalfCpltCallback = UART_DMARxHalfCplt; - 8004eee: 6301 str r1, [r0, #48] @ 0x30 + 8004fe2: 6301 str r1, [r0, #48] @ 0x30 huart->hdmarx->XferErrorCallback = UART_DMAError; - 8004ef0: 491c ldr r1, [pc, #112] @ (8004f64 ) - 8004ef2: 6341 str r1, [r0, #52] @ 0x34 + 8004fe4: 491c ldr r1, [pc, #112] @ (8005058 ) + 8004fe6: 6341 str r1, [r0, #52] @ 0x34 if (HAL_DMA_Start_IT(huart->hdmarx, (uint32_t)&huart->Instance->RDR, (uint32_t)huart->pRxBuffPtr, Size) != HAL_OK) - 8004ef4: 6821 ldr r1, [r4, #0] - 8004ef6: 3124 adds r1, #36 @ 0x24 - 8004ef8: f7fe f838 bl 8002f6c - 8004efc: 2800 cmp r0, #0 - 8004efe: d005 beq.n 8004f0c + 8004fe8: 6821 ldr r1, [r4, #0] + 8004fea: 3124 adds r1, #36 @ 0x24 + 8004fec: f7fd ffd6 bl 8002f9c + 8004ff0: 2800 cmp r0, #0 + 8004ff2: d005 beq.n 8005000 huart->ErrorCode = HAL_UART_ERROR_DMA; - 8004f00: 2310 movs r3, #16 + 8004ff4: 2310 movs r3, #16 return HAL_ERROR; - 8004f02: 2001 movs r0, #1 + 8004ff6: 2001 movs r0, #1 huart->ErrorCode = HAL_UART_ERROR_DMA; - 8004f04: 6033 str r3, [r6, #0] + 8004ff8: 6033 str r3, [r6, #0] huart->RxState = HAL_UART_STATE_READY; - 8004f06: 18db adds r3, r3, r3 - 8004f08: 602b str r3, [r5, #0] + 8004ffa: 18db adds r3, r3, r3 + 8004ffc: 602b str r3, [r5, #0] } - 8004f0a: bdf8 pop {r3, r4, r5, r6, r7, pc} + 8004ffe: bdf8 pop {r3, r4, r5, r6, r7, pc} if (huart->Init.Parity != UART_PARITY_NONE) - 8004f0c: 6923 ldr r3, [r4, #16] - 8004f0e: 2b00 cmp r3, #0 - 8004f10: d00b beq.n 8004f2a + 8005000: 6923 ldr r3, [r4, #16] + 8005002: 2b00 cmp r3, #0 + 8005004: d00b beq.n 800501e __ASM volatile ("MRS %0, primask" : "=r" (result) ); - 8004f12: f3ef 8110 mrs r1, PRIMASK + 8005006: f3ef 8110 mrs r1, PRIMASK __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 8004f16: 2301 movs r3, #1 - 8004f18: f383 8810 msr PRIMASK, r3 + 800500a: 2301 movs r3, #1 + 800500c: f383 8810 msr PRIMASK, r3 ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_PEIE); - 8004f1c: 6822 ldr r2, [r4, #0] - 8004f1e: 33ff adds r3, #255 @ 0xff - 8004f20: 6810 ldr r0, [r2, #0] - 8004f22: 4303 orrs r3, r0 - 8004f24: 6013 str r3, [r2, #0] - 8004f26: f381 8810 msr PRIMASK, r1 + 8005010: 6822 ldr r2, [r4, #0] + 8005012: 33ff adds r3, #255 @ 0xff + 8005014: 6810 ldr r0, [r2, #0] + 8005016: 4303 orrs r3, r0 + 8005018: 6013 str r3, [r2, #0] + 800501a: f381 8810 msr PRIMASK, r1 __ASM volatile ("MRS %0, primask" : "=r" (result) ); - 8004f2a: f3ef 8010 mrs r0, PRIMASK + 800501e: f3ef 8010 mrs r0, PRIMASK __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 8004f2e: 2301 movs r3, #1 - 8004f30: f383 8810 msr PRIMASK, r3 + 8005022: 2301 movs r3, #1 + 8005024: f383 8810 msr PRIMASK, r3 ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_EIE); - 8004f34: 6821 ldr r1, [r4, #0] - 8004f36: 688a ldr r2, [r1, #8] - 8004f38: 431a orrs r2, r3 - 8004f3a: 608a str r2, [r1, #8] - 8004f3c: f380 8810 msr PRIMASK, r0 + 8005028: 6821 ldr r1, [r4, #0] + 800502a: 688a ldr r2, [r1, #8] + 800502c: 431a orrs r2, r3 + 800502e: 608a str r2, [r1, #8] + 8005030: f380 8810 msr PRIMASK, r0 __ASM volatile ("MRS %0, primask" : "=r" (result) ); - 8004f40: f3ef 8110 mrs r1, PRIMASK + 8005034: f3ef 8110 mrs r1, PRIMASK __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 8004f44: f383 8810 msr PRIMASK, r3 + 8005038: f383 8810 msr PRIMASK, r3 ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_DMAR); - 8004f48: 6822 ldr r2, [r4, #0] - 8004f4a: 333f adds r3, #63 @ 0x3f - 8004f4c: 6890 ldr r0, [r2, #8] - 8004f4e: 4303 orrs r3, r0 - 8004f50: 6093 str r3, [r2, #8] - 8004f52: f381 8810 msr PRIMASK, r1 + 800503c: 6822 ldr r2, [r4, #0] + 800503e: 333f adds r3, #63 @ 0x3f + 8005040: 6890 ldr r0, [r2, #8] + 8005042: 4303 orrs r3, r0 + 8005044: 6093 str r3, [r2, #8] + 8005046: f381 8810 msr PRIMASK, r1 return HAL_OK; - 8004f56: 2000 movs r0, #0 - 8004f58: e7d7 b.n 8004f0a - 8004f5a: 46c0 nop @ (mov r8, r8) - 8004f5c: 08004919 .word 0x08004919 - 8004f60: 080048dd .word 0x080048dd - 8004f64: 08004533 .word 0x08004533 + 800504a: 2000 movs r0, #0 + 800504c: e7d7 b.n 8004ffe + 800504e: 46c0 nop @ (mov r8, r8) + 8005050: 08004a0d .word 0x08004a0d + 8005054: 080049d1 .word 0x080049d1 + 8005058: 08004627 .word 0x08004627 -08004f68 : +0800505c : * the UART configuration registers. * @param huart UART handle. * @retval None */ static void UARTEx_SetNbDataToProcess(UART_HandleTypeDef *huart) { - 8004f68: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr} - 8004f6a: 0007 movs r7, r0 + 800505c: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr} + 800505e: 0007 movs r7, r0 uint8_t rx_fifo_threshold; uint8_t tx_fifo_threshold; static const uint8_t numerator[] = {1U, 1U, 1U, 3U, 7U, 1U, 0U, 0U}; static const uint8_t denominator[] = {8U, 4U, 2U, 4U, 8U, 1U, 1U, 1U}; if (huart->FifoMode == UART_FIFOMODE_DISABLE) - 8004f6c: 6e43 ldr r3, [r0, #100] @ 0x64 + 8005060: 6e43 ldr r3, [r0, #100] @ 0x64 { - 8004f6e: 0004 movs r4, r0 - 8004f70: 376a adds r7, #106 @ 0x6a + 8005062: 0004 movs r4, r0 + 8005064: 376a adds r7, #106 @ 0x6a if (huart->FifoMode == UART_FIFOMODE_DISABLE) - 8004f72: 2b00 cmp r3, #0 - 8004f74: d104 bne.n 8004f80 + 8005066: 2b00 cmp r3, #0 + 8005068: d104 bne.n 8005074 { huart->NbTxDataToProcess = 1U; - 8004f76: 2001 movs r0, #1 - 8004f78: 8038 strh r0, [r7, #0] + 800506a: 2001 movs r0, #1 + 800506c: 8038 strh r0, [r7, #0] huart->NbRxDataToProcess = 1U; - 8004f7a: 3468 adds r4, #104 @ 0x68 - 8004f7c: 8020 strh r0, [r4, #0] + 800506e: 3468 adds r4, #104 @ 0x68 + 8005070: 8020 strh r0, [r4, #0] huart->NbTxDataToProcess = ((uint16_t)tx_fifo_depth * numerator[tx_fifo_threshold]) / (uint16_t)denominator[tx_fifo_threshold]; huart->NbRxDataToProcess = ((uint16_t)rx_fifo_depth * numerator[rx_fifo_threshold]) / (uint16_t)denominator[rx_fifo_threshold]; } } - 8004f7e: bdf7 pop {r0, r1, r2, r4, r5, r6, r7, pc} + 8005072: bdf7 pop {r0, r1, r2, r4, r5, r6, r7, pc} rx_fifo_threshold = (uint8_t)(READ_BIT(huart->Instance->CR3, USART_CR3_RXFTCFG) >> USART_CR3_RXFTCFG_Pos); - 8004f80: 6803 ldr r3, [r0, #0] + 8005074: 6803 ldr r3, [r0, #0] huart->NbTxDataToProcess = ((uint16_t)tx_fifo_depth * numerator[tx_fifo_threshold]) / - 8004f82: 4e0b ldr r6, [pc, #44] @ (8004fb0 ) + 8005076: 4e0b ldr r6, [pc, #44] @ (80050a4 ) rx_fifo_threshold = (uint8_t)(READ_BIT(huart->Instance->CR3, USART_CR3_RXFTCFG) >> USART_CR3_RXFTCFG_Pos); - 8004f84: 689a ldr r2, [r3, #8] + 8005078: 689a ldr r2, [r3, #8] tx_fifo_threshold = (uint8_t)(READ_BIT(huart->Instance->CR3, USART_CR3_TXFTCFG) >> USART_CR3_TXFTCFG_Pos); - 8004f86: 689b ldr r3, [r3, #8] + 800507a: 689b ldr r3, [r3, #8] (uint16_t)denominator[tx_fifo_threshold]; - 8004f88: 4d0a ldr r5, [pc, #40] @ (8004fb4 ) + 800507c: 4d0a ldr r5, [pc, #40] @ (80050a8 ) tx_fifo_threshold = (uint8_t)(READ_BIT(huart->Instance->CR3, USART_CR3_TXFTCFG) >> USART_CR3_TXFTCFG_Pos); - 8004f8a: 0f5b lsrs r3, r3, #29 + 800507e: 0f5b lsrs r3, r3, #29 huart->NbTxDataToProcess = ((uint16_t)tx_fifo_depth * numerator[tx_fifo_threshold]) / - 8004f8c: 5cf0 ldrb r0, [r6, r3] + 8005080: 5cf0 ldrb r0, [r6, r3] (uint16_t)denominator[tx_fifo_threshold]; - 8004f8e: 5ce9 ldrb r1, [r5, r3] + 8005082: 5ce9 ldrb r1, [r5, r3] huart->NbTxDataToProcess = ((uint16_t)tx_fifo_depth * numerator[tx_fifo_threshold]) / - 8004f90: 00c0 lsls r0, r0, #3 + 8005084: 00c0 lsls r0, r0, #3 rx_fifo_threshold = (uint8_t)(READ_BIT(huart->Instance->CR3, USART_CR3_RXFTCFG) >> USART_CR3_RXFTCFG_Pos); - 8004f92: 9201 str r2, [sp, #4] + 8005086: 9201 str r2, [sp, #4] huart->NbTxDataToProcess = ((uint16_t)tx_fifo_depth * numerator[tx_fifo_threshold]) / - 8004f94: f7fb f956 bl 8000244 <__divsi3> + 8005088: f7fb f8dc bl 8000244 <__divsi3> rx_fifo_threshold = (uint8_t)(READ_BIT(huart->Instance->CR3, USART_CR3_RXFTCFG) >> USART_CR3_RXFTCFG_Pos); - 8004f98: 9b01 ldr r3, [sp, #4] + 800508c: 9b01 ldr r3, [sp, #4] huart->NbTxDataToProcess = ((uint16_t)tx_fifo_depth * numerator[tx_fifo_threshold]) / - 8004f9a: 8038 strh r0, [r7, #0] + 800508e: 8038 strh r0, [r7, #0] rx_fifo_threshold = (uint8_t)(READ_BIT(huart->Instance->CR3, USART_CR3_RXFTCFG) >> USART_CR3_RXFTCFG_Pos); - 8004f9c: 011b lsls r3, r3, #4 + 8005090: 011b lsls r3, r3, #4 huart->NbRxDataToProcess = ((uint16_t)rx_fifo_depth * numerator[rx_fifo_threshold]) / - 8004f9e: 0f5b lsrs r3, r3, #29 - 8004fa0: 5cf0 ldrb r0, [r6, r3] + 8005092: 0f5b lsrs r3, r3, #29 + 8005094: 5cf0 ldrb r0, [r6, r3] (uint16_t)denominator[rx_fifo_threshold]; - 8004fa2: 5ce9 ldrb r1, [r5, r3] + 8005096: 5ce9 ldrb r1, [r5, r3] huart->NbRxDataToProcess = ((uint16_t)rx_fifo_depth * numerator[rx_fifo_threshold]) / - 8004fa4: 00c0 lsls r0, r0, #3 - 8004fa6: f7fb f94d bl 8000244 <__divsi3> - 8004faa: b280 uxth r0, r0 + 8005098: 00c0 lsls r0, r0, #3 + 800509a: f7fb f8d3 bl 8000244 <__divsi3> + 800509e: b280 uxth r0, r0 } - 8004fac: e7e5 b.n 8004f7a - 8004fae: 46c0 nop @ (mov r8, r8) - 8004fb0: 080052b0 .word 0x080052b0 - 8004fb4: 080052a8 .word 0x080052a8 + 80050a0: e7e5 b.n 800506e + 80050a2: 46c0 nop @ (mov r8, r8) + 80050a4: 080053a4 .word 0x080053a4 + 80050a8: 0800539c .word 0x0800539c -08004fb8 : +080050ac : { - 8004fb8: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr} - 8004fba: 0004 movs r4, r0 - 8004fbc: 000e movs r6, r1 - 8004fbe: 001d movs r5, r3 - 8004fc0: 9201 str r2, [sp, #4] + 80050ac: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr} + 80050ae: 0004 movs r4, r0 + 80050b0: 000e movs r6, r1 + 80050b2: 001d movs r5, r3 + 80050b4: 9201 str r2, [sp, #4] if (huart == NULL) - 8004fc2: 2800 cmp r0, #0 - 8004fc4: d101 bne.n 8004fca + 80050b6: 2800 cmp r0, #0 + 80050b8: d101 bne.n 80050be return HAL_ERROR; - 8004fc6: 2001 movs r0, #1 + 80050ba: 2001 movs r0, #1 } - 8004fc8: bdfe pop {r1, r2, r3, r4, r5, r6, r7, pc} + 80050bc: bdfe pop {r1, r2, r3, r4, r5, r6, r7, pc} if (huart->gState == HAL_UART_STATE_RESET) - 8004fca: 0007 movs r7, r0 - 8004fcc: 3788 adds r7, #136 @ 0x88 - 8004fce: 683b ldr r3, [r7, #0] - 8004fd0: 2b00 cmp r3, #0 - 8004fd2: d104 bne.n 8004fde + 80050be: 0007 movs r7, r0 + 80050c0: 3788 adds r7, #136 @ 0x88 + 80050c2: 683b ldr r3, [r7, #0] + 80050c4: 2b00 cmp r3, #0 + 80050c6: d104 bne.n 80050d2 huart->Lock = HAL_UNLOCKED; - 8004fd4: 0002 movs r2, r0 - 8004fd6: 3284 adds r2, #132 @ 0x84 - 8004fd8: 7013 strb r3, [r2, #0] + 80050c8: 0002 movs r2, r0 + 80050ca: 3284 adds r2, #132 @ 0x84 + 80050cc: 7013 strb r3, [r2, #0] HAL_UART_MspInit(huart); - 8004fda: f7fd fb27 bl 800262c + 80050ce: f7fd fac5 bl 800265c huart->gState = HAL_UART_STATE_BUSY; - 8004fde: 2324 movs r3, #36 @ 0x24 + 80050d2: 2324 movs r3, #36 @ 0x24 __HAL_UART_DISABLE(huart); - 8004fe0: 2101 movs r1, #1 - 8004fe2: 6822 ldr r2, [r4, #0] + 80050d4: 2101 movs r1, #1 + 80050d6: 6822 ldr r2, [r4, #0] huart->gState = HAL_UART_STATE_BUSY; - 8004fe4: 603b str r3, [r7, #0] + 80050d8: 603b str r3, [r7, #0] __HAL_UART_DISABLE(huart); - 8004fe6: 6813 ldr r3, [r2, #0] - 8004fe8: 438b bics r3, r1 - 8004fea: 6013 str r3, [r2, #0] + 80050da: 6813 ldr r3, [r2, #0] + 80050dc: 438b bics r3, r1 + 80050de: 6013 str r3, [r2, #0] if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT) - 8004fec: 6aa3 ldr r3, [r4, #40] @ 0x28 - 8004fee: 2b00 cmp r3, #0 - 8004ff0: d002 beq.n 8004ff8 + 80050e0: 6aa3 ldr r3, [r4, #40] @ 0x28 + 80050e2: 2b00 cmp r3, #0 + 80050e4: d002 beq.n 80050ec UART_AdvFeatureConfig(huart); - 8004ff2: 0020 movs r0, r4 - 8004ff4: f7ff fdae bl 8004b54 + 80050e6: 0020 movs r0, r4 + 80050e8: f7ff fdae bl 8004c48 if (UART_SetConfig(huart) == HAL_ERROR) - 8004ff8: 0020 movs r0, r4 - 8004ffa: f7ff fce9 bl 80049d0 - 8004ffe: 2801 cmp r0, #1 - 8005000: d0e1 beq.n 8004fc6 + 80050ec: 0020 movs r0, r4 + 80050ee: f7ff fce9 bl 8004ac4 + 80050f2: 2801 cmp r0, #1 + 80050f4: d0e1 beq.n 80050ba SET_BIT(huart->Instance->CR3, USART_CR3_DEM); - 8005002: 2280 movs r2, #128 @ 0x80 - 8005004: 6823 ldr r3, [r4, #0] - 8005006: 01d2 lsls r2, r2, #7 - 8005008: 6899 ldr r1, [r3, #8] + 80050f6: 2280 movs r2, #128 @ 0x80 + 80050f8: 6823 ldr r3, [r4, #0] + 80050fa: 01d2 lsls r2, r2, #7 + 80050fc: 6899 ldr r1, [r3, #8] temp |= (DeassertionTime << UART_CR1_DEDT_ADDRESS_LSB_POS); - 800500a: 042d lsls r5, r5, #16 + 80050fe: 042d lsls r5, r5, #16 SET_BIT(huart->Instance->CR3, USART_CR3_DEM); - 800500c: 430a orrs r2, r1 - 800500e: 609a str r2, [r3, #8] + 8005100: 430a orrs r2, r1 + 8005102: 609a str r2, [r3, #8] MODIFY_REG(huart->Instance->CR3, USART_CR3_DEP, Polarity); - 8005010: 689a ldr r2, [r3, #8] - 8005012: 490a ldr r1, [pc, #40] @ (800503c ) + 8005104: 689a ldr r2, [r3, #8] + 8005106: 490a ldr r1, [pc, #40] @ (8005130 ) return (UART_CheckIdleState(huart)); - 8005014: 0020 movs r0, r4 + 8005108: 0020 movs r0, r4 MODIFY_REG(huart->Instance->CR3, USART_CR3_DEP, Polarity); - 8005016: 400a ands r2, r1 - 8005018: 4332 orrs r2, r6 - 800501a: 609a str r2, [r3, #8] + 800510a: 400a ands r2, r1 + 800510c: 4332 orrs r2, r6 + 800510e: 609a str r2, [r3, #8] temp = (AssertionTime << UART_CR1_DEAT_ADDRESS_LSB_POS); - 800501c: 9a01 ldr r2, [sp, #4] - 800501e: 0551 lsls r1, r2, #21 + 8005110: 9a01 ldr r2, [sp, #4] + 8005112: 0551 lsls r1, r2, #21 temp |= (DeassertionTime << UART_CR1_DEDT_ADDRESS_LSB_POS); - 8005020: 430d orrs r5, r1 + 8005114: 430d orrs r5, r1 MODIFY_REG(huart->Instance->CR1, (USART_CR1_DEDT | USART_CR1_DEAT), temp); - 8005022: 681a ldr r2, [r3, #0] - 8005024: 4906 ldr r1, [pc, #24] @ (8005040 ) - 8005026: 400a ands r2, r1 - 8005028: 4315 orrs r5, r2 + 8005116: 681a ldr r2, [r3, #0] + 8005118: 4906 ldr r1, [pc, #24] @ (8005134 ) + 800511a: 400a ands r2, r1 + 800511c: 4315 orrs r5, r2 __HAL_UART_ENABLE(huart); - 800502a: 2201 movs r2, #1 + 800511e: 2201 movs r2, #1 MODIFY_REG(huart->Instance->CR1, (USART_CR1_DEDT | USART_CR1_DEAT), temp); - 800502c: 601d str r5, [r3, #0] + 8005120: 601d str r5, [r3, #0] __HAL_UART_ENABLE(huart); - 800502e: 6819 ldr r1, [r3, #0] - 8005030: 430a orrs r2, r1 - 8005032: 601a str r2, [r3, #0] + 8005122: 6819 ldr r1, [r3, #0] + 8005124: 430a orrs r2, r1 + 8005126: 601a str r2, [r3, #0] return (UART_CheckIdleState(huart)); - 8005034: f7ff feaa bl 8004d8c - 8005038: e7c6 b.n 8004fc8 - 800503a: 46c0 nop @ (mov r8, r8) - 800503c: ffff7fff .word 0xffff7fff - 8005040: fc00ffff .word 0xfc00ffff + 8005128: f7ff feaa bl 8004e80 + 800512c: e7c6 b.n 80050bc + 800512e: 46c0 nop @ (mov r8, r8) + 8005130: ffff7fff .word 0xffff7fff + 8005134: fc00ffff .word 0xfc00ffff -08005044 : +08005138 : } - 8005044: 4770 bx lr + 8005138: 4770 bx lr -08005046 : +0800513a : __weak void HAL_UARTEx_RxFifoFullCallback(UART_HandleTypeDef *huart) - 8005046: 4770 bx lr + 800513a: 4770 bx lr -08005048 : +0800513c : __weak void HAL_UARTEx_TxFifoEmptyCallback(UART_HandleTypeDef *huart) - 8005048: 4770 bx lr + 800513c: 4770 bx lr ... -0800504c : +08005140 : { - 800504c: b570 push {r4, r5, r6, lr} + 8005140: b570 push {r4, r5, r6, lr} __HAL_LOCK(huart); - 800504e: 0004 movs r4, r0 - 8005050: 3484 adds r4, #132 @ 0x84 - 8005052: 7822 ldrb r2, [r4, #0] + 8005142: 0004 movs r4, r0 + 8005144: 3484 adds r4, #132 @ 0x84 + 8005146: 7822 ldrb r2, [r4, #0] { - 8005054: 0003 movs r3, r0 + 8005148: 0003 movs r3, r0 __HAL_LOCK(huart); - 8005056: 2002 movs r0, #2 - 8005058: 2a01 cmp r2, #1 - 800505a: d011 beq.n 8005080 + 800514a: 2002 movs r0, #2 + 800514c: 2a01 cmp r2, #1 + 800514e: d011 beq.n 8005174 huart->gState = HAL_UART_STATE_BUSY; - 800505c: 001d movs r5, r3 - 800505e: 2224 movs r2, #36 @ 0x24 + 8005150: 001d movs r5, r3 + 8005152: 2224 movs r2, #36 @ 0x24 __HAL_UART_DISABLE(huart); - 8005060: 2601 movs r6, #1 + 8005154: 2601 movs r6, #1 huart->gState = HAL_UART_STATE_BUSY; - 8005062: 3588 adds r5, #136 @ 0x88 - 8005064: 602a str r2, [r5, #0] + 8005156: 3588 adds r5, #136 @ 0x88 + 8005158: 602a str r2, [r5, #0] tmpcr1 = READ_REG(huart->Instance->CR1); - 8005066: 681a ldr r2, [r3, #0] - 8005068: 6811 ldr r1, [r2, #0] + 800515a: 681a ldr r2, [r3, #0] + 800515c: 6811 ldr r1, [r2, #0] __HAL_UART_DISABLE(huart); - 800506a: 6810 ldr r0, [r2, #0] - 800506c: 43b0 bics r0, r6 - 800506e: 6010 str r0, [r2, #0] + 800515e: 6810 ldr r0, [r2, #0] + 8005160: 43b0 bics r0, r6 + 8005162: 6010 str r0, [r2, #0] CLEAR_BIT(tmpcr1, USART_CR1_FIFOEN); - 8005070: 4804 ldr r0, [pc, #16] @ (8005084 ) - 8005072: 4001 ands r1, r0 + 8005164: 4804 ldr r0, [pc, #16] @ (8005178 ) + 8005166: 4001 ands r1, r0 huart->FifoMode = UART_FIFOMODE_DISABLE; - 8005074: 2000 movs r0, #0 - 8005076: 6658 str r0, [r3, #100] @ 0x64 + 8005168: 2000 movs r0, #0 + 800516a: 6658 str r0, [r3, #100] @ 0x64 huart->gState = HAL_UART_STATE_READY; - 8005078: 2320 movs r3, #32 + 800516c: 2320 movs r3, #32 WRITE_REG(huart->Instance->CR1, tmpcr1); - 800507a: 6011 str r1, [r2, #0] + 800516e: 6011 str r1, [r2, #0] huart->gState = HAL_UART_STATE_READY; - 800507c: 602b str r3, [r5, #0] + 8005170: 602b str r3, [r5, #0] __HAL_UNLOCK(huart); - 800507e: 7020 strb r0, [r4, #0] + 8005172: 7020 strb r0, [r4, #0] } - 8005080: bd70 pop {r4, r5, r6, pc} - 8005082: 46c0 nop @ (mov r8, r8) - 8005084: dfffffff .word 0xdfffffff + 8005174: bd70 pop {r4, r5, r6, pc} + 8005176: 46c0 nop @ (mov r8, r8) + 8005178: dfffffff .word 0xdfffffff -08005088 : +0800517c : { - 8005088: b5f8 push {r3, r4, r5, r6, r7, lr} + 800517c: b5f8 push {r3, r4, r5, r6, r7, lr} __HAL_LOCK(huart); - 800508a: 0005 movs r5, r0 - 800508c: 3584 adds r5, #132 @ 0x84 + 800517e: 0005 movs r5, r0 + 8005180: 3584 adds r5, #132 @ 0x84 { - 800508e: 000b movs r3, r1 + 8005182: 000b movs r3, r1 __HAL_LOCK(huart); - 8005090: 7829 ldrb r1, [r5, #0] - 8005092: 2202 movs r2, #2 - 8005094: 2901 cmp r1, #1 - 8005096: d015 beq.n 80050c4 + 8005184: 7829 ldrb r1, [r5, #0] + 8005186: 2202 movs r2, #2 + 8005188: 2901 cmp r1, #1 + 800518a: d015 beq.n 80051b8 huart->gState = HAL_UART_STATE_BUSY; - 8005098: 0006 movs r6, r0 + 800518c: 0006 movs r6, r0 __HAL_UART_DISABLE(huart); - 800509a: 2101 movs r1, #1 + 800518e: 2101 movs r1, #1 tmpcr1 = READ_REG(huart->Instance->CR1); - 800509c: 6804 ldr r4, [r0, #0] + 8005190: 6804 ldr r4, [r0, #0] huart->gState = HAL_UART_STATE_BUSY; - 800509e: 3688 adds r6, #136 @ 0x88 - 80050a0: 3222 adds r2, #34 @ 0x22 - 80050a2: 6032 str r2, [r6, #0] + 8005192: 3688 adds r6, #136 @ 0x88 + 8005194: 3222 adds r2, #34 @ 0x22 + 8005196: 6032 str r2, [r6, #0] tmpcr1 = READ_REG(huart->Instance->CR1); - 80050a4: 6827 ldr r7, [r4, #0] + 8005198: 6827 ldr r7, [r4, #0] __HAL_UART_DISABLE(huart); - 80050a6: 6822 ldr r2, [r4, #0] - 80050a8: 438a bics r2, r1 - 80050aa: 6022 str r2, [r4, #0] + 800519a: 6822 ldr r2, [r4, #0] + 800519c: 438a bics r2, r1 + 800519e: 6022 str r2, [r4, #0] MODIFY_REG(huart->Instance->CR3, USART_CR3_TXFTCFG, Threshold); - 80050ac: 68a1 ldr r1, [r4, #8] - 80050ae: 00c9 lsls r1, r1, #3 - 80050b0: 08c9 lsrs r1, r1, #3 - 80050b2: 4319 orrs r1, r3 - 80050b4: 60a1 str r1, [r4, #8] + 80051a0: 68a1 ldr r1, [r4, #8] + 80051a2: 00c9 lsls r1, r1, #3 + 80051a4: 08c9 lsrs r1, r1, #3 + 80051a6: 4319 orrs r1, r3 + 80051a8: 60a1 str r1, [r4, #8] UARTEx_SetNbDataToProcess(huart); - 80050b6: f7ff ff57 bl 8004f68 + 80051aa: f7ff ff57 bl 800505c huart->gState = HAL_UART_STATE_READY; - 80050ba: 2320 movs r3, #32 + 80051ae: 2320 movs r3, #32 __HAL_UNLOCK(huart); - 80050bc: 2200 movs r2, #0 + 80051b0: 2200 movs r2, #0 WRITE_REG(huart->Instance->CR1, tmpcr1); - 80050be: 6027 str r7, [r4, #0] + 80051b2: 6027 str r7, [r4, #0] huart->gState = HAL_UART_STATE_READY; - 80050c0: 6033 str r3, [r6, #0] + 80051b4: 6033 str r3, [r6, #0] __HAL_UNLOCK(huart); - 80050c2: 702a strb r2, [r5, #0] + 80051b6: 702a strb r2, [r5, #0] } - 80050c4: 0010 movs r0, r2 - 80050c6: bdf8 pop {r3, r4, r5, r6, r7, pc} + 80051b8: 0010 movs r0, r2 + 80051ba: bdf8 pop {r3, r4, r5, r6, r7, pc} -080050c8 : +080051bc : { - 80050c8: b5f8 push {r3, r4, r5, r6, r7, lr} + 80051bc: b5f8 push {r3, r4, r5, r6, r7, lr} __HAL_LOCK(huart); - 80050ca: 0005 movs r5, r0 - 80050cc: 3584 adds r5, #132 @ 0x84 + 80051be: 0005 movs r5, r0 + 80051c0: 3584 adds r5, #132 @ 0x84 { - 80050ce: 000a movs r2, r1 + 80051c2: 000a movs r2, r1 __HAL_LOCK(huart); - 80050d0: 7829 ldrb r1, [r5, #0] - 80050d2: 2302 movs r3, #2 - 80050d4: 2901 cmp r1, #1 - 80050d6: d015 beq.n 8005104 + 80051c4: 7829 ldrb r1, [r5, #0] + 80051c6: 2302 movs r3, #2 + 80051c8: 2901 cmp r1, #1 + 80051ca: d015 beq.n 80051f8 huart->gState = HAL_UART_STATE_BUSY; - 80050d8: 0006 movs r6, r0 + 80051cc: 0006 movs r6, r0 __HAL_UART_DISABLE(huart); - 80050da: 2101 movs r1, #1 + 80051ce: 2101 movs r1, #1 tmpcr1 = READ_REG(huart->Instance->CR1); - 80050dc: 6804 ldr r4, [r0, #0] + 80051d0: 6804 ldr r4, [r0, #0] huart->gState = HAL_UART_STATE_BUSY; - 80050de: 3688 adds r6, #136 @ 0x88 - 80050e0: 3322 adds r3, #34 @ 0x22 - 80050e2: 6033 str r3, [r6, #0] + 80051d2: 3688 adds r6, #136 @ 0x88 + 80051d4: 3322 adds r3, #34 @ 0x22 + 80051d6: 6033 str r3, [r6, #0] tmpcr1 = READ_REG(huart->Instance->CR1); - 80050e4: 6827 ldr r7, [r4, #0] + 80051d8: 6827 ldr r7, [r4, #0] __HAL_UART_DISABLE(huart); - 80050e6: 6823 ldr r3, [r4, #0] - 80050e8: 438b bics r3, r1 - 80050ea: 6023 str r3, [r4, #0] + 80051da: 6823 ldr r3, [r4, #0] + 80051dc: 438b bics r3, r1 + 80051de: 6023 str r3, [r4, #0] MODIFY_REG(huart->Instance->CR3, USART_CR3_RXFTCFG, Threshold); - 80050ec: 68a1 ldr r1, [r4, #8] - 80050ee: 4b06 ldr r3, [pc, #24] @ (8005108 ) - 80050f0: 4019 ands r1, r3 - 80050f2: 4311 orrs r1, r2 - 80050f4: 60a1 str r1, [r4, #8] + 80051e0: 68a1 ldr r1, [r4, #8] + 80051e2: 4b06 ldr r3, [pc, #24] @ (80051fc ) + 80051e4: 4019 ands r1, r3 + 80051e6: 4311 orrs r1, r2 + 80051e8: 60a1 str r1, [r4, #8] UARTEx_SetNbDataToProcess(huart); - 80050f6: f7ff ff37 bl 8004f68 + 80051ea: f7ff ff37 bl 800505c huart->gState = HAL_UART_STATE_READY; - 80050fa: 2320 movs r3, #32 + 80051ee: 2320 movs r3, #32 WRITE_REG(huart->Instance->CR1, tmpcr1); - 80050fc: 6027 str r7, [r4, #0] + 80051f0: 6027 str r7, [r4, #0] huart->gState = HAL_UART_STATE_READY; - 80050fe: 6033 str r3, [r6, #0] + 80051f2: 6033 str r3, [r6, #0] __HAL_UNLOCK(huart); - 8005100: 2300 movs r3, #0 - 8005102: 702b strb r3, [r5, #0] + 80051f4: 2300 movs r3, #0 + 80051f6: 702b strb r3, [r5, #0] } - 8005104: 0018 movs r0, r3 - 8005106: bdf8 pop {r3, r4, r5, r6, r7, pc} - 8005108: f1ffffff .word 0xf1ffffff + 80051f8: 0018 movs r0, r3 + 80051fa: bdf8 pop {r3, r4, r5, r6, r7, pc} + 80051fc: f1ffffff .word 0xf1ffffff -0800510c : +08005200 : if (huart->RxState == HAL_UART_STATE_READY) - 800510c: 0003 movs r3, r0 - 800510e: 338c adds r3, #140 @ 0x8c - 8005110: 681b ldr r3, [r3, #0] + 8005200: 0003 movs r3, r0 + 8005202: 338c adds r3, #140 @ 0x8c + 8005204: 681b ldr r3, [r3, #0] { - 8005112: b570 push {r4, r5, r6, lr} - 8005114: 0004 movs r4, r0 + 8005206: b570 push {r4, r5, r6, lr} + 8005208: 0004 movs r4, r0 return HAL_BUSY; - 8005116: 2002 movs r0, #2 + 800520a: 2002 movs r0, #2 if (huart->RxState == HAL_UART_STATE_READY) - 8005118: 2b20 cmp r3, #32 - 800511a: d102 bne.n 8005122 + 800520c: 2b20 cmp r3, #32 + 800520e: d102 bne.n 8005216 if ((pData == NULL) || (Size == 0U)) - 800511c: 2900 cmp r1, #0 - 800511e: d101 bne.n 8005124 + 8005210: 2900 cmp r1, #0 + 8005212: d101 bne.n 8005218 return HAL_ERROR; - 8005120: 2001 movs r0, #1 + 8005214: 2001 movs r0, #1 } - 8005122: bd70 pop {r4, r5, r6, pc} + 8005216: bd70 pop {r4, r5, r6, pc} if ((pData == NULL) || (Size == 0U)) - 8005124: 2a00 cmp r2, #0 - 8005126: d0fb beq.n 8005120 + 8005218: 2a00 cmp r2, #0 + 800521a: d0fb beq.n 8005214 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) - 8005128: 2080 movs r0, #128 @ 0x80 - 800512a: 68a5 ldr r5, [r4, #8] - 800512c: 2301 movs r3, #1 - 800512e: 0140 lsls r0, r0, #5 - 8005130: 4285 cmp r5, r0 - 8005132: d104 bne.n 800513e - 8005134: 6920 ldr r0, [r4, #16] - 8005136: 2800 cmp r0, #0 - 8005138: d101 bne.n 800513e + 800521c: 2080 movs r0, #128 @ 0x80 + 800521e: 68a5 ldr r5, [r4, #8] + 8005220: 2301 movs r3, #1 + 8005222: 0140 lsls r0, r0, #5 + 8005224: 4285 cmp r5, r0 + 8005226: d104 bne.n 8005232 + 8005228: 6920 ldr r0, [r4, #16] + 800522a: 2800 cmp r0, #0 + 800522c: d101 bne.n 8005232 if ((((uint32_t)pData) & 1U) != 0U) - 800513a: 4219 tst r1, r3 - 800513c: d1f0 bne.n 8005120 + 800522e: 4219 tst r1, r3 + 8005230: d1f0 bne.n 8005214 huart->ReceptionType = HAL_UART_RECEPTION_TOIDLE; - 800513e: 66e3 str r3, [r4, #108] @ 0x6c + 8005232: 66e3 str r3, [r4, #108] @ 0x6c huart->RxEventType = HAL_UART_RXEVENT_TC; - 8005140: 2300 movs r3, #0 + 8005234: 2300 movs r3, #0 status = UART_Start_Receive_DMA(huart, pData, Size); - 8005142: 0020 movs r0, r4 + 8005236: 0020 movs r0, r4 huart->RxEventType = HAL_UART_RXEVENT_TC; - 8005144: 6723 str r3, [r4, #112] @ 0x70 + 8005238: 6723 str r3, [r4, #112] @ 0x70 status = UART_Start_Receive_DMA(huart, pData, Size); - 8005146: f7ff feb9 bl 8004ebc + 800523a: f7ff feb9 bl 8004fb0 if (status == HAL_OK) - 800514a: 2800 cmp r0, #0 - 800514c: d1e9 bne.n 8005122 + 800523e: 2800 cmp r0, #0 + 8005240: d1e9 bne.n 8005216 if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) - 800514e: 6ee2 ldr r2, [r4, #108] @ 0x6c - 8005150: 2a01 cmp r2, #1 - 8005152: d1e5 bne.n 8005120 + 8005242: 6ee2 ldr r2, [r4, #108] @ 0x6c + 8005244: 2a01 cmp r2, #1 + 8005246: d1e5 bne.n 8005214 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF); - 8005154: 2310 movs r3, #16 - 8005156: 6821 ldr r1, [r4, #0] - 8005158: 620b str r3, [r1, #32] + 8005248: 2310 movs r3, #16 + 800524a: 6821 ldr r1, [r4, #0] + 800524c: 620b str r3, [r1, #32] __ASM volatile ("MRS %0, primask" : "=r" (result) ); - 800515a: f3ef 8110 mrs r1, PRIMASK + 800524e: f3ef 8110 mrs r1, PRIMASK __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 800515e: f382 8810 msr PRIMASK, r2 + 8005252: f382 8810 msr PRIMASK, r2 ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); - 8005162: 6822 ldr r2, [r4, #0] - 8005164: 6814 ldr r4, [r2, #0] - 8005166: 4323 orrs r3, r4 - 8005168: 6013 str r3, [r2, #0] - 800516a: f381 8810 msr PRIMASK, r1 + 8005256: 6822 ldr r2, [r4, #0] + 8005258: 6814 ldr r4, [r2, #0] + 800525a: 4323 orrs r3, r4 + 800525c: 6013 str r3, [r2, #0] + 800525e: f381 8810 msr PRIMASK, r1 } - 800516e: e7d8 b.n 8005122 + 8005262: e7d8 b.n 8005216 -08005170 : - 8005170: b530 push {r4, r5, lr} - 8005172: 2400 movs r4, #0 - 8005174: 3901 subs r1, #1 - 8005176: 42a2 cmp r2, r4 - 8005178: d101 bne.n 800517e - 800517a: 2000 movs r0, #0 - 800517c: e005 b.n 800518a - 800517e: 5d03 ldrb r3, [r0, r4] - 8005180: 3401 adds r4, #1 - 8005182: 5d0d ldrb r5, [r1, r4] - 8005184: 42ab cmp r3, r5 - 8005186: d0f6 beq.n 8005176 - 8005188: 1b58 subs r0, r3, r5 - 800518a: bd30 pop {r4, r5, pc} +08005264 : + 8005264: b530 push {r4, r5, lr} + 8005266: 2400 movs r4, #0 + 8005268: 3901 subs r1, #1 + 800526a: 42a2 cmp r2, r4 + 800526c: d101 bne.n 8005272 + 800526e: 2000 movs r0, #0 + 8005270: e005 b.n 800527e + 8005272: 5d03 ldrb r3, [r0, r4] + 8005274: 3401 adds r4, #1 + 8005276: 5d0d ldrb r5, [r1, r4] + 8005278: 42ab cmp r3, r5 + 800527a: d0f6 beq.n 800526a + 800527c: 1b58 subs r0, r3, r5 + 800527e: bd30 pop {r4, r5, pc} -0800518c : - 800518c: 0003 movs r3, r0 - 800518e: 1882 adds r2, r0, r2 - 8005190: 4293 cmp r3, r2 - 8005192: d100 bne.n 8005196 - 8005194: 4770 bx lr - 8005196: 7019 strb r1, [r3, #0] - 8005198: 3301 adds r3, #1 - 800519a: e7f9 b.n 8005190 +08005280 : + 8005280: 0003 movs r3, r0 + 8005282: 1882 adds r2, r0, r2 + 8005284: 4293 cmp r3, r2 + 8005286: d100 bne.n 800528a + 8005288: 4770 bx lr + 800528a: 7019 strb r1, [r3, #0] + 800528c: 3301 adds r3, #1 + 800528e: e7f9 b.n 8005284 -0800519c <__libc_init_array>: - 800519c: b570 push {r4, r5, r6, lr} - 800519e: 2600 movs r6, #0 - 80051a0: 4c0c ldr r4, [pc, #48] @ (80051d4 <__libc_init_array+0x38>) - 80051a2: 4d0d ldr r5, [pc, #52] @ (80051d8 <__libc_init_array+0x3c>) - 80051a4: 1b64 subs r4, r4, r5 - 80051a6: 10a4 asrs r4, r4, #2 - 80051a8: 42a6 cmp r6, r4 - 80051aa: d109 bne.n 80051c0 <__libc_init_array+0x24> - 80051ac: 2600 movs r6, #0 - 80051ae: f000 f823 bl 80051f8 <_init> - 80051b2: 4c0a ldr r4, [pc, #40] @ (80051dc <__libc_init_array+0x40>) - 80051b4: 4d0a ldr r5, [pc, #40] @ (80051e0 <__libc_init_array+0x44>) - 80051b6: 1b64 subs r4, r4, r5 - 80051b8: 10a4 asrs r4, r4, #2 - 80051ba: 42a6 cmp r6, r4 - 80051bc: d105 bne.n 80051ca <__libc_init_array+0x2e> - 80051be: bd70 pop {r4, r5, r6, pc} - 80051c0: 00b3 lsls r3, r6, #2 - 80051c2: 58eb ldr r3, [r5, r3] - 80051c4: 4798 blx r3 - 80051c6: 3601 adds r6, #1 - 80051c8: e7ee b.n 80051a8 <__libc_init_array+0xc> - 80051ca: 00b3 lsls r3, r6, #2 - 80051cc: 58eb ldr r3, [r5, r3] - 80051ce: 4798 blx r3 - 80051d0: 3601 adds r6, #1 - 80051d2: e7f2 b.n 80051ba <__libc_init_array+0x1e> - 80051d4: 080052c0 .word 0x080052c0 - 80051d8: 080052c0 .word 0x080052c0 - 80051dc: 080052c4 .word 0x080052c4 - 80051e0: 080052c0 .word 0x080052c0 +08005290 <__libc_init_array>: + 8005290: b570 push {r4, r5, r6, lr} + 8005292: 2600 movs r6, #0 + 8005294: 4c0c ldr r4, [pc, #48] @ (80052c8 <__libc_init_array+0x38>) + 8005296: 4d0d ldr r5, [pc, #52] @ (80052cc <__libc_init_array+0x3c>) + 8005298: 1b64 subs r4, r4, r5 + 800529a: 10a4 asrs r4, r4, #2 + 800529c: 42a6 cmp r6, r4 + 800529e: d109 bne.n 80052b4 <__libc_init_array+0x24> + 80052a0: 2600 movs r6, #0 + 80052a2: f000 f823 bl 80052ec <_init> + 80052a6: 4c0a ldr r4, [pc, #40] @ (80052d0 <__libc_init_array+0x40>) + 80052a8: 4d0a ldr r5, [pc, #40] @ (80052d4 <__libc_init_array+0x44>) + 80052aa: 1b64 subs r4, r4, r5 + 80052ac: 10a4 asrs r4, r4, #2 + 80052ae: 42a6 cmp r6, r4 + 80052b0: d105 bne.n 80052be <__libc_init_array+0x2e> + 80052b2: bd70 pop {r4, r5, r6, pc} + 80052b4: 00b3 lsls r3, r6, #2 + 80052b6: 58eb ldr r3, [r5, r3] + 80052b8: 4798 blx r3 + 80052ba: 3601 adds r6, #1 + 80052bc: e7ee b.n 800529c <__libc_init_array+0xc> + 80052be: 00b3 lsls r3, r6, #2 + 80052c0: 58eb ldr r3, [r5, r3] + 80052c2: 4798 blx r3 + 80052c4: 3601 adds r6, #1 + 80052c6: e7f2 b.n 80052ae <__libc_init_array+0x1e> + 80052c8: 080053b4 .word 0x080053b4 + 80052cc: 080053b4 .word 0x080053b4 + 80052d0: 080053b8 .word 0x080053b8 + 80052d4: 080053b4 .word 0x080053b4 -080051e4 : - 80051e4: 2300 movs r3, #0 - 80051e6: b510 push {r4, lr} - 80051e8: 429a cmp r2, r3 - 80051ea: d100 bne.n 80051ee - 80051ec: bd10 pop {r4, pc} - 80051ee: 5ccc ldrb r4, [r1, r3] - 80051f0: 54c4 strb r4, [r0, r3] - 80051f2: 3301 adds r3, #1 - 80051f4: e7f8 b.n 80051e8 +080052d8 : + 80052d8: 2300 movs r3, #0 + 80052da: b510 push {r4, lr} + 80052dc: 429a cmp r2, r3 + 80052de: d100 bne.n 80052e2 + 80052e0: bd10 pop {r4, pc} + 80052e2: 5ccc ldrb r4, [r1, r3] + 80052e4: 54c4 strb r4, [r0, r3] + 80052e6: 3301 adds r3, #1 + 80052e8: e7f8 b.n 80052dc ... -080051f8 <_init>: - 80051f8: b5f8 push {r3, r4, r5, r6, r7, lr} - 80051fa: 46c0 nop @ (mov r8, r8) - 80051fc: bcf8 pop {r3, r4, r5, r6, r7} - 80051fe: bc08 pop {r3} - 8005200: 469e mov lr, r3 - 8005202: 4770 bx lr +080052ec <_init>: + 80052ec: b5f8 push {r3, r4, r5, r6, r7, lr} + 80052ee: 46c0 nop @ (mov r8, r8) + 80052f0: bcf8 pop {r3, r4, r5, r6, r7} + 80052f2: bc08 pop {r3} + 80052f4: 469e mov lr, r3 + 80052f6: 4770 bx lr -08005204 <_fini>: - 8005204: b5f8 push {r3, r4, r5, r6, r7, lr} - 8005206: 46c0 nop @ (mov r8, r8) - 8005208: bcf8 pop {r3, r4, r5, r6, r7} - 800520a: bc08 pop {r3} - 800520c: 469e mov lr, r3 - 800520e: 4770 bx lr +080052f8 <_fini>: + 80052f8: b5f8 push {r3, r4, r5, r6, r7, lr} + 80052fa: 46c0 nop @ (mov r8, r8) + 80052fc: bcf8 pop {r3, r4, r5, r6, r7} + 80052fe: bc08 pop {r3} + 8005300: 469e mov lr, r3 + 8005302: 4770 bx lr diff --git a/code/Debug/feeder_mk2.map b/code/Debug/feeder_mk2.map index bfb82d7..2076439 100644 --- a/code/Debug/feeder_mk2.map +++ b/code/Debug/feeder_mk2.map @@ -1259,8 +1259,6 @@ Discarded input sections 0x00000000 0x50 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_dma.o .text.HAL_DMA_GetState 0x00000000 0x8 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_dma.o - .text.HAL_DMA_GetError - 0x00000000 0x4 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_dma.o .debug_macro 0x00000000 0xab4 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_dma.o .debug_macro 0x00000000 0x2e ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_dma.o .debug_macro 0x00000000 0x28 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_dma.o @@ -2899,8 +2897,6 @@ Discarded input sections 0x00000000 0x118 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart.o .text.HAL_UART_AbortTransmit 0x00000000 0xa0 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart.o - .text.HAL_UART_AbortReceive - 0x00000000 0xc0 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart.o .text.UART_DMATransmitCplt 0x00000000 0x50 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart.o .text.HAL_UART_TxHalfCpltCallback @@ -3448,7 +3444,7 @@ LOAD C:/ST/STM32CubeIDE_1.14.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.ext 0x08000000 g_pfnVectors 0x080000c0 . = ALIGN (0x4) -.text 0x080000c0 0x5150 +.text 0x080000c0 0x5244 0x080000c0 . = ALIGN (0x4) *(.text) .text 0x080000c0 0x48 C:/ST/STM32CubeIDE_1.14.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v6-m/nofp/crtbegin.o @@ -3505,530 +3501,536 @@ LOAD C:/ST/STM32CubeIDE_1.14.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.ext .text.set_LED 0x08000a9c 0x38 ./Core/Src/main.o 0x08000a9c set_LED .text.rs485_transmit - 0x08000ad4 0x54 ./Core/Src/main.o + 0x08000ad4 0x5c ./Core/Src/main.o 0x08000ad4 rs485_transmit .text.comp_crc_header - 0x08000b28 0x26 ./Core/Src/main.o - 0x08000b28 comp_crc_header - *fill* 0x08000b4e 0x2 + 0x08000b30 0x26 ./Core/Src/main.o + 0x08000b30 comp_crc_header + *fill* 0x08000b56 0x2 .text.peel_ramp_update - 0x08000b50 0x8c ./Core/Src/main.o - 0x08000b50 peel_ramp_update + 0x08000b58 0x8c ./Core/Src/main.o + 0x08000b58 peel_ramp_update .text.drive_continuous - 0x08000bdc 0x28 ./Core/Src/main.o - 0x08000bdc drive_continuous + 0x08000be4 0x28 ./Core/Src/main.o + 0x08000be4 drive_continuous .text.halt_all - 0x08000c04 0x40 ./Core/Src/main.o - 0x08000c04 halt_all + 0x08000c0c 0x40 ./Core/Src/main.o + 0x08000c0c halt_all .text.identify_feeder - 0x08000c44 0x30 ./Core/Src/main.o - 0x08000c44 identify_feeder + 0x08000c4c 0x30 ./Core/Src/main.o + 0x08000c4c identify_feeder .text.show_version - 0x08000c74 0x24 ./Core/Src/main.o - 0x08000c74 show_version + 0x08000c7c 0x24 ./Core/Src/main.o + 0x08000c7c show_version .text.start_feed - 0x08000c98 0xec ./Core/Src/main.o - 0x08000c98 start_feed + 0x08000ca0 0xfc ./Core/Src/main.o + 0x08000ca0 start_feed .text.feed_state_machine_update - 0x08000d84 0x2f0 ./Core/Src/main.o - 0x08000d84 feed_state_machine_update + 0x08000d9c 0x308 ./Core/Src/main.o + 0x08000d9c feed_state_machine_update .text.handle_vendor_options - 0x08001074 0x58 ./Core/Src/main.o - 0x08001074 handle_vendor_options + 0x080010a4 0x58 ./Core/Src/main.o + 0x080010a4 handle_vendor_options .text.onewire_delay_us - 0x080010cc 0x30 ./Core/Src/main.o - 0x080010cc onewire_delay_us + 0x080010fc 0x30 ./Core/Src/main.o + 0x080010fc onewire_delay_us .text.onewire_read_bit - 0x080010fc 0xc ./Core/Src/main.o - 0x080010fc onewire_read_bit + 0x0800112c 0xc ./Core/Src/main.o + 0x0800112c onewire_read_bit .text.onewire_reset - 0x08001108 0x30 ./Core/Src/main.o - 0x08001108 onewire_reset + 0x08001138 0x30 ./Core/Src/main.o + 0x08001138 onewire_reset .text.onewire_write_bit - 0x08001138 0x2a ./Core/Src/main.o - 0x08001138 onewire_write_bit + 0x08001168 0x2a ./Core/Src/main.o + 0x08001168 onewire_write_bit .text.onewire_read_bit_slot - 0x08001162 0x28 ./Core/Src/main.o - 0x08001162 onewire_read_bit_slot + 0x08001192 0x28 ./Core/Src/main.o + 0x08001192 onewire_read_bit_slot .text.onewire_write_byte - 0x0800118a 0x1a ./Core/Src/main.o - 0x0800118a onewire_write_byte + 0x080011ba 0x1a ./Core/Src/main.o + 0x080011ba onewire_write_byte .text.onewire_read_byte - 0x080011a4 0x20 ./Core/Src/main.o - 0x080011a4 onewire_read_byte + 0x080011d4 0x20 ./Core/Src/main.o + 0x080011d4 onewire_read_byte .text.read_floor_address - 0x080011c4 0x32 ./Core/Src/main.o - 0x080011c4 read_floor_address + 0x080011f4 0x32 ./Core/Src/main.o + 0x080011f4 read_floor_address .text.write_floor_address - 0x080011f6 0xcc ./Core/Src/main.o - 0x080011f6 write_floor_address - *fill* 0x080012c2 0x2 + 0x08001226 0xcc ./Core/Src/main.o + 0x08001226 write_floor_address + *fill* 0x080012f2 0x2 .text.handleRS485Message - 0x080012c4 0x478 ./Core/Src/main.o - 0x080012c4 handleRS485Message + 0x080012f4 0x478 ./Core/Src/main.o + 0x080012f4 handleRS485Message .text.debug_itoa - 0x0800173c 0x70 ./Core/Src/main.o - 0x0800173c debug_itoa + 0x0800176c 0x70 ./Core/Src/main.o + 0x0800176c debug_itoa .text.debug_hex8 - 0x080017ac 0x2c ./Core/Src/main.o - 0x080017ac debug_hex8 + 0x080017dc 0x2c ./Core/Src/main.o + 0x080017dc debug_hex8 .text.debug_output - 0x080017d8 0x208 ./Core/Src/main.o - 0x080017d8 debug_output + 0x08001808 0x208 ./Core/Src/main.o + 0x08001808 debug_output .text.reset_position_if_needed - 0x080019e0 0x78 ./Core/Src/main.o - 0x080019e0 reset_position_if_needed + 0x08001a10 0x78 ./Core/Src/main.o + 0x08001a10 reset_position_if_needed .text.startup.main - 0x08001a58 0x988 ./Core/Src/main.o - 0x08001a58 main + 0x08001a88 0x988 ./Core/Src/main.o + 0x08001a88 main .text.Error_Handler - 0x080023e0 0x4 ./Core/Src/main.o - 0x080023e0 Error_Handler + 0x08002410 0x4 ./Core/Src/main.o + 0x08002410 Error_Handler .text.HAL_MspInit - 0x080023e4 0x30 ./Core/Src/stm32c0xx_hal_msp.o - 0x080023e4 HAL_MspInit + 0x08002414 0x30 ./Core/Src/stm32c0xx_hal_msp.o + 0x08002414 HAL_MspInit .text.HAL_ADC_MspInit - 0x08002414 0xa0 ./Core/Src/stm32c0xx_hal_msp.o - 0x08002414 HAL_ADC_MspInit + 0x08002444 0xa0 ./Core/Src/stm32c0xx_hal_msp.o + 0x08002444 HAL_ADC_MspInit .text.HAL_TIM_Base_MspInit - 0x080024b4 0xb4 ./Core/Src/stm32c0xx_hal_msp.o - 0x080024b4 HAL_TIM_Base_MspInit + 0x080024e4 0xb4 ./Core/Src/stm32c0xx_hal_msp.o + 0x080024e4 HAL_TIM_Base_MspInit .text.HAL_TIM_Encoder_MspInit - 0x08002568 0x5c ./Core/Src/stm32c0xx_hal_msp.o - 0x08002568 HAL_TIM_Encoder_MspInit + 0x08002598 0x5c ./Core/Src/stm32c0xx_hal_msp.o + 0x08002598 HAL_TIM_Encoder_MspInit .text.HAL_TIM_MspPostInit - 0x080025c4 0x68 ./Core/Src/stm32c0xx_hal_msp.o - 0x080025c4 HAL_TIM_MspPostInit + 0x080025f4 0x68 ./Core/Src/stm32c0xx_hal_msp.o + 0x080025f4 HAL_TIM_MspPostInit .text.HAL_UART_MspInit - 0x0800262c 0x14c ./Core/Src/stm32c0xx_hal_msp.o - 0x0800262c HAL_UART_MspInit + 0x0800265c 0x14c ./Core/Src/stm32c0xx_hal_msp.o + 0x0800265c HAL_UART_MspInit .text.NMI_Handler - 0x08002778 0x2 ./Core/Src/stm32c0xx_it.o - 0x08002778 NMI_Handler + 0x080027a8 0x2 ./Core/Src/stm32c0xx_it.o + 0x080027a8 NMI_Handler .text.HardFault_Handler - 0x0800277a 0x2 ./Core/Src/stm32c0xx_it.o - 0x0800277a HardFault_Handler + 0x080027aa 0x2 ./Core/Src/stm32c0xx_it.o + 0x080027aa HardFault_Handler .text.SVC_Handler - 0x0800277c 0x2 ./Core/Src/stm32c0xx_it.o - 0x0800277c SVC_Handler + 0x080027ac 0x2 ./Core/Src/stm32c0xx_it.o + 0x080027ac SVC_Handler .text.PendSV_Handler - 0x0800277e 0x2 ./Core/Src/stm32c0xx_it.o - 0x0800277e PendSV_Handler + 0x080027ae 0x2 ./Core/Src/stm32c0xx_it.o + 0x080027ae PendSV_Handler .text.SysTick_Handler - 0x08002780 0x8 ./Core/Src/stm32c0xx_it.o - 0x08002780 SysTick_Handler + 0x080027b0 0x8 ./Core/Src/stm32c0xx_it.o + 0x080027b0 SysTick_Handler .text.EXTI4_15_IRQHandler - 0x08002788 0x14 ./Core/Src/stm32c0xx_it.o - 0x08002788 EXTI4_15_IRQHandler + 0x080027b8 0x14 ./Core/Src/stm32c0xx_it.o + 0x080027b8 EXTI4_15_IRQHandler .text.DMA1_Channel1_IRQHandler - 0x0800279c 0x10 ./Core/Src/stm32c0xx_it.o - 0x0800279c DMA1_Channel1_IRQHandler - .text.DMA1_Channel2_3_IRQHandler - 0x080027ac 0x10 ./Core/Src/stm32c0xx_it.o - 0x080027ac DMA1_Channel2_3_IRQHandler - .text.TIM14_IRQHandler - 0x080027bc 0x10 ./Core/Src/stm32c0xx_it.o - 0x080027bc TIM14_IRQHandler - .text.TIM16_IRQHandler 0x080027cc 0x10 ./Core/Src/stm32c0xx_it.o - 0x080027cc TIM16_IRQHandler - .text.TIM17_IRQHandler + 0x080027cc DMA1_Channel1_IRQHandler + .text.DMA1_Channel2_3_IRQHandler 0x080027dc 0x10 ./Core/Src/stm32c0xx_it.o - 0x080027dc TIM17_IRQHandler - .text.USART2_IRQHandler + 0x080027dc DMA1_Channel2_3_IRQHandler + .text.TIM14_IRQHandler 0x080027ec 0x10 ./Core/Src/stm32c0xx_it.o - 0x080027ec USART2_IRQHandler + 0x080027ec TIM14_IRQHandler + .text.TIM16_IRQHandler + 0x080027fc 0x10 ./Core/Src/stm32c0xx_it.o + 0x080027fc TIM16_IRQHandler + .text.TIM17_IRQHandler + 0x0800280c 0x10 ./Core/Src/stm32c0xx_it.o + 0x0800280c TIM17_IRQHandler + .text.USART2_IRQHandler + 0x0800281c 0x10 ./Core/Src/stm32c0xx_it.o + 0x0800281c USART2_IRQHandler .text.SystemInit - 0x080027fc 0x10 ./Core/Src/system_stm32c0xx.o - 0x080027fc SystemInit + 0x0800282c 0x10 ./Core/Src/system_stm32c0xx.o + 0x0800282c SystemInit .text.Reset_Handler - 0x0800280c 0x50 ./Core/Startup/startup_stm32c051c6tx.o - 0x0800280c Reset_Handler + 0x0800283c 0x50 ./Core/Startup/startup_stm32c051c6tx.o + 0x0800283c Reset_Handler .text.Default_Handler - 0x0800285c 0x2 ./Core/Startup/startup_stm32c051c6tx.o - 0x0800285c TIM1_CC_IRQHandler - 0x0800285c I2C1_IRQHandler - 0x0800285c SPI1_IRQHandler - 0x0800285c EXTI2_3_IRQHandler - 0x0800285c ADC1_IRQHandler - 0x0800285c I2C2_IRQHandler - 0x0800285c RTC_IRQHandler - 0x0800285c TIM3_IRQHandler - 0x0800285c RCC_IRQHandler - 0x0800285c Default_Handler - 0x0800285c EXTI0_1_IRQHandler - 0x0800285c SPI2_IRQHandler - 0x0800285c WWDG_IRQHandler - 0x0800285c TIM2_IRQHandler - 0x0800285c DMAMUX1_DMA1_CH4_5_IRQHandler - 0x0800285c FLASH_IRQHandler - 0x0800285c USART1_IRQHandler - 0x0800285c TIM1_BRK_UP_TRG_COM_IRQHandler - *fill* 0x0800285e 0x2 + 0x0800288c 0x2 ./Core/Startup/startup_stm32c051c6tx.o + 0x0800288c TIM1_CC_IRQHandler + 0x0800288c I2C1_IRQHandler + 0x0800288c SPI1_IRQHandler + 0x0800288c EXTI2_3_IRQHandler + 0x0800288c ADC1_IRQHandler + 0x0800288c I2C2_IRQHandler + 0x0800288c RTC_IRQHandler + 0x0800288c TIM3_IRQHandler + 0x0800288c RCC_IRQHandler + 0x0800288c Default_Handler + 0x0800288c EXTI0_1_IRQHandler + 0x0800288c SPI2_IRQHandler + 0x0800288c WWDG_IRQHandler + 0x0800288c TIM2_IRQHandler + 0x0800288c DMAMUX1_DMA1_CH4_5_IRQHandler + 0x0800288c FLASH_IRQHandler + 0x0800288c USART1_IRQHandler + 0x0800288c TIM1_BRK_UP_TRG_COM_IRQHandler + *fill* 0x0800288e 0x2 .text.HAL_InitTick - 0x08002860 0x50 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal.o - 0x08002860 HAL_InitTick + 0x08002890 0x50 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal.o + 0x08002890 HAL_InitTick .text.HAL_Init - 0x080028b0 0x18 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal.o - 0x080028b0 HAL_Init + 0x080028e0 0x18 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal.o + 0x080028e0 HAL_Init .text.HAL_IncTick - 0x080028c8 0x18 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal.o - 0x080028c8 HAL_IncTick + 0x080028f8 0x18 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal.o + 0x080028f8 HAL_IncTick .text.HAL_GetTick - 0x080028e0 0xc ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal.o - 0x080028e0 HAL_GetTick - .text.HAL_Delay - 0x080028ec 0x24 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal.o - 0x080028ec HAL_Delay - .text.HAL_GetUIDw0 0x08002910 0xc ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal.o - 0x08002910 HAL_GetUIDw0 + 0x08002910 HAL_GetTick + .text.HAL_Delay + 0x0800291c 0x24 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal.o + 0x0800291c HAL_Delay + .text.HAL_GetUIDw0 + 0x08002940 0xc ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal.o + 0x08002940 HAL_GetUIDw0 .text.HAL_GetUIDw1 - 0x0800291c 0xc ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal.o - 0x0800291c HAL_GetUIDw1 + 0x0800294c 0xc ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal.o + 0x0800294c HAL_GetUIDw1 .text.HAL_GetUIDw2 - 0x08002928 0xc ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal.o - 0x08002928 HAL_GetUIDw2 + 0x08002958 0xc ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal.o + 0x08002958 HAL_GetUIDw2 .text.LL_ADC_REG_IsConversionOngoing - 0x08002934 0x8 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_adc.o + 0x08002964 0x8 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_adc.o .text.HAL_ADC_Init - 0x0800293c 0x220 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_adc.o - 0x0800293c HAL_ADC_Init + 0x0800296c 0x220 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_adc.o + 0x0800296c HAL_ADC_Init .text.HAL_ADC_ConfigChannel - 0x08002b5c 0x248 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_adc.o - 0x08002b5c HAL_ADC_ConfigChannel + 0x08002b8c 0x248 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_adc.o + 0x08002b8c HAL_ADC_ConfigChannel .text.HAL_NVIC_SetPriority - 0x08002da4 0x54 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_cortex.o - 0x08002da4 HAL_NVIC_SetPriority + 0x08002dd4 0x54 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_cortex.o + 0x08002dd4 HAL_NVIC_SetPriority .text.HAL_NVIC_EnableIRQ - 0x08002df8 0x18 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_cortex.o - 0x08002df8 HAL_NVIC_EnableIRQ + 0x08002e28 0x18 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_cortex.o + 0x08002e28 HAL_NVIC_EnableIRQ .text.HAL_SYSTICK_Config - 0x08002e10 0x34 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_cortex.o - 0x08002e10 HAL_SYSTICK_Config + 0x08002e40 0x34 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_cortex.o + 0x08002e40 HAL_SYSTICK_Config .text.DMA_SetConfig - 0x08002e44 0x40 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_dma.o + 0x08002e74 0x40 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_dma.o .text.DMA_CalcDMAMUXChannelBaseAndMask - 0x08002e84 0x34 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_dma.o + 0x08002eb4 0x34 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_dma.o .text.HAL_DMA_Init - 0x08002eb8 0xb4 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_dma.o - 0x08002eb8 HAL_DMA_Init + 0x08002ee8 0xb4 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_dma.o + 0x08002ee8 HAL_DMA_Init .text.HAL_DMA_Start_IT - 0x08002f6c 0x8e ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_dma.o - 0x08002f6c HAL_DMA_Start_IT - *fill* 0x08002ffa 0x2 + 0x08002f9c 0x8e ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_dma.o + 0x08002f9c HAL_DMA_Start_IT + *fill* 0x0800302a 0x2 .text.HAL_DMA_Abort - 0x08002ffc 0x74 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_dma.o - 0x08002ffc HAL_DMA_Abort + 0x0800302c 0x74 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_dma.o + 0x0800302c HAL_DMA_Abort .text.HAL_DMA_Abort_IT - 0x08003070 0x7c ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_dma.o - 0x08003070 HAL_DMA_Abort_IT + 0x080030a0 0x7c ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_dma.o + 0x080030a0 HAL_DMA_Abort_IT .text.HAL_DMA_IRQHandler - 0x080030ec 0xa8 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_dma.o - 0x080030ec HAL_DMA_IRQHandler + 0x0800311c 0xa8 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_dma.o + 0x0800311c HAL_DMA_IRQHandler + .text.HAL_DMA_GetError + 0x080031c4 0x4 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_dma.o + 0x080031c4 HAL_DMA_GetError .text.HAL_GPIO_Init - 0x08003194 0x174 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_gpio.o - 0x08003194 HAL_GPIO_Init + 0x080031c8 0x174 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_gpio.o + 0x080031c8 HAL_GPIO_Init .text.HAL_GPIO_ReadPin - 0x08003308 0xc ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_gpio.o - 0x08003308 HAL_GPIO_ReadPin + 0x0800333c 0xc ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_gpio.o + 0x0800333c HAL_GPIO_ReadPin .text.HAL_GPIO_WritePin - 0x08003314 0xc ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_gpio.o - 0x08003314 HAL_GPIO_WritePin + 0x08003348 0xc ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_gpio.o + 0x08003348 HAL_GPIO_WritePin .text.HAL_GPIO_EXTI_Rising_Callback - 0x08003320 0x2 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_gpio.o - 0x08003320 HAL_GPIO_EXTI_Rising_Callback - *fill* 0x08003322 0x2 + 0x08003354 0x2 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_gpio.o + 0x08003354 HAL_GPIO_EXTI_Rising_Callback + *fill* 0x08003356 0x2 .text.HAL_GPIO_EXTI_IRQHandler - 0x08003324 0x28 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_gpio.o - 0x08003324 HAL_GPIO_EXTI_IRQHandler + 0x08003358 0x28 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_gpio.o + 0x08003358 HAL_GPIO_EXTI_IRQHandler .text.HAL_RCC_OscConfig - 0x0800334c 0x26c ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_rcc.o - 0x0800334c HAL_RCC_OscConfig + 0x08003380 0x26c ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_rcc.o + 0x08003380 HAL_RCC_OscConfig .text.HAL_RCC_GetSysClockFreq - 0x080035b8 0x5c ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_rcc.o - 0x080035b8 HAL_RCC_GetSysClockFreq + 0x080035ec 0x5c ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_rcc.o + 0x080035ec HAL_RCC_GetSysClockFreq .text.HAL_RCC_ClockConfig - 0x08003614 0x164 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_rcc.o - 0x08003614 HAL_RCC_ClockConfig + 0x08003648 0x164 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_rcc.o + 0x08003648 HAL_RCC_ClockConfig .text.HAL_RCC_GetHCLKFreq - 0x08003778 0x2c ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_rcc.o - 0x08003778 HAL_RCC_GetHCLKFreq + 0x080037ac 0x2c ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_rcc.o + 0x080037ac HAL_RCC_GetHCLKFreq .text.HAL_RCC_GetPCLK1Freq - 0x080037a4 0x24 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_rcc.o - 0x080037a4 HAL_RCC_GetPCLK1Freq + 0x080037d8 0x24 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_rcc.o + 0x080037d8 HAL_RCC_GetPCLK1Freq .text.HAL_RCCEx_PeriphCLKConfig - 0x080037c8 0x114 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_rcc_ex.o - 0x080037c8 HAL_RCCEx_PeriphCLKConfig + 0x080037fc 0x114 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_rcc_ex.o + 0x080037fc HAL_RCCEx_PeriphCLKConfig .text.TIM_OC1_SetConfig - 0x080038dc 0x6c ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim.o + 0x08003910 0x6c ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim.o .text.TIM_OC3_SetConfig - 0x08003948 0x84 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim.o + 0x0800397c 0x84 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim.o .text.TIM_OC4_SetConfig - 0x080039cc 0x68 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim.o + 0x08003a00 0x68 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim.o .text.TIM_OC5_SetConfig - 0x08003a34 0x60 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim.o + 0x08003a68 0x60 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim.o .text.TIM_OC6_SetConfig - 0x08003a94 0x68 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim.o + 0x08003ac8 0x68 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim.o .text.HAL_TIM_Base_Stop - 0x08003afc 0x2c ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim.o - 0x08003afc HAL_TIM_Base_Stop + 0x08003b30 0x2c ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim.o + 0x08003b30 HAL_TIM_Base_Stop .text.HAL_TIM_Base_Start_IT - 0x08003b28 0x60 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim.o - 0x08003b28 HAL_TIM_Base_Start_IT + 0x08003b5c 0x60 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim.o + 0x08003b5c HAL_TIM_Base_Start_IT .text.HAL_TIM_PWM_MspInit - 0x08003b88 0x2 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim.o - 0x08003b88 HAL_TIM_PWM_MspInit + 0x08003bbc 0x2 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim.o + 0x08003bbc HAL_TIM_PWM_MspInit .text.HAL_TIM_Encoder_Start - 0x08003b8a 0xb0 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim.o - 0x08003b8a HAL_TIM_Encoder_Start + 0x08003bbe 0xb0 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim.o + 0x08003bbe HAL_TIM_Encoder_Start .text.HAL_TIM_OC_DelayElapsedCallback - 0x08003c3a 0x2 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim.o - 0x08003c3a HAL_TIM_OC_DelayElapsedCallback + 0x08003c6e 0x2 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim.o + 0x08003c6e HAL_TIM_OC_DelayElapsedCallback .text.HAL_TIM_IC_CaptureCallback - 0x08003c3c 0x2 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim.o - 0x08003c3c HAL_TIM_IC_CaptureCallback + 0x08003c70 0x2 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim.o + 0x08003c70 HAL_TIM_IC_CaptureCallback .text.HAL_TIM_PWM_PulseFinishedCallback - 0x08003c3e 0x2 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim.o - 0x08003c3e HAL_TIM_PWM_PulseFinishedCallback + 0x08003c72 0x2 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim.o + 0x08003c72 HAL_TIM_PWM_PulseFinishedCallback .text.HAL_TIM_TriggerCallback - 0x08003c40 0x2 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim.o - 0x08003c40 HAL_TIM_TriggerCallback - *fill* 0x08003c42 0x2 + 0x08003c74 0x2 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim.o + 0x08003c74 HAL_TIM_TriggerCallback + *fill* 0x08003c76 0x2 .text.HAL_TIM_IRQHandler - 0x08003c44 0x158 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim.o - 0x08003c44 HAL_TIM_IRQHandler + 0x08003c78 0x158 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim.o + 0x08003c78 HAL_TIM_IRQHandler .text.TIM_Base_SetConfig - 0x08003d9c 0x88 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim.o - 0x08003d9c TIM_Base_SetConfig + 0x08003dd0 0x88 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim.o + 0x08003dd0 TIM_Base_SetConfig .text.HAL_TIM_Base_Init - 0x08003e24 0x54 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim.o - 0x08003e24 HAL_TIM_Base_Init + 0x08003e58 0x54 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim.o + 0x08003e58 HAL_TIM_Base_Init .text.HAL_TIM_PWM_Init - 0x08003e78 0x54 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim.o - 0x08003e78 HAL_TIM_PWM_Init + 0x08003eac 0x54 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim.o + 0x08003eac HAL_TIM_PWM_Init .text.HAL_TIM_Encoder_Init - 0x08003ecc 0xac ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim.o - 0x08003ecc HAL_TIM_Encoder_Init + 0x08003f00 0xac ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim.o + 0x08003f00 HAL_TIM_Encoder_Init .text.TIM_OC2_SetConfig - 0x08003f78 0x78 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim.o - 0x08003f78 TIM_OC2_SetConfig + 0x08003fac 0x78 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim.o + 0x08003fac TIM_OC2_SetConfig .text.HAL_TIM_PWM_ConfigChannel - 0x08003ff0 0x10c ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim.o - 0x08003ff0 HAL_TIM_PWM_ConfigChannel + 0x08004024 0x10c ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim.o + 0x08004024 HAL_TIM_PWM_ConfigChannel .text.TIM_ETR_SetConfig - 0x080040fc 0x18 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim.o - 0x080040fc TIM_ETR_SetConfig + 0x08004130 0x18 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim.o + 0x08004130 TIM_ETR_SetConfig .text.HAL_TIM_ConfigClockSource - 0x08004114 0x130 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim.o - 0x08004114 HAL_TIM_ConfigClockSource + 0x08004148 0x130 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim.o + 0x08004148 HAL_TIM_ConfigClockSource .text.TIM_CCxChannelCmd - 0x08004244 0x1a ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim.o - 0x08004244 TIM_CCxChannelCmd - *fill* 0x0800425e 0x2 + 0x08004278 0x1a ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim.o + 0x08004278 TIM_CCxChannelCmd + *fill* 0x08004292 0x2 .text.HAL_TIM_OC_Start - 0x08004260 0xf8 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim.o - 0x08004260 HAL_TIM_OC_Start + 0x08004294 0xf8 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim.o + 0x08004294 HAL_TIM_OC_Start .text.HAL_TIM_PWM_Start - 0x08004358 0x8 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim.o - 0x08004358 HAL_TIM_PWM_Start + 0x0800438c 0x8 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim.o + 0x0800438c HAL_TIM_PWM_Start .text.HAL_TIMEx_MasterConfigSynchronization - 0x08004360 0x68 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim_ex.o - 0x08004360 HAL_TIMEx_MasterConfigSynchronization + 0x08004394 0x68 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim_ex.o + 0x08004394 HAL_TIMEx_MasterConfigSynchronization .text.HAL_TIMEx_ConfigBreakDeadTime - 0x080043c8 0xbc ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim_ex.o - 0x080043c8 HAL_TIMEx_ConfigBreakDeadTime + 0x080043fc 0xbc ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim_ex.o + 0x080043fc HAL_TIMEx_ConfigBreakDeadTime .text.HAL_TIMEx_CommutCallback - 0x08004484 0x2 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim_ex.o - 0x08004484 HAL_TIMEx_CommutCallback + 0x080044b8 0x2 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim_ex.o + 0x080044b8 HAL_TIMEx_CommutCallback .text.HAL_TIMEx_BreakCallback - 0x08004486 0x2 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim_ex.o - 0x08004486 HAL_TIMEx_BreakCallback + 0x080044ba 0x2 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim_ex.o + 0x080044ba HAL_TIMEx_BreakCallback .text.HAL_TIMEx_Break2Callback - 0x08004488 0x2 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim_ex.o - 0x08004488 HAL_TIMEx_Break2Callback - *fill* 0x0800448a 0x2 + 0x080044bc 0x2 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim_ex.o + 0x080044bc HAL_TIMEx_Break2Callback + *fill* 0x080044be 0x2 .text.UART_EndTxTransfer - 0x0800448c 0x3c ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart.o + 0x080044c0 0x3c ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart.o .text.UART_EndRxTransfer - 0x080044c8 0x64 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart.o + 0x080044fc 0x64 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart.o + .text.HAL_UART_AbortReceive + 0x08004560 0xc0 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart.o + 0x08004560 HAL_UART_AbortReceive .text.HAL_UART_TxCpltCallback - 0x0800452c 0x2 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart.o - 0x0800452c HAL_UART_TxCpltCallback + 0x08004620 0x2 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart.o + 0x08004620 HAL_UART_TxCpltCallback .text.HAL_UART_RxCpltCallback - 0x0800452e 0x2 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart.o - 0x0800452e HAL_UART_RxCpltCallback + 0x08004622 0x2 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart.o + 0x08004622 HAL_UART_RxCpltCallback .text.HAL_UART_RxHalfCpltCallback - 0x08004530 0x2 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart.o - 0x08004530 HAL_UART_RxHalfCpltCallback + 0x08004624 0x2 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart.o + 0x08004624 HAL_UART_RxHalfCpltCallback .text.UART_DMAError - 0x08004532 0x54 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart.o + 0x08004626 0x54 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart.o .text.UART_DMAAbortOnError - 0x08004586 0x12 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart.o + 0x0800467a 0x12 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart.o .text.HAL_UART_IRQHandler - 0x08004598 0x344 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart.o - 0x08004598 HAL_UART_IRQHandler + 0x0800468c 0x344 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart.o + 0x0800468c HAL_UART_IRQHandler .text.UART_DMARxHalfCplt - 0x080048dc 0x3a ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart.o - *fill* 0x08004916 0x2 + 0x080049d0 0x3a ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart.o + *fill* 0x08004a0a 0x2 .text.UART_DMAReceiveCplt - 0x08004918 0xb8 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart.o + 0x08004a0c 0xb8 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart.o .text.UART_SetConfig - 0x080049d0 0x184 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart.o - 0x080049d0 UART_SetConfig + 0x08004ac4 0x184 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart.o + 0x08004ac4 UART_SetConfig .text.UART_AdvFeatureConfig - 0x08004b54 0xd0 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart.o - 0x08004b54 UART_AdvFeatureConfig + 0x08004c48 0xd0 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart.o + 0x08004c48 UART_AdvFeatureConfig .text.UART_WaitOnFlagUntilTimeout - 0x08004c24 0x92 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart.o - 0x08004c24 UART_WaitOnFlagUntilTimeout + 0x08004d18 0x92 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart.o + 0x08004d18 UART_WaitOnFlagUntilTimeout .text.HAL_UART_Transmit - 0x08004cb6 0xd4 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart.o - 0x08004cb6 HAL_UART_Transmit - *fill* 0x08004d8a 0x2 + 0x08004daa 0xd4 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart.o + 0x08004daa HAL_UART_Transmit + *fill* 0x08004e7e 0x2 .text.UART_CheckIdleState - 0x08004d8c 0xc8 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart.o - 0x08004d8c UART_CheckIdleState + 0x08004e80 0xc8 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart.o + 0x08004e80 UART_CheckIdleState .text.HAL_UART_Init - 0x08004e54 0x68 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart.o - 0x08004e54 HAL_UART_Init + 0x08004f48 0x68 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart.o + 0x08004f48 HAL_UART_Init .text.UART_Start_Receive_DMA - 0x08004ebc 0xac ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart.o - 0x08004ebc UART_Start_Receive_DMA + 0x08004fb0 0xac ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart.o + 0x08004fb0 UART_Start_Receive_DMA .text.UARTEx_SetNbDataToProcess - 0x08004f68 0x50 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart_ex.o + 0x0800505c 0x50 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart_ex.o .text.HAL_RS485Ex_Init - 0x08004fb8 0x8c ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart_ex.o - 0x08004fb8 HAL_RS485Ex_Init + 0x080050ac 0x8c ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart_ex.o + 0x080050ac HAL_RS485Ex_Init .text.HAL_UARTEx_WakeupCallback - 0x08005044 0x2 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart_ex.o - 0x08005044 HAL_UARTEx_WakeupCallback + 0x08005138 0x2 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart_ex.o + 0x08005138 HAL_UARTEx_WakeupCallback .text.HAL_UARTEx_RxFifoFullCallback - 0x08005046 0x2 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart_ex.o - 0x08005046 HAL_UARTEx_RxFifoFullCallback + 0x0800513a 0x2 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart_ex.o + 0x0800513a HAL_UARTEx_RxFifoFullCallback .text.HAL_UARTEx_TxFifoEmptyCallback - 0x08005048 0x2 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart_ex.o - 0x08005048 HAL_UARTEx_TxFifoEmptyCallback - *fill* 0x0800504a 0x2 + 0x0800513c 0x2 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart_ex.o + 0x0800513c HAL_UARTEx_TxFifoEmptyCallback + *fill* 0x0800513e 0x2 .text.HAL_UARTEx_DisableFifoMode - 0x0800504c 0x3c ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart_ex.o - 0x0800504c HAL_UARTEx_DisableFifoMode + 0x08005140 0x3c ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart_ex.o + 0x08005140 HAL_UARTEx_DisableFifoMode .text.HAL_UARTEx_SetTxFifoThreshold - 0x08005088 0x40 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart_ex.o - 0x08005088 HAL_UARTEx_SetTxFifoThreshold + 0x0800517c 0x40 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart_ex.o + 0x0800517c HAL_UARTEx_SetTxFifoThreshold .text.HAL_UARTEx_SetRxFifoThreshold - 0x080050c8 0x44 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart_ex.o - 0x080050c8 HAL_UARTEx_SetRxFifoThreshold + 0x080051bc 0x44 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart_ex.o + 0x080051bc HAL_UARTEx_SetRxFifoThreshold .text.HAL_UARTEx_ReceiveToIdle_DMA - 0x0800510c 0x64 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart_ex.o - 0x0800510c HAL_UARTEx_ReceiveToIdle_DMA - .text.memcmp 0x08005170 0x1c C:/ST/STM32CubeIDE_1.14.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp\libc_nano.a(libc_a-memcmp.o) - 0x08005170 memcmp - .text.memset 0x0800518c 0x10 C:/ST/STM32CubeIDE_1.14.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp\libc_nano.a(libc_a-memset.o) - 0x0800518c memset + 0x08005200 0x64 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart_ex.o + 0x08005200 HAL_UARTEx_ReceiveToIdle_DMA + .text.memcmp 0x08005264 0x1c C:/ST/STM32CubeIDE_1.14.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp\libc_nano.a(libc_a-memcmp.o) + 0x08005264 memcmp + .text.memset 0x08005280 0x10 C:/ST/STM32CubeIDE_1.14.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp\libc_nano.a(libc_a-memset.o) + 0x08005280 memset .text.__libc_init_array - 0x0800519c 0x48 C:/ST/STM32CubeIDE_1.14.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp\libc_nano.a(libc_a-init.o) - 0x0800519c __libc_init_array - .text.memcpy 0x080051e4 0x12 C:/ST/STM32CubeIDE_1.14.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp\libc_nano.a(libc_a-memcpy-stub.o) - 0x080051e4 memcpy + 0x08005290 0x48 C:/ST/STM32CubeIDE_1.14.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp\libc_nano.a(libc_a-init.o) + 0x08005290 __libc_init_array + .text.memcpy 0x080052d8 0x12 C:/ST/STM32CubeIDE_1.14.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp\libc_nano.a(libc_a-memcpy-stub.o) + 0x080052d8 memcpy *(.glue_7) - .glue_7 0x080051f6 0x0 linker stubs + .glue_7 0x080052ea 0x0 linker stubs *(.glue_7t) - .glue_7t 0x080051f6 0x0 linker stubs + .glue_7t 0x080052ea 0x0 linker stubs *(.eh_frame) - *fill* 0x080051f6 0x2 - .eh_frame 0x080051f8 0x0 C:/ST/STM32CubeIDE_1.14.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v6-m/nofp/crtbegin.o + *fill* 0x080052ea 0x2 + .eh_frame 0x080052ec 0x0 C:/ST/STM32CubeIDE_1.14.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v6-m/nofp/crtbegin.o *(.init) - .init 0x080051f8 0x4 C:/ST/STM32CubeIDE_1.14.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v6-m/nofp/crti.o - 0x080051f8 _init - .init 0x080051fc 0x8 C:/ST/STM32CubeIDE_1.14.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v6-m/nofp/crtn.o + .init 0x080052ec 0x4 C:/ST/STM32CubeIDE_1.14.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v6-m/nofp/crti.o + 0x080052ec _init + .init 0x080052f0 0x8 C:/ST/STM32CubeIDE_1.14.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v6-m/nofp/crtn.o *(.fini) - .fini 0x08005204 0x4 C:/ST/STM32CubeIDE_1.14.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v6-m/nofp/crti.o - 0x08005204 _fini - .fini 0x08005208 0x8 C:/ST/STM32CubeIDE_1.14.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v6-m/nofp/crtn.o - 0x08005210 . = ALIGN (0x4) - 0x08005210 _etext = . + .fini 0x080052f8 0x4 C:/ST/STM32CubeIDE_1.14.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v6-m/nofp/crti.o + 0x080052f8 _fini + .fini 0x080052fc 0x8 C:/ST/STM32CubeIDE_1.14.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v6-m/nofp/crtn.o + 0x08005304 . = ALIGN (0x4) + 0x08005304 _etext = . -.vfp11_veneer 0x08005210 0x0 - .vfp11_veneer 0x08005210 0x0 linker stubs +.vfp11_veneer 0x08005304 0x0 + .vfp11_veneer 0x08005304 0x0 linker stubs -.v4_bx 0x08005210 0x0 - .v4_bx 0x08005210 0x0 linker stubs +.v4_bx 0x08005304 0x0 + .v4_bx 0x08005304 0x0 linker stubs -.iplt 0x08005210 0x0 - .iplt 0x08005210 0x0 C:/ST/STM32CubeIDE_1.14.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v6-m/nofp/crtbegin.o +.iplt 0x08005304 0x0 + .iplt 0x08005304 0x0 C:/ST/STM32CubeIDE_1.14.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v6-m/nofp/crtbegin.o -.rodata 0x08005210 0xa8 - 0x08005210 . = ALIGN (0x4) +.rodata 0x08005304 0xa8 + 0x08005304 . = ALIGN (0x4) *(.rodata) *(.rodata*) .rodata.debug_hex8.str1.1 - 0x08005210 0x11 ./Core/Src/main.o + 0x08005304 0x11 ./Core/Src/main.o .rodata.VERSION_STRING - 0x08005221 0xa ./Core/Src/main.o - 0x08005221 VERSION_STRING - *fill* 0x0800522b 0x1 + 0x08005315 0xa ./Core/Src/main.o + 0x08005315 VERSION_STRING + *fill* 0x0800531f 0x1 .rodata.APBPrescTable - 0x0800522c 0x20 ./Core/Src/system_stm32c0xx.o - 0x0800522c APBPrescTable + 0x08005320 0x20 ./Core/Src/system_stm32c0xx.o + 0x08005320 APBPrescTable .rodata.AHBPrescTable - 0x0800524c 0x40 ./Core/Src/system_stm32c0xx.o - 0x0800524c AHBPrescTable + 0x08005340 0x40 ./Core/Src/system_stm32c0xx.o + 0x08005340 AHBPrescTable .rodata.CSWTCH.66 - 0x0800528c 0x3 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart.o - *fill* 0x0800528f 0x1 + 0x08005380 0x3 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart.o + *fill* 0x08005383 0x1 .rodata.UARTPrescTable - 0x08005290 0x18 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart.o - 0x08005290 UARTPrescTable + 0x08005384 0x18 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart.o + 0x08005384 UARTPrescTable .rodata.denominator.0 - 0x080052a8 0x8 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart_ex.o + 0x0800539c 0x8 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart_ex.o .rodata.numerator.1 - 0x080052b0 0x8 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart_ex.o - 0x080052b8 . = ALIGN (0x4) + 0x080053a4 0x8 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart_ex.o + 0x080053ac . = ALIGN (0x4) -.ARM.extab 0x080052b8 0x0 - 0x080052b8 . = ALIGN (0x4) +.ARM.extab 0x080053ac 0x0 + 0x080053ac . = ALIGN (0x4) *(.ARM.extab* .gnu.linkonce.armextab.*) - 0x080052b8 . = ALIGN (0x4) + 0x080053ac . = ALIGN (0x4) -.ARM 0x080052b8 0x8 - 0x080052b8 . = ALIGN (0x4) - 0x080052b8 __exidx_start = . +.ARM 0x080053ac 0x8 + 0x080053ac . = ALIGN (0x4) + 0x080053ac __exidx_start = . *(.ARM.exidx*) - .ARM.exidx 0x080052b8 0x8 C:/ST/STM32CubeIDE_1.14.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v6-m/nofp\libgcc.a(_divdi3.o) - 0x080052c0 __exidx_end = . - 0x080052c0 . = ALIGN (0x4) + .ARM.exidx 0x080053ac 0x8 C:/ST/STM32CubeIDE_1.14.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v6-m/nofp\libgcc.a(_divdi3.o) + 0x080053b4 __exidx_end = . + 0x080053b4 . = ALIGN (0x4) -.preinit_array 0x080052c0 0x0 - 0x080052c0 . = ALIGN (0x4) - 0x080052c0 PROVIDE (__preinit_array_start = .) +.preinit_array 0x080053b4 0x0 + 0x080053b4 . = ALIGN (0x4) + 0x080053b4 PROVIDE (__preinit_array_start = .) *(.preinit_array*) - 0x080052c0 PROVIDE (__preinit_array_end = .) - 0x080052c0 . = ALIGN (0x4) + 0x080053b4 PROVIDE (__preinit_array_end = .) + 0x080053b4 . = ALIGN (0x4) -.init_array 0x080052c0 0x4 - 0x080052c0 . = ALIGN (0x4) - 0x080052c0 PROVIDE (__init_array_start = .) +.init_array 0x080053b4 0x4 + 0x080053b4 . = ALIGN (0x4) + 0x080053b4 PROVIDE (__init_array_start = .) *(SORT_BY_NAME(.init_array.*)) *(.init_array*) - .init_array 0x080052c0 0x4 C:/ST/STM32CubeIDE_1.14.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v6-m/nofp/crtbegin.o - 0x080052c4 PROVIDE (__init_array_end = .) - 0x080052c4 . = ALIGN (0x4) + .init_array 0x080053b4 0x4 C:/ST/STM32CubeIDE_1.14.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v6-m/nofp/crtbegin.o + 0x080053b8 PROVIDE (__init_array_end = .) + 0x080053b8 . = ALIGN (0x4) -.fini_array 0x080052c4 0x4 - 0x080052c4 . = ALIGN (0x4) +.fini_array 0x080053b8 0x4 + 0x080053b8 . = ALIGN (0x4) [!provide] PROVIDE (__fini_array_start = .) *(SORT_BY_NAME(.fini_array.*)) *(.fini_array*) - .fini_array 0x080052c4 0x4 C:/ST/STM32CubeIDE_1.14.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v6-m/nofp/crtbegin.o + .fini_array 0x080053b8 0x4 C:/ST/STM32CubeIDE_1.14.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v6-m/nofp/crtbegin.o [!provide] PROVIDE (__fini_array_end = .) - 0x080052c8 . = ALIGN (0x4) - 0x080052c8 _sidata = LOADADDR (.data) + 0x080053bc . = ALIGN (0x4) + 0x080053bc _sidata = LOADADDR (.data) -.rel.dyn 0x080052c8 0x0 - .rel.iplt 0x080052c8 0x0 C:/ST/STM32CubeIDE_1.14.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v6-m/nofp/crtbegin.o +.rel.dyn 0x080053bc 0x0 + .rel.iplt 0x080053bc 0x0 C:/ST/STM32CubeIDE_1.14.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v6-m/nofp/crtbegin.o -.data 0x20000000 0x30 load address 0x080052c8 +.data 0x20000000 0x34 load address 0x080053bc 0x20000000 . = ALIGN (0x4) 0x20000000 _sdata = . *(.data) @@ -4039,269 +4041,274 @@ LOAD C:/ST/STM32CubeIDE_1.14.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.ext .data.floor_address 0x20000001 0x1 ./Core/Src/main.o 0x20000001 floor_address - .data.feed_direction + .data.drive_done 0x20000002 0x1 ./Core/Src/main.o - 0x20000002 feed_direction - *fill* 0x20000003 0x1 + 0x20000002 drive_done + .data.peel_done + 0x20000003 0x1 ./Core/Src/main.o + 0x20000003 peel_done + .data.feed_direction + 0x20000004 0x1 ./Core/Src/main.o + 0x20000004 feed_direction + *fill* 0x20000005 0x3 .data.brake_time_tenths - 0x20000004 0x4 ./Core/Src/main.o - 0x20000004 brake_time_tenths - .data.pid_max_step 0x20000008 0x4 ./Core/Src/main.o - 0x20000008 pid_max_step - .data.i_max 0x2000000c 0x4 ./Core/Src/main.o - 0x2000000c i_max - .data.i_min 0x20000010 0x4 ./Core/Src/main.o - 0x20000010 i_min - .data.kd 0x20000014 0x4 ./Core/Src/main.o - 0x20000014 kd - .data.ki 0x20000018 0x4 ./Core/Src/main.o - 0x20000018 ki - .data.kp 0x2000001c 0x4 ./Core/Src/main.o - 0x2000001c kp + 0x20000008 brake_time_tenths + .data.pid_max_step + 0x2000000c 0x4 ./Core/Src/main.o + 0x2000000c pid_max_step + .data.i_max 0x20000010 0x4 ./Core/Src/main.o + 0x20000010 i_max + .data.i_min 0x20000014 0x4 ./Core/Src/main.o + 0x20000014 i_min + .data.kd 0x20000018 0x4 ./Core/Src/main.o + 0x20000018 kd + .data.ki 0x2000001c 0x4 ./Core/Src/main.o + 0x2000001c ki + .data.kp 0x20000020 0x4 ./Core/Src/main.o + 0x20000020 kp .data.my_address - 0x20000020 0x1 ./Core/Src/main.o - 0x20000020 my_address - *fill* 0x20000021 0x3 + 0x20000024 0x1 ./Core/Src/main.o + 0x20000024 my_address + *fill* 0x20000025 0x3 .data.SystemCoreClock - 0x20000024 0x4 ./Core/Src/system_stm32c0xx.o - 0x20000024 SystemCoreClock + 0x20000028 0x4 ./Core/Src/system_stm32c0xx.o + 0x20000028 SystemCoreClock .data.uwTickFreq - 0x20000028 0x1 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal.o - 0x20000028 uwTickFreq - *fill* 0x20000029 0x3 + 0x2000002c 0x1 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal.o + 0x2000002c uwTickFreq + *fill* 0x2000002d 0x3 .data.uwTickPrio - 0x2000002c 0x4 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal.o - 0x2000002c uwTickPrio + 0x20000030 0x4 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal.o + 0x20000030 uwTickPrio *(.RamFunc) *(.RamFunc*) - 0x20000030 . = ALIGN (0x4) - 0x20000030 _edata = . + 0x20000034 . = ALIGN (0x4) + 0x20000034 _edata = . -.igot.plt 0x20000030 0x0 load address 0x080052f8 - .igot.plt 0x20000030 0x0 C:/ST/STM32CubeIDE_1.14.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v6-m/nofp/crtbegin.o - 0x20000030 . = ALIGN (0x4) +.igot.plt 0x20000034 0x0 load address 0x080053f0 + .igot.plt 0x20000034 0x0 C:/ST/STM32CubeIDE_1.14.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v6-m/nofp/crtbegin.o + 0x20000034 . = ALIGN (0x4) -.bss 0x20000030 0x1334 load address 0x080052f8 - 0x20000030 _sbss = . - 0x20000030 __bss_start__ = _sbss +.bss 0x20000034 0x1334 load address 0x080053f0 + 0x20000034 _sbss = . + 0x20000034 __bss_start__ = _sbss *(.bss) - .bss 0x20000030 0x1c C:/ST/STM32CubeIDE_1.14.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v6-m/nofp/crtbegin.o + .bss 0x20000034 0x1c C:/ST/STM32CubeIDE_1.14.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v6-m/nofp/crtbegin.o *(.bss*) .bss.still_counter.0 - 0x2000004c 0x2 ./Core/Src/main.o - *fill* 0x2000004e 0x2 + 0x20000050 0x2 ./Core/Src/main.o + *fill* 0x20000052 0x2 .bss.last_moved_pos.1 - 0x20000050 0x4 ./Core/Src/main.o - .bss.velocity.2 0x20000054 0x4 ./Core/Src/main.o - .bss.vel_prev_pos.3 + .bss.velocity.2 0x20000058 0x4 ./Core/Src/main.o + .bss.vel_prev_pos.3 + 0x2000005c 0x4 ./Core/Src/main.o .bss.vel_counter.4 - 0x2000005c 0x1 ./Core/Src/main.o + 0x20000060 0x1 ./Core/Src/main.o .bss.my_addr_crc_exp - 0x2000005d 0x1 ./Core/Src/main.o - 0x2000005d my_addr_crc_exp + 0x20000061 0x1 ./Core/Src/main.o + 0x20000061 my_addr_crc_exp .bss.my_addr_size - 0x2000005e 0x1 ./Core/Src/main.o - 0x2000005e my_addr_size + 0x20000062 0x1 ./Core/Src/main.o + 0x20000062 my_addr_size .bss.my_addr_bytes - 0x2000005f 0x8 ./Core/Src/main.o - 0x2000005f my_addr_bytes + 0x20000063 0x8 ./Core/Src/main.o + 0x20000063 my_addr_bytes .bss.last_rx_bytes - 0x20000067 0x8 ./Core/Src/main.o - 0x20000067 last_rx_bytes + 0x2000006b 0x8 ./Core/Src/main.o + 0x2000006b last_rx_bytes .bss.last_rx_cmd - 0x2000006f 0x1 ./Core/Src/main.o - 0x2000006f last_rx_cmd + 0x20000073 0x1 ./Core/Src/main.o + 0x20000073 last_rx_cmd .bss.last_rx_to - 0x20000070 0x1 ./Core/Src/main.o - 0x20000070 last_rx_to + 0x20000074 0x1 ./Core/Src/main.o + 0x20000074 last_rx_to .bss.last_rx_size - 0x20000071 0x1 ./Core/Src/main.o - 0x20000071 last_rx_size + 0x20000075 0x1 ./Core/Src/main.o + 0x20000075 last_rx_size .bss.msg_handled - 0x20000072 0x2 ./Core/Src/main.o - 0x20000072 msg_handled + 0x20000076 0x2 ./Core/Src/main.o + 0x20000076 msg_handled .bss.drop_addr - 0x20000074 0x2 ./Core/Src/main.o - 0x20000074 drop_addr - .bss.drop_crc 0x20000076 0x2 ./Core/Src/main.o - 0x20000076 drop_crc - .bss.drop_size 0x20000078 0x2 ./Core/Src/main.o - 0x20000078 drop_size - .bss.uart_error_count - 0x2000007a 0x2 ./Core/Src/main.o - 0x2000007a uart_error_count - .bss.debug_pid_output + 0x20000078 drop_addr + .bss.drop_crc 0x2000007a 0x2 ./Core/Src/main.o + 0x2000007a drop_crc + .bss.drop_size 0x2000007c 0x2 ./Core/Src/main.o - 0x2000007c debug_pid_output + 0x2000007c drop_size + .bss.uart_error_count + 0x2000007e 0x2 ./Core/Src/main.o + 0x2000007e uart_error_count + .bss.debug_pid_output + 0x20000080 0x2 ./Core/Src/main.o + 0x20000080 debug_pid_output .bss.debug_tx_buffer - 0x2000007e 0x60 ./Core/Src/main.o - 0x2000007e debug_tx_buffer - *fill* 0x200000de 0x2 + 0x20000082 0x60 ./Core/Src/main.o + 0x20000082 debug_tx_buffer + *fill* 0x200000e2 0x2 .bss.last_debug_output_time - 0x200000e0 0x4 ./Core/Src/main.o - 0x200000e0 last_debug_output_time - .bss.mm_position 0x200000e4 0x4 ./Core/Src/main.o - 0x200000e4 mm_position + 0x200000e4 last_debug_output_time + .bss.mm_position + 0x200000e8 0x4 ./Core/Src/main.o + 0x200000e8 mm_position .bss.floor_address_status - 0x200000e8 0x1 ./Core/Src/main.o - 0x200000e8 floor_address_status - *fill* 0x200000e9 0x3 + 0x200000ec 0x1 ./Core/Src/main.o + 0x200000ec floor_address_status + *fill* 0x200000ed 0x3 .bss.both_pressed_start - 0x200000ec 0x4 ./Core/Src/main.o - 0x200000ec both_pressed_start + 0x200000f0 0x4 ./Core/Src/main.o + 0x200000f0 both_pressed_start .bss.both_pressed_handled - 0x200000f0 0x1 ./Core/Src/main.o - 0x200000f0 both_pressed_handled + 0x200000f4 0x1 ./Core/Src/main.o + 0x200000f4 both_pressed_handled .bss.sw2_long_handled - 0x200000f1 0x1 ./Core/Src/main.o - 0x200000f1 sw2_long_handled - .bss.sw1_long_handled - 0x200000f2 0x1 ./Core/Src/main.o - 0x200000f2 sw1_long_handled - .bss.driving_direction - 0x200000f3 0x1 ./Core/Src/main.o - 0x200000f3 driving_direction - .bss.driving 0x200000f4 0x1 ./Core/Src/main.o - 0x200000f4 driving - .bss.drive_mode 0x200000f5 0x1 ./Core/Src/main.o - 0x200000f5 drive_mode - *fill* 0x200000f6 0x2 + 0x200000f5 sw2_long_handled + .bss.sw1_long_handled + 0x200000f6 0x1 ./Core/Src/main.o + 0x200000f6 sw1_long_handled + .bss.driving_direction + 0x200000f7 0x1 ./Core/Src/main.o + 0x200000f7 driving_direction + .bss.driving 0x200000f8 0x1 ./Core/Src/main.o + 0x200000f8 driving + .bss.drive_mode + 0x200000f9 0x1 ./Core/Src/main.o + 0x200000f9 drive_mode + *fill* 0x200000fa 0x2 .bss.peel_last_ramp_time - 0x200000f8 0x4 ./Core/Src/main.o - 0x200000f8 peel_last_ramp_time + 0x200000fc 0x4 ./Core/Src/main.o + 0x200000fc peel_last_ramp_time .bss.peel_current_pwm - 0x200000fc 0x2 ./Core/Src/main.o - 0x200000fc peel_current_pwm + 0x20000100 0x2 ./Core/Src/main.o + 0x20000100 peel_current_pwm .bss.peel_target_pwm - 0x200000fe 0x2 ./Core/Src/main.o - 0x200000fe peel_target_pwm + 0x20000102 0x2 ./Core/Src/main.o + 0x20000102 peel_target_pwm .bss.feed_retry_count - 0x20000100 0x1 ./Core/Src/main.o - 0x20000100 feed_retry_count - *fill* 0x20000101 0x3 + 0x20000104 0x1 ./Core/Src/main.o + 0x20000104 feed_retry_count + *fill* 0x20000105 0x3 .bss.feed_target_position - 0x20000104 0x4 ./Core/Src/main.o - 0x20000104 feed_target_position + 0x20000108 0x4 ./Core/Src/main.o + 0x20000108 feed_target_position .bss.feed_distance_tenths - 0x20000108 0x2 ./Core/Src/main.o - 0x20000108 feed_distance_tenths - *fill* 0x2000010a 0x2 + 0x2000010c 0x2 ./Core/Src/main.o + 0x2000010c feed_distance_tenths + *fill* 0x2000010e 0x2 .bss.feed_timeout_time - 0x2000010c 0x4 ./Core/Src/main.o - 0x2000010c feed_timeout_time - .bss.feed_state_duration 0x20000110 0x4 ./Core/Src/main.o - 0x20000110 feed_state_duration - .bss.feed_state_start_time + 0x20000110 feed_timeout_time + .bss.feed_state_duration 0x20000114 0x4 ./Core/Src/main.o - 0x20000114 feed_state_start_time + 0x20000114 feed_state_duration + .bss.feed_state_start_time + 0x20000118 0x4 ./Core/Src/main.o + 0x20000118 feed_state_start_time .bss.feed_state - 0x20000118 0x1 ./Core/Src/main.o - 0x20000118 feed_state - *fill* 0x20000119 0x1 + 0x2000011c 0x1 ./Core/Src/main.o + 0x2000011c feed_state + *fill* 0x2000011d 0x1 .bss.feed_retry_total - 0x2000011a 0x2 ./Core/Src/main.o - 0x2000011a feed_retry_total - .bss.feed_fail_count - 0x2000011c 0x2 ./Core/Src/main.o - 0x2000011c feed_fail_count - .bss.feed_ok_count 0x2000011e 0x2 ./Core/Src/main.o - 0x2000011e feed_ok_count + 0x2000011e feed_retry_total + .bss.feed_fail_count + 0x20000120 0x2 ./Core/Src/main.o + 0x20000120 feed_fail_count + .bss.feed_ok_count + 0x20000122 0x2 ./Core/Src/main.o + 0x20000122 feed_ok_count .bss.feed_just_completed - 0x20000120 0x1 ./Core/Src/main.o - 0x20000120 feed_just_completed + 0x20000124 0x1 ./Core/Src/main.o + 0x20000124 feed_just_completed .bss.feed_in_progress - 0x20000121 0x1 ./Core/Src/main.o - 0x20000121 feed_in_progress + 0x20000125 0x1 ./Core/Src/main.o + 0x20000125 feed_in_progress .bss.last_feed_status - 0x20000122 0x1 ./Core/Src/main.o - 0x20000122 last_feed_status - *fill* 0x20000123 0x1 - .bss.pid_add 0x20000124 0x4 ./Core/Src/main.o - 0x20000124 pid_add + 0x20000126 0x1 ./Core/Src/main.o + 0x20000126 last_feed_status + *fill* 0x20000127 0x1 + .bss.pid_add 0x20000128 0x4 ./Core/Src/main.o + 0x20000128 pid_add .bss.motor_pid - 0x20000128 0x28 ./Core/Src/main.o - 0x20000128 motor_pid + 0x2000012c 0x28 ./Core/Src/main.o + 0x2000012c motor_pid .bss.target_count - 0x20000150 0x4 ./Core/Src/main.o - 0x20000150 target_count - .bss.total_count 0x20000154 0x4 ./Core/Src/main.o - 0x20000154 total_count + 0x20000154 target_count + .bss.total_count + 0x20000158 0x4 ./Core/Src/main.o + 0x20000158 total_count .bss.rx_msg_count - 0x20000158 0x2 ./Core/Src/main.o - 0x20000158 rx_msg_count + 0x2000015c 0x2 ./Core/Src/main.o + 0x2000015c rx_msg_count .bss.DMA_buffer - 0x2000015a 0x40 ./Core/Src/main.o - 0x2000015a DMA_buffer - .bss.msg_buf 0x2000019a 0xd80 ./Core/Src/main.o - 0x2000019a msg_buf + 0x2000015e 0x40 ./Core/Src/main.o + 0x2000015e DMA_buffer + .bss.msg_buf 0x2000019e 0xd80 ./Core/Src/main.o + 0x2000019e msg_buf .bss.msg_buf_size - 0x20000f1a 0x36 ./Core/Src/main.o - 0x20000f1a msg_buf_size + 0x20000f1e 0x36 ./Core/Src/main.o + 0x20000f1e msg_buf_size .bss.msg_buf_empty - 0x20000f50 0x36 ./Core/Src/main.o - 0x20000f50 msg_buf_empty + 0x20000f54 0x36 ./Core/Src/main.o + 0x20000f54 msg_buf_empty .bss.is_initialized - 0x20000f86 0x1 ./Core/Src/main.o - 0x20000f86 is_initialized - .bss.UUID 0x20000f87 0xc ./Core/Src/main.o - 0x20000f87 UUID - *fill* 0x20000f93 0x1 + 0x20000f8a 0x1 ./Core/Src/main.o + 0x20000f8a is_initialized + .bss.UUID 0x20000f8b 0xc ./Core/Src/main.o + 0x20000f8b UUID + *fill* 0x20000f97 0x1 .bss.encoder_previous - 0x20000f94 0x2 ./Core/Src/main.o - 0x20000f94 encoder_previous - *fill* 0x20000f96 0x2 + 0x20000f98 0x2 ./Core/Src/main.o + 0x20000f98 encoder_previous + *fill* 0x20000f9a 0x2 .bss.encoder_count_extra - 0x20000f98 0x4 ./Core/Src/main.o - 0x20000f98 encoder_count_extra + 0x20000f9c 0x4 ./Core/Src/main.o + 0x20000f9c encoder_count_extra .bss.sw2_pressed - 0x20000f9c 0x1 ./Core/Src/main.o - 0x20000f9c sw2_pressed + 0x20000fa0 0x1 ./Core/Src/main.o + 0x20000fa0 sw2_pressed .bss.sw1_pressed - 0x20000f9d 0x1 ./Core/Src/main.o - 0x20000f9d sw1_pressed - *fill* 0x20000f9e 0x2 + 0x20000fa1 0x1 ./Core/Src/main.o + 0x20000fa1 sw1_pressed + *fill* 0x20000fa2 0x2 .bss.hdma_usart2_tx - 0x20000fa0 0x5c ./Core/Src/main.o - 0x20000fa0 hdma_usart2_tx + 0x20000fa4 0x5c ./Core/Src/main.o + 0x20000fa4 hdma_usart2_tx .bss.hdma_usart2_rx - 0x20000ffc 0x5c ./Core/Src/main.o - 0x20000ffc hdma_usart2_rx - .bss.huart2 0x20001058 0x94 ./Core/Src/main.o - 0x20001058 huart2 - .bss.huart1 0x200010ec 0x94 ./Core/Src/main.o - 0x200010ec huart1 - .bss.htim17 0x20001180 0x4c ./Core/Src/main.o - 0x20001180 htim17 - .bss.htim16 0x200011cc 0x4c ./Core/Src/main.o - 0x200011cc htim16 - .bss.htim14 0x20001218 0x4c ./Core/Src/main.o - 0x20001218 htim14 - .bss.htim3 0x20001264 0x4c ./Core/Src/main.o - 0x20001264 htim3 - .bss.htim1 0x200012b0 0x4c ./Core/Src/main.o - 0x200012b0 htim1 - .bss.hadc1 0x200012fc 0x64 ./Core/Src/main.o - 0x200012fc hadc1 - .bss.uwTick 0x20001360 0x4 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal.o - 0x20001360 uwTick + 0x20001000 0x5c ./Core/Src/main.o + 0x20001000 hdma_usart2_rx + .bss.huart2 0x2000105c 0x94 ./Core/Src/main.o + 0x2000105c huart2 + .bss.huart1 0x200010f0 0x94 ./Core/Src/main.o + 0x200010f0 huart1 + .bss.htim17 0x20001184 0x4c ./Core/Src/main.o + 0x20001184 htim17 + .bss.htim16 0x200011d0 0x4c ./Core/Src/main.o + 0x200011d0 htim16 + .bss.htim14 0x2000121c 0x4c ./Core/Src/main.o + 0x2000121c htim14 + .bss.htim3 0x20001268 0x4c ./Core/Src/main.o + 0x20001268 htim3 + .bss.htim1 0x200012b4 0x4c ./Core/Src/main.o + 0x200012b4 htim1 + .bss.hadc1 0x20001300 0x64 ./Core/Src/main.o + 0x20001300 hadc1 + .bss.uwTick 0x20001364 0x4 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal.o + 0x20001364 uwTick *(COMMON) - 0x20001364 . = ALIGN (0x4) - 0x20001364 _ebss = . - 0x20001364 __bss_end__ = _ebss + 0x20001368 . = ALIGN (0x4) + 0x20001368 _ebss = . + 0x20001368 __bss_end__ = _ebss ._user_heap_stack - 0x20001364 0x604 load address 0x080052f8 + 0x20001368 0x600 load address 0x080053f0 0x20001368 . = ALIGN (0x8) - *fill* 0x20001364 0x4 [!provide] PROVIDE (end = .) 0x20001368 PROVIDE (_end = .) 0x20001568 . = (. + _Min_Heap_Size) @@ -4394,24 +4401,24 @@ LOAD C:/ST/STM32CubeIDE_1.14.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.ext LOAD C:/ST/STM32CubeIDE_1.14.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp\libm.a LOAD C:/ST/STM32CubeIDE_1.14.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v6-m/nofp\libgcc.a -.debug_info 0x00000000 0x1b022 +.debug_info 0x00000000 0x1b071 .debug_info 0x00000000 0x168 ./Core/Src/crc.o - .debug_info 0x00000168 0x5c09 ./Core/Src/main.o - .debug_info 0x00005d71 0x1914 ./Core/Src/stm32c0xx_hal_msp.o - .debug_info 0x00007685 0xc9b ./Core/Src/stm32c0xx_it.o - .debug_info 0x00008320 0x399 ./Core/Src/system_stm32c0xx.o - .debug_info 0x000086b9 0x30 ./Core/Startup/startup_stm32c051c6tx.o - .debug_info 0x000086e9 0x96e ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal.o - .debug_info 0x00009057 0x20e7 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_adc.o - .debug_info 0x0000b13e 0xa1c ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_cortex.o - .debug_info 0x0000bb5a 0x9fc ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_dma.o - .debug_info 0x0000c556 0x613 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_gpio.o - .debug_info 0x0000cb69 0xb17 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_rcc.o - .debug_info 0x0000d680 0x5cc ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_rcc_ex.o - .debug_info 0x0000dc4c 0x4334 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim.o - .debug_info 0x00011f80 0x1d40 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim_ex.o - .debug_info 0x00013cc0 0x6102 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart.o - .debug_info 0x00019dc2 0x1260 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart_ex.o + .debug_info 0x00000168 0x5c58 ./Core/Src/main.o + .debug_info 0x00005dc0 0x1914 ./Core/Src/stm32c0xx_hal_msp.o + .debug_info 0x000076d4 0xc9b ./Core/Src/stm32c0xx_it.o + .debug_info 0x0000836f 0x399 ./Core/Src/system_stm32c0xx.o + .debug_info 0x00008708 0x30 ./Core/Startup/startup_stm32c051c6tx.o + .debug_info 0x00008738 0x96e ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal.o + .debug_info 0x000090a6 0x20e7 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_adc.o + .debug_info 0x0000b18d 0xa1c ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_cortex.o + .debug_info 0x0000bba9 0x9fc ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_dma.o + .debug_info 0x0000c5a5 0x613 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_gpio.o + .debug_info 0x0000cbb8 0xb17 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_rcc.o + .debug_info 0x0000d6cf 0x5cc ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_rcc_ex.o + .debug_info 0x0000dc9b 0x4334 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim.o + .debug_info 0x00011fcf 0x1d40 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim_ex.o + .debug_info 0x00013d0f 0x6102 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart.o + .debug_info 0x00019e11 0x1260 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart_ex.o .debug_abbrev 0x00000000 0x2ea9 .debug_abbrev 0x00000000 0xf8 ./Core/Src/crc.o @@ -4433,37 +4440,37 @@ LOAD C:/ST/STM32CubeIDE_1.14.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.ext .debug_abbrev 0x00002b5f 0x34a ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart_ex.o .debug_loclists - 0x00000000 0xc0a2 + 0x00000000 0xbf8f .debug_loclists 0x00000000 0x6a ./Core/Src/crc.o .debug_loclists - 0x0000006a 0x1d34 ./Core/Src/main.o + 0x0000006a 0x1c21 ./Core/Src/main.o .debug_loclists - 0x00001d9e 0x1d8 ./Core/Src/stm32c0xx_hal_msp.o + 0x00001c8b 0x1d8 ./Core/Src/stm32c0xx_hal_msp.o .debug_loclists - 0x00001f76 0x4b ./Core/Src/system_stm32c0xx.o + 0x00001e63 0x4b ./Core/Src/system_stm32c0xx.o .debug_loclists - 0x00001fc1 0x17b ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal.o + 0x00001eae 0x17b ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal.o .debug_loclists - 0x0000213c 0xd32 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_adc.o + 0x00002029 0xd32 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_adc.o .debug_loclists - 0x00002e6e 0x355 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_cortex.o + 0x00002d5b 0x355 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_cortex.o .debug_loclists - 0x000031c3 0x5cd ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_dma.o + 0x000030b0 0x5cd ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_dma.o .debug_loclists - 0x00003790 0x2ed ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_gpio.o + 0x0000367d 0x2ed ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_gpio.o .debug_loclists - 0x00003a7d 0x430 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_rcc.o + 0x0000396a 0x430 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_rcc.o .debug_loclists - 0x00003ead 0x28c ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_rcc_ex.o + 0x00003d9a 0x28c ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_rcc_ex.o .debug_loclists - 0x00004139 0x39f5 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim.o + 0x00004026 0x39f5 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim.o .debug_loclists - 0x00007b2e 0x13ab ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim_ex.o + 0x00007a1b 0x13ab ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim_ex.o .debug_loclists - 0x00008ed9 0x2a35 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart.o + 0x00008dc6 0x2a35 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart.o .debug_loclists - 0x0000b90e 0x794 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart_ex.o + 0x0000b7fb 0x794 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart_ex.o .debug_aranges 0x00000000 0xf48 .debug_aranges @@ -4502,41 +4509,41 @@ LOAD C:/ST/STM32CubeIDE_1.14.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.ext 0x00000ea8 0xa0 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart_ex.o .debug_rnglists - 0x00000000 0x13d0 + 0x00000000 0x13c2 .debug_rnglists 0x00000000 0x28 ./Core/Src/crc.o .debug_rnglists - 0x00000028 0x416 ./Core/Src/main.o + 0x00000028 0x408 ./Core/Src/main.o .debug_rnglists - 0x0000043e 0x12d ./Core/Src/stm32c0xx_hal_msp.o + 0x00000430 0x12d ./Core/Src/stm32c0xx_hal_msp.o .debug_rnglists - 0x0000056b 0x55 ./Core/Src/stm32c0xx_it.o + 0x0000055d 0x55 ./Core/Src/stm32c0xx_it.o .debug_rnglists - 0x000005c0 0x19 ./Core/Src/system_stm32c0xx.o + 0x000005b2 0x19 ./Core/Src/system_stm32c0xx.o .debug_rnglists - 0x000005d9 0x19 ./Core/Startup/startup_stm32c051c6tx.o + 0x000005cb 0x19 ./Core/Startup/startup_stm32c051c6tx.o .debug_rnglists - 0x000005f2 0xbb ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal.o + 0x000005e4 0xbb ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal.o .debug_rnglists - 0x000006ad 0x1d0 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_adc.o + 0x0000069f 0x1d0 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_adc.o .debug_rnglists - 0x0000087d 0xa3 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_cortex.o + 0x0000086f 0xa3 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_cortex.o .debug_rnglists - 0x00000920 0x72 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_dma.o + 0x00000912 0x72 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_dma.o .debug_rnglists - 0x00000992 0x4b ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_gpio.o + 0x00000984 0x4b ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_gpio.o .debug_rnglists - 0x000009dd 0x82 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_rcc.o + 0x000009cf 0x82 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_rcc.o .debug_rnglists - 0x00000a5f 0x5f ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_rcc_ex.o + 0x00000a51 0x5f ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_rcc_ex.o .debug_rnglists - 0x00000abe 0x3fb ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim.o + 0x00000ab0 0x3fb ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim.o .debug_rnglists - 0x00000eb9 0x13a ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim_ex.o + 0x00000eab 0x13a ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim_ex.o .debug_rnglists - 0x00000ff3 0x337 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart.o + 0x00000fe5 0x337 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart.o .debug_rnglists - 0x0000132a 0xa6 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart_ex.o + 0x0000131c 0xa6 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart_ex.o .debug_macro 0x00000000 0x15b92 .debug_macro 0x00000000 0x76 ./Core/Src/crc.o @@ -4618,44 +4625,44 @@ LOAD C:/ST/STM32CubeIDE_1.14.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.ext .debug_macro 0x00015779 0x215 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart.o .debug_macro 0x0001598e 0x204 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart_ex.o -.debug_line 0x00000000 0x1a310 +.debug_line 0x00000000 0x1a342 .debug_line 0x00000000 0x4ae ./Core/Src/crc.o - .debug_line 0x000004ae 0x3a44 ./Core/Src/main.o - .debug_line 0x00003ef2 0xd22 ./Core/Src/stm32c0xx_hal_msp.o - .debug_line 0x00004c14 0x911 ./Core/Src/stm32c0xx_it.o - .debug_line 0x00005525 0x85b ./Core/Src/system_stm32c0xx.o - .debug_line 0x00005d80 0x7d ./Core/Startup/startup_stm32c051c6tx.o - .debug_line 0x00005dfd 0xc38 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal.o - .debug_line 0x00006a35 0x20cd ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_adc.o - .debug_line 0x00008b02 0xcdb ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_cortex.o - .debug_line 0x000097dd 0x1157 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_dma.o - .debug_line 0x0000a934 0xd22 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_gpio.o - .debug_line 0x0000b656 0x11f1 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_rcc.o - .debug_line 0x0000c847 0xba3 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_rcc_ex.o - .debug_line 0x0000d3ea 0x4d5e ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim.o - .debug_line 0x00012148 0x1dd8 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim_ex.o - .debug_line 0x00013f20 0x52d6 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart.o - .debug_line 0x000191f6 0x111a ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart_ex.o + .debug_line 0x000004ae 0x3a76 ./Core/Src/main.o + .debug_line 0x00003f24 0xd22 ./Core/Src/stm32c0xx_hal_msp.o + .debug_line 0x00004c46 0x911 ./Core/Src/stm32c0xx_it.o + .debug_line 0x00005557 0x85b ./Core/Src/system_stm32c0xx.o + .debug_line 0x00005db2 0x7d ./Core/Startup/startup_stm32c051c6tx.o + .debug_line 0x00005e2f 0xc38 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal.o + .debug_line 0x00006a67 0x20cd ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_adc.o + .debug_line 0x00008b34 0xcdb ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_cortex.o + .debug_line 0x0000980f 0x1157 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_dma.o + .debug_line 0x0000a966 0xd22 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_gpio.o + .debug_line 0x0000b688 0x11f1 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_rcc.o + .debug_line 0x0000c879 0xba3 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_rcc_ex.o + .debug_line 0x0000d41c 0x4d5e ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim.o + .debug_line 0x0001217a 0x1dd8 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim_ex.o + .debug_line 0x00013f52 0x52d6 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart.o + .debug_line 0x00019228 0x111a ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart_ex.o -.debug_str 0x00000000 0x8ebf3 - .debug_str 0x00000000 0x8ebf3 ./Core/Src/crc.o +.debug_str 0x00000000 0x8ec08 + .debug_str 0x00000000 0x8ec08 ./Core/Src/crc.o 0x4063 (size before relaxing) - .debug_str 0x0008ebf3 0x8bb9c ./Core/Src/main.o - .debug_str 0x0008ebf3 0x8716e ./Core/Src/stm32c0xx_hal_msp.o - .debug_str 0x0008ebf3 0x86b58 ./Core/Src/stm32c0xx_it.o - .debug_str 0x0008ebf3 0x85fd3 ./Core/Src/system_stm32c0xx.o - .debug_str 0x0008ebf3 0x69 ./Core/Startup/startup_stm32c051c6tx.o - .debug_str 0x0008ebf3 0x865f2 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal.o - .debug_str 0x0008ebf3 0x86d99 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_adc.o - .debug_str 0x0008ebf3 0x86407 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_cortex.o - .debug_str 0x0008ebf3 0x8644a ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_dma.o - .debug_str 0x0008ebf3 0x861bd ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_gpio.o - .debug_str 0x0008ebf3 0x865ca ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_rcc.o - .debug_str 0x0008ebf3 0x8623c ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_rcc_ex.o - .debug_str 0x0008ebf3 0x874ed ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim.o - .debug_str 0x0008ebf3 0x86e7b ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim_ex.o - .debug_str 0x0008ebf3 0x86f23 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart.o - .debug_str 0x0008ebf3 0x8684b ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart_ex.o + .debug_str 0x0008ec08 0x8bbc7 ./Core/Src/main.o + .debug_str 0x0008ec08 0x8716e ./Core/Src/stm32c0xx_hal_msp.o + .debug_str 0x0008ec08 0x86b58 ./Core/Src/stm32c0xx_it.o + .debug_str 0x0008ec08 0x85fd3 ./Core/Src/system_stm32c0xx.o + .debug_str 0x0008ec08 0x69 ./Core/Startup/startup_stm32c051c6tx.o + .debug_str 0x0008ec08 0x865f2 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal.o + .debug_str 0x0008ec08 0x86d99 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_adc.o + .debug_str 0x0008ec08 0x86407 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_cortex.o + .debug_str 0x0008ec08 0x8644a ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_dma.o + .debug_str 0x0008ec08 0x861bd ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_gpio.o + .debug_str 0x0008ec08 0x865ca ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_rcc.o + .debug_str 0x0008ec08 0x8623c ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_rcc_ex.o + .debug_str 0x0008ec08 0x874ed ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim.o + .debug_str 0x0008ec08 0x86e7b ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim_ex.o + .debug_str 0x0008ec08 0x86f23 ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart.o + .debug_str 0x0008ec08 0x8684b ./Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_uart_ex.o .comment 0x00000000 0x43 .comment 0x00000000 0x43 ./Core/Src/crc.o diff --git a/pcb/mobo/mobo.kicad_pro b/pcb/mobo/mobo.kicad_pro index 8013546..41c620c 100644 --- a/pcb/mobo/mobo.kicad_pro +++ b/pcb/mobo/mobo.kicad_pro @@ -609,7 +609,7 @@ "show": true }, { - "group_by": true, + "group_by": false, "label": "Value", "name": "Value", "show": true @@ -633,7 +633,7 @@ "show": false }, { - "group_by": true, + "group_by": false, "label": "Footprint", "name": "Footprint", "show": true @@ -669,7 +669,7 @@ "show": false }, { - "group_by": false, + "group_by": true, "label": "MPN", "name": "MPN", "show": true diff --git a/pcb/mobo/production/backups/mobo_2026-04-03_13-43-48.zip b/pcb/mobo/production/backups/mobo_2026-04-03_13-43-48.zip new file mode 100644 index 0000000..5e46b0d Binary files /dev/null and b/pcb/mobo/production/backups/mobo_2026-04-03_13-43-48.zip differ diff --git a/pcb/mobo/production/mobo.zip b/pcb/mobo/production/mobo.zip index d8b55df..150fe60 100644 Binary files a/pcb/mobo/production/mobo.zip and b/pcb/mobo/production/mobo.zip differ diff --git a/pcb/mobo/production/netlist.ipc b/pcb/mobo/production/netlist.ipc index 3b50f5f..e7d3339 100644 --- a/pcb/mobo/production/netlist.ipc +++ b/pcb/mobo/production/netlist.ipc @@ -1,228 +1,228 @@ P CODE 00 P UNITS CUST 0 P arrayDim N -317+3V3 VIA MD0118PA00X+045469Y-024937X0236Y0000R000S-1293668029 -317+3V3 VIA MD0118PA00X+042090Y-019150X0236Y0000R000S-1293668029 -317+3V3 VIA MD0118PA00X+042787Y-039988X0236Y0000R000S-1293668029 -317+3V3 VIA MD0118PA00X+041594Y-038835X0236Y0000R000S-1293668029 -317+3V3 VIA MD0118PA00X+048800Y-037440X0236Y0000R000S-1293668029 -317+3V3 VIA MD0118PA00X+047156Y-031850X0236Y0000R000S-1293668029 -317SW1 VIA MD0118PA00X+056970Y-038900X0236Y0000R000S-1293668029 -317SW1 VIA MD0118PA00X+050390Y-036570X0236Y0000R000S-1293668029 -317SW2 VIA MD0118PA00X+049660Y-036920X0236Y0000R000S-1293668029 -317SW2 VIA MD0118PA00X+055051Y-038960X0236Y0000R000S-1293668029 -317DRIVE_QUAD_A VIA MD0118PA00X+042874Y-032165X0236Y0000R000S-1293668029 -317DRIVE_QUAD_A VIA MD0118PA00X+043890Y-033310X0236Y0000R000S-1293668029 -317DRIVE_QUAD_B VIA MD0118PA00X+044020Y-034080X0236Y0000R000S-1293668029 -317DRIVE_QUAD_B VIA MD0118PA00X+042744Y-032586X0236Y0000R000S-1293668029 -3171WIRE VIA MD0118PA00X+044550Y-025410X0236Y0000R000S-1293668029 -3171WIRE VIA MD0118PA00X+041220Y-018840X0236Y0000R000S-1293668029 -3171WIRE VIA MD0118PA00X+047740Y-033360X0236Y0000R000S-1293668029 -317+12V VIA MD0118PA00X+051996Y-027035X0236Y0000R000S-1293668029 -317+12V VIA MD0118PA00X+054409Y-026520X0236Y0000R000S-1293668029 -317NRESET VIA MD0118PA00X+050840Y-040310X0236Y0000R000S-1293668029 -317NRESET VIA MD0118PA00X+049730Y-033799X0236Y0000R000S-1293668029 -317NRESET VIA MD0118PA00X+042701Y-038536X0236Y0000R000S-1293668029 -317NET-(U2-EN) VIA MD0118PA00X+049900Y-015930X0236Y0000R000S-1293668029 -317NET-(U2-EN) VIA MD0118PA00X+048010Y-015690X0236Y0000R000S-1293668029 -317NET-(U3-BOOT) VIA MD0118PA00X+047510Y-020170X0236Y0000R000S-1293668029 -317NET-(U3-BOOT) VIA MD0118PA00X+049530Y-019950X0236Y0000R000S-1293668029 -317SWCLK_BOOT0 VIA MD0118PA00X+046290Y-038070X0236Y0000R000S-1293668029 -317SWCLK_BOOT0 VIA MD0118PA00X+043477Y-038493X0236Y0000R000S-1293668029 -317SWCLK_BOOT0 VIA MD0118PA00X+049540Y-040370X0236Y0000R000S-1293668029 -317SWDIO VIA MD0118PA00X+048830Y-040290X0236Y0000R000S-1293668029 -317SWDIO VIA MD0118PA00X+045970Y-038360X0236Y0000R000S-1293668029 -317LED_R VIA MD0118PA00X+048853Y-037113X0236Y0000R000S-1293668029 -317LED_R VIA MD0118PA00X+052140Y-041940X0236Y0000R000S-1293668029 -317LED_G VIA MD0118PA00X+051020Y-041930X0236Y0000R000S-1293668029 -317LED_G VIA MD0118PA00X+048190Y-037250X0236Y0000R000S-1293668029 -317LED_B VIA MD0118PA00X+048520Y-037180X0236Y0000R000S-1293668029 -317LED_B VIA MD0118PA00X+051530Y-041940X0236Y0000R000S-1293668029 -317NET-(U3-EN) VIA MD0118PA00X+047170Y-019550X0236Y0000R000S-1293668029 -317NET-(U3-EN) VIA MD0118PA00X+046644Y-019370X0236Y0000R000S-1293668029 -317DE VIA MD0118PA00X+042990Y-020870X0236Y0000R000S-1293668029 -317DE VIA MD0118PA00X+049350Y-033360X0236Y0000R000S-1293668029 -317NET-(U7-EN) VIA MD0118PA00X+052895Y-027202X0236Y0000R000S-1293668029 -317NET-(U7-EN) VIA MD0118PA00X+054130Y-027331X0236Y0000R000S-1293668029 -317IPROP_PEEL VIA MD0118PA00X+048708Y-033254X0236Y0000R000S-1293668029 -317IPROP_PEEL VIA MD0118PA00X+048191Y-030887X0236Y0000R000S-1293668029 -317DRIVE1 VIA MD0118PA00X+046484Y-033732X0236Y0000R000S-1293668029 -317DRIVE1 VIA MD0118PA00X+045699Y-031783X0236Y0000R000S-1293668029 -317DRIVE2 VIA MD0118PA00X+045622Y-032123X0236Y0000R000S-1293668029 -317DRIVE2 VIA MD0118PA00X+046462Y-034046X0236Y0000R000S-1293668029 -317PEEL1 VIA MD0118PA00X+048478Y-029665X0236Y0000R000S-1293668029 -317PEEL1 VIA MD0118PA00X+050260Y-032130X0236Y0000R000S-1293668029 -317PEEL2 VIA MD0118PA00X+049910Y-032120X0236Y0000R000S-1293668029 -317PEEL2 VIA MD0118PA00X+048471Y-030005X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+049518Y-024685X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+047647Y-030190X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+052738Y-027833X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+047300Y-030670X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+044150Y-014490X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+052953Y-032362X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+050833Y-037327X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+047290Y-030330X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+052272Y-025850X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+048296Y-032208X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+044910Y-032310X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+058630Y-041470X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+043220Y-030500X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+043650Y-017730X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+045606Y-015799X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+050640Y-035765X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+049412Y-029474X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+046290Y-030010X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+051583Y-028264X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+050170Y-014300X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+049980Y-037300X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+047440Y-016240X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+049430Y-030280X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+049070Y-027330X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+052860Y-034270X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+055520Y-029980X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+052579Y-032972X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+049508Y-023799X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+055520Y-031193X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+041654Y-031624X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+046280Y-030400X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+050100Y-013070X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+049790Y-029810X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+045590Y-016230X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+055524Y-030591X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+049680Y-037250X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+055531Y-030874X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+047950Y-020150X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+046270Y-030790X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+050980Y-036070X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+042598Y-031624X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+050820Y-029810X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+049498Y-023209X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+045252Y-015799X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+047110Y-016230X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+046020Y-015020X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+045320Y-019950X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+049488Y-022923X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+053900Y-015333X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+044540Y-033010X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+051307Y-028269X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+052165Y-032303X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+049390Y-030571X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+046190Y-016230X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+051358Y-032835X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+046614Y-019764X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+049518Y-024390X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+046319Y-022293X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+053900Y-015693X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+050310Y-044170X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+049516Y-026874X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+044260Y-032470X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+046063Y-019921X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+046594Y-031693X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+043230Y-030170X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+048110Y-019490X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+046329Y-021998X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+051850Y-033012X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+048290Y-020150X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+048787Y-026996X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+045260Y-016230X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+050154Y-027461X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+049528Y-024970X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+040660Y-015920X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+044900Y-016250X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+049518Y-025266X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+044530Y-032730X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+046010Y-015330X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+046590Y-030190X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+047360Y-030960X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+052311Y-026311X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+055535Y-030295X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+040470Y-017450X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+055390Y-031504X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+043230Y-030820X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+043090Y-036980X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+044230Y-033020X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+049210Y-016590X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+047720Y-016370X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+048630Y-020170X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+056650Y-043540X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+049710Y-014310X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+042260Y-017120X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+044530Y-032460X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+044870Y-033010X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+052196Y-035090X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+052870Y-033600X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+049508Y-024104X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+046600Y-030600X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+046339Y-022864X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+042920Y-030100X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+049900Y-034320X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+046590Y-030970X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+047710Y-016080X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+057440Y-037660X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+051349Y-034139X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+045320Y-019310X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+053770Y-044770X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+046531Y-037382X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+049173Y-026992X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+052980Y-028087X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+050470Y-013450X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+045859Y-033241X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+045900Y-016220X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+043140Y-029880X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+047540Y-018700X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+048010Y-018810X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+043090Y-012140X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+044460Y-034620X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+047710Y-030900X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+044220Y-032730X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+053520Y-015703X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+055776Y-037783X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+049478Y-022323X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+050460Y-013070X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+048780Y-027320X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+049701Y-027362X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+046500Y-016230X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+048090Y-019170X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+049469Y-021742X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+049488Y-022608X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+043510Y-012770X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+041160Y-020850X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+046329Y-022569X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+052146Y-032854X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+049478Y-022028X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+049744Y-027079X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+042910Y-030450X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+046380Y-036320X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+053520Y-015323X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+046972Y-038339X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+051320Y-032360X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+045060Y-019134X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+045990Y-015630X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+049498Y-023514X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+049793Y-030108X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+046800Y-016230X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+056340Y-043860X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+043457Y-018783X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+050090Y-013450X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+053760Y-045570X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+049370Y-027320X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+046339Y-023140X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+056024Y-042394X0236Y0000R000S-1293668029 -317GND VIA MD0118PA00X+051283Y-025728X0236Y0000R000S-1293668029 -317NET-(J7-PIN_1) VIA MD0118PA00X+050413Y-042091X0236Y0000R000S-1293668029 -317NET-(J7-PIN_1) VIA MD0118PA00X+047819Y-038110X0236Y0000R000S-1293668029 -317NRE VIA MD0118PA00X+049140Y-033610X0236Y0000R000S-1293668029 -317NRE VIA MD0118PA00X+042610Y-020870X0236Y0000R000S-1293668029 -317USART2_TX VIA MD0118PA00X+043460Y-020870X0236Y0000R000S-1293668029 -317USART2_TX VIA MD0118PA00X+049599Y-032070X0236Y0000R000S-1293668029 -317USART2_RX VIA MD0118PA00X+048090Y-031970X0236Y0000R000S-1293668029 -317USART2_RX VIA MD0118PA00X+042200Y-020940X0236Y0000R000S-1293668029 -317USART1_TX VIA MD0118PA00X+052280Y-035990X0236Y0000R000S-1293668029 -317USART1_TX VIA MD0118PA00X+052260Y-038050X0236Y0000R000S-1293668029 -317USART1_RX VIA MD0118PA00X+051310Y-037370X0236Y0000R000S-1293668029 -317USART1_RX VIA MD0118PA00X+051440Y-036450X0236Y0000R000S-1293668029 -317NET-(D3-A) VIA MD0118PA00X+045660Y-034130X0236Y0000R000S-1293668029 -317NET-(D3-A) VIA MD0118PA00X+044800Y-035060X0236Y0000R000S-1293668029 +317+3V3 VIA MD0118PA00X+045469Y-024937X0236Y0000R000S679999539 +317+3V3 VIA MD0118PA00X+042090Y-019150X0236Y0000R000S679999539 +317+3V3 VIA MD0118PA00X+042787Y-039988X0236Y0000R000S679999539 +317+3V3 VIA MD0118PA00X+041594Y-038835X0236Y0000R000S679999539 +317+3V3 VIA MD0118PA00X+048800Y-037440X0236Y0000R000S679999539 +317+3V3 VIA MD0118PA00X+047156Y-031850X0236Y0000R000S679999539 +317SW1 VIA MD0118PA00X+056970Y-038900X0236Y0000R000S679999539 +317SW1 VIA MD0118PA00X+050390Y-036570X0236Y0000R000S679999539 +317SW2 VIA MD0118PA00X+049660Y-036920X0236Y0000R000S679999539 +317SW2 VIA MD0118PA00X+055051Y-038960X0236Y0000R000S679999539 +317DRIVE_QUAD_A VIA MD0118PA00X+042874Y-032165X0236Y0000R000S679999539 +317DRIVE_QUAD_A VIA MD0118PA00X+043890Y-033310X0236Y0000R000S679999539 +317DRIVE_QUAD_B VIA MD0118PA00X+044020Y-034080X0236Y0000R000S679999539 +317DRIVE_QUAD_B VIA MD0118PA00X+042744Y-032586X0236Y0000R000S679999539 +3171WIRE VIA MD0118PA00X+044550Y-025410X0236Y0000R000S679999539 +3171WIRE VIA MD0118PA00X+041220Y-018840X0236Y0000R000S679999539 +3171WIRE VIA MD0118PA00X+047740Y-033360X0236Y0000R000S679999539 +317+12V VIA MD0118PA00X+051996Y-027035X0236Y0000R000S679999539 +317+12V VIA MD0118PA00X+054409Y-026520X0236Y0000R000S679999539 +317NRESET VIA MD0118PA00X+050840Y-040310X0236Y0000R000S679999539 +317NRESET VIA MD0118PA00X+049730Y-033799X0236Y0000R000S679999539 +317NRESET VIA MD0118PA00X+042701Y-038536X0236Y0000R000S679999539 +317NET-(U2-EN) VIA MD0118PA00X+049900Y-015930X0236Y0000R000S679999539 +317NET-(U2-EN) VIA MD0118PA00X+048010Y-015690X0236Y0000R000S679999539 +317NET-(U3-BOOT) VIA MD0118PA00X+047510Y-020170X0236Y0000R000S679999539 +317NET-(U3-BOOT) VIA MD0118PA00X+049530Y-019950X0236Y0000R000S679999539 +317SWCLK_BOOT0 VIA MD0118PA00X+046290Y-038070X0236Y0000R000S679999539 +317SWCLK_BOOT0 VIA MD0118PA00X+043477Y-038493X0236Y0000R000S679999539 +317SWCLK_BOOT0 VIA MD0118PA00X+049540Y-040370X0236Y0000R000S679999539 +317SWDIO VIA MD0118PA00X+048830Y-040290X0236Y0000R000S679999539 +317SWDIO VIA MD0118PA00X+045970Y-038360X0236Y0000R000S679999539 +317LED_R VIA MD0118PA00X+048853Y-037113X0236Y0000R000S679999539 +317LED_R VIA MD0118PA00X+052140Y-041940X0236Y0000R000S679999539 +317LED_G VIA MD0118PA00X+051020Y-041930X0236Y0000R000S679999539 +317LED_G VIA MD0118PA00X+048190Y-037250X0236Y0000R000S679999539 +317LED_B VIA MD0118PA00X+048520Y-037180X0236Y0000R000S679999539 +317LED_B VIA MD0118PA00X+051530Y-041940X0236Y0000R000S679999539 +317NET-(U3-EN) VIA MD0118PA00X+047170Y-019550X0236Y0000R000S679999539 +317NET-(U3-EN) VIA MD0118PA00X+046644Y-019370X0236Y0000R000S679999539 +317DE VIA MD0118PA00X+042990Y-020870X0236Y0000R000S679999539 +317DE VIA MD0118PA00X+049350Y-033360X0236Y0000R000S679999539 +317NET-(U7-EN) VIA MD0118PA00X+052895Y-027202X0236Y0000R000S679999539 +317NET-(U7-EN) VIA MD0118PA00X+054130Y-027331X0236Y0000R000S679999539 +317IPROP_PEEL VIA MD0118PA00X+048708Y-033254X0236Y0000R000S679999539 +317IPROP_PEEL VIA MD0118PA00X+048191Y-030887X0236Y0000R000S679999539 +317DRIVE1 VIA MD0118PA00X+046484Y-033732X0236Y0000R000S679999539 +317DRIVE1 VIA MD0118PA00X+045699Y-031783X0236Y0000R000S679999539 +317DRIVE2 VIA MD0118PA00X+045622Y-032123X0236Y0000R000S679999539 +317DRIVE2 VIA MD0118PA00X+046462Y-034046X0236Y0000R000S679999539 +317PEEL1 VIA MD0118PA00X+048478Y-029665X0236Y0000R000S679999539 +317PEEL1 VIA MD0118PA00X+050260Y-032130X0236Y0000R000S679999539 +317PEEL2 VIA MD0118PA00X+049910Y-032120X0236Y0000R000S679999539 +317PEEL2 VIA MD0118PA00X+048471Y-030005X0236Y0000R000S679999539 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MD0118PA00X+050640Y-035765X0236Y0000R000S679999539 +317GND VIA MD0118PA00X+049412Y-029474X0236Y0000R000S679999539 +317GND VIA MD0118PA00X+046290Y-030010X0236Y0000R000S679999539 +317GND VIA MD0118PA00X+051583Y-028264X0236Y0000R000S679999539 +317GND VIA MD0118PA00X+050170Y-014300X0236Y0000R000S679999539 +317GND VIA MD0118PA00X+049980Y-037300X0236Y0000R000S679999539 +317GND VIA MD0118PA00X+047440Y-016240X0236Y0000R000S679999539 +317GND VIA MD0118PA00X+049430Y-030280X0236Y0000R000S679999539 +317GND VIA MD0118PA00X+049070Y-027330X0236Y0000R000S679999539 +317GND VIA MD0118PA00X+052860Y-034270X0236Y0000R000S679999539 +317GND VIA MD0118PA00X+055520Y-029980X0236Y0000R000S679999539 +317GND VIA MD0118PA00X+052579Y-032972X0236Y0000R000S679999539 +317GND VIA MD0118PA00X+049508Y-023799X0236Y0000R000S679999539 +317GND VIA MD0118PA00X+055520Y-031193X0236Y0000R000S679999539 +317GND VIA MD0118PA00X+041654Y-031624X0236Y0000R000S679999539 +317GND VIA MD0118PA00X+046280Y-030400X0236Y0000R000S679999539 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MD0118PA00X+045320Y-019950X0236Y0000R000S679999539 +317GND VIA MD0118PA00X+049488Y-022923X0236Y0000R000S679999539 +317GND VIA MD0118PA00X+053900Y-015333X0236Y0000R000S679999539 +317GND VIA MD0118PA00X+044540Y-033010X0236Y0000R000S679999539 +317GND VIA MD0118PA00X+051307Y-028269X0236Y0000R000S679999539 +317GND VIA MD0118PA00X+052165Y-032303X0236Y0000R000S679999539 +317GND VIA MD0118PA00X+049390Y-030571X0236Y0000R000S679999539 +317GND VIA MD0118PA00X+046190Y-016230X0236Y0000R000S679999539 +317GND VIA MD0118PA00X+051358Y-032835X0236Y0000R000S679999539 +317GND VIA MD0118PA00X+046614Y-019764X0236Y0000R000S679999539 +317GND VIA MD0118PA00X+049518Y-024390X0236Y0000R000S679999539 +317GND VIA MD0118PA00X+046319Y-022293X0236Y0000R000S679999539 +317GND VIA MD0118PA00X+053900Y-015693X0236Y0000R000S679999539 +317GND VIA MD0118PA00X+050310Y-044170X0236Y0000R000S679999539 +317GND VIA MD0118PA00X+049516Y-026874X0236Y0000R000S679999539 +317GND VIA MD0118PA00X+044260Y-032470X0236Y0000R000S679999539 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MD0118PA00X+046010Y-015330X0236Y0000R000S679999539 +317GND VIA MD0118PA00X+046590Y-030190X0236Y0000R000S679999539 +317GND VIA MD0118PA00X+047360Y-030960X0236Y0000R000S679999539 +317GND VIA MD0118PA00X+052311Y-026311X0236Y0000R000S679999539 +317GND VIA MD0118PA00X+055535Y-030295X0236Y0000R000S679999539 +317GND VIA MD0118PA00X+040470Y-017450X0236Y0000R000S679999539 +317GND VIA MD0118PA00X+055390Y-031504X0236Y0000R000S679999539 +317GND VIA MD0118PA00X+043230Y-030820X0236Y0000R000S679999539 +317GND VIA MD0118PA00X+043090Y-036980X0236Y0000R000S679999539 +317GND VIA MD0118PA00X+044230Y-033020X0236Y0000R000S679999539 +317GND VIA MD0118PA00X+049210Y-016590X0236Y0000R000S679999539 +317GND VIA MD0118PA00X+047720Y-016370X0236Y0000R000S679999539 +317GND VIA MD0118PA00X+048630Y-020170X0236Y0000R000S679999539 +317GND VIA MD0118PA00X+056650Y-043540X0236Y0000R000S679999539 +317GND VIA MD0118PA00X+049710Y-014310X0236Y0000R000S679999539 +317GND VIA MD0118PA00X+042260Y-017120X0236Y0000R000S679999539 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MD0118PA00X+046531Y-037382X0236Y0000R000S679999539 +317GND VIA MD0118PA00X+049173Y-026992X0236Y0000R000S679999539 +317GND VIA MD0118PA00X+052980Y-028087X0236Y0000R000S679999539 +317GND VIA MD0118PA00X+050470Y-013450X0236Y0000R000S679999539 +317GND VIA MD0118PA00X+045859Y-033241X0236Y0000R000S679999539 +317GND VIA MD0118PA00X+045900Y-016220X0236Y0000R000S679999539 +317GND VIA MD0118PA00X+043140Y-029880X0236Y0000R000S679999539 +317GND VIA MD0118PA00X+047540Y-018700X0236Y0000R000S679999539 +317GND VIA MD0118PA00X+048010Y-018810X0236Y0000R000S679999539 +317GND VIA MD0118PA00X+043090Y-012140X0236Y0000R000S679999539 +317GND VIA MD0118PA00X+044460Y-034620X0236Y0000R000S679999539 +317GND VIA MD0118PA00X+047710Y-030900X0236Y0000R000S679999539 +317GND VIA MD0118PA00X+044220Y-032730X0236Y0000R000S679999539 +317GND VIA MD0118PA00X+053520Y-015703X0236Y0000R000S679999539 +317GND VIA MD0118PA00X+055776Y-037783X0236Y0000R000S679999539 +317GND VIA MD0118PA00X+049478Y-022323X0236Y0000R000S679999539 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MD0118PA00X+053520Y-015323X0236Y0000R000S679999539 +317GND VIA MD0118PA00X+046972Y-038339X0236Y0000R000S679999539 +317GND VIA MD0118PA00X+051320Y-032360X0236Y0000R000S679999539 +317GND VIA MD0118PA00X+045060Y-019134X0236Y0000R000S679999539 +317GND VIA MD0118PA00X+045990Y-015630X0236Y0000R000S679999539 +317GND VIA MD0118PA00X+049498Y-023514X0236Y0000R000S679999539 +317GND VIA MD0118PA00X+049793Y-030108X0236Y0000R000S679999539 +317GND VIA MD0118PA00X+046800Y-016230X0236Y0000R000S679999539 +317GND VIA MD0118PA00X+056340Y-043860X0236Y0000R000S679999539 +317GND VIA MD0118PA00X+043457Y-018783X0236Y0000R000S679999539 +317GND VIA MD0118PA00X+050090Y-013450X0236Y0000R000S679999539 +317GND VIA MD0118PA00X+053760Y-045570X0236Y0000R000S679999539 +317GND VIA MD0118PA00X+049370Y-027320X0236Y0000R000S679999539 +317GND VIA MD0118PA00X+046339Y-023140X0236Y0000R000S679999539 +317GND VIA MD0118PA00X+056024Y-042394X0236Y0000R000S679999539 +317GND VIA MD0118PA00X+051283Y-025728X0236Y0000R000S679999539 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A01X+044520Y-016729X0453Y1063R090S2 32724V C87 -2 A01X+044520Y-017891X0453Y1063R090S2 327+12V C50 -1 A01X+050524Y-028441X0394Y0571R270S2 diff --git a/pcb/mobo/~mobo.kicad_pcb.lck b/pcb/mobo/~mobo.kicad_pcb.lck deleted file mode 100644 index 64ce498..0000000 --- a/pcb/mobo/~mobo.kicad_pcb.lck +++ /dev/null @@ -1 +0,0 @@ -{"hostname":"SUPERDUPER","username":"janik"} \ No newline at end of file diff --git a/pcb/mobo/~mobo.kicad_sch.lck b/pcb/mobo/~mobo.kicad_sch.lck deleted file mode 100644 index 64ce498..0000000 --- a/pcb/mobo/~mobo.kicad_sch.lck +++ /dev/null @@ -1 +0,0 @@ -{"hostname":"SUPERDUPER","username":"janik"} \ No newline at end of file