From 997cc53c40c449467ea5a0abd2d22dc6b33ad947 Mon Sep 17 00:00:00 2001 From: grabowski Date: Mon, 8 Sep 2025 15:50:35 +0700 Subject: [PATCH] added jlc zip creation --- .gitea/workflows/kibot.yml | 7 +++++ kibot.yaml | 61 ++++++++++++++++++++++++++++++++++++++ 2 files changed, 68 insertions(+) diff --git a/.gitea/workflows/kibot.yml b/.gitea/workflows/kibot.yml index b63c294..97c079f 100644 --- a/.gitea/workflows/kibot.yml +++ b/.gitea/workflows/kibot.yml @@ -198,6 +198,13 @@ jobs: name: Fabrication-Package-${{ steps.layers.outputs.layers }}layer path: Generated/*.zip + - name: Retrieve results - JLCPCB Package + if: steps.config_check.outputs.found == 'true' + uses: actions/upload-artifact@v3 + with: + name: JLCPCB-${{ steps.layers.outputs.layers }}layer + path: Generated/*_JLCPCB_compress.zip + # Deploy to documentation branch deploy: runs-on: kicad-kibot-runner diff --git a/kibot.yaml b/kibot.yaml index e520cd5..a41c40a 100644 --- a/kibot.yaml +++ b/kibot.yaml @@ -232,6 +232,67 @@ outputs: output: '%f-report.%x' do_convert: true + # JLCPCB fabrication package + - name: 'jlcpcb_gerbers' + comment: "Gerbers for JLCPCB" + type: gerber + dir: JLCPCB + options: + output: '%f%i.%x' + exclude_edge_layer: false + exclude_pads_from_silkscreen: true + plot_sheet_reference: false + plot_footprint_refs: true + plot_footprint_values: false + force_plot_invisible_refs_vals: false + tent_vias: true + use_protel_extensions: true # JLCPCB prefers Protel extensions + create_gerber_job_file: false # JLCPCB doesn't need this + disable_aperture_macros: true + gerber_precision: 4.6 + use_gerber_x2_attributes: false + use_gerber_net_attributes: false + line_width: 0.1 + subtract_mask_from_silk: true + layers: + - F.Cu + - B.Cu + - In1.Cu + - In2.Cu + - In3.Cu + - In4.Cu + - F.Paste + - B.Paste + - F.Silkscreen + - B.Silkscreen + - F.Mask + - B.Mask + - Edge.Cuts + + # JLCPCB drill files + - name: 'jlcpcb_drill' + comment: "Drill files for JLCPCB" + type: excellon + dir: JLCPCB + options: + output: '%f%i.%x' + metric_units: true + minimal_header: false + mirror_y_axis: false + pth_and_npth_single_file: false # JLCPCB prefers separate files + + # JLCPCB ZIP file + - name: 'jlcpcb_zip' + comment: "JLCPCB fabrication ZIP" + type: compress + dir: . + options: + output: '%f_JLCPCB_compress.%x' + format: ZIP + files: + - source: JLCPCB/* + dest: / + # Fabrication package (ZIP) - name: 'fabrication' comment: "Fabrication package"